TWI699598B - Display array - Google Patents

Abstract

A display array including a semiconductor stacked layer, an insulating layer, a plurality of electrode pads, a plurality of active components, and a driving backplane is provided. The semiconductor stacked layer has a plurality of light emitting regions. The insulating layer is disposed on an outer surface of the semiconductor stacked layer and directly connected to the semiconductor stacked layer. The insulating layer has a plurality of openings. The electrode pads are disposed on the insulating layer. The active components are electrically connected to the electrode pads. The driving backplane is disposed on the semiconductor stacked layer, wherein the electrode pads are electrically connected to a portion of the semiconductor stacked layer through the openings of the insulating layer and the driving backplane to drive the light emitting regions, the electrode pads are respectively located in the openings of the insulating layer and separated by the insulating layer, and there is no patterned between adjacent light emitting regions in the semiconductor stacked layer.

Description

Display array

The present invention relates to a semiconductor structure, and more particularly to a display array.

Micro Light Emitting Diode (Micro LED) has advantages such as long life, small size, high shock resistance, low heat generation and low power consumption, and has also been applied to flat panel and small size displays. In recent years, miniature light-emitting diodes have developed toward multi-color and high-brightness. Therefore, in the future technology applications, there will be more application fields and levels that can even replace the current common light-emitting diodes.

However, in the current technology, shrinking the grain size will face two main difficulties. One of them is the luminous efficiency. Since the size of the miniature light-emitting diode is in the micron range, compared with the general-sized light-emitting diode, the luminous efficiency decline caused by the edge of the crystal grain will account for the overall light emission. More than half of the efficiency. In addition, another one of them is that in the above-mentioned micro light emitting diode array manufacturing process, in addition to cutting or patterning the die in advance to define different light emitting platforms, common electrodes, planarization and macros are also required. Processes such as volume transfer make the process not only complicated but also costly.

The invention provides a display array, which can increase the luminous efficiency and reduce the difficulty of the manufacturing process.

The invention provides a display array, which includes a semiconductor stack layer, an insulating layer, a plurality of electrode pads, a plurality of active elements and a driving backplane. The semiconductor stacked layer has a plurality of light emitting regions. The insulating layer is disposed on an outer surface of the semiconductor stacked layer and is in contact with the semiconductor stacked layer. The insulating layer has a plurality of openings. The electrode pad is disposed on the insulating layer. The active element is electrically connected to the electrode pad. The drive backplane is configured on the semiconductor stack, wherein the electrode pads are electrically connected to part of the semiconductor stack and the drive backplane through the openings of the insulating layer to drive the light-emitting area. The electrode pads are located in the openings of the insulating layer and are separated by the insulating layer. Open, and are not patterned between adjacent light-emitting regions in the semiconductor stack.

The present invention provides a display array, which includes a semiconductor stack layer, at least one electrical isolation part, a plurality of electrode pads, a plurality of active elements and a driving backplane. The semiconductor stacked layer has a plurality of light emitting regions. The electrical isolation part is used to electrically separate the light-emitting area. The electrode pad is disposed on the semiconductor stack layer. The active element is electrically connected to the electrode pad. The drive backplane is configured on the semiconductor stack, where the electrode pads are electrically connected to part of the semiconductor stack and the drive backplane to drive the light-emitting area. The electrode pads are separated by electrical isolation parts and are adjacent to each other in the semiconductor stack The light-emitting areas are not patterned.

Based on the above, in the manufacturing method of the display array of the present invention, a semiconductor stack layer, an insulating layer, and a plurality of electrode pads are formed on a substrate, and the insulating layer has a plurality of openings, so that the electrode pads are located in the openings of the insulating layer and are insulated The layers are separated, so that the electrode pads are electrically connected to a part of the semiconductor stack through the openings of the insulating layer respectively to form a plurality of light emitting regions electrically isolated from each other in the semiconductor stack. Therefore, compared with the traditional method, the manufacturing process and manufacturing difficulty can be simplified, and the problem of the boundary luminous efficiency decline caused by the traditional die etching can be solved.

In order to make the above-mentioned features and advantages of the present invention more comprehensible, the following specific embodiments are described in detail in conjunction with the accompanying drawings.

With the development of science and technology, the size of the display is shrinking year by year, so its internal components and structure also need to be reduced. Therefore, the display array provided by an embodiment of the present invention can be used as a display array in a miniature light-emitting diode display and has a good light-emitting effect. In other words, it is a micro display array formed by micro light emitting diodes.

1A to 1G are schematic cross-sectional views of a manufacturing method of a display array according to an embodiment of the present invention in sequence. Please refer to Figure 1A and Figure 1B first. In the crystal packaging process of this embodiment, first, a substrate 10 is provided, and a semiconductor stack layer 110 is formed on the substrate 10. In this embodiment, the substrate 10 may be a gallium arsenide (GaAs) substrate, a gallium phosphide (GaP) substrate, an indium phosphide (InP) substrate, a sapphire (Sapphire) substrate, a silicon carbide (SiC) substrate, a silicon (Si ) A substrate or a gallium nitride (GaN) substrate, suitable for coating multiple semiconductor material layers, multiple conductive material layers and/or multiple insulating material layers on the surface thereof.

In this embodiment, the semiconductor stacked layer 110 includes a first semiconductor material layer 112, a luminescent material layer 114, and a second semiconductor material layer 116. The first semiconductor material layer 112 is a P-type semiconductor layer, and the second semiconductor material layer 116 is an N-type semiconductor layer, but the invention is not limited thereto. In other embodiments, the first semiconductor material layer 112 is an N-type semiconductor layer, and the second semiconductor material layer 116 may be a P-type semiconductor layer. The material of the N-type semiconductor layer is, for example, N-type gallium nitride (n-GaN) doped with group IVA elements, and the material of the P-type semiconductor layer is, for example, P-type nitride doped with group IIA elements. Gallium (p-GaN), the luminescent material layer 114 has, for example, a Multiple Quantum Well (MQW) structure. The multiple quantum well structure includes multiple quantum well layers (Well) and multiple quantum barrier layers (Barrier) alternately arranged in a repetitive manner.

Further, the material of the luminescent material layer 114 includes, for example, alternately stacked multilayers of indium gallium nitride (InGaN) and multilayers of gallium nitride (GaN). By designing indium (In) or gallium (Ga) in the luminescent material layer 114, The ratio of, the light emitting material layer 114 can emit light of a specific color, in this embodiment, for example, blue light or ultraviolet light. The first semiconductor material layer 112, the luminescent material layer 114, and the second semiconductor material layer 116 may be formed by, for example, a metal-organic chemical vapor deposition (MOCVD) method. The above-mentioned materials or formation methods of the first semiconductor material layer 112, the luminescent material layer 114, or the second semiconductor material layer 116 are only examples, and the present invention is not limited thereto.

It is worth mentioning that the semiconductor stacked layer 110 does not have a patterning or cutting step. That is, the semiconductor stacked layer 110 has not undergone a photolithography process or an etching process, or the semiconductor stacked layer 110 has not undergone a cutting process to further divide the region. Therefore, the semiconductor stacked layer 110 is a structure that continuously extends in the extending direction parallel to the substrate 10, so that the manufacturing process difficulty of the display array can be reduced.

Please refer to Figure 1C to Figure 1E. After the above steps, an insulating layer 120 and a plurality of electrode pads 130 are formed on the semiconductor stack layer 110, wherein the insulating layer 120 has a plurality of openings O1, and the electrode pads 130 are located in the openings O1 of the insulating layer 120 and are insulated The layers 120 are separated, and the insulating layer 120 is directly connected to the outside of the surface of the semiconductor stacked layer 110, as shown in FIG. 1E. In detail, in this embodiment, the insulating layer 120 includes a first insulating layer 122 and a second insulating layer 124. The first insulating layer 122 is, for example, made of an insulating material and has a dielectric protection layer patterned in an array arrangement, and is formed on the semiconductor stacked layer 110, and the first insulating layer 122 has a plurality of openings O11. The insulating material can be an insulating material with light-absorbing properties or an insulating material with reflective properties, wherein the insulating material with light-absorbing properties can be directly made of materials with light-absorbing properties, and the insulating materials with reflective properties can be used with different refraction properties. The reflective effect produced by the multi-layer coating film is made with a high rate, but the present invention is not limited to this. The electrode pad 130 is disposed in the openings O11 of the first insulating layer 122. The second insulating layer 124 is, for example, an encapsulating insulating gel, filling the space between the electrode pads 130 and fixing the electrode pad 130 and the first insulating layer 122. Each electrode pad 130 can be located in the opening O1 formed by the opening O11 of the first insulating layer 122 and the opening O12 of the second insulating layer 124, and the first insulating layer 122 is located in the second insulating layer 124 and the semiconductor stack layer 110 between. In other words, in the openings O1 of the insulating layer 120, the electrode pads 130 completely contact the insulating layer. Therefore, the electrode pads 130 are respectively electrically connected to a part of the semiconductor stack layer 110 through the openings O1 of the insulating layer 120, thereby forming a plurality of light emitting regions in the semiconductor stack layer 110 (see the light emitting region A of 1G). Specifically, during the manufacturing process, the contact area of each electrode pad 130 and the semiconductor stack layer 110 and the distance between adjacent electrode pads 130 can be planned, so that these light-emitting regions are electrically isolated from each other, and the adjacent electrode pads 130 The period of is the same as the period of adjacent sub-pixels of the display panel. In more detail, the above-mentioned light-emitting areas electrically isolated from each other may refer to multiple light-emitting areas that are partially electrically isolated, or multiple light-emitting areas that are completely electrically isolated, and the present invention is not limited thereto.

FIG. 2 is a schematic top view of the display array of FIG. 1G. Please refer to Figure 1F, Figure 1G and Figure 2. After the above steps, the semiconductor stack 110, the insulating layer 120, and the electrode pad 130 are transferred from the substrate 10 to a driving backplane 140 to form the display array 100. The material of the driving backplane 140 can be glass, quartz, organic polymer, silicon wafer or other suitable materials, and is suitable for electrical connection with the semiconductor stack 110 or the electrode pad 130, but the invention is not limited thereto. In this embodiment, the side of the semiconductor stack 110 that faces away from the substrate 10 is bonded to the driving backplane 140 first. After the bonding process described above, the substrate 10 is removed. In detail, after the structure is turned upside down (as shown in FIG. 1F), the substrate 10 can be separated from the semiconductor stacked layer 110 by laser lift-off (LLO) or other suitable methods.

In addition, in some embodiments, the method of transferring the semiconductor stack layer 110, the insulating layer 120, and the electrode pad 130 from the substrate 10 to the driving backplane 140 can also be performed by first removing and then bonding or transferring to a temporary substrate. The removal and bonding process so that the electrode pad 130 is located between the semiconductor stack 110 and the driving backplane 140, the present invention is not limited thereto. In other embodiments similar to the above, after removing the substrate 10, the semiconductor stack layer 110, the insulating layer 120, and the electrode pad 130 can be arranged in an adhesive layer, such as an adhesive, and then the adhesive layer is arranged in the drive On the backplane 140, the adhesive layer is located between the electrode pad 130 and the driving backplane 140 to complete the display array, but the invention is not limited to this.

Therefore, after the above steps are completed, a plurality of light-emitting regions A that are electrically isolated from each other can be formed, and the backplane 140 can be driven to drive the electrode pad 130 to drive the light-emitting region A, and the electrode pad 130 is disposed on the insulating layer 120 The openings (see the opening O1 in Figure 1E) are arranged in a manner to achieve individual driving. Therefore, it is possible to apply a voltage between the light-emitting surface and the end where the electrode pad 130 is disposed, so that the light-emitting areas A can pass the current I to emit light separately without interfering with the light from the adjacent light-emitting area A, as shown in FIG. 2 . In this embodiment, the period of two adjacent light-emitting areas A is less than or equal to 20 microns, that is, the interval between two light-emitting center points of two adjacent light-emitting areas A is less than or equal to 20 microns. In another embodiment, the period of two adjacent light-emitting regions A is less than or equal to 10 microns. In detail, in terms of optical behavior, if the light emitted by one of the light-emitting areas A is transmitted to the adjacent light-emitting area A, the angle between the light-emitting surface and the light-emitting surface will be too small to cause total reflection, which prevents the light from coming from adjacent The luminous area A emits. The present embodiment shows that the light-emitting surface side of the array 100 can be additionally provided with a conductive layer, and the detailed configuration will be described later, and the present invention is not limited to this. In this way, compared with the traditional method, the manufacturing process and the difficulty of manufacturing can be simplified, and the problem of the luminous efficiency decline of the boundary caused by the traditional die etching is solved.

3 is a schematic cross-sectional view of a display array according to another embodiment of the invention. Please refer to Figure 3. The display array 100A of this embodiment is similar to the display array 100 of FIG. 1G. The only difference between the two is that, in this embodiment, the display array 100A further includes a plurality of color conversion elements 150, which are arranged on the semiconductor stack 110 to emit light. Side up. For example, in this embodiment, the semiconductor stacked layer 110 emits blue light, so the red light conversion element 152 and the green light conversion element 154, such as a quantum dot film, can be arranged in an array formed in the light-emitting area. (Quantum Dot Film). Therefore, the light emitted by the display array 100A can have three colors of red, green, and blue to be applied to different types of displays.

4 is a schematic cross-sectional view of a display array according to another embodiment of the invention. Please refer to Figure 4. The display array 100B of this embodiment is similar to the display array 100 of FIG. 1G, the only difference between the two is that in this embodiment, the display array 100B further includes an electrode layer 160 and a light-absorbing layer 170. The electrode layer 160 is disposed on the semiconductor stacked layer 110, the light absorption layer 170 is disposed on the electrode layer 160, and the electrode layer 160 is located between the light absorption layer 170 and the semiconductor stacked layer 110. In detail, after the step of FIG. 1G described above, the steps of forming the electrode layer 160 on the semiconductor stacked layer 110 and forming the light absorption layer 170 on the electrode layer 160 can be continued.

In detail, in this embodiment, the electrode layer 160 is a transparent conductive material, such as an indium tin oxide (ITO) film. The light-absorbing layer 170 is, for example, a black light-absorbing material, and has a plurality of openings O2. The light emitting area A is located between the opening O2 of the light absorption layer 170 and the electrode pad 130. Therefore, the light-emitting area A of the semiconductor stacked layer 110 can emit light by the voltage applied between the electrode pad 130 and the electrode layer 160, and the emitted light can achieve the effect of improving contrast by passing through the opening O2 of the light-absorbing layer 170. Observed from a viewing angle from above, the display area of the display array 100B can be defined as the area occupied by the opening O2 of the light-absorbing layer 170, and the occupied area can be less than or equal to the light-emitting area of the light-emitting area A to improve contrast. In detail, the light-emitting area of the light-emitting region A is greater than or equal to the area occupied by the opening O2 of the light-absorbing layer 170. The area occupied by the opening O2 of the light absorption layer 170 is larger than the area occupied by the opening O11 of the first insulating layer 122. That is, the coverage area of the light absorption layer 170 is smaller than the coverage area of the first insulating layer 122. Therefore, the light-emitting area A can be electrically isolated from the adjacent light-emitting area A by the size of the opening O11 of the first insulating layer 122, and the light emitted by the light-emitting area A can be limited by the opening O2 of the light-absorbing layer 170 to limit the light-emitting area. Moreover, the period of the opening O11 of the adjacent first insulating layer 122 is the same as the period of the adjacent sub-pixels of the display panel. In this way, the display area of the display array 100B can be configured and the light-emitting quality of the display array 100B can be improved.

5 is a schematic cross-sectional view of a display array according to another embodiment of the invention. Please refer to Figure 5. The display array 100C of this embodiment is similar to the display array 100B of FIG. 4, except that the difference between the two is that, in this embodiment, the electrode layer 160A of the display array 100C has a plurality of openings O3, and the opening O3 of the electrode layer 160A Located between the opening O2 of the light-absorbing layer 170 and the light-emitting area A. In this embodiment, the electrode layer 160A is, for example, a grid-shaped metal electrode. In detail, in this embodiment, the electrode layer 160A is made of a non-transmissive conductive material. Therefore, the light emitted from the light-emitting area A of this embodiment can be limited by the opening O3 of the electrode layer 160A and the opening O2 of the light-absorbing layer 170. In this embodiment, the size of the opening O3 of the electrode layer 160A and the size of the opening O2 of the light absorption layer 170 may be the same or different, and the present invention is not limited thereto. In addition, it is worth mentioning that the material of the first insulating layer 122 in the array 100B shown in FIG. 4 and the array 100C shown in FIG. 5 can be the same as the light absorbing layer 170 in FIG. The light on one side of the light emitting surface.

6 is a schematic cross-sectional view of a display array according to another embodiment of the invention. Please refer to Figure 6. The display array 100D of this embodiment is similar to the display array 100 of FIG. 1G, except that the difference between the two is that, in this embodiment, the insulating layer 120A of the display array 100D is only formed of an encapsulating insulating gel. Specifically, in this embodiment, an electrode pad 130A with a smaller contact area with the semiconductor stack layer 110 can be selected, so that the generated light-emitting regions A can be electrically isolated from each other.

7A to 7F are schematic cross-sectional diagrams of a manufacturing method of a display array according to another embodiment of the invention in sequence. Please refer to FIG. 1B and FIGS. 7A to 7F. In this embodiment, after the steps of forming the semiconductor stacked layer 110 on the substrate 10 are completed, the semiconductor stacked layer 110 may be formed by ion implantation. At least one electrical isolation portion B is formed to electrically separate the light-emitting area A to form the semiconductor stacked layer 110A. In other words, in this step, only ion implantation is used to further improve the insulation characteristics between adjacent light-emitting regions A without the need to additionally pattern the semiconductor stacked layer 110 by the aforementioned patterning process. The shape of the electrical isolation portion B is a grid shape, and its impedance value is greater than 100 times the impedance value of the light-emitting area A. In this embodiment, the depth distribution of the electrical isolation portion B can reach two opposite sides of the semiconductor stacked layer 110A, that is, the thickness of the semiconductor stacked layer 110A. However, in some embodiments, the depth distribution of the electrical isolation portion B may be smaller than the thickness of the semiconductor stacked layer 110A, for example, distributed in the second semiconductor material layer 116 or distributed in the second semiconductor material layer 116 and the luminescent material layer 114. It does not penetrate the entire semiconductor stack 110A, and the present invention is not limited thereto.

Therefore, when a voltage is applied to the light-emitting area A, electrical isolation between adjacent light-emitting areas A can be more ensured. In this way, the electrical isolation effect of the adjacent light-emitting area A can be enhanced, and the light-emitting efficiency can be further improved. The manufacturing method of FIGS. 7B to 7F is to sequentially form a first insulating layer 122, a plurality of electrode pads 130, and a second insulating layer 124, and transfer the semiconductor stack layer 110A, the insulating layer 120, and the electrode pad 130 from the substrate 10 to the drive On the back plate 140. The steps of the detailed manufacturing process can be manufactured by obtaining sufficient enlightenment from the description of the above-mentioned FIG. 1C to FIG. 1G, so it will not be repeated.

FIG. 8 is a schematic cross-sectional view of a display array according to another embodiment of the invention. Please refer to Figure 8. The display array 100F of this embodiment is similar to the display array 100E of FIG. 7F. The only difference between the two is that, in this embodiment, the display array 100F further includes an electrode layer 160 and a light-absorbing layer 170 similar to those shown in FIG. 4 . Therefore, the light-emitting area A of the semiconductor stacked layer 110A can emit light by the voltage applied between the electrode pad 130 and the electrode layer 160, and the emitted light can achieve the effect of improving contrast by passing through the opening of the light-absorbing layer 170. The steps of the detailed manufacturing process can be manufactured by obtaining sufficient enlightenment from the description of the above-mentioned FIG. 4, so it will not be repeated.

9 is a schematic cross-sectional view of a display array according to another embodiment of the invention. Please refer to Figure 9. The display array 100G of this embodiment is similar to the display array 100F of FIG. 8, except that the difference between the two is that in this embodiment, the electrode layer 160A of the display array 100G is similar to the electrode layer 160A shown in FIG. It has a plurality of openings, and the opening of the electrode layer 160A is located between the opening of the light absorption layer 170 and the light-emitting area A. The steps of the detailed manufacturing process can be manufactured by obtaining sufficient enlightenment from the description of the above-mentioned FIG. 5, so it will not be repeated.

10 is a schematic cross-sectional view of a display array according to another embodiment of the invention. Please refer to Figure 10. The display array 100H of this embodiment is similar to the display array 100E of FIG. 7F. The only difference between the two is that, in this embodiment, the insulating layer 120A of the display array 100H is similar to the insulating layer 120A shown in FIG. Only formed by encapsulating insulating glue. However, in this embodiment, since the semiconductor stacked layer 110A has the electrical isolation portion B, the electrode pad 130B does not need to select the one with a smaller contact area with the semiconductor stacked layer 110A to achieve good electrical properties between adjacent light-emitting regions A. The effect of isolation. The steps of the detailed manufacturing process can be manufactured by obtaining sufficient enlightenment from the description of the above-mentioned FIG. 6, so it is not repeated here.

11A to 11C are schematic cross-sectional views of a manufacturing method of a display array according to another embodiment of the present invention in sequence. Please refer to FIGS. 1C and 11A first. In this embodiment, after the steps of forming the first insulating layer 122 (ie, insulating layer 120B) on the semiconductor stacked layer 110 are completed, an electrode pad 130C is disposed on the first insulating layer 122 And active components 180. In this embodiment, the electrode pad 130C is, for example, an indium tin oxide film, and the active device 180 is, for example, a thin film transistor (Thin Film Transistor, TFT). The active device 180 is electrically connected to the electrode pad 130C. Therefore, the semiconductor stacked layer 110 can be opened by the active device 180 and the light emitted can penetrate the electrode pad 130C.

Please refer to Figure 11B and Figure 11C. After completing the above steps, the semiconductor stack layer 110, the insulating layer 120B, the electrode pad 130C, and the active device 180 are transferred from the substrate 10 to the driving backplane 140 to form the display array 100I. In this embodiment, the removal and bonding process mentioned in the above description is adopted, or the removal and bonding process is performed after transferring to a temporary substrate, so that the semiconductor stack layer 110 is located between the electrode pad 130C and the driving backplane 140. In detail, after the above steps are completed, the substrate 10 is removed, as shown in FIG. 11B. Then, the semiconductor stacked layer 110 is originally disposed on the side of the substrate 10 and disposed on the driving backplane 140, so that the semiconductor stacked layer 110 and the driving backplane 140 are electrically connected. Therefore, the semiconductor stack 110 can turn on or off the current conduction by the active device 180. When the active device 180 is turned on, the semiconductor stack 110 can emit light through the voltage applied between the electrode pad 130C and the driving backplane 140, and emit light. The light is emitted through the transparent electrode pad 130C. In this way, the manufacturing process and the difficulty of manufacturing can be simplified, and the problem of declining luminous efficiency of the boundary caused by traditional die etching can be solved.

FIG. 12 is a schematic cross-sectional view of a display array according to another embodiment of the invention. Please refer to Figure 12. The display array 100J of this embodiment is similar to the display array 100I of FIG. 11C. The only difference between the two is that, in this embodiment, the semiconductor stack 110A of the display array 100J is similar to the semiconductor stack shown in FIG. 7F. 110A, having at least one electrical isolation portion B to separate the light-emitting area A. In addition, compared with the display array 100I of FIG. 11C, in this embodiment, since the semiconductor stacked layer 110A has an electrical isolation portion B, the insulating layer 120B configured in the display array 100I of FIG. 11C can be omitted, but the invention is not limited to this.

13A to 13D are schematic cross-sectional diagrams of a manufacturing method of a display array according to another embodiment of the invention in sequence. Please refer to FIGS. 11C and 13A to 13C. In this embodiment, the structure of FIG. 13A is similar to the structure of FIG. 11C, except that the difference between the two is that, in this embodiment, the electrode pad 130 is a non-transparent conductive material. After the step of forming the first insulating layer 122, the electrode pad 130, the second insulating layer 124 and the active device 180, the semiconductor stack 110, the insulating layer 120, the electrode pad 130 and the active device 180 are separated from the substrate 10 The transfer is configured on a driving backplane 140, as shown in FIG. 13C. The steps of the detailed manufacturing process can be manufactured by obtaining sufficient enlightenment from the description of the above-mentioned FIG. 1E to FIG. 1G, so it will not be repeated.

Please refer to Figure 13D. After the above steps are completed, the electrode layer 160 is formed on the semiconductor stacked layer 110 so that the semiconductor stacked layer 110 is located between the electrode layer 160 and the active device 180 to complete the display array 100K. In this embodiment, the electrode layer 160 is made of a transparent conductive material, such as an indium tin oxide (ITO) film. Therefore, the semiconductor stacked layer 110 can emit light through the voltage applied between the electrode pad 130 and the electrode layer 160, and the emitted light is emitted by the light-transmitting electrode layer 160. The steps of the detailed manufacturing process can be obtained by obtaining sufficient enlightenment from the above description of FIG. 4, so it will not be repeated.

14 is a schematic cross-sectional view of a display array according to another embodiment of the invention. Referring to FIG. 14, the display array 100L of this embodiment is similar to the display array 100K of FIG. 13D. The only difference between the two is that in this embodiment, the display array 100L also includes an adhesive layer 190, which is located on the electrode pads. Between 130 and the driving backplane 140, the adhesive layer 190 is, for example, an insulating adhesive layer or anisotropic conductive adhesive. In detail, in the process of FIG. 13A, after the substrate 10 is removed, the semiconductor stack 110, the insulating layer 120B, and the electrode pad 130 are first arranged on the adhesive layer 190, and then the adhesive layer 190 is arranged on the driving backplane 140 Above, the adhesive layer 190 is located between the electrode pad 130 and the driving backplane 140 to complete the display array 100L.

15 is a schematic cross-sectional view of a display array according to another embodiment of the invention. Please refer to FIG. 15. The display array 100M of this embodiment is similar to the display array 100K of FIG. 13D. The only difference between the two is that, in this embodiment, the semiconductor stack 110A of the display array 100M is similar to that depicted in FIG. 7F. The illustrated semiconductor stacked layer 110A has at least one electrical isolation portion B to separate the light-emitting area A. In addition, since the semiconductor stacked layer 110A has an electrical isolation portion B, the insulating layer 120 configured in the array 100K shown in FIG. 13D can be omitted, and the insulating layer 120A formed of a packaging insulating gel can be selected, but the present invention is not limited to this.

16 is a schematic cross-sectional view of a display array according to another embodiment of the invention. Please refer to FIG. 16, the display array 100N of this embodiment is similar to the display array 100M of FIG. 15. The only difference between the two is that in this embodiment, the display array 100N also includes an adhesive layer 190, which is located on the electrode pad Between 130 and the driving backplane 140, the adhesive layer 190 is, for example, an insulating adhesive layer or anisotropic conductive adhesive. The steps of the detailed manufacturing process can be manufactured by obtaining sufficient enlightenment from the description of FIG. 14 described above, so it will not be repeated.

FIG. 17 is a flowchart of steps of a method of manufacturing a display array according to an embodiment of the invention. Please refer to Figure 1A to Figure 1G and Figure 17. The manufacturing method of the display array taught in this embodiment can at least be applied to all the above embodiments. For the convenience of description, the following description will take the embodiment of FIGS. 1A to 1G as an example, but the present invention is not limited to this. In the manufacturing method of the display array of this embodiment, step S200 is first performed to provide a substrate 10, and a semiconductor stack layer 110 is formed on the substrate 10, as shown in FIG. 1B. Next, step S210 is performed to form an insulating layer 120 and a plurality of electrode pads 130 on the semiconductor stacked layer 110. The insulating layer 120 has a plurality of openings O1, and the electrode pads 130 are located in the openings O1 of the insulating layer 120 and are The insulating layer 120 is separated, as shown in FIG. 1E. Finally, step S220 is performed to transfer the semiconductor stack 110, the insulating layer 120, and the electrode pads 130 from the substrate 10 to a driving backplane 140, wherein the electrode pads 130 pass through the openings O1 and portions of the insulating layer 120, respectively The semiconductor stacked layer 110 and the driving backplane 140 are electrically connected to form a plurality of light emitting regions A electrically isolated from each other on the semiconductor stacked layer 110, as shown in FIG. 1G. In this way, compared with the traditional method, the manufacturing process and the difficulty of manufacturing can be simplified, and the problem of the luminous efficiency decline of the boundary caused by the traditional die etching is solved.

In summary, in the manufacturing method of the display array of the present invention, a semiconductor stack layer, an insulating layer, and a plurality of electrode pads are formed on the substrate, and the insulating layer has a plurality of openings so that the electrode pads are located in the openings of the insulating layer The electrode pads are separated by the insulating layer, and the electrode pads are electrically connected to part of the semiconductor stack through the openings of the insulating layer to form a plurality of light emitting regions electrically isolated from each other in the semiconductor stack. Therefore, compared with the traditional method, the manufacturing process and manufacturing difficulty can be simplified, and the problem of the boundary luminous efficiency decline caused by the traditional die etching can be solved.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the relevant technical field can make some changes and modifications without departing from the spirit and scope of the present invention. The scope of protection of the present invention shall be subject to those defined by the attached patent scope.

10‧‧‧Substrate 100, 100A, 100B, 100C, 100D, 100E, 100F, 100G, 100H, 100I, 100J, 100K, 100L, 100M, 100N‧‧‧Display array 110, 110A‧‧‧Semiconductor stack layer 112‧ ‧‧First semiconductor material layer 114‧‧‧Luminescent material layer 116‧‧‧Second semiconductor material layer 120, 120A, 120B‧‧‧Insulation layer 122‧‧‧First insulation layer 124‧‧‧Second insulation layer 130 , 130A, 130B, 130C‧‧‧Electrode pad 140‧‧‧Drive back plate 150‧‧‧Color conversion element 152‧‧‧Red light conversion element 154‧‧‧Green light conversion element 160, 160A‧‧‧Electrode layer 170 ‧‧‧Light-absorbing layer 180‧‧‧Active component 190‧‧‧Adhesive layer A‧‧‧Light-emitting area B‧‧‧Electrical isolation part I‧‧‧Current O1, O11, O12, O2, O3‧‧‧ Opening S200 , S210, S220‧‧‧Step

1A to 1G are schematic cross-sectional views of a manufacturing method of a display array according to an embodiment of the present invention in sequence. FIG. 2 is a schematic top view of the display array of FIG. 1G. 3 is a schematic cross-sectional view of a display array according to another embodiment of the invention. 4 is a schematic cross-sectional view of a display array according to another embodiment of the invention. 5 is a schematic cross-sectional view of a display array according to another embodiment of the invention. 6 is a schematic cross-sectional view of a display array according to another embodiment of the invention. 7A to 7F are schematic cross-sectional diagrams of a manufacturing method of a display array according to another embodiment of the invention in sequence. FIG. 8 is a schematic cross-sectional view of a display array according to another embodiment of the invention. 9 is a schematic cross-sectional view of a display array according to another embodiment of the invention. 10 is a schematic cross-sectional view of a display array according to another embodiment of the invention. 11A to 11C are schematic cross-sectional views of a manufacturing method of a display array according to another embodiment of the present invention in sequence. FIG. 12 is a schematic cross-sectional view of a display array according to another embodiment of the invention. 13A to 13D are schematic cross-sectional diagrams of a manufacturing method of a display array according to another embodiment of the invention in sequence. 14 is a schematic cross-sectional view of a display array according to another embodiment of the invention. 15 is a schematic cross-sectional view of a display array according to another embodiment of the invention. 16 is a schematic cross-sectional view of a display array according to another embodiment of the invention. FIG. 17 is a flowchart of steps of a method of manufacturing a display array according to an embodiment of the invention.

100I‧‧‧‧‧‧Display array

110‧‧‧Semiconductor stack

120B‧‧‧‧‧‧Insulation layer

130C‧‧‧‧‧‧electrode pad

140‧‧‧Drive Backplane

180‧‧‧Active Components

A‧‧‧Light-emitting area

I‧‧‧Current

Claims (18)

A display array includes: a semiconductor stack layer having a plurality of light emitting regions; an insulating layer disposed on an outer surface of the semiconductor stack layer and in contact with the semiconductor stack layer, the insulating layer having a plurality of openings; a plurality of electrodes Pads are arranged on the insulating layer; a plurality of active devices are respectively electrically connected to the electrode pads; and a driving backplane is arranged on the semiconductor stack layer, wherein the electrode pads respectively pass through the openings of the insulating layer Are electrically connected to a part of the semiconductor stack and the driving backplane to drive the light emitting regions, the electrode pads are located in the openings of the insulating layer and are separated by the insulating layer, and are in the semiconductor stack The adjacent light-emitting regions are not patterned. In the display array described in the first item of the patent application, the active elements are thin film transistors. According to the display array described in claim 1, wherein the semiconductor stack layer is located between the electrode pads and the driving backplane. According to the display array described in item 3 of the scope of patent application, the electrode pads are made of transparent conductive materials. According to the display array described in claim 1, wherein the electrode pads are located between the semiconductor stack layer and the driving backplane. According to the first item of the scope of patent application, the display array further includes: an electrode layer disposed on the semiconductor stack layer, and the semiconductor stack layer is located between the electrode layer and the electrode pads. According to the display array described in item 6 of the scope of patent application, the electrode layer is made of transparent conductive material. The display array according to claim 1, wherein the insulating layer includes a first insulating layer and a second insulating layer, and the first insulating layer is located between the semiconductor stack layer and the second insulating layer. According to the display array described in claim 1, wherein the semiconductor stack layer further has at least one electrical isolation portion, and the impedance value of the at least one electrical isolation portion is greater than 100 times the impedance value of the light-emitting regions. According to the display array described in claim 9, wherein the distribution depth of the at least one electrical isolation portion is less than or equal to the thickness of the semiconductor stacked layer. The display array described in the first item of the scope of patent application further includes: an adhesive layer disposed on the electrode pads, and the adhesive layer is located between the electrode pads and the driving backplane. The display array described in item 1 of the scope of the patent application further includes: a plurality of color conversion elements arranged on the semiconductor stack layer. As for the display array described in item 1 of the scope of patent application, the period of two adjacent light-emitting areas is less than or equal to 20 microns. A display array includes: a semiconductor stacked layer having a plurality of light-emitting regions; at least one electrical isolation portion for electrically separating the light-emitting regions; a plurality of electrode pads arranged on the semiconductor stacked layer; a plurality of active devices , Are respectively electrically connected to the electrode pads; and a driving backplane is disposed on the semiconductor stacked layer, wherein the electrode pads are electrically connected to part of the semiconductor stacked layer and the driving backplane to drive the light emitting Region, the electrode pads are separated by the at least one electrical isolation portion, and the adjacent light-emitting regions in the semiconductor stack layer are not patterned. In the display array according to claim 14, wherein the semiconductor stack layer is located between the electrode pads and the driving backplane. The display array described in item 14 of the scope of patent application further includes: an electrode layer disposed on the semiconductor stack layer, and the semiconductor stack layer is located between the electrode layer and the electrode pads. The display array described in claim 16 further includes: an adhesive layer disposed on the electrode pads and the active components, and the adhesive layer is located between the electrode pads and the driving backplane. According to the display array described in item 14 of the scope of patent application, the period of two adjacent light-emitting regions is less than or equal to 20 microns.

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