TWI696207B - Test structure for charged particle beam inspection and method for defect determination using the same - Google Patents
Test structure for charged particle beam inspection and method for defect determination using the same Download PDFInfo
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本發明是關於一種半導體元件的檢測結構及用其檢測缺陷的檢測方法,特別是關於一種用於帶電粒子束(charged particle beam)檢測之檢測結構及用其檢測半導體元件之電性缺陷的檢測方法。 The invention relates to a semiconductor element detection structure and a defect detection method using the same, in particular to a detection structure for charged particle beam (charged particle beam) detection and a method for detecting electrical defects of a semiconductor element .
帶電粒子束檢測(charged particle beam inspection)為一種非破壞性的缺陷檢測方法,主要用來檢測可能導致半導體元件報廢的重大電性缺陷,例如線路之間的短路缺陷(short)、斷路缺陷(open)或漏電流缺陷(leakage)。相較於習知必須在後段金屬化製程完成後,進行晶圓可接受度測試(WAT),以固定式探針設備量測電性表現和檢測電性異常,帶電粒子束檢測可以在半導體元件完成部分製程後,線上(inline)檢測已完成的結構之間是否有電性缺陷,毋須以金屬化製程製作電極(electrode pad)即可檢出,能較即時反應線上製程問題,對於分秒必爭的半導體產業而言具有顯著的時效優勢,使得此技術被廣泛應用在高階半導體元件的製造中。 Charged particle beam inspection (charged particle beam inspection) is a non-destructive defect detection method, which is mainly used to detect major electrical defects that may lead to scrapping of semiconductor components, such as short circuit defects (short) between circuits and open circuit defects (open ) Or leakage current defect (leakage). Compared to conventional methods, wafer acceptability testing (WAT) must be performed after the subsequent metallization process is completed. Electrical performance and electrical anomalies are measured with fixed probe equipment. Charged particle beam detection can be used in semiconductor devices. After completing part of the process, inline test whether there are electrical defects between the completed structures. It can be detected without making electrode pads by metallization process. It can reflect online process problems more immediately. In terms of industry, it has significant timeliness advantages, making this technology widely used in the manufacture of high-end semiconductor devices.
帶電粒子束檢測方法通常是以微小聚焦的帶電粒子束(電子束或離子束)對樣品表面進行掃描,使電子(或離子)與樣品表面產生非彈性碰撞,激發出一些低能量的二次電子,並以接近樣品表面且施加有電壓的偵測器吸收這些 被激發出來的二次電子訊號成像。樣品的表面電位會影響二次電子的產率,電位越高時,二次電子產率越小,偵測器測得的訊號強度越弱,成像後會呈現較暗區,一般稱為暗電壓對比(dark voltage contrast,DVC)。反之,樣品表面電位越低時,二次電子產率越高,偵測器測得的訊號強度越強,成像後會呈現較亮區,一般稱為亮電壓對比(bright voltage contrast,BVC)。根據上述特性,可獲得一對應於樣品表面電位相對差異的灰階影像,並藉由分析該灰階影像,判斷樣品內是否存在電性缺陷。 The charged particle beam detection method usually scans the sample surface with a tiny focused charged particle beam (electron beam or ion beam), so that the electrons (or ions) collide with the sample surface in an inelastic manner, exciting some low-energy secondary electrons , And absorb these with a detector near the sample surface The excited secondary electronic signal is imaged. The surface potential of the sample will affect the yield of secondary electrons. The higher the potential, the smaller the secondary electron yield, the weaker the signal strength measured by the detector, and the darker area will appear after imaging, generally called dark voltage Contrast (dark voltage contrast, DVC). Conversely, the lower the sample surface potential, the higher the secondary electron yield and the stronger the signal intensity measured by the detector, which will show brighter areas after imaging, generally known as bright voltage contrast (BVC). According to the above characteristics, a gray-scale image corresponding to the relative difference in the surface potential of the sample can be obtained, and by analyzing the gray-scale image, it can be determined whether there is an electrical defect in the sample.
習知的帶電粒子束檢測方法,需針對短路、斷路或漏電等不同種類的電性缺陷設計不同的檢測結構,例如以交錯的梳狀(comb)結構來測試短路缺陷,以連續彎曲的蛇狀(serpentine)結構來測試斷路缺陷,不僅占用較多晶圓面積,也增加了檢測和分析時間。因此,本領域仍需一種改良的檢測結構及用其檢測缺陷的檢測方法,以改善上述習知技術的不足。 The conventional charged particle beam detection method needs to design different detection structures for different types of electrical defects such as short circuit, open circuit, or leakage, such as a comb structure to test short circuit defects, and a continuously curved snake shape (serpentine) structure to test open defects, not only occupy more wafer area, but also increase the detection and analysis time. Therefore, there is still a need in the art for an improved inspection structure and method for inspecting defects to improve the deficiencies of the aforementioned conventional technologies.
本發明目的在於提供一種用於帶電粒子束檢測之檢測結構及用其檢測缺陷的檢測方法,其包含可藉由帶電粒子束掃描來控制開/關(on/off)的閘極通道區,使檢測結構可應用在檢測不同類型的電性缺陷,改善了上述習知技術的不足。 An object of the present invention is to provide a detection structure for a charged particle beam detection and a detection method for detecting defects using the same, which includes a gate channel region that can be controlled on/off by scanning with a charged particle beam, so that The detection structure can be applied to detect different types of electrical defects, which improves the deficiencies of the above-mentioned conventional techniques.
本發明一方面提供一種用於帶電粒子束檢測之檢測結構,包含一基底,一線路圖案位於該基底中。該線路圖案包含一連接線路,沿著一X方向延伸;以及複數個第一線路和複數個第二線路,沿著一Y方向延伸並沿著該X方向交替 排列在該連接線路的一側。各該第一線路和各該第二線路分別包含一第一端部連接至該連接線路以及相對於該第一端部的一第二端部,該X方向與該Y方向互相垂直。一第一閘極結構,位於該基底上,沿著該X方向延伸並橫跨過各該第一線路和各該第二線路的該第一端部。一第二閘極結構,位於該基底上,沿著該X方向延伸並橫跨過各該第一線路和各該第二線路的該第二端部。 One aspect of the present invention provides a detection structure for charged particle beam detection, which includes a substrate, and a circuit pattern is located in the substrate. The line pattern includes a connecting line extending along an X direction; and a plurality of first lines and a plurality of second lines extending along a Y direction and alternating along the X direction Arranged on one side of the connection line. Each of the first line and the second line includes a first end connected to the connection line and a second end opposite to the first end, the X direction and the Y direction are perpendicular to each other. A first gate structure is located on the substrate, extends along the X direction and spans the first ends of each first line and each second line. A second gate structure is located on the substrate, extends along the X direction and spans the second ends of each first line and each second line.
在一些實施例中,該些第一線路、該些第二線路和該連接線路為一體成型構成。各該第一線路的該第二端部電連接至一接地端,各該第二線路的該第二端部為電性浮置。 In some embodiments, the first lines, the second lines, and the connecting line are integrally formed. The second end of each first line is electrically connected to a ground, and the second end of each second line is electrically floating.
在一些實施例中,各該第一線路和各該第二線路被該第一閘極結構覆蓋的區域分別包含一第一通道區,各該第一線路和各該第二線路被該第二閘極結構覆蓋的區域分別包含一第二通道區。 In some embodiments, the regions covered by the first gate structure of each of the first circuit and the second circuit respectively include a first channel area, and each of the first circuit and each of the second circuit are separated by the second The areas covered by the gate structure respectively include a second channel area.
在一些實施例中,當該些第一通道區和該些第二通道區均為關閉時,該第一閘極結構和該第二閘極結構之間的該些第一線路和該些第二線路均為電性浮置且互相電性隔離。 In some embodiments, when both the first channel regions and the second channel regions are closed, the first lines and the first channels between the first gate structure and the second gate structure Both lines are electrically floating and electrically isolated from each other.
在一些實施例中,當該些第一通道區為關閉且該些第二通道區為導通時,該第一閘極結構和該第二閘極結構之間的該些第一線路為電性接地,該些第二線路為電性浮置且與該些第一線路電性隔離。 In some embodiments, when the first channel regions are closed and the second channel regions are on, the first lines between the first gate structure and the second gate structure are electrically Grounded, the second lines are electrically floating and electrically isolated from the first lines.
在一些實施例中,當該些第一通道區和該些第二通道區均為導通時,該第一閘極結構和該第二閘極結構之間的該些第一線路和該些第二線路互 相電性連接且電性接地。 In some embodiments, when the first channel regions and the second channel regions are both on, the first lines and the first channels between the first gate structure and the second gate structure Two-line mutual The phases are electrically connected and electrically grounded.
本發明另一方面提供一種帶電粒子束檢測方法,包含以下步驟。首先,提供一檢測結構,包含一線路圖案、一第一閘極結構以及一第二閘極結構。 該線路圖案包含複數個第一線路和複數個第二線路,沿著一Y方向延伸並沿著一X方向交替排列並連接在一連接線路的一側。該第一閘極結構以及該第二閘極結構沿著該X方向延伸並沿著該Y方向平行排列,分別橫跨過該些第一線路和該些第二線路的相對兩端部,該第一閘極結構控制該些第一線路、該些第二線路和該連接線路之間的電連接,該第二閘極結構控制該些第一線路與一接地端之電連接。該檢測結構還包含一層間介電層,覆蓋該線路圖案、該第一閘極結構和該第二閘極結構,其中該層間介電層一上表面顯露出與該些第一線路電連接的複數個第一線路接觸插塞、與該些第二線路電連接的複數個第二線路接觸插塞、與該第一閘極結構電連接的第一閘極接觸插塞以及與該第二閘極結構電連接的第二閘極接觸插塞。接著,以一帶電粒子束掃描該層間介電層之該上表面的一掃描區域,取得該些第一線路接觸插塞和該些第二線路接觸插塞之一電壓對比影像。然後,分析該電壓對比影像,判斷該檢測結構之一電性缺陷。 Another aspect of the present invention provides a charged particle beam detection method, including the following steps. First, a detection structure is provided, including a circuit pattern, a first gate structure, and a second gate structure. The line pattern includes a plurality of first lines and a plurality of second lines, extending along a Y direction and alternately arranged along a X direction and connected to one side of a connecting line. The first gate structure and the second gate structure extend along the X direction and are arranged in parallel along the Y direction, respectively crossing the opposite ends of the first lines and the second lines, the The first gate structure controls the electrical connection between the first lines, the second lines and the connection line, and the second gate structure controls the electrical connection between the first lines and a ground. The detection structure further includes an interlayer dielectric layer covering the circuit pattern, the first gate structure and the second gate structure, wherein an upper surface of the interlayer dielectric layer reveals electrical connections to the first circuits A plurality of first line contact plugs, a plurality of second line contact plugs electrically connected to the second lines, a first gate contact plug electrically connected to the first gate structure, and the second gate The second gate electrode electrically connected to the pole structure contacts the plug. Next, a charged particle beam is used to scan a scanning area of the upper surface of the interlayer dielectric layer to obtain a voltage contrast image of the first line contact plugs and the second line contact plugs. Then, the voltage comparison image is analyzed to determine one of the electrical defects of the detection structure.
在一些實施例中,該掃描區域包含該些第一線路接觸插塞和該些第二線路接觸插塞,但不包含該第一閘極接觸插塞和該第二閘極接觸插塞。 In some embodiments, the scanning area includes the first line contact plugs and the second line contact plugs, but does not include the first gate contact plugs and the second gate contact plugs.
在一些實施例中,該掃描區域包含該些第一線路接觸插塞、該些第二線路接觸插塞以及該第二閘極接觸插塞,但不包含該第一閘極接觸插塞。 In some embodiments, the scanning area includes the first line contact plugs, the second line contact plugs, and the second gate contact plugs, but does not include the first gate contact plugs.
在一些實施例中,該掃描區域包含該些第一線路接觸插塞、該些第 二線路接觸插塞、該第二閘極接觸插塞以及該第二閘極接觸插塞。 In some embodiments, the scanning area includes the first line contact plugs, the first Two line contact plugs, the second gate contact plug and the second gate contact plug.
本發明之一特徵在於,藉由控制帶電粒子束是否掃描到第一閘極接觸插塞來控制第一通道區的導通(on)或關閉(off),以及是否掃描到第二閘極接觸插塞來控制第二通道區的導通(on)或關閉(off),可便於在線上檢測時切換檢測結構的電連接型態,使檢測結構可應用在檢測短路、斷路或漏電等不同類型的電性缺陷,相較於習知需針對不同類型的電性缺陷設計不同的檢測結構,可節省檢測結構佔據的晶圓面積並縮短檢測時間。 One feature of the present invention is to control the on or off of the first channel region by controlling whether the charged particle beam scans to the first gate contact plug, and whether to scan to the second gate contact plug Plug to control the on or off of the second channel area, which can easily switch the electrical connection type of the detection structure during online detection, so that the detection structure can be applied to detect different types of electricity such as short circuit, open circuit or leakage Compared with conventional defects, different detection structures need to be designed for different types of electrical defects, which can save the wafer area occupied by the detection structure and shorten the detection time.
10:檢測結構 10: Inspection structure
100:基底 100: base
102:絕緣結構 102: Insulation structure
110:線路圖案 110: line pattern
112:連接線路 112: connection line
116:第一線路 116: First line
116a:第一端部 116a: first end
116b:第二端部 116b: Second end
118:第二線路 118: Second line
118a:第一端部 118a: first end
118b:第二端部 118b: second end
119:摻雜區 119: Doped area
210:掃描區域 210: Scanning area
220:掃描區域 220: Scanning area
230:掃描區域 230: Scanning area
212:掃描軌跡 212: Scanning trajectory
312:偵測器 312: Detector
314:二次電子訊號 314: Secondary electronic signal
316:基底漏電流 316: substrate leakage current
318:閘極漏電流 318: Gate leakage current
320:導通電流 320: on current
321:導通電流 321: On current
322:導通電流 322: conduction current
412:短路或漏電缺陷 412: Short circuit or leakage defect
122:第一閘極結構 122: First gate structure
122a:第一通道區 122a: first passage area
124:第二閘極結構 124: Second gate structure
124a:第二通道區 124a: Second passage area
130:層間介電層 130: Interlayer dielectric layer
131:上表面 131: upper surface
132:第一閘極接觸插塞 132: First gate contact plug
134:第二閘極接觸插塞 134: second gate contact plug
136:第一線路接觸插塞 136: First line contact plug
138:第二線路接觸插塞 138: Second line contact plug
414:斷路缺陷 414: Open circuit defect
416:斷路缺陷 416: Open circuit defect
X:方向 X: direction
Y:方向 Y: direction
A-A':切線 A-A': Tangent
B-B':切線 B-B': Tangent
C-C':切線 C-C': Tangent
第1圖至第5圖為本發明一實施例之用於帶電粒子束檢測之檢測結構的示意圖,其中:第1圖和第2圖為頂視圖;第3圖為沿著第2圖中A-A’切線的剖面示意圖;第4圖為沿著第2圖中B-B’切線的剖面示意圖;第5圖為沿著第2圖中C-C’切線的剖面示意圖。 Figures 1 to 5 are schematic diagrams of a detection structure for charged particle beam detection according to an embodiment of the present invention, wherein: Figures 1 and 2 are top views; and Figure 3 is along A in Figure 2 -A' tangent cross-sectional schematic; Figure 4 is a cross-sectional schematic view along BB' tangent in Figure 2; Figure 5 is a cross-sectional schematic view along BC' tangent in Figure 2;
第6圖至第10圖為根據本發明一實施例之帶電粒子束缺陷檢測方法,其中:第6圖為頂視圖,說明帶電粒子束掃描範圍和掃描軌跡;第7圖為沿著如第4圖所示B-B’切線的剖面示意圖;第8圖為沿著如第5圖所示C-C’切線的剖面示意圖;第9圖為沿著如第4圖所示B-B’切線的剖面示意圖;第10圖中,(a)部分例示未檢出缺陷時的電壓對比影像,(b)部分例示檢出 缺陷時的電壓對比影像。 FIGS. 6 to 10 are charged particle beam defect detection methods according to an embodiment of the present invention, wherein: FIG. 6 is a top view illustrating the scanning range and scanning trajectory of the charged particle beam; FIG. 7 is along the fourth The schematic cross-sectional view of the BB' tangent line shown in the figure; Figure 8 is the cross-sectional schematic view along the CB' tangent line shown in Figure 5; Figure 9 is the cross-sectional BB' tangent line shown in Figure 4 Schematic cross-section of Figure 10; in (a), part (a) illustrates the voltage comparison image when no defect is detected, and (b) part illustrates the detection Contrast image of voltage at defect.
第11圖至第14圖和第14A圖為根據本發明另一實施例之帶電粒子束缺陷檢測方法,其中:第11圖為頂視圖,說明帶電粒子束掃描範圍和掃描軌跡;第12圖為沿著如第4圖所示B-B’切線的剖面示意圖;第13圖為沿著如第5圖所示C-C’切線的剖面示意圖;第14圖中,(a)部分例示未檢出缺陷時的電壓對比影像,(b)部分例示一種檢出缺陷時的電壓對比影像;第14A圖例示另一種檢出缺陷時的電壓對比影像。 Figures 11 to 14 and 14A are charged particle beam defect detection methods according to another embodiment of the present invention, wherein: Figure 11 is a top view illustrating the scanning range and scanning trajectory of the charged particle beam; Figure 12 is A schematic cross-sectional view along the BB' tangent line shown in Figure 4; Figure 13 is a schematic cross-sectional view along the CB' tangent line shown in Figure 5; in Figure 14, part (a) illustrates unchecked The voltage comparison image when a defect is detected, part (b) illustrates a voltage comparison image when a defect is detected; FIG. 14A illustrates another voltage comparison image when a defect is detected.
第15圖至第18圖為根據本發明又另一實施例之帶電粒子束缺陷檢測方法,其中:第15圖為頂視圖,說明帶電粒子束掃描範圍和掃描軌跡;第16圖為沿著如第4圖所示B-B’切線的剖面示意圖;第17圖為沿著如第5圖所示C-C’切線的剖面示意圖;第18圖中,(a)部分例示未檢出缺陷時的電壓對比影像,(b)部分例示檢出缺陷時的電壓對比影像。 Figures 15 to 18 are charged particle beam defect detection methods according to yet another embodiment of the present invention, wherein: Figure 15 is a top view illustrating the scanning range and scanning trajectory of the charged particle beam; Figure 16 is along Fig. 4 is a schematic cross-sectional view of BB' tangent line; Fig. 17 is a cross-sectional schematic view along BC' tangent line shown in Fig. 5; Fig. 18, part (a) illustrates when no defect is detected (B) Illustrates the voltage comparison image when a defect is detected.
為使熟習本發明所屬技術領域之一般技藝者能更進一步瞭解本發明,下文特列舉本發明之較佳實施例,並配合所附圖式,詳細說明本發明的影像感測器及其製作方法及所欲達成的功效。為了方便表示而能夠輕易了解,圖式並未以成品之實際尺寸或比例繪示,因此圖式中元件之尺寸或比例僅用以示 意而並非欲以限制本發明的範圍。 In order to enable those of ordinary skill in the art of the present invention to further understand the present invention, the preferred embodiments of the present invention are specifically enumerated below, and in conjunction with the accompanying drawings, the image sensor of the present invention and its manufacturing method are described in detail And the desired effect. For ease of presentation and easy understanding, the drawings are not shown in the actual size or scale of the finished product, so the size or scale of the components in the drawings are only for illustration It is not intended to limit the scope of the invention.
本發明提供的檢測結構與基底上其他半導體元件以相同製程製作,可以是製作在基底之切割道區域的測試鍵結構,用來監控製程變異、評估製程餘裕度或檢測半導體元件中可能的缺陷。下文以利用平面式(planar)金屬氧化物半導體場效電晶體(metal-oxide-semiconductor field-effect transistor,MOSFET)製程製作的檢測結構為例進行說明,應理解也可通過其他半導體製程來製作本發明的檢測結構,例如鰭式場效電晶體(Fin field-effect transistor,FinFET)製程。 The detection structure provided by the present invention is manufactured in the same process as other semiconductor devices on the substrate, and may be a test key structure fabricated in the scribe line area of the substrate to monitor process variation, evaluate process margins, or detect possible defects in semiconductor devices. The following uses a planar metal-oxide-semiconductor field-effect transistor (MOSFET) process as an example to illustrate the detection structure, it should be understood that other semiconductor processes can also be used to make this Invented detection structure, such as Fin field-effect transistor (FinFET) process.
第1圖至第5圖為根據本發明一實施例之檢測結構10的示意圖,其中第1圖和第2圖為頂視圖,第3圖至第5圖分別為沿著第2圖中A-A’切線、B-B’切線和C-C’切線的剖面示意圖。
Figures 1 to 5 are schematic diagrams of a
請參考第1圖,檢測結構10包含一基底100,一絕緣結構102形成在基底100中,並在基底中100定義出線路圖案110。基底100例如是一矽基底、一矽覆絕緣基底、一三五族半導體基底等,但不限於此。線路圖案110具有一梳狀(comb-shaped)的頂視形狀,包含一沿著X方向延伸的連接線路112(或稱為梳基部),以及複數個第一線路116和複數個第二線路118,各沿著Y方向延伸並沿著X方向交替排列並連接在連接線路112的同一側,彼此由絕緣結構102區隔開。X方向與Y方向互相垂直。各第一線路116包含連接至連接線路112的第一端部116a以及相對於第一端部116a、遠離連接線路112的第二端部116b。相同的,各第二線路118包含連接至連接線路112的第一端部118a以及相對於第一端部118a、遠離連接線路112的第二端部118b。根據本發明一實施例,第二端部116b的長度大於第二端部118b,以用來連接至一接地端。第一線路116、第二線路118和連接線路112
是利用絕緣結構102定義在基底100中,三者為一體成型構成。可以用習知的淺溝絕緣(STI)結構製程來形成絕緣結構102,在此不再贅述。
Please refer to FIG. 1, the
第一線路116的第二端部116b是用來使檢測結構10接地(grounding),其接地機制可藉由將第二端部116b電連接至一接地端(GND),或電連接至電位大致上不會受到帶電粒子束掃描影響的半導體結構(未繪示)或基底100來實現。所述電位大致上不會受到帶電粒子束掃描影響的半導體結構可以是由絕緣結構102定義在基底100中、與線路圖案110一體成型的一匯集處(grounding pool),其具有較高的電容量來承受較多由於帶電粒子束掃描而產生的電荷,因此穩定了掃描區域的電位變化。也可藉由延伸第二端部116b的長度至一足夠長度獲得如同連接至匯集處的電容效果。相對的,第二線路118的第二端部118b為電性浮置(floating)。需特別說明的是,本發明並不限制第一線路116的第二端部116b的長度需大於第二線路118的第二端部118b的長度,只要第二端部116b可實現接地機制即可。在其他實施例中,第二端部116b和118b可以是齊平。
The
第一線路116和第二線路118可具有相同的線寬,並且沿著X方向等距排列。第一線路116和第二線路118的線寬和間距可根據不同檢測目的來調整。
例如,當檢測結構10是用來作為常規檢測時,第一線路116和第二線路118可具有最小線寬和最小間距,模擬基底上其他半導體元件可允許設計的最緊密的圖案。當檢測結構10是用來評估製程餘裕度時,可同時製作多組不同線寬及間距組合的檢測結構10,藉由分別對該些檢測結構10進行掃描,評估該製程可實現的最小線寬和間距。
The
請繼續參考第1圖。檢測結構10還包含互相平行的第一閘極結構122
以及第二閘極結構124設置在基底100上,各沿著X方向延伸,分別橫跨過該些第一線路116和該些第二線路118的第一端部116a、118a和第二端部116b、118b。各第一線路116和各第二線路118被第一閘極結構122覆蓋的區域為第一通道區122a(標示於第4圖和第5圖)。各第一線路116和各第二線路118被第二閘極結構134覆蓋的區域為第二通道區124a(標示於第4圖和第5圖)。本發明之一特徵在於,藉由第一閘極結構122控制第一通道區122a的導通(on)或關閉(off)來控制第一線路116和第二線路118位於第一閘極結構122和第二閘極結構124之間的部分的電連接(通過連接線路112)或電性隔離,以及藉由第二閘極結構124控制第二通道區122a的導通或關閉來控制第一線路116的接地(通過第二端部116b)或浮置,使檢測結構10可應用來檢測不同類型的電性缺陷。第一閘極結構122以及第二閘極結構124可以是習知的多晶矽閘極或是金屬閘極,詳細製程在此不再贅述。
Please continue to refer to Figure 1. The
請參考第2圖至第5圖。根據本發明一實施例,檢測結構10還可包含一層間介電層130,位於基底100上並且覆蓋住線路圖案110、第一閘極結構122和第二閘極結構124。複數個第一線路接觸插塞136和複數個第二線路接觸插塞138位於層間介電層130中,分別沿著Y方向排列在第一閘極結構122和第二閘極結構124之間的第一線路116和第二線路118上,並分別與第一線路116和第二線路118電連接,且頂部自層間介電層130的上表面131顯露出來。至少一第一閘極接觸插塞132設於第一閘極結構122上,與第一閘極結構122電連接,頂部自層間介電層130的上表面131顯露出來。至少一第二閘極接觸插塞134設於第二閘極結構124上,與第二閘極結構124電連接,頂部自層間介電層130的上表面131顯露出來。值得注意的是,如第2圖所示,在沿著Y方向的投影上,第一閘極接觸插塞132和第二閘極接觸插塞134均位在線路圖案110之外的同一側,且第一閘極接觸插塞132相較於第二閘極接觸插塞134更遠離線路圖案110。需注意,第2圖以及
第6圖、第10圖、第11圖、第14圖、第15圖和第18圖中同時繪示出線路圖案110、第一閘極結構122、第二閘極結構124、第一線路接觸插塞136、第二線路接觸插塞138、第一閘極接觸插塞132和第二閘極接觸插塞134是為了便於理解該些元件的配置和方位,在帶電粒子束檢測的過程中,線路圖案110、第一閘極結構122、第二閘極結構124實際上是被層間介電層130覆蓋住,並不會被帶電粒子束直接掃描到。
Please refer to Figure 2 to Figure 5. According to an embodiment of the present invention, the
請參考第3圖至第5圖,根據本發明一實施例,第一線路116、第二線路118和連接線路112的表面可包含一摻雜區119。可在形成第一閘極結構122和第二閘極結構124後,對基底100進行一離子植入製程,例如源極/汲極離子植入製程,以將導電摻雜植入未被第一閘極結構122和第二閘極結構124覆蓋的第一線路116、第二線路118和連接線路112的表面,形成摻雜區119。第一通道區122a和第二通道區124a兩側的摻雜區119為源極/汲極區。在其他採取應變矽(strained silicon)技術的實施例中,摻雜區119可以是通過磊晶成長(epitaxial growth)形成的磊晶矽層,例如SiP或SiGe。摻雜區119的表面還可包含一金屬矽化物層(未繪示),提供給第一線路接觸插塞136和第二線路接觸插塞138一較佳的接觸面。另外,基底100可包含一井區(未繪示),包圍住各摻雜區119,以提供基底100與摻雜區119之間較佳的絕緣。
Please refer to FIGS. 3 to 5. According to an embodiment of the present invention, the surfaces of the
本發明另一特徵在於,由於第一閘極結構122和第二閘極結構124為電性浮置,進行帶電粒子束檢測,例如以一預定能量的電子束掃描到第一閘極接觸插塞132及/或第二閘極接觸插塞134時,因此會造成第一閘極接觸插塞132及/或第二閘極接觸插塞134表面累積正電荷而產生電位,即等於對第一閘極結構122及/或第二閘極結構124施加一閘極電壓,其電壓值足以使第一通道區122a及/
或第二通道區124a導通(on)。藉此,可方便地於線上檢測時,利用電子束是否掃描到第一閘極接觸插塞132及/或第二閘極接觸插塞134來控制第一閘極結構122和第二閘極結構124之間的第一線路116、第二線路118之間的電連接以及第一線路116與接地端之間的電連接。根據本發明一實施例,當檢測結構10是用在電子束(e-beam)檢測,第一通道區122a和第二通道區124a較佳為可通過對第一閘極結構122和第二閘極結構124施加正閘極電壓而導通的N型通道區,摻雜區119較佳為形成在P型基底100(或P型井區)的N+摻雜區。
Another feature of the present invention is that, because the
下文將說明使用檢測結構10進行缺陷檢測的一些實施例。如前所述,在沿著Y方向的投影上,第一閘極接觸插塞132和第二閘極接觸插塞134均位於線路圖案110之外的同一側,且第一閘極接觸插塞132相較於第二閘極接觸插塞134更遠離線路圖案110。藉此設計,可便於調整帶電粒子束的掃瞄範圍210、220和230是否包含第一閘極接觸插塞132或第二閘極接觸插塞134來控制第一通道區域122a或第二通道區域124a的關閉(off)或導通(on),使檢測結構10可應用在檢測不同類型的電性缺陷。
Hereinafter, some embodiments of defect detection using the
第6圖至第10圖說明本發明一實施例之帶電粒子束缺陷檢測方法,用來檢測檢測結構10是否存在基底漏電流(substrate leakage)或閘極漏電流(gate leakage)等電性缺陷。第6圖為頂視圖,第7圖和第9圖為沿著Y方向切過第一線路116的剖面示意圖,第8圖為沿著Y方向切過第二線路118的剖面示意圖,第10圖的(a)部分例示未檢出異常的量測結果,第10圖的(b)部分例示檢出異常的量測結果。
6 to 10 illustrate a charged particle beam defect detection method according to an embodiment of the present invention, used to detect whether the
請參考第6圖、第7圖、第8圖和第10圖的(a)部分。首先,提供一檢測
結構10,檢測結構10的結構如前文第2圖至第5圖所示,在此不再贅述。接著,以一帶電粒子束(例如電子束)以如第6圖左上的掃描軌跡212對該檢測結構10表面(即層間介電層130的上表面131)之一掃描區域210進行掃描,以取得第一線路接觸插塞136和第二線路接觸插塞138之一電壓對比影像。掃描軌跡212是沿著Y方向來回並沿著X方向逐漸推進,依序掃描交替排列的各行第一線路接觸插塞136和第二線路接觸插塞138。掃描區域210包含了第一閘極結構122和第二閘極結構124之間的第一線路接觸插塞136和第二線路接觸插塞138,但不包含第一閘極接觸插塞132和第二閘極接觸插塞134。也就是說,電子束不會造成正電荷累積在第一閘極接觸插塞132和第二閘極接觸插塞134表面,因此第一閘極結構122和第二閘極結構124不會被施予任何電壓,即第一通道區122a和第二通道區124a在掃描期間均為關閉(off)狀態,使第一線路116和第二線路118位於第一閘極結構122和第二閘極結構124之間的部分各自為浮置狀態。第一線路接觸插塞136和第二線路接觸插塞138被電子束掃描後產生的正電荷即累積在各第一線路接觸插塞136和各第二線路接觸插塞138表面,抑制二次電子的產生,使偵測器312測得較弱的二次電子訊號314(為簡化圖示,第7圖和第8圖僅繪示其中一第一線路接觸插塞136或第二線路接觸插塞138被電子束掃瞄後正電荷累積的示意圖)。成像後,會如第10圖(a)部分所示,第一閘極結構122和第二閘極結構124之間的第一線路接觸插塞136和第二線路接觸插塞138都會呈現暗電壓對比(dark voltage contrast,DVC)。
Please refer to part (a) of Figure 6, Figure 7, Figure 8, and Figure 10. First, provide a
請參考第9圖和第10圖(b)部分。當製程發生異常導致摻雜區119和基底100(或井區)之間有基底漏電流316或通道區124a有閘極漏電流318時,第一線路接觸插塞136和第二線路接觸插塞138被電子束掃描後產生的正電荷會通過基底漏電流316或閘極漏電流318的路徑被導引至基底100或接地端GND,因而不會
累積在第一線路接觸插塞136和第二線路接觸插塞138的表面,使二次電子具有較高的產率,偵測器312可測得較強的二次電子訊號314,即呈現亮電壓對比(bright voltage contrast,BVC)。由於基底漏電流316和閘極漏電流318通常是系統性缺陷,當檢測結構10被檢出存在基底漏電流316或閘極漏電流318的缺陷時,其會普遍存在檢測結構10的多數區域,也就是會如第10圖(b)部分所示,第一閘極結構122和第二閘極結構124之間的第一線路接觸插塞136和第二線路接觸插塞138都會呈現亮電壓對比。需注意,當檢測結構10存在基底漏電流316或閘極漏電流318時,會造成檢測結構10無法以下文所述方法來偵測第一線路116、第二線路118、第一線路接觸插塞136和第二線路接觸插塞138之間的短路、斷路或漏電流缺陷。第6圖的檢測方法,除了可用來偵測基底漏電流316或閘極漏電流318等系統性缺陷,還可用來檢測檢測結構10本身的檢測可信度。
Please refer to Figure 9 and Figure 10(b). When an abnormality in the process results in a substrate leakage current 316 or a gate leakage current 318 between the doped
第11圖至第14圖說明根據本發明另一實施例之帶電粒子束缺陷檢測方法,用來檢測第一線路116和第二線路118之間是否存在短路或漏電流缺陷,或檢測第一線路116是否存在斷路缺陷。第11圖為頂視圖,第12圖為沿著Y方向切過第一線路116的剖面示意圖,第13圖為沿著Y方向切過第二線路118的剖面示意圖,第14圖的(a)部分例示未檢出異常的量測結果,第14圖(b)部分和第14A圖例示檢出異常的量測結果。本實施例所述檢測方法與前文第6圖至第10圖所述實施例的不同處在於,如第11圖所示,電子束的掃描區域220涵蓋第一閘極結構122和第二閘極結構124之間的第一線路接觸插塞136和第二線路接觸插塞138,也涵蓋了第二閘極接觸插塞134,但不涵蓋第一閘極接觸插塞132。掃描時,電子束的掃描軌跡212同樣是沿著Y方向來回並沿著X方向推進,先掃描到第二閘極接觸插塞134後,接著再依序掃描交替排列的各行第一線路接觸插塞136和第二線路接觸插塞138。
FIGS. 11 to 14 illustrate a charged particle beam defect detection method according to another embodiment of the present invention, used to detect whether there is a short circuit or leakage current defect between the
請參考第12圖和第14圖(a)部分,當電子束掃描到第二閘極接觸插塞134時,會造成第二閘極接觸插塞134表面累積正電荷而產生電位,即等於對第二閘極結構124施加一閘極電壓,其電壓值足以使第一線路116的第二通道區124a導通(on),使電子束掃描第一線路接觸插塞136造成的正電荷可先傳遞至第一線路116然後通過導通電流320的路徑被導引至接地端GND,不會累積在第一線路接觸插塞136表面,使二次電子具有較高的產率,偵測器312可測得較強的二次電子訊號314,成像時會呈現亮電壓對比,如第14圖(a)部分所示。
Please refer to FIGS. 12 and 14 (a), when the electron beam scans to the second
請參考第13圖左側和第14圖(a)部分。第一閘極接觸插塞132並未被電子束掃描到,其表面不會有正電荷累積,即第一閘極結構122不會被施予閘極電壓,使第二線路118的第一通道區122a在掃描過程中為關閉狀態,使第一閘極結構122和第二閘極結構124之間的第二線路118隔離於連接線路112因此與第一線路116電性隔離。請參考第13圖右側,雖然第二線路118的第二通道區124a也為導通狀態(由於是由第二閘極結構124控制),但第二線路118的第二端部118b為電性浮置(floating),未提供電荷洩漏路徑。因此,第二線路接觸插塞138被電子束掃描而造成的正電荷會累積在表面,抑制二次電子的產率,使偵測器312測得較弱的二次電子訊號314,成像時會呈現暗電壓對比,如第14圖(a)部分所示,並與呈現亮電壓對比的第一線路接觸插塞136交替排列。
Please refer to the left side of Figure 13 and part (a) of Figure 14. The first
請參考第14圖(b)部分,當相鄰的第一線路116和第二線路118之間存在短路或漏電缺陷412,例如由於基底100圖案化製程異常、絕緣結構102絕緣不良、層間介電層130絕緣不良或其他因素造成的短路或漏電缺陷,會使累積在第二線路接觸插塞138表面的正電荷通過該短路或漏電缺陷412而流到第一線路
116進而被導引至接地端GND,造成原本應呈現暗電壓對比的第二線路接觸插塞138呈現亮電壓對比。
Please refer to FIG. 14 (b), when there is a short circuit or
請參考第14A圖,當第一線路116存在斷路缺陷414,例如由於基底100圖案化製程異常導致的斷線或由於汙染微粒導致第一線路116的傳導路徑中斷或其他因素造成的斷路缺陷,位於斷路區段上的第一線路接觸插塞136被電子束掃描後產生的正電荷無法而被導引至接地端GND,使其由於正電荷的累積而呈現不同於其他正常區域的第一線路接觸插塞136的暗電壓對比。由於缺陷區域的圖案明顯異於其他正常區域的圖案,缺陷可被輕易的偵測出來。可比對設計布局圖案和成像圖案,並根據影像的灰階程度來分析阻值差異,評估可能的缺陷種類和異常原因。
Please refer to FIG. 14A, when the
第15圖至第18圖說明根據本發明又另一實施例之帶電粒子束缺陷檢測方法,用來檢測第二線路是否存在斷路缺陷。第15圖為頂視圖,第16圖為沿著Y方向切過第一線路116的剖面示意圖,第17圖為沿著Y方向切過第二線路118的剖面示意圖,第18圖的(a)部分例示未檢出異常的量測結果,第18圖(b)部分例示檢出異常的量測結果。本實施例所述檢測方法與前文第6圖至第10圖所述實施例的不同處在於,如第15圖所示,電子束的掃描區域230涵蓋了第一閘極結構122和第二閘極結構124之間的第一線路接觸插塞136和第二線路接觸插塞138,也涵蓋了第二閘極接觸插塞134和第一閘極接觸插塞132。掃描時,電子束的掃描軌跡212同樣是沿著Y方向來回並沿著X方向推進,先掃描到第一閘極接觸插塞132和第二閘極接觸插塞134後,接著再依序掃描交替排列的各行第一線路接觸插塞136和第二線路接觸插塞138。
15 to 18 illustrate a charged particle beam defect detection method according to yet another embodiment of the present invention, which is used to detect whether a second circuit has an open defect. Figure 15 is a top view, Figure 16 is a schematic cross-sectional view through the
請參考第16圖右側和第18圖(a)部分。電子束掃描到第二閘極接觸插塞134時造成的正電荷累積等於對第二閘極結構124施予一閘極電壓,其電壓值足以使第二閘極結構124下方的第二通道區124a導通,使掃描期間累積在第一線路接觸插塞136表面的正電荷可以通過導通電流320路徑被導引至接地端GND而不會累積在第一線路接觸插塞136表面,使二次電子具有較高的產率,偵測器312可測得較強的二次電子訊號314,於成像時呈現亮電壓對比,如第18圖(a)部分所示。
Please refer to the right side of Figure 16 and part (a) of Figure 18. The positive charge accumulation caused by the electron beam scanning to the second
請參考第17圖、第16圖左側和第18圖(a)部分。本實施例中,第一閘極接觸插塞132也會被電子束掃描,產生正電荷累積在第一閘極接觸插塞132表面,等於對第一閘極結構122施予一閘極電壓,其電壓值足以使第一閘極結構122下方的第一通道區122a導通,使掃描期間累積在第二線路接觸插塞138表面的正電荷可以依序通過第二線路118、導通電流321路徑、第一端部118a、連接線路112、導通電流322路徑、第一線路116、導通電流320路徑而被導引到接地端GND,不會累積在第二線路接觸插塞138表面,使第二線路接觸插塞138也呈現亮電壓對比,如第18圖(a)部分所示。
Please refer to Figure 17, left side of Figure 16 and part (a) of Figure 18. In this embodiment, the first
請參考第18圖(b)部分,當第二線路118存在斷路缺陷416,例如由於基底100圖案化製程異常導致的斷線或由於汙染微粒導致第二線路118的傳導路徑中斷或其他因素造成的斷路缺陷,位於斷路區段上的第二線路接觸插塞138被電子束掃描後產生的正電荷無法通過前段所述的路徑被導引至接地端GND,使其由於正電荷的累積而呈現不同於其他正常區域的第二線路接觸插塞138的暗電壓對比。
Please refer to part (b) of FIG. 18, when the
應特別說明的是,本發明之檢測結構10並不限於用在電子束(e-beam)檢測,也可應用在離子束(FIB)檢測。由於帶電粒子束種類或能量的不同,掃描後產生的累積電荷可以是正電荷或負電荷。第一通道區122a和第二通道區124a的導電型可隨著掃描後產生的電荷為正或負(即產生的閘極電壓為正電壓或負電壓),被設計為N型通道區或P型通道區。
It should be particularly noted that the
綜合以上,本發明提供的用於帶電粒子束檢測之檢測結構10,主要包含交替排列的複數個第一線路116和複數個第二線路118,以及分別橫跨該些第一線路116和該些第二線路118兩端的第一閘極結構122和第二閘極結構124,以在各第一線路116和各第二線路118兩端分別形成第一通道區122a和第二通道區124a。完成前段製程,製作層間介電層130、第一閘極接觸插塞132、第二閘極接觸插塞134、第一線路接觸插塞136、第二線路接觸插塞138後,可進行一線上(inline)檢測步驟,以離子束(例如電子束)對顯露在層間介電層130上表面的第一線路接觸插塞136和第二線路接觸插塞138進行掃描,獲得第一線路接觸插塞136和第二線路接觸插塞138之一電壓對比影像,並藉由調整帶電粒子束的掃描範圍是否包含第一閘極接觸插塞132和第二閘極接觸插塞134來控制第一通道區122a和第二通道區124a的導通或關閉,進而控制第一線路116與接地端的電連接以及第一線路116和第二線路118之間的電連接。簡短的說,當帶電粒子束的掃描範圍不包含第一閘極接觸插塞132和第二閘極接觸插塞134時,可使第一通道區122a和第二通道區124a於掃描期間均為關閉,使測檢測結構10可用來檢測基底漏電流或閘極漏電流等異常。當帶電粒子束的掃描範圍包含第二閘極接觸插塞134但不包含第一閘極接觸插塞132時,使第二通道區124a在掃描期間為導通而將第一線路116電連接至接地,使第一通道區122a在掃描期間為關閉而使第二線路118電性隔離於第一線路116,使測檢測結構10可用來檢測第一線路116和第二
線路118之間的短路或漏電異常。當帶電粒子束的掃描範圍同時包含第一閘極接觸插塞132和第二閘極接觸插塞134時,使第一通道區122a和第二通道區124a在掃描期間均為導通,將第一線路116和第二線路118都電連接至接地,使測檢測結構10可用來檢測第一線路116和第二線路之間是否存在斷路異常。相較於習知需針對短路、斷路或漏電等不同電性缺陷種類設計不同的檢測結構進行檢測,本發明可有效節省檢測結構佔據的晶圓面積以及檢測時間。
In summary, the
以上所述僅為本發明之較佳實施例,凡依本發明申請專利範圍所做之均等變化與修飾,皆應屬本發明之涵蓋範圍。 The above are only the preferred embodiments of the present invention, and all changes and modifications made in accordance with the scope of the patent application of the present invention shall fall within the scope of the present invention.
10:檢測結構 10: Inspection structure
100:基底 100: base
102:絕緣結構 102: Insulation structure
110:線路圖案 110: line pattern
112:連接線路 112: connection line
116:第一線路 116: First line
116a:第一端部 116a: first end
116b:第二端部 116b: Second end
118:第二線路 118: Second line
118a:第一端部 118a: first end
118b:第二端部 118b: second end
122:第一閘極結構 122: First gate structure
124:第二閘極結構 124: Second gate structure
X:方向 X: direction
Y:方向 Y: direction
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