TWI694471B - Manufacturing method of insulator film and insulator film making apparatus - Google Patents
Manufacturing method of insulator film and insulator film making apparatus Download PDFInfo
- Publication number
- TWI694471B TWI694471B TW108107003A TW108107003A TWI694471B TW I694471 B TWI694471 B TW I694471B TW 108107003 A TW108107003 A TW 108107003A TW 108107003 A TW108107003 A TW 108107003A TW I694471 B TWI694471 B TW I694471B
- Authority
- TW
- Taiwan
- Prior art keywords
- insulating film
- film
- wafer
- generating device
- heat treatment
- Prior art date
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
Abstract
本發明關於將構成絕緣膜的材料藉由電紡絲奈米纖維化來藉由奈米纖維簇成膜的絕緣膜形成方法及由此獲取的絕緣膜及絕緣膜製造裝置。本發明的絕緣膜形成方法包括：(1)準備步驟，利用包括高壓發生裝置、紡絲噴嘴及收集部的電紡絲裝置，紡絲噴嘴與高壓發生裝置的一個電極電連接，收集部與高壓發生裝置的包括對電極在內的另一個電極電連接，向紡絲噴嘴供給待形成奈米纖維的成膜物質並在收集部安裝晶片；以及(2)層疊步驟，藉由使高壓發生裝置進行工作來從紡絲噴嘴電紡絲成膜物質，在晶片形成由藉由電紡絲形成的成膜物質的奈米纖維簇所形成的層。The present invention relates to an insulating film forming method for forming a material constituting an insulating film by electrospinning nanofibers and forming a film from nanofiber clusters, and an insulating film and an insulating film manufacturing apparatus obtained thereby. The insulating film forming method of the present invention includes: (1) a preparation step, using an electrospinning device including a high-voltage generating device, a spinning nozzle, and a collecting part, the spinning nozzle is electrically connected to an electrode of the high-voltage generating device, and the collecting part is connected to a high voltage The other electrode of the generating device, including the counter electrode, is electrically connected, supplies the film-forming substance of the nanofiber to the spinning nozzle and mounts the wafer in the collection section; and (2) the laminating step is performed by using a high-voltage generating device It works to electrospinning the film-forming substance from the spinning nozzle, and forms a layer formed of nanofiber clusters of the film-forming substance formed by electrospinning on the wafer.
Description
本發明關於絕緣膜形成方法及絕緣膜製造裝置，尤其，關於絕緣膜形成方法及絕緣膜製造裝置，即，將構成絕緣膜的材料藉由電紡絲奈米纖維化來藉由奈米纖維簇成膜。 The present invention relates to an insulating film forming method and an insulating film manufacturing apparatus, and in particular, to an insulating film forming method and an insulating film manufacturing apparatus, that is, a material forming an insulating film is formed by electrospinning nanofibers into clusters of nanofibers membrane.
通常，本發明廣泛適用於半導體或半導體裝置、液晶裝置等電子裝置材料的製造，其中，為了方便說明，以半導體裝置(devices)的背景技術為例進行說明。 Generally, the present invention is widely applicable to the manufacture of electronic device materials such as semiconductors, semiconductor devices, and liquid crystal devices. For convenience of description, the background art of semiconductor devices will be described as an example.
隨著積體電路(IC)的縮小，薄的配線厚度和變窄的配線間隔會導致電阻增加和電阻電容(RC)耦合問題，裝置的大小縮小，從而抵消可獲取的速度提高的優點。用於改善半導體裝置性能及可靠性的方法包括使用如銅的高導電性材料(金屬)和低介電常數(low-κ)材料。 As integrated circuits (ICs) shrink, thin wiring thickness and narrow wiring spacing will lead to increased resistance and resistance-capacitance (RC) coupling problems, and the size of the device will be reduced, thereby counteracting the advantages of increased speed. Methods for improving the performance and reliability of semiconductor devices include the use of highly conductive materials (metals) such as copper and low dielectric constant (low-κ) materials.
對包括矽在內的半導體或電子設備材料用基材實施包括氧化膜在內的絕緣膜形成、基於化學氣相蒸鍍(CVD)等的成膜、蝕刻等多種處理。 A variety of treatments, such as the formation of an insulating film including an oxide film, film formation by chemical vapor deposition (CVD), etc., are performed on a substrate for semiconductor or electronic equipment materials including silicon.
最近，可以毫不誇張地說，半導體設備的高性能化包括電晶體在內的所述設備的微細化技術得到發展。當前，以進一步的高性能化為目標，實現電晶體的微細化技術的改善。根據最近的半導體裝置的微細化及高性能化的請求(例如，在漏電觀點)，對於更高性能絕緣膜的必要性顯著提高。這是因為即使在以往的集成度比較低的設備中不成問題的漏電在最近的微細化、高集成化和/或高性能化的設備中有可能引起嚴重問題。因 此，例如，在開發新一代MOS電晶體的過程中，隨著所述微細化技術的發展，柵極絕緣膜的薄膜化受到限制，從而面臨需要克服的問題。即，作為製程技術，可將當前被用成絕緣膜的矽氧化膜(SiO2)薄膜化至極限(1至2原子層等級)，在薄膜化至2nm以下的膜厚度的情況下，藉由基於量子效應的直接通道，發生漏電的指數的函數性增加，消耗電力會增加。典型地，例如，在開發新一代MOS電晶體的過程中，若追求高性能的矽LSI的微細化，則漏電會增加，消耗電力也會增加。因此，為了追求性能並減少消耗電力，在不增加MOS電晶體的柵極漏電的情況下，需要提高電晶體的特性。 Recently, it is no exaggeration to say that the high performance of semiconductor devices, including the miniaturization technology of the devices including transistors, has been developed. At present, the goal is to further improve the performance, and to realize the improvement of transistor miniaturization technology. According to recent requests for miniaturization and high performance of semiconductor devices (for example, from a leakage point of view), the necessity for a higher-performance insulating film has significantly increased. This is because the leakage current, which is not a problem even in a device with a relatively low integration level in the past, may cause serious problems in recent miniaturized, highly integrated, and/or high-performance devices. Therefore, for example, in the process of developing a new generation of MOS transistors, with the development of the miniaturization technology, the thinning of the gate insulating film is limited, thereby facing problems that need to be overcome. That is, as a process technology, the silicon oxide film (SiO 2 ) currently used as an insulating film can be thinned to the limit (1 to 2 atomic layer level). In the case of thinning to a film thickness of 2 nm or less, by In the direct channel based on quantum effect, the exponential function of leakage occurs increases, and the power consumption increases. Typically, for example, in the process of developing a new generation of MOS transistors, if miniaturization of high-performance silicon LSIs is pursued, leakage current will increase and power consumption will also increase. Therefore, in order to pursue performance and reduce power consumption, it is necessary to improve the characteristics of the transistor without increasing the gate leakage of the MOS transistor.
低介電常數材料為具有比二氧化矽(SiO2)的介電常數3.9至4.2低的介電常數的半導體絕緣材料。隨著需要更加進步的技術，需要具有低於2.0的介電常數的超低介電常數電介質材料。 The low dielectric constant material is a semiconductor insulating material having a dielectric constant lower than that of silicon dioxide (SiO 2 ) from 3.9 to 4.2. As more advanced technologies are required, ultra-low dielectric constant dielectric materials having a dielectric constant lower than 2.0 are required.
超低介電常數電介質可藉由生成low-κ電介質物質內形成氣孔(pore)的多孔性電介質來獲取。超低介電常數電介質的應用包括夾層絕緣子(ILD)及金屬間絕緣體(IMD)。 The ultra-low dielectric constant dielectric can be obtained by generating a porous dielectric that forms pores in the low-κ dielectric substance. Applications of ultra-low dielectric constant dielectrics include interlayer insulators (ILD) and intermetal insulators (IMD).
多個半導體用材料和裝置開發企業持續執行了有關化學氣相蒸鍍(Chemical Vapor Deposition)及旋轉沉積(SOD，Spin-On Deposition)薄膜製程技術的研究，並繼續報告與此相關的研究結果。至今，低介電膜的研究滿足市場的需求並考慮產品的穩定性(reliability)，選擇了利用電漿增強化學氣相蒸鍍法的有機矽酸鹽玻璃(OSG，organosilicate glass)物質。但是，電漿增強化學氣相蒸鍍用有機矽酸鹽玻璃物質當前止步於κ>2.4。在40nm以下的製程中，為了體現所需要的κ<2.2而在低介電物質內需要40%以上的多孔性。但是，在電漿增強化學氣相蒸鍍方式的情況下，無法維持優秀的機械物性並導入40%以上的氣孔，從而很難進一步降低介電常數。為了將旋轉方式的超低介電常數材料用成層間絕緣物質，均需要成功實現 在卓越的物理特性的矩陣高分子及在高的多孔性中體現出小且封閉的氣孔形態(即，優秀特性的介孔)的氣孔形成劑開發及氣孔形成法研究，這是確定新一代記憶體及非存儲半導體性能的限界的極為重要的一環。 A number of semiconductor material and device development companies continue to carry out research on chemical vapor deposition (Chemical Vapor Deposition) and spin-on deposition (SOD, Spin-On Deposition) thin film process technologies, and continue to report relevant research results. So far, the research on low-dielectric films meets the market demand and considers the stability of products, and selects the organosilicate glass (OSG) material using plasma enhanced chemical vapor deposition method. However, the organosilicate glass material for plasma enhanced chemical vapor deposition currently stops at κ>2.4. In the process below 40 nm, in order to reflect the required κ<2.2, a porosity of 40% or more is required in the low dielectric substance. However, in the case of the plasma enhanced chemical vapor deposition method, it is not possible to maintain excellent mechanical properties and introduce more than 40% of pores, making it difficult to further reduce the dielectric constant. In order to use the ultra-low dielectric constant material of the rotation method as an interlayer insulating substance, it needs to be successfully realized Matrix polymer with excellent physical properties and pore forming agent that exhibits small and closed pore shape (that is, mesopores with excellent characteristics) in high porosity, and research on pore formation method, this is to determine the new generation of memory An extremely important part of the limits of the performance of bulk and non-storage semiconductors.
據報告，使用稱為分子細孔堆疊法(Moleclular-Pore-Stacking；MPS)的新概念的氣孔生成法來成功開發了用於45nm節點LSI的k=2.4的物質和製程開發，持續進行了對於作為多孔有機矽酸鹽(porous organosilicate)的一種的LKD系列的研究，也進行了對介電常數2.2以下的ULK電介質、化學氣相蒸鍍low-κ、可形成光學圖案的low-κ的研究。 According to reports, a new concept of pore generation method called molecular pore-stacking (Moleclular-Pore-Stacking; MPS) was used to successfully develop materials and processes for k=2.4 for 45nm node LSI. As a kind of porous organosilicate (porous organosilicate) LKD series of research, also conducted a dielectric constant of 2.2 or less ULK dielectric, chemical vapor deposition low-κ, can form an optical pattern of low-κ .
據報告，化學氣相蒸鍍方式的多孔性低介電膜的生成當前開發至κ=2.2至2.5，旋轉方法材料主要集中，大部分集中在聚醯亞胺、聚亞芳基醚(PAE)、環丁烷衍生物、芳香族熱固性高分子等有機高分子類或可獲取有機無機混合效果的有機矽酸鹽材料。 According to reports, the generation of porous low-dielectric films by chemical vapor deposition is currently developed to κ=2.2 to 2.5, and the materials of the rotating method are mainly concentrated, most of which are concentrated in polyimide and polyarylene ether (PAE) , Cyclobutane derivatives, aromatic thermosetting polymers and other organic polymers or organic silicate materials that can obtain an organic-inorganic mixing effect.
在向介電常數2.7至3.0的有機矽酸鹽薄膜導入氣孔的情況下，空氣的介電常數為1，因此，介電常數會降低，如圖1所示，導入的氣孔越多，介電常數會進一步降低。 When introducing pores into an organic silicate film with a dielectric constant of 2.7 to 3.0, the dielectric constant of air is 1, so the dielectric constant will be reduced. As shown in Figure 1, the more pores are introduced, the more dielectric The constant will decrease further.
並且，低介電常數的多孔性絕緣層滿足如下特性。 In addition, the porous insulating layer having a low dielectric constant satisfies the following characteristics.
-低介電常數(low dielectric constant) -Low dielectric constant
-熱穩定性(thermally stable at temperature>450℃ for some hours) -Thermal stability (thermally stable at temperature>450℃ for some hours)
-膜之間黏結性(excellent adhesion to underlying and top layers) -Excellent adhesion to underlying and top layers
-耐溶劑性(resisting to solvents and resists used in lithography) -Resisting to solvents and resists used in lithography
-圖案化(etch in RIE) -Patterning (etch in RIE)
-平坦性(self-planarization or planarization with CMP) -Self-planarization or planarization with CMP
-低吸水性(low water absorption) -Low water absorption
-低熱膨脹係數(Low and isotropic coefficient of thermal expansion(CTE)) -Low and isotropic coefficient of thermal expansion(CTE))
-介電損耗、擊穿電壓、漏電流特性(Acceptable dielectric loss,breakdown voltage,and leakage current) -Acceptable dielectric loss, breakdown voltage, and leakage current characteristics
-優秀的間隙填充性能(Excellent gap-fill properties) -Excellent gap-fill properties
-高機械強度(High mechanical strength) -High mechanical strength
-高玻璃轉移溫度(High glass transition temperature) -High glass transition temperature
-高導熱係數(High thermal conductivity) -High thermal conductivity
為了這種微細化及特性提高的相容，優質且薄(例如，膜厚度為15Å以下)的絕緣膜形成必不可缺。但是，優質且薄的絕緣膜的形成極為困難。例如，在藉由以往的熱氧化法或化學氣相蒸鍍生成這種絕緣膜的情況下，膜品質或膜厚度中的一個特性並不充分。 For such miniaturization and improved compatibility, high-quality and thin (for example, a film thickness of 15 Å or less) insulating film formation is indispensable. However, it is extremely difficult to form a high-quality and thin insulating film. For example, when such an insulating film is formed by a conventional thermal oxidation method or chemical vapor deposition, one of the characteristics of film quality and film thickness is insufficient.
絕緣膜可藉由電漿化學氣相蒸鍍製造，但是，很難獲得滿意的介面特性。在此情況下，最重要的問題為無法避免基於電漿的離子損傷。 The insulating film can be manufactured by plasma chemical vapor deposition, but it is difficult to obtain satisfactory interface characteristics. In this case, the most important issue is that plasma-based ion damage cannot be avoided.
另一方面，為了開發大型化、高精密化及高功能化液晶顯示裝置而需要具有更高密度的薄膜電晶體。代替通常的非晶矽膜薄膜電晶體，對於多晶矽膜的薄膜電晶體的需求增加。在薄膜電晶體的性能和可靠性中，柵極絕緣膜藉由電漿化學氣相蒸鍍提供。但是，若利用電漿化學氣相蒸鍍形成柵極絕緣膜，則基於電漿的損傷不可避免。在此情況下，尤其，生成的電晶體的臨界電壓無法被控制在高密度，因此，電晶體的可靠性降低。 On the other hand, in order to develop large-scale, high-precision, and high-function liquid crystal display devices, thin-film transistors with higher density are required. Instead of the usual amorphous silicon film thin film transistors, the demand for polycrystalline silicon film thin film transistors has increased. In the performance and reliability of thin film transistors, the gate insulating film is provided by plasma chemical vapor deposition. However, if the gate insulating film is formed by plasma chemical vapor deposition, damage due to plasma is unavoidable. In this case, in particular, the critical voltage of the generated transistor cannot be controlled at a high density, and therefore, the reliability of the transistor is reduced.
在多晶矽薄膜電晶體的情況下，可藉由利用正矽酸乙酯(TEOS)及O2氣體的電漿化學氣相蒸鍍形成SiO2膜。這種SiO2膜包含氣體原本含有的碳原子。即使所述膜在350℃的溫度條件下形成，碳濃度很難減少至1.1×1020原子/cm3以下。尤其，若膜形成溫度低至200℃左右，則所述膜中的碳濃度可增加至1.1×1021原子/cm3大小。因此，很難降低膜形成溫度。 In the case of polycrystalline silicon thin film transistors, the SiO 2 film can be formed by plasma chemical vapor deposition using TEOS and O 2 gas. This SiO 2 film contains carbon atoms originally contained in the gas. Even if the film is formed under a temperature condition of 350° C., the carbon concentration is difficult to be reduced to 1.1×10 20 atoms/cm 3 or less. In particular, if the film formation temperature is as low as about 200°C, the carbon concentration in the film may increase to a size of 1.1×10 21 atoms/cm 3 . Therefore, it is difficult to lower the film formation temperature.
在使用SiH4及N2O類氣體的電漿化學氣相蒸鍍的情況下，介面氮濃度大於1原子%以上，因此，介面固定電荷密度不會低至5×1011cm-2以下。無法獲取可適用的柵極絕緣膜。 In the case of plasma chemical vapor deposition using SiH 4 and N 2 O-based gases, the nitrogen concentration of the interface is greater than 1 atomic% or more, so the fixed charge density of the interface will not be as low as 5×10 11 cm -2 or less. The applicable gate insulating film cannot be obtained.
為了減少基於電漿化學氣相蒸鍍的離子損傷來獲取高質量的絕緣膜，開發了如ECR電漿化學氣相蒸鍍及氧電漿的氧化方法。但是，電漿在半導體的表面附近發生，因此，無法完全避免離子損傷。 In order to reduce ion damage based on plasma chemical vapor deposition to obtain high-quality insulating films, methods such as ECR plasma chemical vapor deposition and oxygen plasma oxidation have been developed. However, plasma occurs near the surface of the semiconductor, and therefore, ion damage cannot be completely avoided.
例如，利用如低壓汞燈和準分子燈的光源的洗滌裝置已經普及。 For example, washing apparatuses using light sources such as low-pressure mercury lamps and excimer lamps have become popular.
在250℃的低溫條件下，為了將矽氧化而開發了使用光的方法。但是，所述方法中，膜形成速度為緩慢的0.3nm/分鐘。當前，很難形成整個柵極絕緣膜(參照J.Zhang一行，A.P.L.，71(20)，1997，P2964)。 Under a low temperature condition of 250°C, a method of using light has been developed to oxidize silicon. However, in the above method, the film formation rate is slow at 0.3 nm/min. At present, it is difficult to form the entire gate insulating film (refer to J. Zhang line, A.P.L., 71(20), 1997, P2964).
日本特開平4-326731號中揭示了在含臭氧的環境下實施的氧化方法。但是，如上所述，所述方法中，利用光來生成臭氧並使用光來分解臭氧來生成氧基團。即，所述方法包括2個反應步驟。因此，所述方法並不有效且氧化速度緩慢。 Japanese Patent Laid-Open No. 4-326731 discloses an oxidation method carried out in an ozone-containing environment. However, as described above, in the method, ozone is generated using light and ozone is decomposed using light to generate oxygen groups. That is, the method includes 2 reaction steps. Therefore, the method is not effective and the oxidation rate is slow.
如上所述，在沉積(電漿化學氣相蒸鍍等)的情況下，在半導體上可順序形成厚的絕緣膜，但是，原來的半導體的表面作為半導體與絕緣膜(柵極絕緣膜)之間的介面殘留，因此，無法避免離子損傷。因此，介面水準密度會上升，因此，無法獲取滿足的裝置特性。 As described above, in the case of deposition (plasma chemical vapor deposition, etc.), thick insulating films can be sequentially formed on the semiconductor, but the surface of the original semiconductor is used as the semiconductor and the insulating film (gate insulating film). The interface between them remains, so ionic damage cannot be avoided. Therefore, the interface level density will increase, and therefore, it is impossible to obtain satisfactory device characteristics.
在利用氧化方法(例如，氧電漿氧化方法)來在半導體形成絕緣膜的情況下，氧化反應從半導體的表面向內部進行，半導體層(半導體)與絕緣膜之間的介面形成於半導體層內部。因此，所述介面因原本表面條件，實質上不受到影響，因此，可獲取非常滿意的介面。但是，高溫製程有可能導致矽晶片的彎曲。低溫會抑制彎曲現象，但氧化速度會急劇下降。因此，低溫製程無法藉由實質性速度製造絕緣膜。 In the case of forming an insulating film on a semiconductor using an oxidation method (for example, an oxygen plasma oxidation method), the oxidation reaction proceeds from the surface of the semiconductor to the inside, and the interface between the semiconductor layer (semiconductor) and the insulating film is formed inside the semiconductor layer . Therefore, the interface is substantially unaffected by the original surface conditions, and therefore, a very satisfactory interface can be obtained. However, the high temperature process may cause the silicon wafer to bend. Low temperature will suppress the bending phenomenon, but the oxidation rate will drop sharply. Therefore, the low temperature process cannot manufacture the insulating film at a substantial speed.
韓國授權專利第10-0481835號(發明的名稱：絕緣膜形成方法，半導體裝置及製造裝置)中揭示了包括如下製程的在600℃的半導體溫度條件下形成絕緣膜的方法：在包含氧原子基的環境下，將半導體表面氧化來形成第一絕緣膜的製程；以及並不將所述第一絕緣膜露在大氣，而是藉由沉積在第一絕緣膜形成第二絕緣膜的製程，這利用電漿化學氣相蒸鍍工法。 Korean Patent No. 10-0481835 (name of invention: insulating film forming method, semiconductor device, and manufacturing device) discloses a method for forming an insulating film at a semiconductor temperature of 600°C including the following process: containing an oxygen atom group The process of forming the first insulating film by oxidizing the surface of the semiconductor under the environment of the environment; and the process of forming the second insulating film by depositing on the first insulating film without exposing the first insulating film to the atmosphere, which Using plasma chemical vapor deposition method.
韓國授權專利第10-0782954號(發明的名稱：絕緣膜形成方法)中，在電子設備用基材形成絕緣膜的製程中，利用相同的操作執行包括在所述製程中的兩個或更多個控制絕緣膜特性的製程，以此形成基材的絕緣膜。為了避免向大氣的露出而實施洗滌、氧化、氮化、薄膜化等的處理，由此，可形成洗滌度高的絕緣膜。並且，利用相同的動作原理來執行與絕緣膜的形成有關的多個製程，由此，實現裝置形體的簡化，從而可有效形成特性優秀的絕緣膜，但是，這依然利用了電漿化學氣相蒸鍍工法。 In Korean Patent No. 10-0782954 (name of invention: insulating film forming method), in the process of forming an insulating film of a base material for electronic devices, two or more included in the process are performed using the same operation A process that controls the characteristics of the insulating film to form the insulating film of the substrate. In order to avoid exposure to the atmosphere, treatments such as washing, oxidation, nitridation, and thinning are performed, whereby an insulating film with a high degree of washing can be formed. In addition, the same operation principle is used to perform multiple processes related to the formation of the insulating film, thereby simplifying the shape of the device and effectively forming an insulating film with excellent characteristics, but this still uses the plasma chemical vapor Evaporation method.
韓國公開專利第10-2008-0007192號(發明的名稱：用於薄膜電晶體的電介質或作為平坦化層的低溫溶膠、凝膠矽酸鹽)中，本案發明人員發現了從即使製程溫度降低，在135℃至250℃的溫度條件下實現硬化並提供優秀的漏電密度值(9×10-9A/cm2至1×10-10A/cm2)的溶膠、凝膠矽酸鹽前體的特性組合製造膜。具有矽酸鹽的幾個第一例，矽酸鹽在低的溫度條件下被硬化，漏電密度充分低，從而可作為被低溫處理或者可實現溶液處理或可列印的電介質使用，所述電介質為了柔性或重量輕的電晶體而使用。所述劑型可以在為了薄膜電晶體及其他電子裝置而使用的不鏽鋼箔的平坦化製程中使用。這利用溶膠、凝膠法。 In Korean Patent Publication No. 10-2008-0007192 (name of invention: dielectric used for thin film transistors or low-temperature sol or gel silicate as a planarization layer), the inventors of the present invention discovered Sol and gel silicate precursors that are hardened at 135°C to 250°C and provide excellent leakage density values (9×10 -9 A/cm 2 to 1×10 -10 A/cm 2 ) The combination of the characteristics of the membrane. Several first examples with silicates, silicates are hardened under low temperature conditions, and the leakage density is sufficiently low, so that they can be used as dielectrics that are processed at low temperatures or that can be processed by solutions or can be printed. Used for flexible or light-weight transistors. The dosage form can be used in the flattening process of stainless steel foil used for thin film transistors and other electronic devices. This uses the sol-gel method.
並且，對於以往的低介電多孔半導體絕緣膜形成，包括：致孔劑，具有甲矽烷基改性的末端基；熱穩定的有機或無機矩陣前體；以及溶解所述物質的溶劑，揭示了利用用於形成具有奈米氣孔的物質的組合物的 技術，但在用於成膜的穩定的熱處理之前，充分去除了致孔劑，從而追加了用於向所述空間形成導致介電常數降低的氣孔的致孔劑的沸點以上的熱處理製程。 Moreover, for the formation of conventional low-dielectric porous semiconductor insulating films, including: porogens with silyl-modified end groups; thermally stable organic or inorganic matrix precursors; and solvents that dissolve the substances, revealed Using a composition for forming a substance having nanopores Technology, but before the stable heat treatment for film formation, the porogen is sufficiently removed, thereby adding a heat treatment process for forming a pore that causes a decrease in the dielectric constant of the porogen to the space above the boiling point of the porogen.
本發明的目的在於，提供將構成絕緣膜的材料藉由電紡絲奈米纖維化來藉由奈米纖維簇成膜，從而，從成膜步驟具有纖維氣孔(Fibrous Pore)的絕緣膜形成方法及由此獲取的絕緣膜及絕緣膜製造裝置。 An object of the present invention is to provide an insulating film forming method and a method of forming an insulating film by electrospinning nanofibers and forming nanofiber clusters by fibrous nanofiber clusters, thereby having fibrous pores from the film forming step and The insulating film and insulating film manufacturing apparatus thus obtained.
本發明的絕緣膜形成方法的特徵在於，包括：(1)準備步驟，利用包括高壓發生裝置、與高壓發生裝置的一個電極電連接的紡絲噴嘴及與高壓發生裝置的包括對電極在內的另一個電極電連接的收集部的電紡絲裝置來向紡絲噴嘴供給待形成奈米纖維的成膜物質並在收集部安裝晶片；以及(2)層疊步驟，使高壓發生裝置進行工作，使得從紡絲噴嘴電紡絲成膜物質，以便在晶片形成由藉由電紡絲形成的成膜物質的奈米纖維簇所形成的層。 The method for forming an insulating film of the present invention is characterized by including: (1) a preparation step using a spinning nozzle including a high voltage generating device, an electrode electrically connected to one electrode of the high voltage generating device, and a counter electrode including a high voltage generating device The electrospinning device of the collecting part electrically connected to the other electrode supplies the spinning nozzle with the film-forming substance to be formed of nanofibers and mounts the wafer in the collecting part; and (2) the laminating step, the high-voltage generating device is operated so that The spinning nozzle electrospins the film-forming substance to form a layer formed of nanofiber clusters of the film-forming substance formed by electrospinning on the wafer.
本發明的絕緣膜製造裝置的特徵在於，包括：高壓發生裝置；紡絲噴嘴，與高壓發生裝置的一個電極電連接；以及收集部，與高壓發生裝置的包括對電極在內的另一個電極電連接，其中，收集部還包括用於固定晶片的固定單元。 The insulating film manufacturing apparatus of the present invention is characterized by comprising: a high-voltage generating device; a spinning nozzle, which is electrically connected to one electrode of the high-voltage generating device; and a collecting part, which is electrically connected to the other electrode of the high-voltage generating device, including the counter electrode The connection, wherein the collecting part further includes a fixing unit for fixing the wafer.
根據本發明，本發明具有如下效果，即，提供將構成絕緣膜的材料藉由電紡絲奈米纖維化來藉由奈米纖維簇成膜的多孔性絕緣膜形成方法及由此獲取的絕緣膜及絕緣膜製造裝置。 According to the present invention, the present invention has the effect of providing a porous insulating film forming method of forming a film constituting an insulating film by electrospinning nanofibers and forming a film from nanofiber clusters, and an insulating film obtained thereby And insulating film manufacturing equipment.
11:高壓發生裝置 11: High voltage generating device
12:紡絲噴嘴 12: spinning nozzle
13:晶片 13: Wafer
圖1為示出氣孔率，即，多空度與相對介電常數的關係的圖表，圖1為示出在具有任何介電常數的材料中的基於氣孔的介電常數降低的圖表，示出若向介電常數k值為2.8的物質賦予40%以上的氣孔率，則可具有有利於超高速半導體形成的2.0以下的介電常數。 FIG. 1 is a graph showing porosity, that is, the relationship between multiple porosity and relative dielectric constant, and FIG. 1 is a graph showing a decrease in dielectric constant based on pores in a material having any dielectric constant, showing If a porosity of 40% or more is given to a substance having a dielectric constant k value of 2.8, it can have a dielectric constant of 2.0 or less which is advantageous for the formation of ultra-high-speed semiconductors.
圖2為示意性示出本發明中可使用的電紡絲裝置的一個具體例的結構圖。 2 is a configuration diagram schematically showing a specific example of an electrospinning device usable in the present invention.
圖3為示意性示出本發明中可使用的電紡絲裝置的另一個具體例的結構圖。 FIG. 3 is a configuration diagram schematically showing another specific example of an electrospinning device usable in the present invention.
圖4為示意性示出根據本發明，藉由電紡絲裝置形成由奈米纖維簇形成的絕緣層的技術結構的概念的圖。 4 is a diagram schematically showing the concept of the technical structure of forming an insulating layer formed of nanofiber clusters by an electrospinning device according to the present invention.
圖5為根據本發明的一個實施例獲取的聚醯亞胺薄膜的表面照片。 5 is a photograph of the surface of a polyimide film obtained according to an embodiment of the present invention.
圖6為圖5的聚醯亞胺薄膜的剖面照片。 6 is a cross-sectional photograph of the polyimide film of FIG. 5.
以下，參照圖式，詳細說明本發明的具體實施例。 Hereinafter, specific embodiments of the present invention will be described in detail with reference to the drawings.
高分子物質具有可根據加工方法，輕鬆被加工成面狀、纖維狀或成型的形狀的優點。在加工成纖維狀的過程中，可根據紡絲噴嘴的直徑或形狀調節粗細和剖面的形狀。 The polymer material has an advantage that it can be easily processed into a planar shape, a fibrous shape or a shaped shape according to a processing method. In the process of processing into a fibrous shape, the thickness and cross-sectional shape can be adjusted according to the diameter or shape of the spinning nozzle.
本發明中，提供如下技術，即，在高分子物質中，將適合用成半導體製程的絕緣膜的成膜物質作為溶液或熔融狀，利用電紡絲，將纖維狀物質覆蓋在半導體晶片來形成確保如三維結構的網的空間的多孔性絕緣膜(Mesoporous Dielectric Insulating layer)。 In the present invention, a technique is provided in which a polymer substance is formed by coating a fibrous substance on a semiconductor wafer by electrospinning using a film-forming substance suitable for an insulating film in a semiconductor process as a solution or a molten state A porous insulating film (Mesoporous Dielectric Insulating layer) that secures a space like a three-dimensional network.
藉由紡絲噴嘴的物理直徑被加工成奈米單位來製造一行的奈米纖維形狀的機械紡絲方法，很難在短時間內將寬的半導體晶片塗敷在圖案之間，且很難形成網結構。因此，本發明中，將向藉由紡絲噴嘴噴射的 液相有機高分子或無機物質施加高電壓來分成無數個奈米纖維並紡絲的電紡絲技術作為背景技術，以適合半導體製程的方式適當變形其方法和裝置來適用。 The mechanical spinning method of manufacturing a row of nanofiber shapes by processing the physical diameter of the spinning nozzle into nanometer units makes it difficult to apply a wide semiconductor wafer between patterns in a short time, and it is difficult to form Network structure. Therefore, in the present invention, the The electrospinning technology in which a liquid organic polymer or an inorganic substance is divided into numerous nanofibers by applying a high voltage and spun is used as a background technology, and its method and apparatus are suitably modified in a manner suitable for a semiconductor manufacturing process.
本發明中提出晶片表面執行收集器的作用，由此，在一個或多個紡絲噴嘴噴出的奈米纖維可藉由三維網結構覆蓋晶片表面的方法和其裝置。 In the present invention, it is proposed that the surface of the wafer performs the function of a collector, whereby the nanofibers ejected from one or more spinning nozzles can cover the surface of the wafer with a three-dimensional mesh structure and a device thereof.
本發明中，當藉由紡絲噴嘴噴射液相的高分子或無機物時，利用藉由高電壓實現奈米纖維的化的電紡絲法提供絕緣特性卓越的半導體製程用絕緣膜，且並不局限於絕緣膜，也可適用於其他的薄膜形成製程。 In the present invention, when a liquid-phase polymer or inorganic substance is ejected through a spinning nozzle, an electrospinning method that realizes nanofiber formation by high voltage provides an insulating film for semiconductor process with excellent insulating properties, and does not It is limited to the insulating film and can also be applied to other thin film forming processes.
本發明的絕緣膜形成方法包括：(1)準備步驟，利用包括高壓發生裝置、紡絲噴嘴及收集部的電紡絲裝置，所述紡絲噴嘴與高壓發生裝置的一個電極電連接，所述收集部與高壓發生裝置的包括對電極在內的另一個電極電連接，向紡絲噴嘴供給待形成奈米纖維的成膜物質並在收集部安裝晶片；以及(2)層疊步驟，藉由使高壓發生裝置進行工作來從紡絲噴嘴電紡絲成膜物質，在晶片形成由藉由電紡絲形成的成膜物質的奈米纖維簇所形成的層。 The insulating film forming method of the present invention includes: (1) a preparation step using an electrospinning device including a high-voltage generating device, a spinning nozzle and a collecting part, the spinning nozzle is electrically connected to one electrode of the high-voltage generating device, The collecting part is electrically connected to another electrode including the counter electrode of the high-voltage generating device, supplies the film-forming substance to be formed with nanofibers to the spinning nozzle and mounts the wafer in the collecting part; and (2) the laminating step, by making The high-pressure generator operates to electro-spin the film-forming substance from the spinning nozzle, and forms a layer formed of nanofiber clusters of the film-forming substance formed by electro-spinning on the wafer.
所述(1)的準備步驟中，利用包括高壓發生裝置、紡絲噴嘴及收集部的電紡絲裝置來向紡絲噴嘴供給待形成奈米纖維的成膜物質並在收集部安裝晶片，所述紡絲噴嘴與高壓發生裝置的一個電極電連接，所述收集部與高壓發生裝置的包括對電極在內的另一個電極電連接。向紡絲噴嘴供給並被電紡絲的成膜物質以流體狀，即，以液相供給，在後續的層疊步驟中，藉由高壓發生裝置所適用的高電壓紡絲來藉由奈米纖維形成。為此，電紡絲裝置的高壓發生裝置的一個電極與紡絲噴嘴電連接，包括對電極在內的另一個電極與收集部相連接，在收集部層疊由成膜物質形成的奈米纖維簇，因此，因構成層的奈米纖維結構而在纖維之間形成多個氣孔，從而 可呈多孔性結構。 In the preparation step of (1), an electrospinning device including a high-pressure generating device, a spinning nozzle, and a collection section is used to supply the spinning nozzle with a film-forming substance to form nanofibers and to mount a wafer in the collection section, The spinning nozzle is electrically connected to one electrode of the high-voltage generator, and the collecting part is electrically connected to the other electrode of the high-voltage generator, including the counter electrode. The film-forming substance supplied to the spinning nozzle and electrospun is in a fluid state, that is, is supplied in a liquid phase, and in the subsequent lamination step, it is formed by nanofibers by high-voltage spinning applied by a high-pressure generator . For this purpose, one electrode of the high-voltage generating device of the electrospinning device is electrically connected to the spinning nozzle, the other electrode including the counter electrode is connected to the collection section, and nanofiber clusters formed of film-forming substances are stacked on the collection section , Therefore, due to the nanofiber structure that forms the layer, multiple pores are formed between the fibers, thereby Can be porous.
所述(2)的層疊步驟中，藉由使高壓發生裝置進行工作來從紡絲噴嘴電紡絲成膜物質，在晶片形成由藉由電紡絲形成的成膜物質的奈米纖維簇所形成的層。 In the lamination step of (2) above, the film-forming substance is electrospun from the spinning nozzle by operating the high-pressure generating device, and the nanofiber cluster formed by the film-forming substance formed by electrospinning is formed on the wafer The layers formed.
在所述(2)的層疊步驟之後，還可包括第一次熱處理步驟，在溶劑的沸點以上至成膜物質的熔點以下的溫度條件下，作為一例，作為成膜物質的耐熱性最大的高分子的情況下，作為熔點極限的450℃左右，對形成有由藉由電紡絲形成的成膜物質的奈米纖維簇形成的層的晶片進行10分鐘至1小時的熱處理。在第一次熱處理步驟中的熱處理溫度小於溶劑的沸點或進行小於10分鐘的熱處理的情況下，在溶劑的情況下，發生溶劑成分的不充分去除和氣孔的部分關閉不充分的現象，從而對絕緣膜或其他半導體結構上的必要膜品質的特性產生影響，相反，在所適用的成膜物質的熔點以上的溫度條件下進行熱處理的情況下或者大於1小時的情況下，無法維持氣孔結構或者可導致不必要的製程時間。 After the lamination step of (2), a first heat treatment step may be included, under the temperature conditions above the boiling point of the solvent to below the melting point of the film-forming substance, as an example, the film-forming substance has the highest heat resistance In the case of molecules, a wafer formed with a layer formed of nanofiber clusters of a film-forming substance formed by electrospinning is subjected to a heat treatment for about 10 minutes to 1 hour at a melting point of about 450°C. In the case where the heat treatment temperature in the first heat treatment step is less than the boiling point of the solvent or the heat treatment is performed for less than 10 minutes, in the case of the solvent, insufficient removal of the solvent component and insufficient closure of the part of the pore occur. The characteristics of the necessary film quality on the insulating film or other semiconductor structure have an impact. On the contrary, when the heat treatment is performed at a temperature above the melting point of the applicable film-forming substance or for more than 1 hour, the pore structure cannot be maintained or Can lead to unnecessary process time.
在所述(2)的層疊步驟之後，還可包括第二次熱處理步驟，在惰性氣氛下，較佳地，在氮氣氛下，在溶劑的沸點以上至成膜物質的熔點以下的溫度條件下，對形成有由藉由電紡絲形成的成膜物質的奈米纖維簇形成的層的晶片和/或經第一次熱處理其的晶片進行10分鐘至2小時的熱處理。在第二次熱處理步驟中的熱處理大於2小時的情況下，有可能導致不必要的製程時間。 After the lamination step of (2), a second heat treatment step may be included, under an inert atmosphere, preferably, under a nitrogen atmosphere, under temperature conditions above the boiling point of the solvent to below the melting point of the film-forming substance A wafer formed with a layer formed of nanofiber clusters of a film-forming substance formed by electrospinning and/or a wafer subjected to the first heat treatment is subjected to a heat treatment for 10 minutes to 2 hours. In the case where the heat treatment in the second heat treatment step is greater than 2 hours, it may cause unnecessary process time.
如圖2及圖3所示，本發明的絕緣膜製造裝置包括：高壓發生裝置11；紡絲噴嘴12，與高壓發生裝置11的一個電極電連接；以及收集部，與高壓發生裝置的包括對電極在內的另一個電極電連接，其中，收集部還可包括用於固定晶片13的固定單元。即，以藉由紡絲噴嘴12噴射以流體狀提供的物質，尤其，成膜物質的方式構成裝置，與噴射一同向所構成的裝
置施加高電壓。所述裝置為了適用於數奈米等級的半導體晶片，紡絲用溶液或熔融液儲存裝置、計量裝置、用於注入的移送及紡絲噴嘴、紡絲噴嘴的數量和結構、晶片支撐部和安置晶片的空間或腔室、製程溫度濕度調節裝置及電壓發生裝置等可根據半導體製造公司的前後製程、各個半導體製造公司的之製造環境，即，晶片尺寸或產品的等級、半導體購買人員訂單樣品等的製程反復次數或絕緣層厚度、各個絕緣層的特定要求物質、設置空間等適當進行改造。紡絲噴嘴12以可在對應尺寸的晶片表面堆積具有規定粗細的奈米纖維或者形成薄膜的方式構成基於條件的紡絲噴嘴數量、紡絲噴嘴大小。由此，藉由本發明的裝置的紡絲噴嘴紡絲的紡絲液在紡絲噴嘴末端形成小的紡絲液珠，藉由高電壓噴射並分成更多微細促銷的眾多奈米纖維，如圖4所示，分支的奈米纖維在晶片表面或金屬配線之間均勻地塗敷或填充。若完成塗敷或填充，則藉由後處理，三維網膜形成多孔性絕緣膜。
As shown in FIGS. 2 and 3, the insulating film manufacturing apparatus of the present invention includes: a high-
即，本發明可提供以上的半導體用超低介電常數絕緣膜形成的製程過程和形成具有適合於其的電紡絲功能的薄膜形成模組的裝置。如以往的化學氣相蒸鍍製程裝置，這種裝置無需使用多個反應氣體或者形成高真空，呈無需如旋轉沉積裝置的旋轉部、烘烤部等結構的比較簡單的結構，製程過程也簡單。 That is, the present invention can provide the above process for forming an ultra-low dielectric constant insulating film for semiconductors and an apparatus for forming a thin film forming module having an electrospinning function suitable for the semiconductor. Like the conventional chemical vapor deposition process device, this device does not need to use multiple reaction gases or form a high vacuum, and has a relatively simple structure that does not require a structure such as a rotating part and a baking part of the rotary deposition device, and the process is also simple .
根據本發明，本發明提供可形成能夠改善相鄰導電結構物之間的絕緣特性的絕緣層的半導體裝置及其製造方法，本技術的半導體裝置中，在下部膜與上部膜之間形成有絕緣性材質的奈米纖維簇形成的薄膜層，在如位線、字線或金屬線的導電性結構體之間形成有奈米纖維簇形成的絕緣膜。 According to the present invention, the present invention provides a semiconductor device capable of forming an insulating layer capable of improving the insulating properties between adjacent conductive structures and a method for manufacturing the same. In the semiconductor device of the present technology, an insulation is formed between the lower film and the upper film A thin film layer formed of nanofiber clusters of a sexual material has an insulating film formed of nanofiber clusters between conductive structures such as bit lines, word lines, or metal lines.
本發明中，可使用所有種類的有機高分子、有機矽酸鹽高分子及無機物，對溶液狀和熔融狀也未進行限制。但是，為了滿足半導體製程 中所需要的物性，物質的選擇可能受到限制。例如，本發明中，在主要體現的半導體低電容絕緣膜的情況下，具有聚醯亞胺及其衍生物、包含聚苯胺在內的芳香族高分子及其衍生物、有機矽酸鹽高分子及其衍生物、氟化有機物類高分子及其衍生物、SiCOH等含碳的矽化合物等和作為無機物的氧化矽及其衍生物，但並不局限於此。因此，用於將這些形成溶液狀的溶劑也未收到特殊限制，可選擇適合於各個溶質成分的溶劑。只是，根據多種半導體的製程進行和製程要求特性及高分子的熔點，需要選擇沸點低於高分子熔點的溶劑，在可以選擇的溶劑中，沸點盡可能也要低，且需要避開判斷為考慮特性不利於製程的方面。 In the present invention, all kinds of organic polymers, organic silicate polymers, and inorganic substances can be used, and the solution state and the molten state are not limited. However, in order to meet the semiconductor manufacturing process The physical properties required in the selection of materials may be restricted. For example, in the present invention, in the case of a semiconductor low-capacitance insulating film mainly embodied, it has polyimide and its derivatives, aromatic polymers including polyaniline and its derivatives, and organic silicate polymers And its derivatives, fluorinated organic polymers and their derivatives, carbon-containing silicon compounds such as SiCOH, and inorganic oxides of silicon oxide and its derivatives, but it is not limited thereto. Therefore, the solvents used to form these solutions are not subject to special restrictions, and a solvent suitable for each solute component can be selected. However, according to the process of various semiconductors and the characteristics of the process requirements and the melting point of the polymer, it is necessary to select a solvent with a boiling point lower than the melting point of the polymer. Among the solvents that can be selected, the boiling point should be as low as possible, and the judgment should be avoided to consider The characteristics are not conducive to the process.
較佳地，溶液或熔融液的黏度為10cP至5000cP(厘泊)，根據製程進程，沒有特殊限制。 Preferably, the viscosity of the solution or melt is 10 cP to 5000 cP (centipoise), and there are no special restrictions according to the progress of the process.
用於紡絲溶液或熔融液的紡絲噴嘴的直徑可處於0.001mm至0.5mm的範圍，根據製程的需要，所述範圍並不局限於此。 The diameter of the spinning nozzle used for the spinning solution or melt may be in the range of 0.001 mm to 0.5 mm, and the range is not limited to this according to the needs of the manufacturing process.
或者，設置紡絲噴嘴的噴嘴塊沿著橫向、縱向、對角線方向的軌道具有可變固定裝置，以便可根據晶片上的圖案隨意調節紡絲噴嘴的數量和配置。 Alternatively, the nozzle block provided with spinning nozzles has variable fixing devices along the rails in the lateral, longitudinal, and diagonal directions, so that the number and configuration of spinning nozzles can be arbitrarily adjusted according to the pattern on the wafer.
在裝置中，高壓發生裝置可使用任意產品單獨構成，電壓的範圍可在1kV至50kV的範圍內穩定維持電壓。 In the device, the high-voltage generating device can be separately constructed using any product, and the voltage range can stably maintain the voltage in the range of 1kV to 50kV.
安置晶片的支撐部需要固定晶片，可具有在20℃至150℃的範圍內，可維持晶片表面的溫度的熱板或與此相對應的裝置。 The support for placing the wafer needs to fix the wafer, and may have a hot plate or a device corresponding to the temperature in the range of 20°C to 150°C that can maintain the temperature of the wafer surface.
進行絕緣膜紡絲的腔室可具有能夠維持任意濕度和溫度的裝置。 The chamber where the insulating film is spun may have a device capable of maintaining any humidity and temperature.
根據需要，紡絲噴嘴和晶片之間可設置用於調節電場分佈的導電性材料和裝置。 According to needs, conductive materials and devices for adjusting the electric field distribution may be provided between the spinning nozzle and the wafer.
紡絲噴嘴與晶片之間的距離處於50mm至250mm的範圍，根據 紡絲液的黏度、電壓的大小等和電場的分佈調節裝置的設置，所述距離並未受限。 The distance between the spinning nozzle and the wafer is in the range of 50mm to 250mm, according to The distance of the spinning solution viscosity, the magnitude of the voltage, etc. and the setting of the electric field distribution adjustment device are not limited.
紡絲後處理可根據紡絲液的特性使用熱量、紅外線、電子束等，根據需要，這些中的兩個可以複合或階段性使用。 For the post-spinning treatment, heat, infrared rays, electron beams, etc. can be used according to the characteristics of the spinning solution, and two of these can be used in combination or in stages as needed.
以下，說明本發明的較佳實施例及比較例。 Hereinafter, preferred embodiments and comparative examples of the present invention will be described.
以下的實施例用於例證本發明，而並非用於限定本發明。 The following examples are used to illustrate the present invention, but not to limit the present invention.
實施例1 Example 1
將聚醯胺酸溶解於按2：1的重量比混合N-甲基吡咯烷酮/N-甲基乙醯的混合溶液中，以使聚醯胺酸的濃度達到18重量百分比。向與紡絲噴嘴相連接的紡絲用注射器注入以上的溶液50g，並將溫度維持在30℃。電壓裝置的電壓為13.5kV，藉由具有0.1mm直徑的噴嘴尖端，以0.015mg/分鐘的速度排出200秒鐘。在3×3cm大小的晶片試片配置2個紡絲噴嘴，試片的表面溫度維持在40℃。在紡絲之後，在100℃的溫度條件下，進行了30分鐘的第一次熱處理。之後，在氮氣氛下，藉由280℃對試片加熱40分鐘。 The polyamic acid was dissolved in a mixed solution of N-methylpyrrolidone/N-methylacetonitrile mixed in a weight ratio of 2:1 so that the concentration of polyamic acid reached 18% by weight. 50 g of the above solution was injected into the spinning syringe connected to the spinning nozzle, and the temperature was maintained at 30°C. The voltage of the voltage device was 13.5 kV, and the nozzle tip with a diameter of 0.1 mm was discharged at a rate of 0.015 mg/min for 200 seconds. Two spinning nozzles were placed on a 3×3 cm wafer test piece, and the surface temperature of the test piece was maintained at 40°C. After spinning, the first heat treatment was performed for 30 minutes under the temperature condition of 100°C. Thereafter, the test piece was heated at 280°C for 40 minutes under a nitrogen atmosphere.
結果，可獲取包含平均直徑約為25mm的奈米纖維的基於BET測定法的氣孔率60%的介孔聚醯亞胺薄膜。所獲取的聚醯亞胺薄膜的表面照片在圖5中示出，且其剖面照片在圖6中示出。 As a result, a mesoporous polyimide film having a porosity of 60% based on BET measurement and containing nanofibers with an average diameter of about 25 mm can be obtained. The surface photograph of the obtained polyimide film is shown in FIG. 5, and the cross-sectional photograph thereof is shown in FIG. 6.
實施例2 Example 2
藉由[R1R2Si-NR3]n表示的聚矽氮烷中，以將烷基R均為氫(H)的重量平均分子量為75000聚合的無機聚矽氮烷的濃度達到12.5重量百分比的方式溶解在二丁醚。向與紡絲噴嘴相連接的紡絲用注射器注入以上的溶液50g，在室溫條件下，維持30%的相對濕度。將電壓裝置的電壓設定為18kV，安裝晶片的收集部的電壓為-1kV。藉由具有0.10mm的直徑的噴嘴尖端，以0.012mg/分鐘的速度排出300秒鐘。在3×3cm大小的晶片試片配 置2個紡絲噴嘴，試片的表面溫度維持在120℃。在紡絲後，在150℃的溫度條件下，進行了1小時30分鐘的熱處理。 In the polysilazane represented by [R1R 2 Si-NR 3 ] n , the concentration of the inorganic polysilazane polymerized with the weight average molecular weight of the alkyl group R being hydrogen (H) of 75,000 reaches 12.5 weight percent Dissolve in dibutyl ether. 50 g of the above solution was injected into the spinning syringe connected to the spinning nozzle, and the relative humidity of 30% was maintained at room temperature. The voltage of the voltage device was set to 18 kV, and the voltage of the wafer-mounted collector was -1 kV. With a nozzle tip having a diameter of 0.10 mm, it was discharged at a speed of 0.012 mg/min for 300 seconds. Two spinning nozzles were placed on a 3×3 cm wafer test piece, and the surface temperature of the test piece was maintained at 120°C. After spinning, heat treatment was performed at 150°C for 1 hour and 30 minutes.
結果，可獲取包含最小直徑約為20mm、最大直徑50mm的奈米纖維的BET測定孔隙率55%的介孔氧化矽膜。 As a result, a mesoporous silicon oxide film having a BET measured porosity of 55% containing nanofibers with a minimum diameter of about 20 mm and a maximum diameter of 50 mm can be obtained.
實施例3 Example 3
向與紡絲噴嘴相連接的紡絲用注射器注入作為有機無機複合物質的17重量百分比聚倍半矽氧烷/PGMEA溶液20g，在室溫條件下，維持35%的相對濕度。電壓裝置的電壓為15kV，晶片收集部的電壓依然為-15kV。藉由具有0.15mm的直徑的噴嘴尖端，以0.010mg/分鐘的速度排出600秒鐘。在3×3cm大小的晶片試片配置2個紡絲噴嘴，試片的表面溫度維持在120℃。在紡絲之後，在150℃的溫度條件下照射紅外線並進行1小時熱處理。 20 g of a 17% by weight polysilsesquioxane/PGMEA solution as an organic-inorganic composite substance was injected into a spinning syringe connected to a spinning nozzle, and a relative humidity of 35% was maintained at room temperature. The voltage of the voltage device is 15 kV, and the voltage of the wafer collection section is still -15 kV. With a nozzle tip having a diameter of 0.15 mm, it was discharged at a speed of 0.010 mg/min for 600 seconds. Two spinning nozzles were placed on a 3×3 cm wafer test piece, and the surface temperature of the test piece was maintained at 120°C. After spinning, infrared rays were irradiated under a temperature condition of 150°C and heat treatment was performed for 1 hour.
結果，可獲得包含平均直徑約為30nm的奈米纖維的氣孔率60%的介孔有機物複合矽氧化膜。 As a result, a mesoporous organic compound silicon oxide film containing a nanofiber having an average diameter of about 30 nm and having a porosity of 60% can be obtained.
以上，本發明僅詳細說明了所記載的具體例，對本發明所屬技術領域中具有通常知識者來說，在本發明的技術思想範圍內，可對本發明進行多種變形及修改是顯而易見的，這種變形及修改屬於附加的發明要求保護範圍。 In the above, the present invention has only described the specific examples described in detail. It is obvious to those who have ordinary knowledge in the technical field to which the present invention belongs that within the scope of the technical idea of the present invention, various changes and modifications to the present invention can be made. Variations and modifications belong to the scope of protection of additional invention claims.
11‧‧‧高壓發生裝置 11‧‧‧High voltage generating device
12‧‧‧紡絲噴嘴 12‧‧‧Spinning nozzle
13‧‧‧晶片 13‧‧‧chip
Claims (6)
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR10-2018-0024473 | 2018-02-28 | ||
| KR20180024473 | 2018-02-28 | ||
| KR10-2018-0140981 | 2018-11-15 | ||
| KR1020180140981A KR102160552B1 (en) | 2018-02-28 | 2018-11-15 | Manufacturing method of insulator film and insulator film making apparatus |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW201937514A TW201937514A (en) | 2019-09-16 |
| TWI694471B true TWI694471B (en) | 2020-05-21 |
Family
ID=67949829
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW108107003A TWI694471B (en) | 2018-02-28 | 2019-03-04 | Manufacturing method of insulator film and insulator film making apparatus |
Country Status (2)
| Country | Link |
|---|---|
| KR (1) | KR102160552B1 (en) |
| TW (1) | TWI694471B (en) |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW471068B (en) * | 1997-03-05 | 2002-01-01 | Hitachi Ltd | Method for fabricating semiconductor integrated circuit device with insulation film |
| EP0940249B1 (en) * | 1998-03-06 | 2008-11-05 | Dow Global Technologies Inc. | Foam insulation board faced with a tough polymeric film or composite thereof |
| TW200844246A (en) * | 2006-12-05 | 2008-11-16 | Semiconductor Energy Lab | Film formation apparatus, film formation method, manufacturing apparatus, and method for manufacturing light-emitting device |
| CN101315947A (en) * | 2007-06-01 | 2008-12-03 | Nec液晶技术株式会社 | Silicon oxide film, production method therefor and semiconductor device having gate insulation film using the same |
| TW201546878A (en) * | 2012-11-30 | 2015-12-16 | Apic Yamada Corp | Resist film forming device, conductive film forming and circuit forming device, electromagnetic wave shield forming device, shortwave high-transmissibility insulation film forming device, bump forming device and method, wiring forming device and method |
| KR20170062091A (en) * | 2015-11-27 | 2017-06-07 | 전북대학교산학협력단 | Method for manufacturing nano-fiber insulating film and nano-fiber insulating film using the same |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101440659B1 (en) * | 2010-05-25 | 2014-09-19 | 코오롱패션머티리얼 (주) | Polyimide porous nanofiber web and Method for manufacturing the same |
| KR101728100B1 (en) * | 2015-01-21 | 2017-04-18 | 에스케이씨코오롱피아이 주식회사 | Method for preparation of polyimide film using porous particles and polyimide film having low permittivity |
-
2018
- 2018-11-15 KR KR1020180140981A patent/KR102160552B1/en active IP Right Grant
-
2019
- 2019-03-04 TW TW108107003A patent/TWI694471B/en active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW471068B (en) * | 1997-03-05 | 2002-01-01 | Hitachi Ltd | Method for fabricating semiconductor integrated circuit device with insulation film |
| EP0940249B1 (en) * | 1998-03-06 | 2008-11-05 | Dow Global Technologies Inc. | Foam insulation board faced with a tough polymeric film or composite thereof |
| TW200844246A (en) * | 2006-12-05 | 2008-11-16 | Semiconductor Energy Lab | Film formation apparatus, film formation method, manufacturing apparatus, and method for manufacturing light-emitting device |
| CN101315947A (en) * | 2007-06-01 | 2008-12-03 | Nec液晶技术株式会社 | Silicon oxide film, production method therefor and semiconductor device having gate insulation film using the same |
| TW201546878A (en) * | 2012-11-30 | 2015-12-16 | Apic Yamada Corp | Resist film forming device, conductive film forming and circuit forming device, electromagnetic wave shield forming device, shortwave high-transmissibility insulation film forming device, bump forming device and method, wiring forming device and method |
| KR20170062091A (en) * | 2015-11-27 | 2017-06-07 | 전북대학교산학협력단 | Method for manufacturing nano-fiber insulating film and nano-fiber insulating film using the same |
Also Published As
| Publication number | Publication date |
|---|---|
| KR20190103931A (en) | 2019-09-05 |
| KR102160552B1 (en) | 2020-09-28 |
| TW201937514A (en) | 2019-09-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US9293361B2 (en) | Materials and methods of forming controlled void | |
| US6759098B2 (en) | Plasma curing of MSQ-based porous low-k film materials | |
| US7470454B2 (en) | Non-thermal process for forming porous low dielectric constant films | |
| EP1832351B1 (en) | Low dielectric materials and methods for making same | |
| US7064060B2 (en) | Method for manufacturing semiconductor device | |
| US20020000556A1 (en) | Hexagonal boron nitride film with low dielectric constant, layer dielectric film and method of production thereof, and plasma CVD apparatus | |
| US6872654B2 (en) | Method of fabricating a bismaleimide (BMI) ASA sacrifical material for an integrated circuit air gap dielectric | |
| US6809041B2 (en) | Low dielectric constant films derived by sol-gel processing of a hyperbranched polycarbosilane | |
| TWI305029B (en) | Material for forming exposure light-blocking film, multilayer interconnection structure and manufacturing method thereof, and semiconductor device | |
| TWI694471B (en) | Manufacturing method of insulator film and insulator film making apparatus | |
| JPWO2005124846A1 (en) | Organic siloxane film, semiconductor device using the same, flat display device, and raw material liquid | |
| US9905457B2 (en) | High boiling temperature solvent additives for semiconductor processing | |
| JP4223012B2 (en) | Insulating film forming method, multilayer structure forming method, and semiconductor device manufacturing method | |
| JP2007073914A (en) | Porous thin film, manufacturing method therefor, and semiconductor device using it | |
| KR20030001254A (en) | Semiconductor device fabrication method | |
| WO2019168288A1 (en) | Insulation film formation method and insulation film producing apparatus | |
| JP3210601B2 (en) | Semiconductor device and manufacturing method thereof | |
| JPH0570119A (en) | Production of semiconductor device | |
| US8716150B1 (en) | Method of forming a low-K dielectric film | |
| Singh | Low and High Dielectric Constant Materials: Materials Science, Processing, and Reliability Issues: Proceedings of the Fourth International Symposium: And, Thin Film Materials for Advanced Packaging Technologies: Proceedings of the Second International Symposium | |
| Yin et al. | Repairing oxygen plasma-damaged on low dielectric constant MSQ (methylsilsesquioxane) films with anneal | |
| CN102157439A (en) | Ultra-low dielectric constant material film and preparation method thereof | |
| KR20000033206A (en) | Method for forming low permittivity film utilizing vapor silylation process |