WO2019168288A1 - Insulation film formation method and insulation film producing apparatus - Google Patents

Insulation film formation method and insulation film producing apparatus Download PDF

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Publication number
WO2019168288A1
WO2019168288A1 PCT/KR2019/001869 KR2019001869W WO2019168288A1 WO 2019168288 A1 WO2019168288 A1 WO 2019168288A1 KR 2019001869 W KR2019001869 W KR 2019001869W WO 2019168288 A1 WO2019168288 A1 WO 2019168288A1
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Prior art keywords
high voltage
wafer
insulating film
film forming
voltage generator
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PCT/KR2019/001869
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French (fr)
Korean (ko)
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최영준
정진국
신경득
이상욱
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최영준
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Priority claimed from KR1020180140981A external-priority patent/KR102160552B1/en
Application filed by 최영준 filed Critical 최영준
Publication of WO2019168288A1 publication Critical patent/WO2019168288A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere

Definitions

  • the present invention relates to an insulating film forming method and an insulating film manufacturing apparatus, and more particularly, to an insulating film forming method and an insulating film manufacturing apparatus in which a material constituting the insulating film is formed into nanofiber clusters by nanofiberization by electrospinning.
  • the present invention is generally widely applicable to the manufacture of electronic device materials such as semiconductors, semiconductor devices, liquid crystal devices, and the like.
  • electronic device materials such as semiconductors, semiconductor devices, liquid crystal devices, and the like.
  • the background art of semiconductor devices will be described as an example.
  • Methods for improving semiconductor device performance and reliability include using high conductive materials (metals) such as copper and using low-k materials.
  • Substrates for semiconductor to electronic device materials including silicon are subjected to various processes such as formation of insulating films including oxide films, film formation by CVD, and the like.
  • next-generation MOS transistors for example, as the above-described miniaturization technique progresses, thinning of the gate insulating film is approaching a limit, and a great problem to be overcome is raised. That is, as the process technology, it is possible to thin the silicon oxide film (SiO 2 ), which is currently used as the gate insulating film, to an extreme (1 to 2 atomic layer level), but when thinning to a film thickness of 2 nm or less, The direct tunnel causes an exponential increase in leakage current, resulting in an increase in power consumption.
  • SiO 2 silicon oxide film
  • Low dielectric constant materials are semiconductor insulating materials having a dielectric constant lower than the dielectric constant of silicon dioxide (SiO 2 ) 3.9 to 4.2. As more advanced technology is needed, ultra low dielectric constant (ULK) dielectric materials with dielectric constants lower than 2.0 are required.
  • SiO 2 silicon dioxide
  • ULK ultra low dielectric constant
  • ULK dielectrics can be obtained by creating a porous dielectric comprising pores in a low-k dielectric material.
  • Applications of ULK dielectrics include interlayer insulators (ILDs) and intermetallic insulators (IMDs).
  • MPS Moleclular-Pore-Stacking
  • organic polymers such as polyimide, polyarylene ether (PAE), cyclobutane derivatives and aromatic thermosetting polymers. It concentrates on organosilicate materials that can achieve a series or organic-inorganic hybrid effect.
  • the low dielectric constant porous insulating layer preferably satisfies the following characteristics:
  • an insulating film is indispensable to be of good quality and thin (for example, about 15 GPa or less in thickness).
  • formation of a high quality thin insulating film is very difficult.
  • CVD chemical vapor deposition method
  • the insulating film can be manufactured by plasma CVD (chemical vapor growth method), but it is difficult to obtain satisfactory interface characteristics. In this case, the most important problem is that ion damage by plasma cannot be avoided.
  • TFTs thin film transistors
  • polysilicon poly-Si
  • a gate insulating film important for the performance and reliability of the TFT is provided by plasma CVD.
  • plasma CVD plasma CVD
  • damage by plasma is inevitable.
  • the threshold voltage of the generated transistor cannot be controlled with high precision, the reliability of the transistor can be lowered.
  • SiO 2 films In the case of poly-Si TFTs, it is common to form SiO 2 films by plasma CVD using TEOS (tetra ethyl ortho silicate) and O 2 gas. Such SiO 2 films contain the carbon atoms originally contained in the gaseous material. Even if the film is formed at 350 ° C. or higher, it is difficult to reduce the carbon concentration to 1.1 ⁇ 10 20 atoms / cm 3 or less. In particular, when the film formation temperature is as low as about 200 ° C., the carbon concentration in the film can be increased to a size of up to 1.1 ⁇ 10 21 atoms / cm 3. Therefore, it is difficult to lower the film forming temperature.
  • TEOS tetra ethyl ortho silicate
  • the interfacial stationary charge density cannot be less than 5 ⁇ 10 11 cm ⁇ 2 , because the interfacial nitrogen concentration is larger than 1 atomic%. It is not possible to obtain a functional gate insulating film.
  • Oxidation methods such as, for example, ECR plasma CVD and oxygen plasma have been developed to reduce ion damage by plasma CVD to obtain high quality insulating films.
  • plasma CVD oxygen plasma
  • Oxidation methods such as, for example, ECR plasma CVD and oxygen plasma have been developed to reduce ion damage by plasma CVD to obtain high quality insulating films.
  • plasma occurs near the surface of the semiconductor, it is difficult to completely avoid ion damage.
  • JP-A 4-326731 discloses an oxidation method carried out in an ozone-containing atmosphere.
  • ozone is generated using light and ozone is decomposed using light to generate oxygen atom radicals. That is, the method comprises two reaction steps. Therefore, the method is not effective and the oxidation rate is low.
  • an oxidation method for example, an oxygen plasma oxidation method
  • the oxidation reaction proceeds from the surface of the semiconductor to the inside, and the interface between the semiconductor layer (semiconductor) and the insulating film is originally formed inside the semiconductor layer. . Therefore, since this interface is substantially unaffected by the original surface conditions, there is an advantage that a very satisfactory interface can be obtained.
  • high temperature processes can warp the silicon wafer. Low temperature suppresses warpage but reduces the oxidation rate. Therefore, the low temperature process cannot produce the insulating film at a substantial speed.
  • Korean Patent No. 10-0481835 (name of the invention: a method for forming an insulating film, a semiconductor device and a manufacturing device) includes a step of forming a first insulating film by oxidizing a surface of a semiconductor in an atmosphere containing oxygen atom radicals, and A method of forming an insulating film at a semiconductor temperature of 600 ° C. is disclosed, which includes forming a second insulating film on the first insulating film by deposition without exposing the first insulating film to the atmosphere, but using a plasma CVD method. will be.
  • Korean Patent No. 10-0782954 name of the invention: a method for forming an insulating film
  • a method for forming an insulating film includes a step of forming an insulating film on a substrate for an electronic device, wherein two or more steps for controlling the insulating film properties included in the step are performed under the same operating principle.
  • the insulating film on the surface of the substrate is formed.
  • Korean Patent Publication No. 10-2008-0007192 name of the invention: low temperature sol-gel silicate as dielectric or planarization layer for thin film transistors
  • the inventors have found that the inventors cure at 135 ° C to 250 ° C even though the process temperature is reduced. It has been found that films can be made from certain combinations of sol-gel silicate precursors that also provide good leakage current density values (9 ⁇ 10 ⁇ 9 A / cm 2 to 1 ⁇ 10 ⁇ 10 A / cm 2).
  • There are some first examples of silicates where the silicates are cured at low temperatures and the leakage current density is low enough to be used as a low temperature treated, solution treatable or printable dielectric, which dielectrics are for flexible or light weight thin film transistors. Used. These formulations disclose that they can also be used in the planarization of stainless steel foils used for thin film transistors and other electronic devices. This uses the sol-gel method.
  • porogen having a modified end group silyl as for the existing low dielectric porous semiconductor insulating film formation thermally stable organic or inorganic matrix precursors;
  • a technique using a composition for forming a material having nano-pores, including a solvent for dissolving the material has been proposed, which is sufficient to remove the porogen before the heat treatment for the stability of the film formation contributes to the decrease in the dielectric constant in the void A heat treatment process above the boiling point of porogen to form pores should be added.
  • the present invention provides a method for forming an insulating film having nanoporous fibers formed by nanospinning a material constituting the insulating film by electrospinning to form a nanofiber cluster and having fibrous pores from the film forming step, and an insulating film and insulating film manufacturing apparatus obtained therefrom. There is this.
  • the insulating film forming method of the present invention includes (1) a high voltage generator, a radiation nozzle electrically connected to one electrode of the high voltage generator, and a collecting part electrically connected to the other electrode (large electrode) of the high voltage generator. Supplying a deposition material to be formed of nanofibers to the spinning nozzle using an electrospinning device, and preparing a wafer in a collecting unit; And (2) a laminating step of operating the high voltage generator to electrospin the film forming material from the spinning nozzle to form a layer consisting of clusters of nanofibers of the film forming material formed by electrospinning on the wafer. do.
  • the insulation film manufacturing apparatus of the present invention includes a high voltage generator, a radiation nozzle electrically connected to one electrode of the high voltage generator, and a collector electrically connected to the other electrode (large electrode) of the high voltage generator.
  • the collection portion is characterized in that it further comprises a fixing means for fixing the wafer.
  • the present invention there is an effect of providing a method for forming a porous insulating film in which the material constituting the insulating film is nanofiberized by electrospinning to form a nanofiber cluster, and the insulating film and insulating film manufacturing apparatus obtained therefrom.
  • FIG. 1 is a graph showing the porosity, that is, the relationship between porosity and relative dielectric constant.
  • a graph showing a decrease in permittivity according to pores in a material having a certain dielectric constant is given to a material having a dielectric constant (k) of 2.8 or more with a porosity of 40% or more. It is shown schematically that it can have a dielectric constant of 2.0 or less, which is advantageous for forming ultrafast semiconductors.
  • FIG. 2 is a schematic diagram showing one specific example of the electrospinning apparatus that can be used in the present invention.
  • FIG. 3 is a schematic diagram showing another embodiment of the electrospinning apparatus that can be used in the present invention.
  • FIG. 4 is a diagram schematically illustrating the concept of a technical configuration in which an insulating layer made of nanofiber clusters is formed by an electrospinning apparatus according to the present invention.
  • FIG. 5 is a surface photograph of a polyimide film obtained according to one embodiment of the present invention.
  • FIG. 6 is a cross-sectional photograph of the polyimide film of FIG. 5.
  • the present invention in its best form, includes (1) a high voltage generator, a radiation nozzle electrically connected to one electrode of the high voltage generator and a collector electrically connected to the other electrode (the counter electrode) of the high voltage generator. Supplying a deposition material to be formed of nanofibers to the spinning nozzle using an electrospinning device, and preparing a wafer in a collecting unit; And (2) a laminating step of operating the high voltage generator to electrospin the film forming material from the spinning nozzle to form a layer of clusters of nanofibers of film forming material formed by electrospinning on the wafer; It provides a method for forming an insulating film comprising a.
  • a high voltage generator a radiation nozzle electrically connected to one electrode of the high voltage generator, and a collector electrically connected to the other electrode (the counter electrode) of the high voltage generator, wherein the collector includes a wafer.
  • the present invention provides an insulating film manufacturing apparatus further comprising a fixing means for fixing.
  • the polymer material has an advantage that it can be easily processed into a planar, fibrous or molded shape depending on the processing method.
  • the thickness and the shape of the cross section can be adjusted according to the diameter or shape of the spinning nozzle.
  • a porous film having a hollow space such as a net membrane having a three-dimensional structure by coating a fibrous material on a semiconductor wafer by electrospinning a film-forming material suitable for use as an insulating film for a semiconductor process among polymer materials as a solution or a molten phase. It is an object of the present invention to provide an insulating film (Mesoporous Dielectric Insulating layer).
  • the present invention is based on the electrospinning technology that is spun off into numerous nanofibers by applying high voltage to the liquid organic polymer or inorganic material sprayed through the spinning nozzle as the background of the technology, and the method and apparatus as appropriate for the semiconductor process. It characterized in that to apply a strain.
  • the present invention proposes a method and apparatus for allowing nanofibers from one or more spinning nozzles to cover the wafer surface with a three-dimensional mesh structure on the wafer surface by configuring the wafer surface to perform the role of a collector.
  • the present invention provides an insulating film for a semiconductor process having excellent insulating properties by using an electrospinning method of nanofiberization at high voltage when spraying a polymer or inorganic material through a spinning nozzle in a liquid phase, and is not limited to the insulating film and applied to other thin film forming processes. can do.
  • the insulating film forming method of the present invention includes (1) a high voltage generator, a radiation nozzle electrically connected to one electrode of the high voltage generator, and a collecting part electrically connected to the other electrode (large electrode) of the high voltage generator. Supplying a deposition material to be formed of nanofibers to the spinning nozzle using an electrospinning device, and preparing a wafer in a collecting unit; And (2) a laminating step of operating the high voltage generator to electrospin the film forming material from the spinning nozzle to form a layer consisting of clusters of nanofibers of the film forming material formed by electrospinning on the wafer. do.
  • the preparation step of (1) includes a high voltage generator, a radiation nozzle electrically connected to one electrode of the high voltage generator, and an electrospinning unit including a collector electrically connected to the other electrode (large electrode) of the high voltage generator.
  • the apparatus consists of supplying a film forming material to be formed of nanofibers to a spinning nozzle and mounting a wafer on a collecting part.
  • the deposition material to be supplied to the spinning nozzle to be electrospun may be formed into nanofibers by being supplied in the fluid phase, i.e., in the liquid phase, and spun by a high voltage applied by the high voltage generator in a subsequent lamination step.
  • one electrode of the high-voltage generator of the electrospinning apparatus is electrically connected to the radiation nozzle, the other electrode (the counter electrode) is connected to the collector, and the cluster of nanofibers made of a film-forming material is stacked on the collector. Therefore, due to the structure of the nanofibers constituting the layer, a plurality of pores are formed between the fibers to have a porous structure.
  • the laminating step of (2) is performed by operating the high voltage generator to electrospin the film forming material from the spinning nozzle to form a layer consisting of clusters of nanofibers of film forming material formed by electrospinning on the wafer.
  • the wafer on which the layer formed of the nanofibers of the film forming material formed by electrospinning is formed is above the boiling point of the solvent or below the melting point of the film forming material, for example, the largest heat resistance known as the film forming material.
  • the polymer may further include a first heat treatment step of heat treatment for 10 minutes to 1 hour at the melting point limit of 450 °C. If the heat treatment temperature in the first heat treatment step is heat-treated below the boiling point of the solvent or less than 10 minutes, insufficient solution removal and partial closing of the pores occur in the case of the solution, so that the required film quality of the insulating film or other semiconductor structure is insufficient. There may be a problem that affects the properties, on the contrary there may be a problem that can not maintain the pore structure or cause unnecessary process time if the heat treatment above the melting point of the applied deposition material or more than 1 hour.
  • the wafer on which the layer formed of the nanofibers of the film-forming material formed by electrospinning and / or the first heat-treated wafer is in an inert atmosphere, preferably
  • the method may further include a second heat treatment step of performing heat treatment for 10 minutes to 2 hours at or above the boiling point of the solvent or below the melting point of the deposition material under a nitrogen atmosphere. If the heat treatment in the second heat treatment step exceeds 2 hours, there may be a problem that causes unnecessary process time.
  • the insulating film manufacturing apparatus of the present invention includes a radiation nozzle 12 and a high voltage generator electrically connected to one electrode of the high voltage generator 11, the high voltage generator 11. And a collecting part electrically connected to the other electrode (the counter electrode), wherein the collecting part further includes fixing means for fixing the wafer 13. That is, the device is configured to spray the material provided in the fluid phase, in particular, the deposition material through the radiation nozzle 12, and to apply a high voltage with the injection to the configured device.
  • Such a device is a spinning solution or melt storage device, a metering device, a transfer and spinning nozzle for injection, the number and structure of spinning nozzles, a space or chamber in which a wafer support and a wafer are placed for application to a few nanoscale semiconductor wafer.
  • Process temperature / humidity control device and voltage generator are used in the process before and after the semiconductor manufacturer, manufacturing environment by semiconductor manufacturer, ie the number of process repetitions or insulation layer thickness and specific requirements for each insulation layer according to wafer size, product grade, semiconductor buyer order specification, etc. It can be adapted according to the installation clearance.
  • the spinning nozzle 12 configures the number of spinning nozzles and spinning nozzles according to conditions so that nanofibers having the corresponding thicknesses can be accumulated or thin films are formed on the wafer surface of the corresponding size. Accordingly, the spinning liquid radiated through the spinning nozzle of the device according to the present invention forms a small droplet at the tip of the spinning nozzle, and is branched into numerous nanofibers of finer thickness while being sprayed by a high voltage, and the branched nanofibers are illustrated in FIG. 4. As shown in Fig. 1, the wafer surface or metal wiring is evenly applied or filled. After the coating or filling is completed, the three-dimensional netting film forms a porous insulating film through post-treatment.
  • the present invention can provide a device having a thin film forming module having an electrospinning function suitable for the above-described process of forming an ultra-low dielectric constant insulating film for semiconductors.
  • Such a device does not need to use a plurality of reaction gases or to form a high vacuum like a conventional CVD process equipment, and has a relatively simple configuration that does not require a track configuration such as a spin part and a bake part like an SOD device and has a simple process process. Is characteristic.
  • a semiconductor device capable of forming an insulating layer capable of improving the insulating properties between neighboring conductive structures, and a method of manufacturing the same.
  • the semiconductor device according to the present invention has an insulating property between a lower film and an upper film.
  • An insulating film made of nanofiber clusters is formed between a thin film layer made of nanofiber clusters of material or between conductive structures such as bit lines, word lines, or metal lines.
  • organic polymers organic silicate polymers, and inorganic materials
  • the solution phase and the melt phase are not limited.
  • the viscosity of the solution or melt is preferably not particularly limited in the range of 10 to 5,000 cP (centifose) or depending on the needs of the process.
  • Spinning nozzles for spinning solutions or melts can be chosen in the range of 0.001 to 0.5 mm in diameter, and there is no limitation in this range depending on the needs of the process.
  • the nozzle block for installing the spinneret so that the number and arrangement of the spinneret can be arbitrarily adjusted according to the pattern on the wafer has a variable fixing device along the rail in the transverse, vertical and diagonal directions of the nozzle fixing part.
  • the high voltage generator may use any product or may be configured separately, but the voltage range should be able to maintain a stable voltage in the range of 1 kV to 50 kV.
  • the support on which the wafer is placed may have a hot plate or equivalent device in which the wafer is to be fixed and capable of maintaining the temperature of the wafer surface in the range of 20 to 150 ° C.
  • the chamber through which the insulation film is radiated may include a device capable of maintaining an arbitrary humidity and temperature.
  • Conductive materials and devices can be installed between the spinning nozzle and the wafer to adjust the distribution of the electric field as needed.
  • the distance between the spinning nozzle and the wafer is in the range of 50 mm to 250 mm, and the distance is not limited by the viscosity of the spinning liquid, the magnitude of the voltage, and the installation of the electric field distribution control device.
  • Radiation post-treatment may use heat, UV, electron beam, etc., depending on the characteristics of the spinning liquid, two or more of these may be used in combination or in stages as necessary.
  • N-methylpyrrolidone / N-methylacetamide was dissolved in a mixed solvent in a weight ratio of 2: 1 so that the concentration of polyamic acid was 18% by weight.
  • 50 g of the above solution was injected into a spinning syringe connected with a spinning nozzle, and the temperature was maintained at 30 ° C.
  • the voltage of the voltage device was set to 13.5 kV and the conditions were set to be discharged for 200 seconds at a rate of 0.015 mg / min through a nozzle tip having a diameter of 0.1 mm.
  • Two spinning nozzles were placed on a 3 ⁇ 3 cm wafer specimen, and the surface temperature of the specimen was maintained at 40 ° C. After spinning, primary heat treatment was performed at 100 ° C. for 30 minutes. The specimen was then heated to 280 ° C. for 40 minutes under a nitrogen atmosphere.
  • a mesoporous polyimide membrane having a porosity of 60% by the BET measurement method containing nanofibers having an average diameter of about 25 nm was obtained.
  • the surface photograph of the obtained polyimide membrane is shown in FIG. 5, and a cross-sectional photograph is shown in FIG.
  • dibutyl ether was added so that the concentration of the inorganic polysilazane polymerized at a weight average molecular weight of 75,000 in which all of the alkyl groups R were hydrogen (H) was 12.5% by weight. Dissolved. 50 g of the above solution was injected into a spinning syringe connected with a spinning nozzle, and a relative humidity of 35% was maintained at room temperature. The voltage of the voltage device was set to 18 kV and the voltage of the collector on which the wafer was mounted was applied to -12 kW.
  • the conditions were set so that they could be discharged for 300 seconds at a rate of 0.012 mg / minute through a nozzle tip with a diameter of 0.10 mm.
  • Two spinning nozzles were placed on a 3 ⁇ 3 cm wafer specimen and the surface temperature of the specimen was maintained at 120 ° C. After spinning, heat treatment was performed at 150 ° C. for 1 hour 30 minutes.
  • a mesoporous silicon oxide film having a BET measurement porosity of 55% containing nanofibers having a minimum diameter of about 20 nm and a maximum diameter of 50 nm was obtained.

Abstract

The present invention relates to an insulation film formation method in which a material constituting an insulation film is nano-fiberized by electrospinning to obtain an insulation film formed of nanofiber clusters, an insulation film obtained thereby, and an insulation film producing apparatus, An insulation film formation method according to the present invention comprises: (1) a preparation step of mounting a wafer on a collection part and supplying a film forming material to be formed as a nanofiber to a spinning nozzle by using an electrospinning device including a high voltage generation device, the spinning nozzle, and the collection part, the spinning nozzle being electrically connected to one electrode of the high voltage generation device, the collection part being electrically connected to the other electrode (counter electrode) of the high voltage generation device; and (2) a lamination step of operating the high voltage generation device to electrospin the film forming material from the spinning nozzle so as to form, on the wafer, a layer formed of clusters of a nanofiber of the film forming material, which is formed by electrospinning.

Description

절연막 형성 방법 및 절연막 제조장치 Insulating film forming method and insulating film manufacturing apparatus
본 발명은 절연막 형성 방법 및 절연막 제조장치에 관한 것으로 특히, 절연막을 구성하는 재료를 전기방사에 의하여 나노섬유화하여 나노섬유 클러스터로 성막되는 절연막 형성 방법 및 절연막 제조장치에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an insulating film forming method and an insulating film manufacturing apparatus, and more particularly, to an insulating film forming method and an insulating film manufacturing apparatus in which a material constituting the insulating film is formed into nanofiber clusters by nanofiberization by electrospinning.
본 발명은 반도체 내지 반도체 장치, 액정 소자 등의 전자 소자 재료의 제조에 일반적으로 널리 적용할 수 있는데, 여기서는 설명의 편의를 위해, 반도체 장치(devices)의 배경 기술을 예로 들어 설명하기로 한다.The present invention is generally widely applicable to the manufacture of electronic device materials such as semiconductors, semiconductor devices, liquid crystal devices, and the like. Here, for convenience of description, the background art of semiconductor devices will be described as an example.
집적 회로(IC)의 축소에 따라 얇은 배선의 두께와 좁아진 배선 간격은 저항 증가와 저항-커패시턴스(RC) 커플링의 문제가 발생하여 소자의 크기가 축소됨으로써 얻을 수 있는 속도향상의 장점을 상쇄한다. 반도체 소자 성능 및 신뢰성을 개선하기 위한 방법들은 구리와 같은 고 전도성 재료(금속)들을 사용하는 것과 저유전율(low-κ) 재료들을 사용하는 것을 포함한다.Thinner wire thickness and narrower wiring spacing due to the reduction of integrated circuits (IC) offsets the speed-up benefits that can be achieved by reducing the size of the device due to increased resistance and resistance-capacitance (RC) coupling problems. . Methods for improving semiconductor device performance and reliability include using high conductive materials (metals) such as copper and using low-k materials.
실리콘을 비롯한 반도체 내지 전자 디바이스 재료용 기재에는 산화막을 비롯한 절연막 형성, CVD 등에 의한 성막, 에칭 등의 여러 가지 처리가 실시된다.Substrates for semiconductor to electronic device materials including silicon are subjected to various processes such as formation of insulating films including oxide films, film formation by CVD, and the like.
최근의 반도체 디바이스의 고성능화는 트랜지스터를 비롯한 상기 디바이스의 미세화 기술 상에 발전해 왔다고 해도 과언이 아니다. 현재도 한층 더 고성능화를 목표로 하여 트랜지스터의 미세화 기술의 개선이 이루어지고 있다. 최근의 반도체 장치의 미세화 및 고성능화의 요청에 따라(예컨대, 누설 전류의 관점에서), 보다 고성능 절연막에 대한 필요성이 현저히 높아지고 있다. 이것은, 종래의 비교적 집적도가 낮은 디바이스에 있어서는 사실상 문제가 되지 않을 정도의 누설 전류라도 최근의 미세화, 고집적화 및/또는 고성능화된 디바이스에 있어서는, 심각한 문제를 일으킬 가능성이 있기 때문이다. 전형적으로는, 예컨대 차세대 MOS 트랜지스터를 개발하는 데에 있어서, 전술한 바와 같은 미세화 기술이 진행됨에 따라서 게이트 절연막의 박막화가 한계에 다다르고 있어, 극복하여야 할 큰 과제가 대두되고 있다. 즉, 공정 기술로서는 현재 게이트 절연막으로서 이용되고 있는 실리콘 산화막(SiO2)을 극한(1 내지 2 원자층 레벨)까지 박막화하는 것이 가능하지만, 2 ㎚ 이하의 막 두께까지 박막화한 경우, 양자 효과에 의한 다이렉트 터널에 의해 누설 전류의 지수 함수적 증가가 생겨, 소비 전력이 증대해 버린다는 문제가 있다.It is no exaggeration to say that the recent high performance of semiconductor devices has developed on the miniaturization technology of such devices including transistors. To this day, further refinement of transistor miniaturization technology has been achieved with the aim of further improving the performance. With the recent demand for miniaturization and high performance of semiconductor devices (for example, in view of leakage current), the need for higher performance insulating films has increased significantly. This is because even a leakage current that is not a problem in the conventional relatively low integration device may cause serious problems in recent miniaturization, high integration, and / or high performance devices. Typically, in developing next-generation MOS transistors, for example, as the above-described miniaturization technique progresses, thinning of the gate insulating film is approaching a limit, and a great problem to be overcome is raised. That is, as the process technology, it is possible to thin the silicon oxide film (SiO 2 ), which is currently used as the gate insulating film, to an extreme (1 to 2 atomic layer level), but when thinning to a film thickness of 2 nm or less, The direct tunnel causes an exponential increase in leakage current, resulting in an increase in power consumption.
전형적으로는, 예컨대 차세대 MOS 트랜지스터를 개발하는 데에 있어서, 고성능의 실리콘 LSI의 미세화를 추구해 나가면 누설 전류가 증대되어, 소비 전력이 늘어난다는 문제가 생기고 있다. 그래서 성능을 추구하면서 소비 전력을 적게 하기 위해서는, MOS 트랜지스터의 게이트 누설 전류를 증가시키는 일없이 트랜지스터의 특성을 향상시킬 필요가 있다.Typically, for example, in developing next-generation MOS transistors, the pursuit of miniaturization of high-performance silicon LSI causes a problem that leakage current increases and power consumption increases. Therefore, in order to reduce the power consumption while pursuing performance, it is necessary to improve the characteristics of the transistor without increasing the gate leakage current of the MOS transistor.
저유전율 재료들은 이산화규소(SiO2)의 유전율 3.9 내지 4.2 보다 낮은 유전율을 갖는 반도체 절연 재료들이다. 보다 진보된 기술이 필요해짐에 따라, 2.0 보다 낮은 유전율을 갖는 초저유전율(ULK) 유전체 재료들이 요구된다. Low dielectric constant materials are semiconductor insulating materials having a dielectric constant lower than the dielectric constant of silicon dioxide (SiO 2 ) 3.9 to 4.2. As more advanced technology is needed, ultra low dielectric constant (ULK) dielectric materials with dielectric constants lower than 2.0 are required.
ULK 유전체는 low-κ 유전체 물질 내에 기공(pore)들을 포함한 다공성 유전체를 생성함으로써 획득될 수 있다. ULK 유전체들의 애플리케이션들은 층간절연체(ILD) 및 금속배선간간 절연체(IMD)를 포함한다.ULK dielectrics can be obtained by creating a porous dielectric comprising pores in a low-k dielectric material. Applications of ULK dielectrics include interlayer insulators (ILDs) and intermetallic insulators (IMDs).
여러 반도체용 재료와 장비개발 업체에서 CVD(Chemical Vapor Deposition) 및 SOD(Spin-On Deposition) 박막공정 기술에 관한 연구를 지속적으로 수행하고 있으며, 그에 관한 연구결과가 계속 보고되고 있다. 지금까지 저유전막의 연구는 시장에서 필요로 하는 수요를 맞추면서 제품의 안정성(reliability)을 고려하여, PECVD 방식을 이용한 OSG(organosilicate glass) 물질이 선택되어져 왔다. 그러나, PECVD용 OSG 물질은 현재 κ > 2.4에 머무르고 있다. 40 ㎚ 이하의 공정에서 필요로 하는 κ < 2.2를 구현하기 위해서 저유전 물질 내에 40% 이상의 다공성이 요구된다. 그러나, PECVD 방식의 경우 좋은 기계적 물성을 유지하면서 40% 이상의 기공을 도입하는 데에 한계가 있어 더 이상 유전율을 낮추는 데는 어려움이 많은 것이 사실이다. Spin-on 방식의 초 저유전율 재료들이 층간 절연 물질로 적용되기 위해서는 뛰어난 물리적 특성의 매트릭스 고분자 및 높은 다공성에서 작고 폐쇄된 기공 몰포로지(즉, 우수한 특성의 메조포러스: Mesoporous)를 구현 할 수 있는 기공 형성제 개발 및 기공형성법 연구가 모두 성공적으로 이루어져야 하며, 이는 차세대 메모리 및 비메모리 반도체 성능의 한계를 결정짓는 매우 중요한 과제라 할 수 있다.Various semiconductor materials and equipment development companies are continuously conducting research on CVD (chemical vapor deposition) and spin-on deposition (SOD) thin film process technology, and the results of the research are reported. Until now, the research of low dielectric films has been selected for OSG (organosilicate glass) materials using PECVD in consideration of product stability while meeting the demands of the market. However, OSG materials for PECVD currently remain at κ> 2.4. More than 40% porosity is required in the low dielectric material to achieve κ <2.2 required in processes below 40 nm. However, in the case of PECVD, there is a limit in introducing more than 40% of pores while maintaining good mechanical properties, so it is difficult to lower the dielectric constant any more. In order for the spin-on ultra low dielectric constant materials to be applied as an interlayer insulating material, it is possible to realize a small, closed pore morphology (i.e., mesoporous) with excellent physical properties and matrix polymer with high physical properties. Pore former development and pore formation research must all be successful, which is a very important task to determine the limits of next-generation memory and non-memory semiconductor performance.
분자-기공-적층법(MPS: Moleclular-Pore-Stacking)이라는 새로운 개념의 기공 생성법을 사용하여 45 ㎚-노드 LSI를 위한 κ = 2.4의 물질과 공정개발에 성공했다는 보고도 있고, 다공성 오르가노실리케이트(porous organosilicate)의 일종인 LKD 시리즈에 대한 연구가 지속적으로 이루어지고 있으며, 유전율 2.2 이하의 ULK 유전체, CVD low-κ, 광패턴형성가능 low-κ에 대해 연구 진행에 대한 언급도 있다.A new concept of pore generation, called Moleclular-Pore-Stacking (MPS), has been used to report the successful development of materials and processes of κ = 2.4 for 45 nm-node LSI, and porous organosilicates. Research on the LKD series, a kind of porous organosilicate, is ongoing, and there are comments on the progress of research on ULK dielectrics with a dielectric constant of 2.2 or less, CVD low-k, and low pattern-capable low-k.
CVD 방식의 다공성 저유전막의 생성은 현재 κ = 2.2 내지 2.5까지 개발이 보고되고 있으며, 스핀-온 방식 재료들은 대부분 폴리이미드, 폴리아릴렌에테르(PAE), 시클로부탄 유도체, 방향족 열경화성 고분자 등 유기고분자 계열, 혹은 유무기 혼성 효과를 얻을 수 있는 유기실리케이트 재료에 집중되어 있다. The development of CVD porous low-k dielectric film is currently reported to κ = 2.2 to 2.5, and most of spin-on materials are organic polymers such as polyimide, polyarylene ether (PAE), cyclobutane derivatives and aromatic thermosetting polymers. It concentrates on organosilicate materials that can achieve a series or organic-inorganic hybrid effect.
유전율 2.7 내지 3.0의 유기실리케이트 박막에 기공을 도입할 경우, 공기의 유전율은 1 이므로 유전율은 낮아지게 되고, 기공을 많이 도입할수록 도 1에 나타낸 바와 같이 더 낮게 떨어지게 된다.When pores are introduced into the organic silicate thin film having a dielectric constant of 2.7 to 3.0, the dielectric constant of air is 1, and thus the dielectric constant is lowered, and as more pores are introduced, the pores are lowered as shown in FIG. 1.
또한, 저유전율의 다공성 절연층은 다음의 특성을 만족하는 것이 바람직하다:In addition, the low dielectric constant porous insulating layer preferably satisfies the following characteristics:
- 낮은 유전율(low dielectric constant)Low dielectric constant
- 열안정성(thermally stable at temperature > 450℃ for some hours)Thermally stable at temperature> 450 ° C for some hours
- 막간 접착성(excellent adhesion to underlying and top layers)Excellent adhesion to underlying and top layers
- 내용매성(resisting to solvents and resists used in lithography)Resisting to solvents and resists used in lithography
- 패터닝(etch in RIE)Patterning (etch in RIE)
- 평탄성(self-planarization or planarization with CMP)Flatness (self-planarization or planarization with CMP)
- 낮은 흡습성(low water absorption)Low water absorption
- 낮은 열팽창계수(Low and isotropic coefficient of thermal expansion(CTE))Low and isotropic coefficient of thermal expansion (CTE)
- 유전손실, 임계전압, 누설전류 특성(Acceptable dielectric loss, breakdown voltage, and leakage current)Acceptable dielectric loss, breakdown voltage, and leakage current
- 우수한 단차 채움 성질(Excellent gap-fill properties)Excellent gap-fill properties
- 높은 기계적 강도(High mechanical strength)High mechanical strength
- 높은 유리전이온도(High glass transition temperature)High glass transition temperature
- 높은 열전도도(High thermal conductivity).High thermal conductivity.
이러한 미세화 및 특성의 향상을 양립시키기 위해서는, 양질이며 또한 얇은(예컨대, 막 두께가 15 Å 이하 정도) 절연막 형성이 불가결하다. 그러나, 양질의 얇은 절연막의 형성은 매우 곤란하다. 예컨대, 종래의 열산화법 또는 CVD(화학 기상 증착법)로 이러한 절연막을 성막한 경우에는 막질 또는 막 두께 중 어느 한 쪽의 특성이 불충분했다.In order to attain both such miniaturization and improvement of properties, an insulating film is indispensable to be of good quality and thin (for example, about 15 GPa or less in thickness). However, formation of a high quality thin insulating film is very difficult. For example, when such an insulating film is formed by conventional thermal oxidation method or CVD (chemical vapor deposition method), the characteristics of either film quality or film thickness are insufficient.
절연막은 플라즈마 CVD(화학기상 성장법)에 의해 제조될 수 있지만, 만족스런 계면특성을 얻기 어렵다. 이 경우, 가장 중요한 문제는 플라즈마에 의한 이온손상을 피할 수 없다는 것이다.The insulating film can be manufactured by plasma CVD (chemical vapor growth method), but it is difficult to obtain satisfactory interface characteristics. In this case, the most important problem is that ion damage by plasma cannot be avoided.
한편, 대형화, 고정밀화 및 고기능화 액정 표시장치를 개발하기 위해서는 더 높은 밀도를 갖는 TFT(박막 트랜지스터)를 필요로 한다. 통상의 무정형 실리콘막 TFT 대신 폴리실리콘(폴리-Si)막의 TFT에 대한 필요성이 더 높아지고 있다. TFT의 성능과 신뢰성에 있어서 중요한 게이트 절연막은 플라즈마 CVD에 의해 제공된다. 그러나, 플라즈마 CVD를 이용하여 게이트 절연막을 형성하면, 플라즈마에 의한 손상이 불가피하다. 이 경우, 특히 생성한 트랜지스터의 임계 전압은 고정밀도로 제어될 수 없기 때문에 트랜지스터의 신뢰성이 저하될 수 있다.On the other hand, TFTs (thin film transistors) with higher densities are required to develop large-sized, high-precision and highly functional liquid crystal displays. There is a growing need for TFTs of polysilicon (poly-Si) films instead of ordinary amorphous silicon film TFTs. A gate insulating film important for the performance and reliability of the TFT is provided by plasma CVD. However, if the gate insulating film is formed using plasma CVD, damage by plasma is inevitable. In this case, in particular, since the threshold voltage of the generated transistor cannot be controlled with high precision, the reliability of the transistor can be lowered.
폴리-Si TFT의 경우에서는 흔히, TEOS(테트라 에틸 오르토 실리케이트) 및 O2 가스를 이용한 플라즈마 CVD에 의해 SiO2 막을 형성할 수 있다. 이러한 SiO2 막은 가스 물질에 원래 함유된 탄소원자를 함유한다. 상기 막이 350℃ 이상에서 형성되더라도, 탄소농도를 1.1 x 1020 원자/㎤ 이하로 감소시키기는 어렵다. 특히, 막형성 온도가 약 200℃ 정도로 낮으면, 상기 막 중의 탄소농도는 1.1 x 1021 원자/㎤ 까지의 크기로 증가될 수 있다. 따라서, 막형성 온도를 낮추기가 어렵다.In the case of poly-Si TFTs, it is common to form SiO 2 films by plasma CVD using TEOS (tetra ethyl ortho silicate) and O 2 gas. Such SiO 2 films contain the carbon atoms originally contained in the gaseous material. Even if the film is formed at 350 ° C. or higher, it is difficult to reduce the carbon concentration to 1.1 × 10 20 atoms / cm 3 or less. In particular, when the film formation temperature is as low as about 200 ° C., the carbon concentration in the film can be increased to a size of up to 1.1 × 10 21 atoms / cm 3. Therefore, it is difficult to lower the film forming temperature.
SiH4 및 N2O계 가스를 사용한 플라즈마 CVD의 경우, 계면 질소농도가 1원자% 이상으로 크기 때문에, 계면고정전하 밀도는 5 x 1011-2 이하일 수 없다. 작용가능한 게이트 절연막을 수득할 수 없다. In the case of plasma CVD using SiH 4 and N 2 O-based gases, the interfacial stationary charge density cannot be less than 5 × 10 11 cm −2 , because the interfacial nitrogen concentration is larger than 1 atomic%. It is not possible to obtain a functional gate insulating film.
플라즈마 CVD에 의한 이온 손상을 감소시켜 고품질의 절연막을 수득하기 위해서 예컨대 ECR 플라즈마 CVD 및 산소 플라즈마와 같은 산화방법이 개발되어 왔다. 그러나, 플라즈마는 반도체의 표면 근처에서 발생하기 때문에 이온 손상을 완전히 피하기 어렵다. Oxidation methods such as, for example, ECR plasma CVD and oxygen plasma have been developed to reduce ion damage by plasma CVD to obtain high quality insulating films. However, since plasma occurs near the surface of the semiconductor, it is difficult to completely avoid ion damage.
예컨대 저압 수은 램프 및 엑시머 램프와 같은 광원을 사용한 세정장치는 이미 대량생산에 이용되어 왔다. For example, cleaning devices using light sources such as low pressure mercury lamps and excimer lamps have already been used for mass production.
250℃의 저온에서 실리콘을 산화시키기 위해 광을 사용하는 방법이 연구되었다. 그러나 이 방법에서는 막 형성 속도가 0.3 ㎚/분 정도로 느리다. 현재로서는 실제로 전체 게이트 절연막을 형성하기 어렵다(J. Zhang 일행, A.P. L., 71(20), 1997, P2964 참조).A method of using light to oxidize silicon at low temperatures of 250 ° C. has been studied. In this method, however, the film formation rate is as low as 0.3 nm / minute. At present, it is difficult to actually form the entire gate insulating film (see J. Zhang, A.P. L., 71 (20), 1997, P2964).
일본 특개평4-326731호에는 오존 함유 분위기에서 실시되는 산화방법이 개시되어 있다. 그러나, 상술한 바와 같이, 이 방법에서는 광을 이용하여 오존을 생성하고 또 광을 사용하여 오존을 분해하여 산소원자 라디칼을 생성한다. 즉 상기 방법은 2개 반응 단계를 포함한다. 따라서, 상기 방법은 효과적이지 않고 산화 속도가 낮다. JP-A 4-326731 discloses an oxidation method carried out in an ozone-containing atmosphere. However, as described above, in this method, ozone is generated using light and ozone is decomposed using light to generate oxygen atom radicals. That is, the method comprises two reaction steps. Therefore, the method is not effective and the oxidation rate is low.
상술한 바와 같이, 퇴적(플라즈마 CVD 등)하는 경우, 반도체상에는 두꺼운 절연막이 신속하게 형성될 수 있지만, 원래의 반도체의 표면은 반도체와 절연막(게이트 절연막) 사이의 계면으로서 잔류하므로 이온 손상을 피할 수 없다. 따라서, 계면준위밀도가 상승하므로 만족스런 장치 특성을 얻을 수 없다.As described above, in the case of deposition (plasma CVD, etc.), a thick insulating film can be formed quickly on the semiconductor, but since the surface of the original semiconductor remains as an interface between the semiconductor and the insulating film (gate insulating film), ion damage can be avoided. none. Therefore, since the interface level density rises, satisfactory device characteristics cannot be obtained.
산화방법(예컨대 산소 플라즈마 산화방법)을 이용하여 반도체 상에 절연막을 형성하는 경우, 산화반응은 반도체의 표면으로부터 내부로 진행하고 반도체층 (반도체)과 절연막 사이의 계면은 원래 반도체층 내부에 형성된다. 따라서, 이 계면은 원래 표면 조건에 의해 실질적으로 영향을 받지 않으므로, 아주 만족스런 계면을 얻을 수 있는 이점이 있다. 그러나, 고온공정이 실리콘 웨이퍼를 휘게할 수 있다. 저온은 휨 현상은 억제하지만 산화속도를 급감시킨다. 따라서 저온 공정은 실질적인 속도로 절연막을 제조할 수 없다.When an insulating film is formed on a semiconductor using an oxidation method (for example, an oxygen plasma oxidation method), the oxidation reaction proceeds from the surface of the semiconductor to the inside, and the interface between the semiconductor layer (semiconductor) and the insulating film is originally formed inside the semiconductor layer. . Therefore, since this interface is substantially unaffected by the original surface conditions, there is an advantage that a very satisfactory interface can be obtained. However, high temperature processes can warp the silicon wafer. Low temperature suppresses warpage but reduces the oxidation rate. Therefore, the low temperature process cannot produce the insulating film at a substantial speed.
한국 등록특허 제10-0481835호(발명의 명칭: 절연막 형성방법, 반도체장치 및 제조장치)에는 반도체의 표면을 산소원자 라디칼을 함유하는 분위기 중에서 산화시키는 것에 의해 제1 절연막을 형성하는 공정, 및 상기 제1 절연막을 대기에 노출시키지 않고 퇴적에 의해 제1 절연막상에 제2 절연막을 형성하는 공정을 포함하는, 600℃의 반도체 온도에서 절연막을 형성하는 방법이 개시되어 있으나, 이는 플라즈마 CVD 공법을 이용하는 것이다.Korean Patent No. 10-0481835 (name of the invention: a method for forming an insulating film, a semiconductor device and a manufacturing device) includes a step of forming a first insulating film by oxidizing a surface of a semiconductor in an atmosphere containing oxygen atom radicals, and A method of forming an insulating film at a semiconductor temperature of 600 ° C. is disclosed, which includes forming a second insulating film on the first insulating film by deposition without exposing the first insulating film to the atmosphere, but using a plasma CVD method. will be.
한국 등록특허 제10-0782954호(발명의 명칭: 절연막 형성 방법)에는 전자 디바이스용 기재 상에 절연막을 형성하는 공정에 있어서, 상기 공정에 포함되는 절연막 특성을 제어하는 2 이상의 공정을 동일한 동작 원리하에서 행하여, 기재 표면의 절연막을 형성한다. 대기에의 노출을 피하여, 세정, 산화, 질화, 박막화 등의 처리를 실시함으로써, 세정도가 높은 절연막의 형성이 가능해진다. 또한, 동일한 동작 원리를 이용하여 절연막의 형성에 관한 여러 가지 공정을 실행함으로써, 장치 형체의 간략화를 실현하여, 특성이 우수한 절연막을 효율적으로 형성할 수 있다고 개시되어 있으나, 이 역시 플라즈마 CVD 공법을 이용하는 것이다.Korean Patent No. 10-0782954 (name of the invention: a method for forming an insulating film) includes a step of forming an insulating film on a substrate for an electronic device, wherein two or more steps for controlling the insulating film properties included in the step are performed under the same operating principle. The insulating film on the surface of the substrate is formed. By avoiding exposure to the atmosphere and performing cleaning, oxidation, nitriding, thinning, and the like, an insulating film having a high degree of cleaning can be formed. In addition, it has been disclosed that by implementing various processes related to the formation of the insulating film by using the same operating principle, it is possible to realize the simplification of the device shape and to efficiently form the insulating film having excellent characteristics, but this also uses the plasma CVD method. will be.
한국 공개특허 제10-2008-0007192호(발명의 명칭: 박막 트랜지스터를 위한 유전체 또는 평탄화 층으로서 낮은 온도 졸-겔 실리케이트)에는 본 발명자들은 본 발명자들이 공정 온도가 줄어들음에도 135℃ 내지 250℃에서 경화되고 우수한 누설 전류 밀도 값(9 x 10-9 A/㎠ 내지 1 x 10-10 A/㎠)을 또한 제공하는 졸-겔 실리케이트 전구체의 특정 조합으로부터 필름을 제조할 수 있다는 것을 발견하였다. 실리케이트의 몇몇 제 1 예가 있으며, 실리케이트는 낮은 온도에서 경화되고, 누설 전류 밀도는 충분히 낮아 낮은 온도 처리되거나 용액 처리 가능한 또는 프린트 가능한 유전체로서 사용될 수 있으며, 상기 유전체는 플렉서블하거나 중량이 가벼운 박막 트랜지스터를 위해 사용된다. 이 제형들은 박막 트랜지스터 및 다른 전자 장치를 위해 사용되는 스테인레스 스틸 포일의 평탄화에서 또한 사용될 수 있다고 개시하고 있다. 이는 졸-겔법을 이용하고 있다.In Korean Patent Publication No. 10-2008-0007192 (name of the invention: low temperature sol-gel silicate as dielectric or planarization layer for thin film transistors), the inventors have found that the inventors cure at 135 ° C to 250 ° C even though the process temperature is reduced. It has been found that films can be made from certain combinations of sol-gel silicate precursors that also provide good leakage current density values (9 × 10 −9 A / cm 2 to 1 × 10 −10 A / cm 2). There are some first examples of silicates, where the silicates are cured at low temperatures and the leakage current density is low enough to be used as a low temperature treated, solution treatable or printable dielectric, which dielectrics are for flexible or light weight thin film transistors. Used. These formulations disclose that they can also be used in the planarization of stainless steel foils used for thin film transistors and other electronic devices. This uses the sol-gel method.
또한 기존의 저유전 다공성 반도체 절연막 형성에 대한 것으로 실릴 개질된 말단기를 가지는 포로젠; 열적으로 안정한 유기 또는 무기 매트릭스 전구체; 및 상기 물질을 녹이는 용매를 포함하는, 나노기공을 가지는 물질을 형성하기 위한 조성물을 이용하는 기술이 제시되고 있으나 이는 성막의 안정을 위한 열처리 이전에 포로젠을 충분히 제거하여 그 빈자리에 유전율 저하에 기여하는 기공을 형성하기 위한 포로젠의 비점 이상의 열처리 공정이 추가되어야 한다.In addition, porogen having a modified end group silyl as for the existing low dielectric porous semiconductor insulating film formation; Thermally stable organic or inorganic matrix precursors; And a technique using a composition for forming a material having nano-pores, including a solvent for dissolving the material has been proposed, which is sufficient to remove the porogen before the heat treatment for the stability of the film formation contributes to the decrease in the dielectric constant in the void A heat treatment process above the boiling point of porogen to form pores should be added.
본 발명은 절연막을 구성하는 재료를 전기방사에 의하여 나노섬유화하여 나노섬유 클러스터로 성막되어 성막 단계에서부터 섬유상 기공(Fibrous Pore)을 가지는 절연막 형성 방법 및 그로부터 수득되는 절연막 및 절연막 제조장치를 제공하는데 그 목적이 있다.SUMMARY OF THE INVENTION The present invention provides a method for forming an insulating film having nanoporous fibers formed by nanospinning a material constituting the insulating film by electrospinning to form a nanofiber cluster and having fibrous pores from the film forming step, and an insulating film and insulating film manufacturing apparatus obtained therefrom. There is this.
본 발명의 절연막 형성 방법은, (1) 고전압발생장치, 고전압발생장치의 하나의 전극에 전기적으로 연결되는 방사노즐 및 고전압발생장치의 다른 하나의 전극(대전극)에 전기적으로 연결되는 수집부를 포함하는 전기방사장치를 이용하여 방사노즐에 나노섬유로 형성될 성막 물질을 공급하고, 수집부에 웨이퍼를 장착하는 준비단계; 및 (2) 고전압발생장치를 작동시켜 방사노즐로부터 성막 물질을 전기방사하여 웨이퍼 상에 전기방사에 의하여 형성되는 성막 물질의 나노섬유의 클러스터로 이루어지는 층을 형성시키는 적층단계;를 포함함을 특징으로 한다.The insulating film forming method of the present invention includes (1) a high voltage generator, a radiation nozzle electrically connected to one electrode of the high voltage generator, and a collecting part electrically connected to the other electrode (large electrode) of the high voltage generator. Supplying a deposition material to be formed of nanofibers to the spinning nozzle using an electrospinning device, and preparing a wafer in a collecting unit; And (2) a laminating step of operating the high voltage generator to electrospin the film forming material from the spinning nozzle to form a layer consisting of clusters of nanofibers of the film forming material formed by electrospinning on the wafer. do.
본 발명의 절연막 제조장치는, 고전압발생장치, 고전압발생장치의 하나의 전극에 전기적으로 연결되는 방사노즐 및 고전압발생장치의 다른 하나의 전극(대전극)에 전기적으로 연결되는 수집부를 포함하며, 여기에서 수집부에는 웨이퍼를 고정시키기 위한 고정수단을 더 포함함을 특징으로 한다.The insulation film manufacturing apparatus of the present invention includes a high voltage generator, a radiation nozzle electrically connected to one electrode of the high voltage generator, and a collector electrically connected to the other electrode (large electrode) of the high voltage generator. In the collection portion is characterized in that it further comprises a fixing means for fixing the wafer.
본 발명에 따르면, 절연막을 구성하는 재료를 전기방사에 의하여 나노섬유화하여 나노섬유 클러스터로 성막되는 다공성 절연막 형성 방법 및 그로부터 수득되는 절연막 및 절연막 제조장치를 제공하는 효과가 있다.According to the present invention, there is an effect of providing a method for forming a porous insulating film in which the material constituting the insulating film is nanofiberized by electrospinning to form a nanofiber cluster, and the insulating film and insulating film manufacturing apparatus obtained therefrom.
도 1은 기공율, 즉 다공도와 비유전율의 관계를 도시한 그래프로서, 어떤 유전율을 가진 재료에서 기공에 따른 유전율 저하를 보여주는 그래프로서 유전상수(k) 값이 2.8인 물질에 기공율 40% 이상을 부여하면 초고속 반도체 형성에 유리한 2.0 이하의 유전상수를 가질 수 있음을 도식적으로 보여주고 있다. 1 is a graph showing the porosity, that is, the relationship between porosity and relative dielectric constant. A graph showing a decrease in permittivity according to pores in a material having a certain dielectric constant is given to a material having a dielectric constant (k) of 2.8 or more with a porosity of 40% or more. It is shown schematically that it can have a dielectric constant of 2.0 or less, which is advantageous for forming ultrafast semiconductors.
도 2는 본 발명에서 사용될 수 있는 전기방사장치의 하나의 구체예를 모식적으로 도시한 구성도이다.Figure 2 is a schematic diagram showing one specific example of the electrospinning apparatus that can be used in the present invention.
도 3은 본 발명에서 사용될 수 있는 전기방사장치의 다른 하나의 구체예를 모식적으로 도시한 구성도이다.Figure 3 is a schematic diagram showing another embodiment of the electrospinning apparatus that can be used in the present invention.
도 4는 본 발명에 따라 전기방사장치에 의하여 나노섬유 클러스터로 이루어지는 절연층이 형성되는 기술적 구성의 개념을 모식적으로 도시한 도면이다.4 is a diagram schematically illustrating the concept of a technical configuration in which an insulating layer made of nanofiber clusters is formed by an electrospinning apparatus according to the present invention.
도 5는 본 발명의 하나의 실시예에 따라 수득된 폴리이미드막의 표면 사진이다.5 is a surface photograph of a polyimide film obtained according to one embodiment of the present invention.
도 6은 도 5의 폴리이미드막의 단면 사진이다.6 is a cross-sectional photograph of the polyimide film of FIG. 5.
본 발명은 최선의 형태로, (1) 고전압발생장치, 고전압발생장치의 하나의 전극에 전기적으로 연결되는 방사노즐 및 고전압발생장치의 다른 하나의 전극(대전극)에 전기적으로 연결되는 수집부를 포함하는 전기방사장치를 이용하여 방사노즐에 나노섬유로 형성될 성막 물질을 공급하고, 수집부에 웨이퍼를 장착하는 준비단계; 및 (2) 고전압발생장치를 작동시켜 방사노즐로부터 성막 물질을 전기방사하여 웨이퍼 상에 전기방사에 의하여 형성되는 성막 물질의 나노섬유의 클러스터로 이루어지는 층을 형성시키는 적층단계; 를 포함함을 특징으로 하는 절연막 형성 방법을 제시한다. The present invention, in its best form, includes (1) a high voltage generator, a radiation nozzle electrically connected to one electrode of the high voltage generator and a collector electrically connected to the other electrode (the counter electrode) of the high voltage generator. Supplying a deposition material to be formed of nanofibers to the spinning nozzle using an electrospinning device, and preparing a wafer in a collecting unit; And (2) a laminating step of operating the high voltage generator to electrospin the film forming material from the spinning nozzle to form a layer of clusters of nanofibers of film forming material formed by electrospinning on the wafer; It provides a method for forming an insulating film comprising a.
또한, 고전압발생장치, 고전압발생장치의 하나의 전극에 전기적으로 연결되는 방사노즐 및 고전압발생장치의 다른 하나의 전극(대전극)에 전기적으로 연결되는 수집부를 포함하며, 여기에서 수집부에는 웨이퍼를 고정시키기 위한 고정수단을 더 포함함을 특징으로 하는 절연막 제조장치를 제시한다. Also, a high voltage generator, a radiation nozzle electrically connected to one electrode of the high voltage generator, and a collector electrically connected to the other electrode (the counter electrode) of the high voltage generator, wherein the collector includes a wafer. The present invention provides an insulating film manufacturing apparatus further comprising a fixing means for fixing.
이하, 본 발명의 구체적인 실시예를 첨부한 도면을 참조하여 상세히 설명한다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.
고분자 물질은 가공방법에 따라 면상, 섬유상 혹은 성형된 형상으로 용이하게 가공할 수 있는 장점이 있다. 섬유상으로 가공함에 있어 방사노즐의 직경이나 모양에 따라 굵기와 단면의 모양을 조절할 수 있다. The polymer material has an advantage that it can be easily processed into a planar, fibrous or molded shape depending on the processing method. In processing into a fibrous shape, the thickness and the shape of the cross section can be adjusted according to the diameter or shape of the spinning nozzle.
본 발명에서는 고분자 물질 중에서 반도체 공정의 절연막으로 사용하기에 적합한 성막 물질을 용액 또는 용융상으로 하여 전기방사를 이용하여 섬유상의 물질을 반도체 웨이퍼에 입혀 3차원 구조의 그물막과 같은 빈 공간을 확보한 다공성 절연막(Mesoporous Dielectric Insulating layer)을 형성하는 기술을 제공하고자 한다. In the present invention, a porous film having a hollow space such as a net membrane having a three-dimensional structure by coating a fibrous material on a semiconductor wafer by electrospinning a film-forming material suitable for use as an insulating film for a semiconductor process among polymer materials as a solution or a molten phase. It is an object of the present invention to provide an insulating film (Mesoporous Dielectric Insulating layer).
물리적으로 방사노즐의 직경을 수 나노단위로 가공하여 한 줄의 나노섬유 형상을 제조하는 기계적 방사방식으로는 넓은 반도체 웨이퍼를 짧은 공정 시간에 패턴 사이에 도포할 수 없을 뿐더러 그물망 구조를 형성하기도 어렵다. 따라서 본 발명에서는 방사노즐을 통해 분사되는 액상 유기고분자 또는 무기물질에 고전압을 가하여 수없이 많은 나노 섬유로 분기되어 방사되는 전기방사기술을 그 기술의 배경으로 하고 반도체 공정에 적합하도록 적절히 그 방법과 장치를 변형 적용하는 것을 특징으로 한다.In the mechanical spinning method, which physically processes the diameter of the spinning nozzle by several nano units to form a single nanofiber shape, it is not only possible to apply a wide semiconductor wafer between patterns in a short process time, but also to form a network structure. Therefore, the present invention is based on the electrospinning technology that is spun off into numerous nanofibers by applying high voltage to the liquid organic polymer or inorganic material sprayed through the spinning nozzle as the background of the technology, and the method and apparatus as appropriate for the semiconductor process. It characterized in that to apply a strain.
본 발명에서는 웨이퍼 표면이 콜렉터의 역할을 수행하도록 구성함으로써 하나 혹은 다수의 방사노즐에서 나온 나노섬유가 웨이퍼 표면에 3차원 그물구조로 웨이퍼 표면을 덮을 수 있도록 하는 방법과 그 장치를 제안한다.The present invention proposes a method and apparatus for allowing nanofibers from one or more spinning nozzles to cover the wafer surface with a three-dimensional mesh structure on the wafer surface by configuring the wafer surface to perform the role of a collector.
본 발명에서는 고분자 혹은 무기물을 액상으로 방사노즐을 통해 분사 시 고전압으로 나노파이버화 하는 전기방사법을 이용하여 절연특성이 뛰어난 반도체 공정용 절연막을 제공하며 절연막에 한정하지 않고 기타의 다른 박막 형성공정에도 적용할 수 있다. The present invention provides an insulating film for a semiconductor process having excellent insulating properties by using an electrospinning method of nanofiberization at high voltage when spraying a polymer or inorganic material through a spinning nozzle in a liquid phase, and is not limited to the insulating film and applied to other thin film forming processes. can do.
본 발명의 절연막 형성 방법은, (1) 고전압발생장치, 고전압발생장치의 하나의 전극에 전기적으로 연결되는 방사노즐 및 고전압발생장치의 다른 하나의 전극(대전극)에 전기적으로 연결되는 수집부를 포함하는 전기방사장치를 이용하여 방사노즐에 나노섬유로 형성될 성막 물질을 공급하고, 수집부에 웨이퍼를 장착하는 준비단계; 및 (2) 고전압발생장치를 작동시켜 방사노즐로부터 성막 물질을 전기방사하여 웨이퍼 상에 전기방사에 의하여 형성되는 성막 물질의 나노섬유의 클러스터로 이루어지는 층을 형성시키는 적층단계;를 포함함을 특징으로 한다.The insulating film forming method of the present invention includes (1) a high voltage generator, a radiation nozzle electrically connected to one electrode of the high voltage generator, and a collecting part electrically connected to the other electrode (large electrode) of the high voltage generator. Supplying a deposition material to be formed of nanofibers to the spinning nozzle using an electrospinning device, and preparing a wafer in a collecting unit; And (2) a laminating step of operating the high voltage generator to electrospin the film forming material from the spinning nozzle to form a layer consisting of clusters of nanofibers of the film forming material formed by electrospinning on the wafer. do.
상기 (1)의 준비단계는 고전압발생장치, 고전압발생장치의 하나의 전극에 전기적으로 연결되는 방사노즐 및 고전압발생장치의 다른 하나의 전극(대전극)에 전기적으로 연결되는 수집부를 포함하는 전기방사장치를 이용하여 방사노즐에 나노섬유로 형성될 성막 물질을 공급하고, 수집부에 웨이퍼를 장착하는 것으로 이루어진다. 방사노즐에 공급되어 전기방사될 성막 물질은 유체상, 즉 액상으로 공급되어 후속되는 적층단계에서 고전압발생장치에 의해 적용되는 고전압에 의해 방사되어 나노섬유로 형성될 수 있다. 이를 위하여 전기방사장치의 고전압발생장치의 하나의 전극은 방사노즐에 전기적으로 연결되고 다른 하나의 전극(대전극)은 수집부에 연결되며, 수집부에는 성막 물질로 이루어지는 나노섬유의 클러스터가 적층되며, 따라서 층을 구성하는 나노섬유의 구조로 인하여 섬유들 간에 다수의 기공들이 형성되어 다공성의 구조를 가질 수 있게 된다. The preparation step of (1) includes a high voltage generator, a radiation nozzle electrically connected to one electrode of the high voltage generator, and an electrospinning unit including a collector electrically connected to the other electrode (large electrode) of the high voltage generator. The apparatus consists of supplying a film forming material to be formed of nanofibers to a spinning nozzle and mounting a wafer on a collecting part. The deposition material to be supplied to the spinning nozzle to be electrospun may be formed into nanofibers by being supplied in the fluid phase, i.e., in the liquid phase, and spun by a high voltage applied by the high voltage generator in a subsequent lamination step. To this end, one electrode of the high-voltage generator of the electrospinning apparatus is electrically connected to the radiation nozzle, the other electrode (the counter electrode) is connected to the collector, and the cluster of nanofibers made of a film-forming material is stacked on the collector. Therefore, due to the structure of the nanofibers constituting the layer, a plurality of pores are formed between the fibers to have a porous structure.
상기 (2)의 적층단계는 고전압발생장치를 작동시켜 방사노즐로부터 성막 물질을 전기방사하여 웨이퍼 상에 전기방사에 의하여 형성되는 성막 물질의 나노섬유의 클러스터로 이루어지는 층을 형성시키는 것으로 이루어진다.The laminating step of (2) is performed by operating the high voltage generator to electrospin the film forming material from the spinning nozzle to form a layer consisting of clusters of nanofibers of film forming material formed by electrospinning on the wafer.
상기 (2)의 적층단계 이후, 전기방사에 의하여 형성되는 성막 물질의 나노섬유의 클러스터로 이루어지는 층이 형성된 웨이퍼를 용매의 비등점 이상 내지 성막 물질의 용융점 이하, 일례로 성막 물질로서 알려진 가장 내열성이 큰 고분자의 경우 용융점 한계치인 450℃ 근처에서 10분 내지 1시간 동안 열처리하는 1차 열처리단계를 더 포함할 수 있다. 1차 열처리단계에서의 열처리 온도가 용매의 비등점 미만으로 또는 10분 미만으로 열처리되는 경우, 용액의 경우 용제성분의 불충분한 제거와 기공의 부분적 클로징이 불충분하게 일어나 절연막 혹은 기타 반도체 구조상의 필요한 막질의 특성에 영향을 주는 문제점이 있을 수 있고, 반대로 적용한 성막 물질의 용융점 이상으로 열처리할 경우 또는 1시간을 초과하는 경우 기공구조를 유지할 수 없거나 불필요한 공정 시간을 초래할 수 있는 문제점이 있을 수 있다.After the lamination step of (2), the wafer on which the layer formed of the nanofibers of the film forming material formed by electrospinning is formed is above the boiling point of the solvent or below the melting point of the film forming material, for example, the largest heat resistance known as the film forming material. The polymer may further include a first heat treatment step of heat treatment for 10 minutes to 1 hour at the melting point limit of 450 ℃. If the heat treatment temperature in the first heat treatment step is heat-treated below the boiling point of the solvent or less than 10 minutes, insufficient solution removal and partial closing of the pores occur in the case of the solution, so that the required film quality of the insulating film or other semiconductor structure is insufficient. There may be a problem that affects the properties, on the contrary there may be a problem that can not maintain the pore structure or cause unnecessary process time if the heat treatment above the melting point of the applied deposition material or more than 1 hour.
상기 (2)의 적층단계 이후 및/또는 1차 열처리단계 이후, 전기방사에 의하여 형성되는 성막 물질의 나노섬유의 클러스터로 이루어지는 층이 형성된 웨이퍼 및/또는 1차 열처리된 웨이퍼를 비활성분위기, 바람직하게는 질소분위기 하에서 용매의 비등점 이상 내지 성막 물질의 융점 이하에서 10분 내지 2시간 동안 열처리하는 2차 열처리단계를 더 포함할 수 있다. 2차 열처리단계에서의 열처리가 2시간을 초과하는 경우 불필요한 공정 시간을 초래하는 문제점이 있을 수 있다.After the lamination step (2) and / or after the first heat treatment step, the wafer on which the layer formed of the nanofibers of the film-forming material formed by electrospinning and / or the first heat-treated wafer is in an inert atmosphere, preferably The method may further include a second heat treatment step of performing heat treatment for 10 minutes to 2 hours at or above the boiling point of the solvent or below the melting point of the deposition material under a nitrogen atmosphere. If the heat treatment in the second heat treatment step exceeds 2 hours, there may be a problem that causes unnecessary process time.
본 발명의 절연막 제조장치는, 도 2 및 도 3에 나타낸 바와 같이, 고전압발생장치(11), 고전압발생장치(11)의 하나의 전극에 전기적으로 연결되는 방사노즐(12) 및 고전압발생장치의 다른 하나의 전극(대전극)에 전기적으로 연결되는 수집부를 포함하며, 여기에서 수집부에는 웨이퍼(13)를 고정시키기 위한 고정수단을 더 포함함을 특징으로 한다. 즉, 유체상으로 제공된 물질, 특히 성막 물질을 방사노즐(12)을 통해 분사할 수 있도록 장치를 구성하며, 구성된 장치에 분사와 함께 고전압을 가할 수 있도록 한다. 이와 같은 장치는 수 나노급의 반도체 웨이퍼에 적용하기 위해 방사용 용액 혹은 용융액 저장 장치, 계량장치, 주입을 위한 이송 및 방사노즐, 방사노즐의 개수와 구조, 웨이퍼 지지부와 웨이퍼가 안치되는 공간 또는 챔버, 공정 온습도 조절 장치 및 전압발생장치 등은 반도체 제조사의 전후 공정, 반도체 제조사별 제조환경, 즉 웨이퍼 사이즈나 제품의 등급이나 반도체 구매자 주문 사양 등에 따른 공정반복 횟수 혹은 절연층 두께, 절연층별 특정 요구물질, 설치 여유 공간 등에 따라 적절히 개조할 수 있다. 방사노즐(12)은 해당 사이즈의 웨이퍼 표면에 해당 굵기를 가지는 나노섬유를 축적시키거나 박막을 형성할 수 있도록 조건에 따른 방사노즐 수, 방사노즐 크기를 구성한다. 이에 따라 본 발명에 따른 장치의 방사노즐을 통해 방사되는 방사액은 방사노즐 끝에서 작은 방울을 이루고, 고전압에 의해 분사되면서 보다 미세한 굵기의 수많은 나노섬유로 분기되며, 분기된 나노섬유는, 도 4에 나타낸 바와 같이, 웨이퍼 표면, 또는 금속배선 간에 골고루 도포 또는 충진된다. 도포 또는 충진이 완료되면 후처리를 통해 3차원 그물막은 다공성 절연막을 형성하게 된다. As shown in FIGS. 2 and 3, the insulating film manufacturing apparatus of the present invention includes a radiation nozzle 12 and a high voltage generator electrically connected to one electrode of the high voltage generator 11, the high voltage generator 11. And a collecting part electrically connected to the other electrode (the counter electrode), wherein the collecting part further includes fixing means for fixing the wafer 13. That is, the device is configured to spray the material provided in the fluid phase, in particular, the deposition material through the radiation nozzle 12, and to apply a high voltage with the injection to the configured device. Such a device is a spinning solution or melt storage device, a metering device, a transfer and spinning nozzle for injection, the number and structure of spinning nozzles, a space or chamber in which a wafer support and a wafer are placed for application to a few nanoscale semiconductor wafer. , Process temperature / humidity control device and voltage generator are used in the process before and after the semiconductor manufacturer, manufacturing environment by semiconductor manufacturer, ie the number of process repetitions or insulation layer thickness and specific requirements for each insulation layer according to wafer size, product grade, semiconductor buyer order specification, etc. It can be adapted according to the installation clearance. The spinning nozzle 12 configures the number of spinning nozzles and spinning nozzles according to conditions so that nanofibers having the corresponding thicknesses can be accumulated or thin films are formed on the wafer surface of the corresponding size. Accordingly, the spinning liquid radiated through the spinning nozzle of the device according to the present invention forms a small droplet at the tip of the spinning nozzle, and is branched into numerous nanofibers of finer thickness while being sprayed by a high voltage, and the branched nanofibers are illustrated in FIG. 4. As shown in Fig. 1, the wafer surface or metal wiring is evenly applied or filled. After the coating or filling is completed, the three-dimensional netting film forms a porous insulating film through post-treatment.
즉, 본 발명은 이상의 반도체용 초 저유전율 절연막 형성의 공정과정과 이에 적합한 전기방사 기능을 가진 박막형성 모듈을 가진 장치를 제공할 수 있다. That is, the present invention can provide a device having a thin film forming module having an electrospinning function suitable for the above-described process of forming an ultra-low dielectric constant insulating film for semiconductors.
이러한 장치는 기존의 CVD 공정장비와 같이 복수의 반응가스를 사용하거나 고진공을 형성하여야 할 필요가 없고, SOD 장비처럼 스핀부, 베이크부 등의 트랙 구성이 필요 없는 비교적 단순한 구성을 가지며 공정 과정도 간결한 것이 특징이다.Such a device does not need to use a plurality of reaction gases or to form a high vacuum like a conventional CVD process equipment, and has a relatively simple configuration that does not require a track configuration such as a spin part and a bake part like an SOD device and has a simple process process. Is characteristic.
본 발명에 따르면, 이웃한 도전 구조물들 간의 절연특성을 개선할 수 있는 절연층을 형성할 수 있는 반도체 장치 및 그 제조 방법을 제공하며, 본 기술에 따른 반도체장치는 하부막과 상부막 사이에 절연성 재질의 나노파이버 클러스터로 이루어진 박막층을 가지거나, 비트라인, 워드라인, 혹은 메탈라인과 같은 도전성 구조체 사이를 나노파이버 클러스터로 이루어진 절연막을 형성한다.According to the present invention, there is provided a semiconductor device capable of forming an insulating layer capable of improving the insulating properties between neighboring conductive structures, and a method of manufacturing the same. The semiconductor device according to the present invention has an insulating property between a lower film and an upper film. An insulating film made of nanofiber clusters is formed between a thin film layer made of nanofiber clusters of material or between conductive structures such as bit lines, word lines, or metal lines.
본 발명에서는 모든 종류의 유기 고분자, 유기 실리케이트 고분자 및 무기물을 사용할 수 있으며, 용액상과 용융상에 대해서도 제한을 두지 아니한다. 그러나 반도체 공정에서 요구되는 물성을 만족하기 위해 물질의 선택에 제한이 있을 수는 있다. 예를 들어, 본 발명에서 중점적으로 구현하고자 하는 반도체 저유전 절연막의 경우 폴리이미드 및 그 유도체, 폴리아닐린을 비롯한 방향족 고분자 및 그 유도체, 유기 실리케이트 고분자 및 그 유도체, 불화유기물계 고분자 및 그 유도체, SiCOH와 같은 카본을 함유한 실리콘화합물 등과 무기물로서 산화실리콘 및 그 유도체들이 있으나 반드시 이들에 제한을 두지 아니한다. 따라서 이들을 용액상으로 하기 위한 용매에 있어서도 특별한 제한을 두지 아니하고, 각 용질성분에 대한 적절한 용매를 택할 수 있다. 단, 다양한 반도체별 공정 진행과 공정 요구 특성 및 고분자류의 용융점에 따라 끓는점이 고분자 용융점보다 낮은 용매를 택해야 하며 선택할 수 있는 용매 중에서도 가능한 끓는점이 낮고 기타 고려 특성이 공정에 불리하다고 판단되는 것을 피할 수 있다. In the present invention, all kinds of organic polymers, organic silicate polymers, and inorganic materials may be used, and the solution phase and the melt phase are not limited. However, there may be a limitation in the selection of materials to satisfy the properties required in the semiconductor process. For example, in the case of the semiconductor low dielectric insulating film to be implemented in the present invention, polyimide and derivatives thereof, aromatic polymers and derivatives thereof including polyaniline, organic silicate polymers and derivatives thereof, fluorinated organic polymers and derivatives thereof, SiCOH and Silicon oxides and derivatives thereof, such as silicon compounds containing the same carbon and the like, but are not necessarily limited thereto. Therefore, no particular limitation is imposed on the solvent for bringing these into solution, and an appropriate solvent for each solute component can be selected. However, it is necessary to choose a solvent with a lower boiling point than the melting point of the polymer according to the process progress, process requirements, and melting point of the polymers, and it is possible to avoid that the boiling point among the selectable solvents is low and other considerations are detrimental to the process. have.
용액 혹은 용융액의 점도는 바람직하게는 10 내지 5,000 cP(센티포이즈)의 범위이나 공정 진행상 필요에 따라 특별한 제한을 두지 않는다. The viscosity of the solution or melt is preferably not particularly limited in the range of 10 to 5,000 cP (centifose) or depending on the needs of the process.
용액 혹은 용융액을 방사하기 위한 방사노즐은 직경이 0.001 내지 0.5㎜ 범위에서 택할 수 있으며, 공정의 필요에 따라 이 범위에 제한을 두지 않는다.Spinning nozzles for spinning solutions or melts can be chosen in the range of 0.001 to 0.5 mm in diameter, and there is no limitation in this range depending on the needs of the process.
또한 방사노즐의 개수와 그 배치는 웨이퍼 상의 패턴에 따라 임의로 조절가능 하도록 방사노즐을 설치하는 노즐블록은 노즐고정부를 가로, 세로 및 대각선 방향의 레일을 따라 가변형 고정 장치를 가진다.In addition, the nozzle block for installing the spinneret so that the number and arrangement of the spinneret can be arbitrarily adjusted according to the pattern on the wafer has a variable fixing device along the rail in the transverse, vertical and diagonal directions of the nozzle fixing part.
장치에 있어서, 고전압발생장치는 임의의 제품을 사용하거나 별도 구성을 할 수 있으나, 전압의 범위는 1 ㎸ 내지 50 ㎸의 범위에서 안정적인 전압 유지가 가능하도록 하여야 한다.In the apparatus, the high voltage generator may use any product or may be configured separately, but the voltage range should be able to maintain a stable voltage in the range of 1 kV to 50 kV.
웨이퍼가 안치되는 지지부는 웨이퍼가 고정되어야 하고, 20 내지 150℃ 범위에서 웨이퍼 표면의 온도를 유지할 수 있는 핫플레이트 혹은 이에 상응하는 장치를 가질 수 있다.The support on which the wafer is placed may have a hot plate or equivalent device in which the wafer is to be fixed and capable of maintaining the temperature of the wafer surface in the range of 20 to 150 ° C.
절연막 방사가 진행되는 챔버는 임의의 습도와 온도를 유지할 수 있는 장치를 구비할 수 있다.The chamber through which the insulation film is radiated may include a device capable of maintaining an arbitrary humidity and temperature.
방사노즐과 웨이퍼 간에는 필요에 따라 전기장의 분포를 조절할 수 있는 도전성 재료와 장치를 설치할 수 있다.Conductive materials and devices can be installed between the spinning nozzle and the wafer to adjust the distribution of the electric field as needed.
방사노즐과 웨이퍼간의 거리는 50 ㎜ 내지 250 ㎜의 범위이며 방사액의 점도, 전압의 크기 등과 전기장 분포조절 장치의 설치에 따라 그 거리에 제한을 두지 아니한다. The distance between the spinning nozzle and the wafer is in the range of 50 mm to 250 mm, and the distance is not limited by the viscosity of the spinning liquid, the magnitude of the voltage, and the installation of the electric field distribution control device.
방사 후처리는 방사액의 특성에 따라 열, UV, 전자빔 등을 사용할 수 있으며, 필요에 따라 이들 중 2가지 이상을 복합적 혹은 단계적으로 사용할 수 있다.Radiation post-treatment may use heat, UV, electron beam, etc., depending on the characteristics of the spinning liquid, two or more of these may be used in combination or in stages as necessary.
이하에서 본 발명의 바람직한 실시예 및 비교예들이 기술되어질 것이다.Hereinafter, preferred embodiments and comparative examples of the present invention will be described.
이하의 실시예들은 본 발명을 예증하기 위한 것으로서 본 발명의 범위를 국한시키는 것으로 이해되어져서는 안될 것이다.The following examples are intended to illustrate the invention and should not be understood as limiting the scope of the invention.
실시예 1Example 1
폴리아믹산의 농도가 18중량%가 되도록 N-메틸피롤리돈/N-메틸아세트아미드를 중량비로 2:1로 혼합한 혼합용매에 용해시켰다. 이상의 용액 50 g을 방사노즐이 연결된 방사용 실린지에 주입하고, 온도는 30℃를 유지시켰다. 전압장치의 전압은 13.5㎸로 설정하였고 0.1 ㎜의 직경을 가진 노즐팁을 통해 0.015 ㎎/분의 속도로 200초 간 토출될 수 있도록 조건을 설정하였다. 3x3㎝ 크기의 웨이퍼 시편 위에 2개의 방사노즐을 배치하고, 시편의 표면 온도가 40℃가 유지되도록 하였다. 방사 후, 100℃에서 30분간 1차 열처리를 하였다. 이후 시편을 질소분위기 하에서 280℃로 40분간 가열하였다.N-methylpyrrolidone / N-methylacetamide was dissolved in a mixed solvent in a weight ratio of 2: 1 so that the concentration of polyamic acid was 18% by weight. 50 g of the above solution was injected into a spinning syringe connected with a spinning nozzle, and the temperature was maintained at 30 ° C. The voltage of the voltage device was set to 13.5 kV and the conditions were set to be discharged for 200 seconds at a rate of 0.015 mg / min through a nozzle tip having a diameter of 0.1 mm. Two spinning nozzles were placed on a 3 × 3 cm wafer specimen, and the surface temperature of the specimen was maintained at 40 ° C. After spinning, primary heat treatment was performed at 100 ° C. for 30 minutes. The specimen was then heated to 280 ° C. for 40 minutes under a nitrogen atmosphere.
이 결과, 평균 직경 약 25 ㎚의 나노섬유를 포함하는, BET 측정법에 의한 기공율 60%의 메조포러스한 폴리이미드막을 얻을 수 있었다. 수득된 폴리이미드막의 표면 사진을 도 5에 그리고 단면 사진을 도 6에 나타내었다.As a result, a mesoporous polyimide membrane having a porosity of 60% by the BET measurement method containing nanofibers having an average diameter of about 25 nm was obtained. The surface photograph of the obtained polyimide membrane is shown in FIG. 5, and a cross-sectional photograph is shown in FIG.
실시예 2Example 2
[R1R2Si-NR3]n으로 표현되는 폴리실라잔 중에서 알킬기 R이 모두 수소(H)인 중량평균 분자량 75,000으로 중합한 무기 폴리실라잔의 농도가 12.5중량%가 되도록 디부틸에테르에 용해시켰다. 이상의 용액 50 g을 방사노즐이 연결된 방사용 실린지에 주입하고, 실온에서 35%의 상대습도를 유지하였다. 전압장치의 전압은 18 ㎸로 설정하였고 웨이퍼가 장착된 수집부의 전압은 -12 ㎸를 인가하였다. 0.10 ㎜의 직경을 가진 노즐팁을 통해 0.012 ㎎/분의 속도로 300초 간 토출될 수 있도록 조건을 설정하였다. 3x3㎝ 크기의 웨이퍼 시편 위에 2개의 방사노즐을 배치하고, 시편의 표면 온도가 120℃가 유지되도록 하였다. 방사 후, 150℃에서 1시간 30분간 열처리를 하였다.In the polysilazane represented by [R 1 R 2 Si-NR 3 ] n , dibutyl ether was added so that the concentration of the inorganic polysilazane polymerized at a weight average molecular weight of 75,000 in which all of the alkyl groups R were hydrogen (H) was 12.5% by weight. Dissolved. 50 g of the above solution was injected into a spinning syringe connected with a spinning nozzle, and a relative humidity of 35% was maintained at room temperature. The voltage of the voltage device was set to 18 kV and the voltage of the collector on which the wafer was mounted was applied to -12 kW. The conditions were set so that they could be discharged for 300 seconds at a rate of 0.012 mg / minute through a nozzle tip with a diameter of 0.10 mm. Two spinning nozzles were placed on a 3 × 3 cm wafer specimen and the surface temperature of the specimen was maintained at 120 ° C. After spinning, heat treatment was performed at 150 ° C. for 1 hour 30 minutes.
이 결과, 최소직경 약 20 ㎚, 최대직경 50 ㎚ 의 나노섬유를 포함하는, BET 측정 공극율 55%의 메조포러스한 산화실리콘막을 얻을 수 있었다.As a result, a mesoporous silicon oxide film having a BET measurement porosity of 55% containing nanofibers having a minimum diameter of about 20 nm and a maximum diameter of 50 nm was obtained.
실시예 3Example 3
유기-무기 복합물질인 17중량% 폴리실세스퀴옥산/PGMEA 용액 20 g을 방사노즐이 연결된 방사용 실린지에 주입하고, 실온에서 35%의 상대습도를 유지하였다. 전압장치의 전압은 15 ㎸로 설정하였고 웨이퍼 수집부의 전압 역시 -15 ㎸를 인가하였다. 0.15 ㎜의 직경을 가진 노즐팁을 통해 0.010 ㎎/분의 속도로 600초 간 토출될 수 있도록 조건을 설정하였다. 3x3 ㎝ 크기의 웨이퍼 시편 위에 2개의 방사노즐을 배치하고, 시편의 표면 온도가 120℃가 유지되도록 하였다. 방사 후, 150℃에서 UV를 조사하면서 1시간 열처리를 하였다.20 g of a 17 wt% polysilsesquioxane / PGMEA solution, an organic-inorganic composite, was injected into a spinning syringe connected to a spinning nozzle, maintaining a relative humidity of 35% at room temperature. The voltage of the voltage device was set to 15 kW and the voltage of the wafer collector was also applied to -15 kW. The conditions were set so that they could be discharged for 600 seconds at a rate of 0.010 mg / min through a nozzle tip with a diameter of 0.15 mm. Two spinning nozzles were placed on a 3 × 3 cm wafer specimen and the surface temperature of the specimen was maintained at 120 ° C. After spinning, heat treatment was performed for 1 hour while irradiating UV at 150 ° C.
이 결과, 평균직경 약 30 ㎚의 나노섬유를 포함하는, 기공율 60%의 메조포러스한 유기물 복합 산화실리콘막을 얻을 수 있었다.As a result, a mesoporous organic composite silicon oxide film having a porosity of 60% containing nanofibers having an average diameter of about 30 nm was obtained.
이상에서 본 발명은 기재된 구체예에 대해서만 상세히 설명되었지만 본 발명의 기술사상 범위 내에서 다양한 변형 및 수정이 가능함은 당업자에게 있어서 명백한 것이며, 이러한 변형 및 수정이 첨부된 특허청구범위에 속함은 당연한 것이다.Although the present invention has been described in detail only with respect to the described embodiments, it will be apparent to those skilled in the art that various modifications and variations are possible within the technical scope of the present invention, and such modifications and modifications are within the scope of the appended claims.

Claims (6)

  1. (1) 고전압발생장치, 고전압발생장치의 하나의 전극에 전기적으로 연결되는 방사노즐 및 고전압발생장치의 다른 하나의 전극(대전극)에 전기적으로 연결되는 수집부를 포함하는 전기방사장치를 이용하여 방사노즐에 나노섬유로 형성될 성막 물질을 공급하고, 수집부에 웨이퍼를 장착하는 준비단계; 및 (1) Emission using an electrospinning device comprising a high voltage generator, a radiation nozzle electrically connected to one electrode of the high voltage generator and a collector electrically connected to the other electrode (the counter electrode) of the high voltage generator. Supplying a deposition material to be formed of nanofibers to a nozzle, and preparing a wafer in a collecting unit; And
    (2) 고전압발생장치를 작동시켜 방사노즐로부터 성막 물질을 전기방사하여 웨이퍼 상에 전기방사에 의하여 형성되는 성막 물질의 나노섬유의 클러스터로 이루어지는 층을 형성시키는 적층단계;(2) a laminating step of operating the high voltage generator to electrospin the film forming material from the spinning nozzle to form a layer consisting of clusters of nanofibers of film forming material formed by electrospinning on the wafer;
    를 포함함을 특징으로 하는 절연막 형성 방법.An insulating film forming method comprising a.
  2. 제 1 항에 있어서,The method of claim 1,
    성막 물질이 저유전율 물질임을 특징으로 하는 절연막 형성 방법.An insulating film forming method, characterized in that the film forming material is a low dielectric constant material.
  3. 제 1 항에 있어서,The method of claim 1,
    상기 (2)의 적층단계 이후, 전기방사에 의하여 형성되는 성막 물질의 나노섬유의 클러스터로 이루어지는 층이 형성된 웨이퍼를 용매의 비등점 이상 내지 성막 물질의 용융점 이하에서 10분 내지 1시간 동안 열처리하는 1차 열처리단계를 더 포함함을 특징으로 하는 절연막 형성 방법.After the lamination step of (2), the first heat-treated wafer for 10 minutes to 1 hour below the boiling point of the solvent or below the melting point of the deposition material, the wafer is formed of a layer consisting of a cluster of nanofibers of the deposition material formed by electrospinning The insulating film forming method further comprises a heat treatment step.
  4. 제 1 항에 있어서,The method of claim 1,
    상기 (2)의 적층단계 이후, 전기방사에 의하여 형성되는 성막 물질의 나노섬유의 클러스터로 이루어지는 층이 형성된 웨이퍼 및/또는 1차 열처리된 웨이퍼를 비활성분위기에서 용매의 비등점 이상 내지 성막 물질의 융점 이하에서 10분 내지 2시간 동안 열처리하는 2차 열처리단계를 더 포함하는 절연막 형성 방법.After the lamination step of (2), the wafer in which the layer formed of the nanofibers of the film forming material formed by electrospinning and / or the first heat-treated wafer is subjected to the boiling point of the solvent or the melting point of the film forming material in an inert atmosphere. Method for forming an insulating film further comprises a secondary heat treatment step of heat treatment for 10 minutes to 2 hours.
  5. 제 3 항에 있어서,The method of claim 3, wherein
    상기 1차 열처리단계 이후, 1차 열처리된 웨이퍼를 비활성분위기에서 용매의 비등점 이상 내지 성막 물질의 융점 이하에서 10분 내지 2시간 동안 열처리하는 2차 열처리단계를 더 포함함을 특징으로 하는 절연막 형성 방법.After the first heat treatment step, further comprising a second heat treatment step of heat-treating the first heat-treated wafer in an inert atmosphere for 10 minutes to 2 hours above the boiling point of the solvent or below the melting point of the deposition material in the inert atmosphere .
  6. 고전압발생장치, 고전압발생장치의 하나의 전극에 전기적으로 연결되는 방사노즐 및 고전압발생장치의 다른 하나의 전극(대전극)에 전기적으로 연결되는 수집부를 포함하며, 여기에서 수집부에는 웨이퍼를 고정시키기 위한 고정수단을 더 포함함을 특징으로 하는 절연막 제조장치.A high voltage generator, a radiation nozzle electrically connected to one electrode of the high voltage generator, and a collector electrically connected to the other electrode (the counter electrode) of the high voltage generator, wherein the collector is fixed to the wafer. Insulating film manufacturing apparatus further comprises a fixing means for.
PCT/KR2019/001869 2018-02-28 2019-02-15 Insulation film formation method and insulation film producing apparatus WO2019168288A1 (en)

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JP2006332676A (en) * 2005-05-27 2006-12-07 Asm Japan Kk Manufacturing method for of nanoparticle film with low permittivity
KR20120037882A (en) * 2010-10-07 2012-04-20 포항공과대학교 산학협력단 Method for formation of micro- and nano-scale patterns and method for producing micro- and nano-scale channel transistor, and micro- and nano-scale channel light emitting transistor using the same
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