TWI691895B - Data-programming methods, programming systems, data update methods, and storage devices - Google Patents

Abstract

A data-programming method, which is adapted in a test system programming the program data into a storage device through a data pin of a data access interface, includes: inputting an operation command such that the storage device enters a test mode according to the operation command; inputting a program address range such that the storage device erases the data in the program address range, in which the storage device generates a signal edge at the data pin when the data of the program address range is erased; when the signal edge is received, transmitting a first bit of the program data by using a bit frame; when the signal edge is received, transmitting a second bit of the program data by using the bit frame; when the program data is transmitted, transmitting a transmit check code; and when the signal edge is received, determining that the program data is correctly programmed into the storage device.

Description

Data writing method, burning system, data updating method and storage device

The invention relates to a data writing method and a data updating method, in particular to a writing and updating method using a single data pin to perform firmware update.

On the production line, it is often encountered that the product has been installed but needs to be disassembled to re-burn the data, such as updating the firmware of the electronic device. Since a large amount of disassembly and assembly requires a considerable amount of manpower and resources, in order to reduce production costs, it is necessary to optimize how to efficiently write and update data.

The multiple embodiments of the present invention provide a data writing method and a data updating method, so that the programming system can write data to the storage unit of the electronic device without disassembling the case through the data pins, which has reduced a lot of disassembly and The manpower and resources required to assemble the cabinet. According to an embodiment of the present invention, since the electronic device uses the signal edge to inform the programming system whether the operation is correct, the programming system cannot access the data inside the electronic device to improve the data security of the electronic device. According to another embodiment of the present invention, the programming system can use encrypted data to write to the electronic device, and the electronic device can decrypt the encrypted data, which can greatly increase the data security of the electronic device.

In view of this, the present invention proposes a data writing method suitable for a programming system to write a written data to a storage device through a data pin of a data access interface. The above data writing method includes: writing an operation The command is input to the data pin, so that the storage device enters a test mode according to the operation command; input a write address range, so that the storage device erases the data of the write address range, wherein when the storage device completes erasing In addition to the data written to the address range, the storage device generates a signal edge at the data pin; when a signal edge is received from the data pin, the first bit of the written data is sent using a one-bit frame When receiving the signal edge from the data pin, use the bit frame to send a second bit of the written data; when the written data is sent, output a transmission confirmation code; and when from the above When the data pin receives the signal edge, it determines that the written data has been correctly written into the storage device.

According to an embodiment of the invention, the data access interface further includes a clock pin, wherein when the storage device enters the test mode, the clock pin is coupled to a first logic level.

According to an embodiment of the present invention, the data writing method further includes: outputting an end indicator. The storage device erases the data in the write address range according to the end index.

According to an embodiment of the invention, the bit frame includes a response time, a latch time, and a data processing time. The data writing method further includes: at the response time, determining whether the data pin is received from the data pin Signal edge; when the signal edge is received, the first bit is sent at the latch time; at the data processing time, it is determined whether the signal edge is received from the data pin, wherein the written data is at the data processing time Write to the storage device in the middle; when the signal edge is received, judge the writing of the first bit is completed; send the second bit in the next latch time; and when not received within a predetermined time When the above signal edge occurs, a warning is issued.

According to an embodiment of the present invention, the data writing method further includes: after sending a first predetermined number of bits of the written data, sending out a sector confirmation code; determining whether the signal edge is received from the data pin ; When the signal edge is received from the data pin, determine that the first predetermined number of bits are written correctly, and continue to send the next bit of the written data using the bit frame; and when a predetermined time When the above signal edge is not received, the above warning is issued.

According to an embodiment of the invention, before the step of inputting the operation instruction to the data pin, the data writing method further includes: generating a second predetermined number of the signal edges on the data pin to enable the above Storage device.

According to an embodiment of the present invention, the written data is subjected to an encryption process, and when the storage device receives the written data, it decrypts the received written data into a decrypted data, and then writes the decrypted data Enter the above address range.

The present invention further proposes a programming system for writing a written data into a storage device through a data pin of a data access interface. The foregoing programming system includes: an internal storage device and a programming device. The internal storage device is used to store a command program. The programming device executes the instruction program to execute a data writing method, wherein the data writing method includes: inputting an operation command to the data pin, so that the storage device enters a test mode according to the operation command; inputting a write Entering the address range, so that the storage device erases the data in the write address range, wherein when the storage device finishes erasing the data in the write address range, the storage device generates a signal edge at the data pin; When the signal edge is received from the data pin, a first bit of the written data is sent using a bit frame; when the signal edge is received from the data pin, the write is sent using the bit frame One second bit of data; when the writing of the written data is completed, a transmission confirmation code is output; and when the signal edge is received from the data pin, it is judged that the written data has been correctly written into the storage device.

The present invention further proposes a data update method suitable for a storage device, in which a programming system writes a written data to the storage device through a data pin of a data access interface, the data update method includes: Pin receives an operation command; receives a write address range from the data pin; enters a test mode according to the operation command; erases the data in the write address range; after erasing the data in the write address range , Send out a signal edge; use a bit frame to receive the first bit of the written data; update the first address of the written address range according to the first bit; when the first address When the update is completed, the signal edge is sent out; a transmission confirmation code is received from the data pin; a reception code is generated based on the data written in the address range; whether the reception code matches the transmission confirmation code is determined; when the reception code When the transmission confirmation code matches, the signal edge is sent out; and when the reception code does not match the transmission confirmation code, the signal edge is not sent out.

According to an embodiment of the invention, the data access interface further includes a clock pin, wherein when the storage device enters the test mode, the clock pin is coupled to a first logic level.

According to an embodiment of the present invention, the data update method further includes: receiving an end indicator from the data pin; and erasing the data in the write address range according to the end indicator.

According to an embodiment of the invention, the bit frame includes a response time, a latch time, and a data processing time, wherein the data update method further includes: sending the signal edge through the data pin at the response time; Receiving the first bit during the latch time; during the data processing time, using the first bit to update the first address, and determining whether the first bit is successfully updated; when the first address is updated Upon completion, the signal edge is sent at the next response time; and when the update of the first address fails, the signal edge is not sent.

According to an embodiment of the invention, the data updating method further includes: after receiving a first predetermined number of bits of the written data, receiving a sector confirmation code; and receiving the first predetermined number of bits received Perform a logical operation to generate a reception confirmation code; determine whether the reception confirmation code matches the sector confirmation code; when the reception confirmation code matches the sector confirmation code, issue the signal edge; and when the reception confirmation code When it does not match the above sector confirmation code, the operation is stopped.

According to an embodiment of the invention, before the step of receiving the operation command from the data pin, the data updating method further includes: starting according to a second predetermined number of the signal edges of one of the data pins.

According to an embodiment of the present invention, the write data is subjected to an encryption process, and the data update method further includes: decrypting the received write data to generate a decrypted data; and writing the decrypted data into the write bit Address range.

A storage device, wherein a programming system writes a written data to the storage device, the storage device includes: a storage unit, a data access interface and a controller. The data access interface includes a data pin, wherein the data pin receives an operation command of the programming system, a write position range, and the write data, and sends out a signal edge, wherein the data access interface further uses a The bit frame receives each bit of the written data in sequence. The controller enters a test mode according to the operation instruction and erases the data of the write address range of the storage unit, wherein when the data of the write address range is erased, the controller accesses through the data The interface sends the signal edge to the programming system, wherein when the data access interface receives a first bit of the written data, the controller updates the written bit of the storage unit according to the first bit The first address in the address range. When the update of the first address is completed, the controller sends out the signal edge, wherein the controller receives a transmission confirmation code from the data pin, and the controller according to the write bit The data in the address range generates a receiving code, and judges whether the receiving code matches the transmission confirmation code. When the receiving code matches the transmission confirmation code, the controller sends out the signal edge. When the receiving code matches the transmission code When the transmission confirmation code does not match, the above controller does not send out the above signal edge.

The following description is an embodiment of the present invention. Its purpose is to exemplify the general principles of the present invention, and should not be regarded as a limitation of the present invention.

It is worth noting that the content disclosed below can provide multiple embodiments or examples for practicing different features of the present invention. The specific element examples and arrangements described below are only used to briefly explain the spirit of the present invention and are not intended to limit the scope of the present invention. In addition, the following specification may reuse the same symbol or text in multiple examples. However, the purpose of repeated use is merely to provide a simplified and clear description, and is not intended to limit the relationship between multiple embodiments and/or configurations discussed below. In addition, the description that one feature described in the following specification is connected to, coupled to, and/or formed on another feature, etc., may actually include a plurality of different embodiments, including direct contact of such features, or other additional features The features are formed between the features, etc., so that the features are not in direct contact.

FIG. 1 is a schematic diagram of an electronic device according to an embodiment of the invention. As shown in FIG. 1, the electronic device 100 includes a data access interface 110, a storage unit 120, and a controller 130, and the programming system 10 writes the write data DT into the storage unit 120 through the data access interface 110.

The controller 130 writes the write data DT into the storage unit 120 according to the action request RT of the programming system 10, and when the action request RT of the programming system 10 is successfully executed, the controller 130 transmits a signal through the data access interface 110 The margin SE is used to notify the programming system 10 that the action request RT has been completed. According to an embodiment of the invention, the data access interface 110 includes a clock pin CLK and a data pin DAT.

According to an embodiment of the invention, the signal edge SE is a rising edge. According to another embodiment of the present invention, the signal edge SE may also be a falling edge. The following signal edge SE will take the rising edge as an example to facilitate explanation and explanation, and the present invention is not limited thereto in any form.

FIG. 2 is a flowchart showing a data writing method according to an embodiment of the present invention, wherein the data writing method 200 is applicable to the programming system 10 of FIG. 1. The following description of the data writing method 200 will be combined with FIG. 1 to facilitate detailed explanation.

When the programming system 10 intends to write the written data DT to the storage unit 120 of the electronic device 100, the programming system 10 first inputs a first predetermined number of signal edges through the data pins DAT of the data access interface 110 (step S201) To activate the electronic device 100.

FIG. 3 is a waveform diagram showing clock pins and data pins of the access interface according to an embodiment of the invention. As shown in FIG. 3, when the programming system 10 intends to write the write data DT to the storage unit 120 of the electronic device 100, the clock pin CLK is the first logic level. According to an embodiment of the invention, the first logic level is a high logic level. According to another embodiment of the present invention, the first logic level is a low logic level. In other words, when the programming system 10 wants to write the write data DT to the storage unit 120 of the electronic device 100, the clock pin CLK may be a high logic level or a low logic level, according to the design of the electronic device 100 It depends.

As shown in FIG. 3, the programming system 10 first inputs the enable signal EN through the data pin DAT to start the electronic device 100, where the enable signal EN is a predetermined number of signal edges. According to an embodiment of the invention, the predetermined number of signal edges is a predetermined number of rising edges, and the controller 130 counts the number of rising edges to start. According to another embodiment of the present invention, the predetermined number of signal edges is a predetermined number of falling edges, and the controller 130 counts the number of falling edges to start. According to other embodiments of the present invention, the designer may decide that the predetermined number is any positive integer.

As shown in FIGS. 2 and 3, the programming system 10 then inputs the operation command EC (step S202), the write address range (step S203), and the end index EOF (step S204) through the data pin DAT. According to an embodiment of the present invention, as shown in FIG. 3, the range of the write address input by the programming system 10 is defined by the start address STR and the write address size SZ.

According to an embodiment of the present invention, the burning system 10 of FIG. 1 further includes an internal storage device (not shown in FIG. 1) and a burning device (not shown in FIG. 1). The internal storage device of the programming system 10 is used to store the command program, and the programming device of the programming system 10 is used to access the command program stored in the internal storage device, and the data writing method 200 shown in FIG. 2 is executed.

FIG. 4 is a flowchart showing a data updating method according to an embodiment of the invention, wherein the data updating method 400 is applicable to the controller 130 of the electronic device 100 of FIG. 1. The following description of the data writing method 400 will be combined with the block diagram of FIG. 1 and the data writing method 200 of FIG. 2 to facilitate detailed explanation.

When the controller 130 receives the enable signal EN of FIG. 3 from the data pin DAT, the controller 130 starts (step S401). When the controller 130 receives the operation instruction EC, the controller 130 enters the operation mode (step S402). When the controller 130 receives the end index EOF, the controller 130 according to the write address range input by the programming system 10 (that is, the start address STR and the write address size SZ shown in FIG. 3), to Write an address range to perform an erase operation (step S403), and determine whether the erase operation is completed (step S404). When the erase operation is completed, the controller 130 sends a signal edge SE through the data pin DAT (step S405).

According to another embodiment of the present invention, the controller 130 can only enter the operation mode (step S402) and erase the write address range (step S403) when receiving the end indicator EOF, and then erase When the operation is completed, a signal edge SE is issued (step S405).

Returning to FIG. 2, after the burning system 10 inputs the end index EOF, the burning system 10 waits for the controller 130 to operate, and determines whether the signal edge SE is received (step S205). When the programming system 10 receives the signal edge SE, it means that the erasing operation is completed, so it starts to send the write data DT (step S206), and after writing the data, it is judged again whether the signal edge SE is received (step S207).

When the programming system 10 receives the signal edge SE, it indicates that the writing data DT is successfully written into the storage unit 120 of FIG. 1. According to an embodiment of the present invention, the programming system 10 uses a bit frame to send the written data DT.

Returning to step S205 and step S207, according to an embodiment of the present invention, when the programming system 10 does not receive the signal edge SE within a predetermined time, the programming system 10 determines that an error has occurred in the data writing method 200 and issues a warning (Step S211), to notify the tester that the data writing method 200 has failed to execute.

Returning to step S405 of FIG. 4, the controller 130 receives the write data DT through the data pin DAT (step S406), and updates the write address range of the received write data DT (step S407). Next, the controller 130 determines whether the update of the write address range is completed (step S408). When it is determined that the update is completed, the controller 130 issues a signal edge SE (step S409); when it is determined that the update fails in step S408, the controller 130 ends the data update method 400.

According to an embodiment of the present invention, when the data writing method 200 executes to step S211, the programming system 10 can power off the electronic device 100 and then power on again, and re-execute step S201 of the data writing method 200 to control The device 130 also executes the data updating method 400 correspondingly.

FIG. 5 is a schematic diagram showing the writing data sent by the burning system according to an embodiment of the invention. According to an embodiment of the present invention, when the programming system 10 executes step S204 to send the end index EOF, the controller 130 executes step S403 to erase the write address range. As shown in FIG. 5, the controller 130 performs an erase operation on the write address range of the storage unit 120 during the waiting time TW.

When the erasing operation is completed, the controller 130 sends a signal edge SE (step S405) to notify the programming system 10 that the erasing operation has been completed, wherein the signal edge SE corresponds to the first rising edge E1 in FIG. 5. When the programming system 10 receives the first rising edge E1, the first bit frame BF1 is then used to transmit the first bit BT1 of the written data DT.

After the transfer of the first bit BT1 is completed, the programming system 10 then uses the second bit frame BF2 to transfer the second bit BT2 of the write data DT, and so on, until all the write data DT is completely transferred. According to an embodiment of the present invention, the programming system 10 sequentially sends each bit of the written data DT.

As shown in FIG. 5, the first bit frame BF1 and the second bit frame BF2 can be divided into response time TAN, latch time TL, and data processing time TP, in which the programming system 10 is located in the first bit The latch time TL of the frame BF1 and the second bit frame BF2 sends out the first bit BT1 and the second bit BT2.

FIG. 6 is a schematic diagram showing a bit frame according to an embodiment of the invention. As shown in FIG. 6, when the programming system 10 determines in step S205 that the signal edge SE (ie, corresponding to the rising edge ER of FIG. 6) is received, the programming system 10 immediately opens the bit frame BF to transfer the write Information DT.

As shown in FIG. 6, the bit frame BF includes a response time TAN, a latch time TL, and a data processing time TP. The programming system 10 executes step S205 within the response time TAN to determine whether the signal edge SE is received (ie, corresponds to the rising edge ER in FIG. 6). Once the programming system 10 judges to receive the signal edge SE (ie, corresponding to the rising edge ER in Figure 6), it immediately enters the latch time TL and sends out the bit BT of the written data DT, where the sent bit BT is It is high logic level H or low logic level L.

According to an embodiment of the present invention, after the controller 130 receives the bit BT sent by the programming system 10 during the latch time TL, the controller 130 updates the written bit BT during the data processing time TP The corresponding address of the address range. When the controller 130 is updated, it immediately sends a signal edge SE (ie, corresponds to the rising edge ER in FIG. 6), so that the programming system 10 according to the signal edge SE (ie, corresponds to the rising edge ER in FIG. 6), The bit frame BF is used again to transfer the next bit of the written data DT.

Returning to FIG. 5, according to an embodiment of the present invention, the controller 130 updates the first bit BT1 to the first address in the address range at the data processing time TP of the first bit frame BF1. When the update of the first bit BT1 is completed, the controller 130 issues a second rising edge E2. In the response time TAN of the second bit frame BT2, the programming system 10 determines that the first bit BT1 has been written according to the second rising edge E2 After the input is completed, it is convenient for the latch time TL of the second bit frame BT2 to send the second bit BT2 of the written data DT again.

When the controller 130 finishes updating the second bit BT2 to the second address in the address range during the data processing time TP of the second bit frame BF2, the controller 130 will issue a third rising edge E3 again to And so on. The programming system 10 thereby sequentially transmits each bit of the written data DT.

According to an embodiment of the present invention, when the controller 130 fails to update the write address range at the data processing time TP, the controller 130 does not issue a signal edge SE (ie, corresponds to the first rising edge E1 in FIG. 5 2. The second rising edge E2 or the third rising edge E3). When the programming system 10 does not receive the signal edge SE within a predetermined time, step S211 is executed to issue a warning. According to an embodiment of the present invention, the predetermined time is equal to the response time TAN in FIGS. 5 and 6.

Returning to step S207, when the programming system 10 determines that the signal edge SE is received, the programming system 10 further determines whether all written data DT has been sent (step S208). If it is determined that the writing data DT has not been sent, the programming system 10 returns to step S206 and continues to use the bit frame BF shown in FIG. 6 to send other bits of the writing data DT.

Returning to step S208, if it is judged that the writing of the data DT is completed, the programming system 10 sends a transmission confirmation code (step S209), and the programming system 10 determines whether the signal edge SE is received (step S210). According to an embodiment of the present invention, the transmission confirmation code is used to confirm whether the written data DT sent by the programming system 10 and the data updated by the controller 130 in the written address range match.

According to an embodiment of the invention, the transmission confirmation code is the sum of each bit of the written data DT. According to other embodiments of the present invention, the programming system 10 performs a logical operation on each bit of the written data DT to generate a transmission confirmation code, which is not limited in any form here.

Referring to FIG. 4, when the programming system 10 issues a transmission confirmation code, the controller 130 receives the transmission confirmation code through the data pin DAT (step S410), and calculates the reception code of the data written into the address range (step S411). According to an embodiment of the present invention, the controller 130 calculates the reception code of the data written into the address range through the same logic operation as generating the transmission confirmation code.

After the reception code is generated, the controller 130 determines whether the received transmission confirmation code and the reception code match (step S412). If the transmission confirmation code matches the received code, the controller 130 sends out a signal edge SE (step S413) to notify the programming system 10 that the write address range is written so that the write data DT update is successful. Returning to step S210, when the programming system 10 determines that the signal edge SE is received, it means that the writing data DT has successfully updated the writing address range, so the data writing method 200 is terminated.

Returning to step S412, if it is determined that the transmission confirmation code does not match the received code, the controller 130 does not send out the signal edge SE, and directly terminates the data update method 400. According to an embodiment of the present invention, returning to step S210, when the programming system 10 does not receive the signal edge SE within a predetermined time, the programming system 210 executes step S211 to issue a warning to notify the tester of the data writing method 200 Execution failed.

FIG. 7 is a schematic diagram showing a data writing method according to another embodiment of the invention. As shown in FIG. 7, the burning system 10 sequentially sends the first bit BT1, the second bit BT2, ... and the Nth bit BTN of the written data DT, and sends it out after sending the Nth bit BTN Section confirmation code CK. According to an embodiment of the present invention, the sector confirmation code CK is the result of the logical operation of the first bit BT1, the second bit BT2, ..., and the Nth bit BTN to confirm whether the data updated by the controller 130 is Consistent with the first bit BT1, the second bit BT2, ... and the Nth bit BTN.

According to an embodiment of the present invention, the section confirmation code CK is the result of the mutual exclusion or logical operation of the first bit BT1, the second bit BT2,... And the Nth bit BTN, which are used for explanation only , Is not limited to this in any form. According to an embodiment of the present invention, the programming system 10 may select to send any predetermined number of bits and then send the section confirmation code CK, which is not limited in any form here.

According to an embodiment of the present invention, when the controller 130 receives the sector confirmation code CK, the controller 130 also performs a logical operation on the received data to generate a reception confirmation code, and determines whether the reception confirmation code and the sector confirmation code CK Match. When the received confirmation code matches the sector confirmation code CK, the controller 130 sends out a signal edge SE again to notify the programming system 10 to continue to send the writing data DT. When the controller 130 then sends out the other N bits of the write data DT, the controller 130 sends out the sector confirmation code CK again until the write data DT is sent.

When the received confirmation code does not match the section confirmation code CK, the controller 130 does not send the signal edge SE and directly terminates the data update method 400. In addition, when the programming system 10 does not receive the signal edge SE for more than a predetermined time, it executes step S211 in FIG. 2 to issue a warning.

FIG. 8 is a schematic diagram showing a data writing method according to another embodiment of the invention. As shown in FIG. 8, the programming system 10 is simultaneously coupled to the first electronic device 800_1, the second electronic device 800_2, ..., and the Nth electronic device 800_N through the data pin DAT, and simultaneously targets the first electronic device 800_1, the first The second electronic device 800_2, ..., and the Nth electronic device 800_N execute the data writing method 200 of FIG. 2, each of the first electronic device 800_1, the second electronic device 800_2, ..., and the Nth electronic device 800_N may also be separately Perform the method 400 for updating the data in Figure 4.

FIG. 9 is a block diagram of an electronic device according to another embodiment of the invention. As shown in FIG. 9, the electronic device 900 includes a data access interface 910, a storage unit 920, a controller 930 and a decryption unit 940. According to an embodiment of the present invention, in order to increase the data security of the electronic device 900, the written data DT in FIG. 1 is encrypted by the encryption device 20 to generate encrypted data DT_E, and the encrypted data DT_E is provided to the burning system 10 .

According to an embodiment of the present invention, the programming system 10 also writes the encrypted data DT_E into the storage unit 920 through the data pin DAT of the data access interface 910. When the electronic device 900 receives the encrypted data DT_E, the decryption unit 940 decrypts the received encrypted data DT_E to generate the decrypted data DT_D, and the controller 930 updates the decrypted data DT_D to the write address range of the storage unit 920. According to an embodiment of the invention, the decryption logic of the decryption unit 940 is relative to the encryption device 20 so that the decrypted data DT_D matches the written data DT.

The multiple embodiments of the present invention provide a data writing method and a data updating method, so that the programming system can write data to the storage unit of the electronic device without disassembling the case through the data pins, which has reduced a lot of disassembly and The manpower and resources required to assemble the cabinet. According to an embodiment of the present invention, since the electronic device uses the signal edge to inform the programming system whether the operation is correct, the programming system cannot access the data inside the electronic device to improve the data security of the electronic device. According to another embodiment of the present invention, the programming system can use encrypted data to write to the electronic device, and the electronic device can decrypt the encrypted data, which can greatly increase the data security of the electronic device.

The above is an overview of the embodiment. Those of ordinary skill in the art should be able to easily design or adjust based on the present invention to perform the same purpose and/or achieve the same advantages of the embodiments described herein. Those with ordinary knowledge in the technical field should also understand that the same configuration should not deviate from the spirit and scope of this creation, and they can make various changes, substitutions, and alterations without departing from the spirit and scope of this creation. The illustrative method represents only exemplary steps, but these steps are not necessarily performed in the order shown. Additional steps may be added, substituted, changed in order, and/or eliminated to adjust as appropriate and consistent with the spirit and scope of the disclosed embodiments.

10: Burning system

20: encryption device

100, 900: electronic device

110, 910: data access interface

120, 920: storage unit

130, 930: controller

200: Data writing method

400: data update method

800_1: the first electronic device

800_2: Second electronic device

800_N: Nth electronic device

940: Decryption unit

EN: enable signal

RT: Action request

DT: Write data

SE: signal edge

CLK: clock pin

DAT: data pin

EC: Operation instruction

STR: start address

SZ: write address size

EOF: End indicator

TW: waiting time

E1: First rising edge

E2: second rising edge

E3: third rising edge

BT1: the first digit

BT2: second digit

BTN: Nth bit

BF1: the first bit frame

BF2: the second bit frame

BF: bit frame

TAN: response time

TL: Latch time

TP: data processing time

ER: rising edge

H: High logic level

L: Low logic level

DT_E: Encrypted data

DT_D: decrypt data

S201～S211, S401～S413: Step flow

FIG. 1 is a schematic diagram showing an electronic device according to an embodiment of the invention; FIG. 2 is a flowchart showing a data writing method according to an embodiment of the invention; FIG. 3 is a display according to the present invention. The waveform diagram of the clock pin and the data pin of the access interface according to an embodiment of the invention; FIG. 4 is a flowchart showing a data update method according to an embodiment of the invention; FIG. 5 is a display based on A schematic diagram of writing data sent by a burning system according to an embodiment of the present invention; FIG. 6 is a schematic diagram showing a bit frame according to an embodiment of the present invention; FIG. 7 is a schematic diagram showing another according to the present invention FIG. 8 is a schematic diagram of a data writing method according to another embodiment; FIG. 8 is a schematic diagram of a data writing method according to another embodiment of the invention; and FIG. 9 is another embodiment of the invention. The block diagram of the electronic device.

200: Data writing method

S201~S211: Step flow

Claims (10)

A data writing method is suitable for a programming system to write a written data into a storage device through a data pin of a data access interface. The data writing method includes: using the programming system to write an operation instruction Input to the storage device through the data pin, so that the storage device enters a test mode according to the operation command; using the programming system, input a write address range to the storage device, so that the storage device erases the write Data in the address range, where the storage device generates a signal edge at the data pin when the storage device completes erasing the data in the write address range; when the programming system receives the signal from the data pin When the edge occurs, the first bit of the written data is sent using the bit system using the programming system; when the programming system receives the signal edge from the data pins, the programming system uses the bit The frame sends a second bit of the written data; when the written data is sent, the transmission system uses the programming system to output a transmission confirmation code; and when the programming system receives the signal edge from the data pin, It is judged that the written data has been correctly written into the storage device. The data writing method as described in item 1 of the patent application scope, wherein the data access interface further includes a clock pin, wherein when the storage device enters the test mode, the clock pin is coupled to a first logic Level. The data writing method as described in item 1 of the patent application scope, wherein the above bit frame includes a response time, a latch time, and a data processing time, which The above data writing method further includes: at the response time, determining whether the signal edge is received from the data pin; when the signal edge is received, sending the first bit at the latch time; at the data processing Time to determine whether the signal edge is received from the data pin, where the written data is written to the storage device during the data processing time; when the signal edge is received, it is determined that the first bit write is completed; During a latch time, the second bit is sent; and when the signal edge is not received within a predetermined time, a warning is issued. The data writing method as described in item 3 of the patent application scope further includes: after sending a first predetermined number of bits of one of the written data, sending out a section confirmation code; judging whether it has been received from the data pin The signal edge; when the signal edge is received from the data pin, determine that the first predetermined number of bits are written correctly, and use the bit frame to continue sending the next bit of the written data; and when one When the above signal edge is not received within a given time, the above warning is issued. A programming system for writing a written data into a storage device through a data pin of a data access interface. The foregoing programming system includes: an internal storage device for storing a command program; and a programming The device executes the instruction program and executes a data writing method, wherein the data writing method includes: using the programming device to input an operation command to the storage device via the data pin, so that the storage device is based on the operation command Enter a test mode; Using the burning device, a write address range is input to the storage device, so that the storage device erases the data of the write address range, wherein when the storage device finishes erasing the data of the write address range At this time, the storage device generates a signal edge at the data pin; when the programming device receives the signal edge from the data pin, the programming device is used to send a first bit of the written data using a bit frame When the programming device receives the signal edge from the data pin, use the programming device to send a second bit of the written data using the bit frame; when the writing of the written data is completed, use The programming device outputs a transmission confirmation code; and when the programming device receives the signal edge from the data pin, it determines that the written data has been correctly written into the storage device. A data updating method is suitable for a storage device, wherein a programming system writes a written data into the storage device through a data pin of a data access interface. The data updating method includes: using the storage device from the above The data pin receives an operation command; the storage device is used to receive a write address range from the data pin; the storage device is used to enter a test mode according to the operation command; the data in the write address range is erased; After erasing the data in the written address range, the storage device is used to send out a signal edge; the storage device is used to receive a first bit of the written data using a bit frame; According to the first bit, update one of the first addresses in the written address range; when the first address update is completed, use the storage device to send the signal edge; use the storage device to receive from the data pin A transmission confirmation code; based on the data written in the address range, use the storage device to generate a reception code; use the storage device to determine whether the reception code and the transmission confirmation code match; when the reception code and the transmission confirmation code When they match, the signal edge is sent by the storage device; and when the received code does not match the transmission confirmation code, the signal edge is not sent. The data update method as described in item 6 of the patent application scope further includes: receiving an end indicator from the above-mentioned data pin; and erasing the data in the written address range according to the above-mentioned end indicator. The data update method as described in item 6 of the patent application scope further includes: receiving a block confirmation code after receiving a first predetermined number of bits of the written data; Bit performs a logical operation to generate a reception confirmation code; determine whether the reception confirmation code matches the sector confirmation code; when the reception confirmation code matches the sector confirmation code, send out the signal edge; and when the above When the reception confirmation code does not match the above section confirmation code, the operation stops. The data updating method as described in item 8 of the patent application scope, wherein the written data is subjected to an encryption process, and the data updating method further includes: decrypting the received written data to generate a decrypted data; and Write the decrypted data into the write address range. A storage device, wherein a programming system writes a written data to the storage device, the storage device includes: a storage unit; a data access interface, including a data pin, wherein the data pin receives the data of the programming system An operation command, a writing position range and the above-mentioned writing data, and sending out a signal edge, wherein the above-mentioned data access interface further uses a one-bit frame to sequentially receive each bit of the above-mentioned writing data; and a control According to the operation instruction, enter a test mode and erase the data of the write address range of the storage unit, wherein after the data of the write address range is erased, the controller passes the data access interface Sending the signal edge to the programming system, wherein when the data access interface receives a first bit of the written data, the controller updates the written address of the storage unit according to the first bit The first address in a range. When the update of the first address is completed, the controller sends out the signal edge. The controller receives a transmission confirmation code from the data pin. The controller writes the address according to the write address. The data in the range generates a receiving code, and judges whether the receiving code matches the transmission confirmation code, wherein when the receiving code matches the transmission confirmation code, the controller sends out the signal edge, wherein when the receiving code and the transmission When the confirmation codes do not match, the above controller does not send out the above signal edge.

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