TWI691004B - Method for manufacturing semiconductor device and semiconductor device - Google Patents

Method for manufacturing semiconductor device and semiconductor device Download PDF

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TWI691004B
TWI691004B TW105124544A TW105124544A TWI691004B TW I691004 B TWI691004 B TW I691004B TW 105124544 A TW105124544 A TW 105124544A TW 105124544 A TW105124544 A TW 105124544A TW I691004 B TWI691004 B TW I691004B
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semiconductor
semiconductor wafer
resin composition
circuit forming
semiconductor device
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TW201717292A (en
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光田昌也
渡部格
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日商住友電木股份有限公司
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • H01L21/0201—Specific process step
    • H01L21/02013—Grinding, lapping
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/561—Batch processing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565—Moulds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568—Temporary substrate used as encapsulation process aid
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Dicing (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Wire Bonding (AREA)

Abstract

The method for manufacturing a semiconductor device according to this invention comprises the following steps. First, under a state in which a first adhesion member (20) is attached to a face of a semiconductor wafer (1) on the opposite side of a circuit forming face of the semiconductor wafer (1) on which soldering bumps (2) are formed, a plurality of notches having constant width are formed on the circuit forming face of the semiconductor wafer (1) along the dicing areas of the semiconductor wafer (1). Next, under a state in which the first adhesion member (20) is attached to the semiconductor wafer (1) with notches being formed thereon, a second adhesion member (30) is attached to the circuit forming face of the semiconductor wafer (1). Then, under a state in which the second adhesion member (30) is attached to the circuit forming face of the semiconductor wafer (1), the first adhesion member (20) is peeled off. Subsequently, by singulating the semiconductor wafer (1) attached thereto with the second adhesion member (30), a structure 7 including the second adhesion member (30) and a plurality of semiconductor chips (5) attached to the adhesive face of the second adhesion member (30) is obtained, with the plurality of semiconductor chips (5) being arranged at constant spacing, and with the soldering bumps (2) provided on the circuit forming face of the plurality of semiconductor chips (5) being partially attached to the adhesive face of the second adhesion member (30), and the circuit forming face being exposed. Next, semiconductor encapsulation resin composition (40) in fluidized state contacts the plurality of semiconductor chips (5) so as to fill the gaps between the plurality of semiconductor chips (5), and to cover and seal the circuit forming face, the face on the opposite side of the circuit forming face, and the lateral faces of the semiconductor chip (5) with the semiconductor encapsulation resin composition (40). Finally, the semiconductor encapsulation resin composition (40) is cured.

Description

半導體裝置之製造方法及半導體裝置Semiconductor device manufacturing method and semiconductor device

本發明係有關半導體裝置之製造方法及半導體裝置。The invention relates to a method of manufacturing a semiconductor device and a semiconductor device.

習知之代表性的半導體裝置之製造流程中，係將與半導體晶圓之電路形成面成為反向側之面之矽基板予以薄層化後，將半導體晶圓予以分片化，以製得複數個半導體晶片。所得到之半導體晶片係藉由筒夾（collect）而被上提，以個別的進行樹脂封裝（專利文獻1等）。In the manufacturing process of the conventional representative semiconductor device, the silicon substrate on the side opposite to the circuit forming surface of the semiconductor wafer is thinned, and then the semiconductor wafer is divided into multiple pieces Semiconductor wafers. The obtained semiconductor wafer is lifted up by a collet (collect) and individually resin-encapsulated (Patent Document 1 etc.).

在此種代表性之半導體裝置之製造流程中，基於提昇良率之觀點，在製造時為了防止半導體晶片的破損，已進行各種檢討。In the manufacturing process of such a representative semiconductor device, from the viewpoint of improving the yield, various reviews have been conducted in order to prevent damage to the semiconductor wafer during manufacturing.

例如，在專利文獻2中，為了防止在對半導體晶圓進行分片化時發生半導體晶圓之破裂（碎裂），而提出一種技術，係對半導體晶圓之內面貼附表面保護用之黏接片後，方進行半導體晶圓之分片化。 ［先前技術文獻］For example, in Patent Document 2, in order to prevent cracking (fragmentation) of a semiconductor wafer when the semiconductor wafer is diced, a technique is proposed to attach a surface protection to the inner surface of the semiconductor wafer After bonding the wafers, the semiconductor wafer is sliced. [Previous Technical Literature]

專利文獻1：日本特開平9-107046號公報 專利文獻2：日本特開2011-210927號公報Patent Document 1: Japanese Patent Laid-Open No. 9-107046 Patent Document 2: Japanese Patent Laid-Open No. 2011-210927

上述技術中，著眼於防止對半導體晶圓進行分片化時因為所施加衝擊造成半導體晶圓破裂（碎裂）之觀點，可期待有某種程度的效果。又，上述技術中，著眼於防止對半導體晶片進行二次封裝時因為所施加衝擊造成半導體晶片破裂（碎裂）之觀點，亦可期待能有某種程度的效果。然而，本案發明者已經發現到，即使是使用了上述之表面保護用之黏接片，仍未能完全防止半導體晶圓之碎裂。本案發明者經過銳意檢討碎裂發生原因而發現到，有時會因為筒夾等握持裝置對於半導體晶片的吸附及上提時所加諸的衝擊，而造成半導體晶片之破損。In the above-mentioned technique, focusing on the viewpoint of preventing the semiconductor wafer from cracking (fragmentation) due to the impact applied when the semiconductor wafer is diced, a certain effect can be expected. In addition, in the above-mentioned technique, focusing on the viewpoint of preventing the semiconductor wafer from cracking (fragmentation) due to the impact applied when the semiconductor wafer is subjected to secondary packaging, a certain degree of effect can also be expected. However, the inventors of the present invention have discovered that even if the above-mentioned surface protection adhesive sheet is used, it still cannot completely prevent the semiconductor wafer from cracking. The inventor of the present application has found that after cracking the cause of cracking, it is found that the semiconductor wafer may be damaged due to the impact of the gripping device such as the collet on the semiconductor wafer when it is absorbed and lifted.

承上述，因筒夾等握持裝置進行吸附及上提時所加諸之衝擊而使半導體晶片破損之問題，在近年來使用薄層化之半導體晶圓之流程中尤為顯著。在近年，對於搭載半導體裝置之電力機器，小型化及輕量化等之要求漸高。為了滿足該要求，在近年之半導體裝置之製造流程中，在研磨半導體裝置中與電路形成面成反向之面時，例如，有將半導體晶圓薄化至100μm左右之厚度之傾向。在該種半導體晶圓之薄層化之情形時，如上述，受筒夾等握持裝置在上提時所加諸之衝擊而造成半導體晶片破損之問題，更為顯著。According to the above, the problem of damage to the semiconductor wafer due to the shock applied by the gripping device such as a collet during suction and lifting is particularly noticeable in the process of using thinned semiconductor wafers in recent years. In recent years, the requirements for miniaturization and weight reduction of electrical equipment equipped with semiconductor devices have increased. In order to meet this requirement, in the manufacturing process of semiconductor devices in recent years, when polishing the surface opposite to the circuit formation surface in the semiconductor device, for example, there is a tendency to thin the semiconductor wafer to a thickness of about 100 μm. In the case of the thinning of the semiconductor wafer, as mentioned above, the problem of damage to the semiconductor wafer caused by the impact exerted by the holding device such as a collet when it is lifted up is more significant.

又，在以往之半導體裝置之製造流程中，係對各半導體晶片予以個別的封裝，因此，在生產性之面向，亦有改善的餘地。In addition, in the manufacturing process of the conventional semiconductor device, each semiconductor wafer is individually packaged, so there is room for improvement in terms of productivity.

承上述，本發明能提供在可靠性之面向已獲改善之半導體裝置，且，亦能提供可靠性及生產性良好之半導體裝置之製造方法。Based on the above, the present invention can provide a semiconductor device whose reliability is improved, and can also provide a method of manufacturing a semiconductor device with good reliability and productivity.

依照本發明，係提供一種半導體裝置之製造方法，其包含以下步驟： 在半導體晶圓中，於設有焊接凸塊之電路形成面之反向側之面貼附著第1黏接構件之狀態下，沿著該半導體晶圓之切割區域，對於該半導體晶圓之電路形成面形成複數個具有既定寬度之切口之步驟； 在將該第1黏接構件貼附於已形成該切口之該半導體晶圓之狀態下，將第2黏接構件貼附於該半導體晶圓之電路形成面之步驟； 在將該第2黏接構件貼附於該半導體晶圓之電路形成面之狀態下，將該第1黏接構件予以剝離之步驟； 在貼附著該第2黏接構件之狀態下，對該半導體晶圓進行分片化，因而具備該第2黏接構件，與貼附於該第2黏接構件之黏接面之複數個半導體晶片，且使複數個該半導體晶片以彼此具有既定間隔之方式而配置，並將形成於複數個該半導體晶片之電路形成面之焊接凸塊的一部分，貼附於該第2黏接構件之黏接面，以得到使該電路形成面外露之構造體之步驟； 使流動狀態之半導體封裝用樹脂組成物接觸於複數個該半導體晶片，以將該半導體封裝用樹脂組成物充填於複數個該半導體晶片間之間隙，且使該半導體晶片之電路形成面、與該電路形成面成為反向側之面、及側面，被該半導體封裝用樹脂組成物所覆蓋封裝之步驟；及 使該半導體封裝用樹脂組成物硬化之步驟。According to the present invention, there is provided a method for manufacturing a semiconductor device, which includes the following steps: In a state where a first bonding member is attached to a surface of a semiconductor wafer opposite to a circuit forming surface provided with solder bumps A step of forming a plurality of cuts with a predetermined width on the circuit formation surface of the semiconductor wafer along the cutting area of the semiconductor wafer; attaching the first bonding member to the semiconductor crystal that has formed the cut Step of attaching the second adhesive member to the circuit forming surface of the semiconductor wafer in a round state; in the state of attaching the second adhesive member to the circuit forming surface of the semiconductor wafer The step of peeling the first adhesive member; the semiconductor wafer is divided into pieces in a state where the second adhesive member is attached, and thus the second adhesive member is provided, and the second adhesive member is attached to the second adhesive member A plurality of semiconductor wafers on the bonding surface of the connecting member, and the plurality of semiconductor wafers are arranged at a predetermined interval from each other, and part of the solder bumps formed on the circuit forming surfaces of the plurality of semiconductor wafers are pasted The step of attaching the bonding surface of the second bonding member to obtain a structure that exposes the circuit forming surface; contacting the resin composition for semiconductor packaging in a flowing state to the plurality of semiconductor wafers to package the semiconductor The gap between the plurality of semiconductor wafers is filled with a resin composition, and the circuit formation surface of the semiconductor wafer, the surface opposite to the circuit formation surface, and the side surface are covered with the resin composition for semiconductor packaging The step of packaging; and the step of hardening the resin composition for semiconductor packaging.

依照本發明之製造方法，係藉半導體封裝用樹脂組成物之硬化體來覆蓋半導體晶片中之電路形成面、反向側之面及其側面，而可得到在此保護狀態下藉筒夾予以上提之半導體裝置。藉此，在藉由筒夾等握持裝置來吸附及上提時，可防止握持裝置對半導體晶片的直接接觸，可緩和筒夾等握持裝置時在接觸時對半導體晶片所加諸的衝擊。因之，依照本發明之製造方法，可防止半導體晶片的破損，可得到可靠性良好之半導體裝置。又，依照本發明之製造方法，能在不需配置於分片化後之基板的情況下，一體性的對於所取得之複數個半導體晶片進行樹脂封裝，而能提昇生產效率。According to the manufacturing method of the present invention, the circuit forming surface, the opposite side surface and the side surface of the semiconductor wafer are covered by the hardened body of the resin composition for semiconductor packaging, which can be obtained by collet under this protection state Mentioned semiconductor devices. In this way, when the gripping device such as a collet is used to attract and lift, the direct contact of the gripping device to the semiconductor wafer can be prevented, and the semiconductor wafer can be alleviated when the gripping device such as the collet is touched. Shock. Therefore, according to the manufacturing method of the present invention, damage to the semiconductor wafer can be prevented, and a semiconductor device with good reliability can be obtained. In addition, according to the manufacturing method of the present invention, it is possible to integrally perform resin encapsulation on the obtained plurality of semiconductor wafers without disposing on the divided substrate, thereby improving production efficiency.

再者，依據本發明，係提供一種半導體裝置，其具備： 半導體晶片、設置在該半導體晶片之電路形成面之焊接凸塊、以及覆蓋於該半導體晶片中與該電路形成面成為反向側之面、該電路形成面之側面、及該電路形成面之封裝材； 係使該焊接凸塊之一部分外露。Furthermore, according to the present invention, there is provided a semiconductor device including: a semiconductor wafer, a solder bump provided on a circuit forming surface of the semiconductor wafer, and a side opposite to the circuit forming surface covered in the semiconductor wafer The surface, the side surface of the circuit forming surface, and the packaging material of the circuit forming surface; a part of the solder bump is exposed.

本發明之半導體裝置，係以半導體封裝用樹脂組成物之硬化體來覆蓋半導體晶片中之電路形成面、與電路形成面成為反向側之面、及其側面，能在此狀態下藉筒夾來進行上提動作，因此，可解決在習知之半導體裝置中因筒夾等握持裝置上提半導體晶片時造成半導體晶片破損之問題。因之，相較於習知的半導體裝置，具有較佳的可靠性。另外，本發明之半導體裝置，係由半導體封裝用樹脂組成物之硬化體，來覆蓋半導體晶片之電路形成面、反向側之面、及其側面，因此，相較於習知的半導體裝置，具有較佳的碎裂耐性。The semiconductor device of the present invention covers the circuit forming surface in the semiconductor wafer, the surface opposite to the circuit forming surface, and the side surface thereof with the cured body of the resin composition for semiconductor packaging, and can use a collet in this state Since the lifting operation is performed, the problem of damage to the semiconductor wafer when the semiconductor wafer is lifted by a gripping device such as a collet in a conventional semiconductor device can be solved. Therefore, it has better reliability than conventional semiconductor devices. In addition, the semiconductor device of the present invention covers the circuit formation surface, the opposite side surface, and the side surface of the semiconductor wafer with the cured body of the resin composition for semiconductor encapsulation. Therefore, compared with the conventional semiconductor device, Has better chipping resistance.

本發明之半導體裝置，具有使焊接凸塊的一部分外露之構造。因之，在將該半導體裝置搭載於基板時，可在不使封裝材與基材接觸之情況下，實現兩者間彼此分離之構造。藉此，可解決在習知之半導體裝置中發生之基板與封裝面之界面的密合不良問題。因之，相較於習知的半導體裝置，具有更佳的可靠性。又，本發明之半導體裝置，相較於習知的半導體裝置，亦有小型化的可能。再者，本發明之半導體裝置，無需透過中介層，可直接對於母板進行構裝。 又，本發明之半導體裝置，係使焊接凸塊的一部分外露，因此，操作性較佳，可使用於各種流程。具體而言，本發明之半導體裝置，可對於母板、中介層、及導線架等各種基板進行構裝。The semiconductor device of the present invention has a structure in which a part of the solder bump is exposed. Therefore, when the semiconductor device is mounted on a substrate, it is possible to realize a structure in which the two are separated from each other without contacting the packaging material and the base material. This can solve the problem of poor adhesion of the interface between the substrate and the package surface in the conventional semiconductor device. Therefore, it has better reliability than conventional semiconductor devices. In addition, the semiconductor device of the present invention may be smaller than conventional semiconductor devices. Furthermore, the semiconductor device of the present invention can directly construct the mother board without passing through the interposer. In addition, the semiconductor device of the present invention exposes a part of the solder bumps, so it has good operability and can be used in various processes. Specifically, the semiconductor device of the present invention can be constructed on various substrates such as a motherboard, an interposer, and a lead frame.

依照本發明，可提供在可靠性之面向已獲改善之半導體裝置，且能提供可靠性及生產性良好之半導體裝置之製造方法。According to the present invention, it is possible to provide a semiconductor device with improved reliability and a method of manufacturing a semiconductor device with good reliability and productivity.

以下使用圖面來說明本發明之實施形態。再者，在所有的圖面中，對於相同之構成要素係賦與相同的符號，以適度的省略其說明。The following describes the embodiments of the present invention using the drawings. In addition, in all the drawings, the same constituent elements are given the same symbols, and the description thereof is appropriately omitted.

圖1係本實施形態之半導體裝置8之一例之截面圖。 如圖1所示，本實施形態之半導體裝置8具備有：半導體晶片5；設置於半導體晶片5之電路形成面（下面）之焊接凸塊2；覆蓋於半導體晶片5中與電路形成面成為反向側之面（天井面）及電路形成面之側面，連同半導體晶片5之電路形成面之封裝材40；且係使焊接凸塊2的一部分外露。如所示，本實施形態之半導體裝置8中，半導體晶片5的電路形成面、與電路形成面成為反向側之面、以及其側面，被封裝材40所覆蓋。由於具備該種構成，在製造半導體裝置8之際，即使藉由筒夾來上提半導體晶片5，仍能防止該半導體晶片5的破損。因之，藉由本實施形態之製造流程而取得之半導體裝置8，相較於習知之半導體裝置，具有較佳的可靠性。 依照本實施形態之半導體裝置8，係使焊接凸塊2的一部分外露。由於具備此種構造，在將該半導體裝置8構裝至基板時，可避免使封裝材40與基板有接觸，可達成兩者間分離之構造。其結果，相較於基材與封裝材有接合之習知的半導體裝置，可提供小型化之半導體裝置8。又，半導體裝置8無需透過中介層而可直接構裝於母板。再者，由於半導體裝置8可在避免使封裝材40與基板有接觸之情況下，達成兩者間彼此分離之構造，因此，不會發生在習知半導體裝置中於基板與封裝材之界面之密合不良問題。因此，相較於習知的半導體裝置，半導體裝置8在可靠性方面亦更佳。另外，半導體裝置8除了能覆蓋半導體晶片5之電路形成面，亦能使反向側之面及側面同樣被半導體封裝用樹脂組成物40之硬化體所覆蓋保護，因此，相較於習知之半導體裝置，在抗碎裂性方面亦更佳。FIG. 1 is a cross-sectional view of an example of a semiconductor device 8 of this embodiment. As shown in FIG. 1, the semiconductor device 8 of this embodiment includes: a semiconductor wafer 5; a solder bump 2 provided on the circuit forming surface (lower surface) of the semiconductor wafer 5; and covering the semiconductor wafer 5 opposite to the circuit forming surface The side surface (patio surface) and the side surface of the circuit forming surface, together with the packaging material 40 of the circuit forming surface of the semiconductor wafer 5; and a part of the solder bump 2 is exposed. As shown, in the semiconductor device 8 of this embodiment, the circuit formation surface of the semiconductor wafer 5, the surface opposite to the circuit formation surface, and the side surfaces thereof are covered by the packaging material 40. With such a configuration, even when the semiconductor device 8 is manufactured, even if the semiconductor wafer 5 is lifted up by a collet, the semiconductor wafer 5 can be prevented from being damaged. Therefore, the semiconductor device 8 obtained by the manufacturing process of this embodiment has better reliability than the conventional semiconductor device. According to the semiconductor device 8 of this embodiment, a part of the solder bump 2 is exposed. With such a structure, when the semiconductor device 8 is mounted on the substrate, the contact between the packaging material 40 and the substrate can be avoided, and a structure in which the two are separated can be achieved. As a result, the semiconductor device 8 can be miniaturized compared to the conventional semiconductor device in which the base material and the packaging material are bonded. In addition, the semiconductor device 8 can be directly mounted on the motherboard without passing through the interposer. Furthermore, since the semiconductor device 8 can achieve a structure in which the packaging material 40 and the substrate are not in contact with each other, the two are separated from each other, and therefore, the interface between the substrate and the packaging material in the conventional semiconductor device does not occur The problem of poor adhesion. Therefore, the semiconductor device 8 is also better in reliability than conventional semiconductor devices. In addition, the semiconductor device 8 can cover not only the circuit formation surface of the semiconductor wafer 5 but also the opposite side surface and side surface are covered and protected by the hardened body of the resin composition 40 for semiconductor encapsulation, therefore, compared with the conventional semiconductor The device is also better in terms of crack resistance.

又，本實施形態之半導體裝置8，係使焊接凸塊2的一部分外露，因此，具有良好的操作性，可用於各種流程。具體而言，本實施形態之半導體裝置8，可構裝於母板、中介層、及導線架等各種基板。In addition, the semiconductor device 8 of this embodiment exposes a part of the solder bump 2 and therefore has good operability and can be used in various processes. Specifically, the semiconductor device 8 of this embodiment can be mounted on various substrates such as a motherboard, an interposer, and a lead frame.

本實施形態之半導體裝置8中，覆蓋於半導體晶片5之電路形成面之封裝材40的厚度，在焊接凸塊2之平均高度為R時，較佳係（1/4）R以上（3/4）R以下，更佳則為（3/8）R以上（5/8）R以下。具體而言，覆蓋於半導體晶片5之電路形成面之封裝材40的厚度，較佳為10μm以上200μm以下，更佳為20μm以上180μm以下。藉此，在製造半導體裝置8時，所製得之半導體裝置8，可預防因筒夾上提半導體晶片5時所加諸於該半導體晶片5之衝擊而造成該半導體晶片5之破損情形，且具有良好的電氣連接性及可靠性。In the semiconductor device 8 of this embodiment, the thickness of the packaging material 40 covering the circuit formation surface of the semiconductor wafer 5 is preferably (1/4) R or more (3/) when the average height of the solder bump 2 is R 4) R or less, more preferably (3/8) R or more (5/8) R or less. Specifically, the thickness of the packaging material 40 covering the circuit formation surface of the semiconductor wafer 5 is preferably 10 μm or more and 200 μm or less, and more preferably 20 μm or more and 180 μm or less. Thereby, when manufacturing the semiconductor device 8, the manufactured semiconductor device 8 can prevent the semiconductor wafer 5 from being damaged due to the impact applied to the semiconductor wafer 5 when the semiconductor wafer 5 is lifted up by the collet, and Has good electrical connectivity and reliability.

此處，在圖1之半導體裝置8中，除了半導體晶片5之電路形成面，反向側之面及側面亦被封裝材40所覆蓋，且使焊接凸塊2的一部分外露。圖1之半導體裝置8，在構裝於基板時，能在避免使封裝材40與基板有接觸之情況下，達成兩者彼此分離之構造。Here, in the semiconductor device 8 of FIG. 1, in addition to the circuit formation surface of the semiconductor wafer 5, the opposite side surface and side surface are also covered by the packaging material 40, and a part of the solder bump 2 is exposed. The semiconductor device 8 of FIG. 1 can achieve a structure in which the two are separated from each other while avoiding contact between the packaging material 40 and the substrate when being mounted on the substrate.

接著說明半導體裝置8之製造方法。 本實施形態之半導體裝置8之製造方法，其包含以下各步驟：在半導體晶圓1係已將第1黏接構件20貼附於與焊接凸塊2所被設置之電路形成面成為反向側之面之狀態下，沿著半導體晶圓1之切割區域，對於半導體晶圓1之電路形成面形成複數個有既定寬度之切口100之步驟；在已將第1黏接構件20貼附於形成有切口100之半導體晶圓1之狀態下，將第2黏接構件30貼附於半導體晶圓1之電路形成面之步驟；在已將第2黏接構件30貼附於半導體晶圓1之電路形成面之狀態下，將第1黏接構件20予以剝離之步驟；在貼附著第2黏接構件30之狀態下，將半導體晶圓1予以分片化，而具備有第2黏接構件30、與貼附於第2黏接構件30之黏接面之複數個半導體晶片5，且使複數個半導體晶片以彼此具有既定間隔之方式而配置，並將設置於複數個該半導體晶片5之電路形成面之焊接凸塊的一部分，貼附於該第2黏接構件之黏接面，以得到使電路形成面外露之構造體7之步驟；使流動狀態之半導體封裝用樹脂組成物40接觸於複數個半導體晶片5，以將半導體封裝用樹脂組成物40充填於複數個該半導體晶片間之間隙，且使半導體晶片5之電路形成面、與電路形成面成為反向側之面、及側面，被半導體封裝用樹脂組成物40所覆蓋封裝之步驟；以及，使半導體封裝用樹脂組成物40硬化之步驟。藉此方式，係在半導體晶片5之電路形成面、反向側之面、及側面，皆由半導體封裝用樹脂組成物之硬化體40所覆蓋保護之狀態下，得到可由筒夾進行上提之半導體裝置8。藉此，可防止藉筒夾等握持裝置進行上提時直接由握持裝置接觸於半導體晶片5，亦能經由半導體封裝用樹脂組成物之硬化體40，來緩和筒夾等握持裝置於接觸時對半導體晶片5所加諸的衝擊。因之，依照本實施形態之製造方法，可防止半導體晶片5因為筒夾等握持裝置進行上提時所加諸的衝擊，而造成半導體晶片5破損。因之，相較於習知的製造流程，可得到可靠性良好之半導體裝置8。 又，在本實施形態之半導體裝置8之製造方法中，第2黏接構件30之較佳構成方式，係在表面具有熱剝離性黏接層210。再者，第2黏接構件30係在表面具有上述之熱剝離性黏接層210之情形時，構造體7之較佳者，係將焊接凸塊2的一部分埋設於熱剝離性黏接層210。Next, a method of manufacturing the semiconductor device 8 will be described. The manufacturing method of the semiconductor device 8 of this embodiment includes the following steps: the first bonding member 20 has been attached to the circuit forming surface provided on the solder bump 2 on the semiconductor wafer 1 to become the opposite side In the state of the surface, along the cutting area of the semiconductor wafer 1, a plurality of slits 100 with a predetermined width are formed on the circuit forming surface of the semiconductor wafer 1; after the first adhesive member 20 has been attached to the formation The step of attaching the second adhesive member 30 to the circuit forming surface of the semiconductor wafer 1 in the state of the semiconductor wafer 1 with the notch 100; after the second adhesive member 30 has been attached to the semiconductor wafer 1 The step of peeling the first adhesive member 20 in the state of the circuit forming surface; the semiconductor wafer 1 is divided into pieces with the second adhesive member 30 attached to the second adhesive member 30, and the second adhesive member is provided 30. A plurality of semiconductor wafers 5 attached to the bonding surface of the second bonding member 30, and the plurality of semiconductor wafers are arranged at a predetermined interval from each other, and will be provided on the plurality of semiconductor wafers 5 A part of the solder bump on the circuit forming surface is attached to the bonding surface of the second adhesive member to obtain the structure 7 exposing the circuit forming surface; contacting the resin composition 40 for the semiconductor package in a flowing state In a plurality of semiconductor wafers 5, the gap between the plurality of semiconductor wafers is filled with the resin composition 40 for semiconductor packaging, and the circuit forming surface of the semiconductor wafer 5, the surface opposite to the circuit forming surface, and the side surfaces The step of covering the package with the resin composition 40 for semiconductor encapsulation; and the step of hardening the resin composition 40 for semiconductor encapsulation. In this way, the circuit forming surface, the reverse side surface, and the side surfaces of the semiconductor wafer 5 are covered and protected by the hardened body 40 of the resin composition for semiconductor encapsulation, which can be lifted up by the collet. Semiconductor device 8. Thereby, it is possible to prevent the gripping device from directly contacting the semiconductor wafer 5 by the gripping device during lifting, and also to relax the gripping device such as the collet via the hardened body 40 of the resin composition for semiconductor packaging The impact applied to the semiconductor wafer 5 during contact. Therefore, according to the manufacturing method of this embodiment, it is possible to prevent the semiconductor wafer 5 from being damaged due to an impact applied when the holding device such as a collet is lifted up. Therefore, compared with the conventional manufacturing process, the semiconductor device 8 with good reliability can be obtained. In addition, in the method of manufacturing the semiconductor device 8 of the present embodiment, the preferred configuration of the second adhesive member 30 includes the thermally peelable adhesive layer 210 on the surface. Furthermore, when the second adhesive member 30 has the above-mentioned thermally peelable adhesive layer 210 on the surface, it is preferable that the structure 7 embeds a part of the solder bump 2 in the thermally peelable adhesive layer 210.

依照本實施形態之製造方法，樹脂之封裝，並非配置於分片化後之基板，而是能對複數個半導體晶片5整體性的進行，因此，可提昇半導體裝置8的生產性。再者，半導體晶圓1係在矽基板上形成單層或多層之配線層。在以下說明之半導體晶圓1中，係將配線層形成側之面，稱為電路形成面。According to the manufacturing method of this embodiment, the resin package is not arranged on the divided substrate, but can be performed integrally on a plurality of semiconductor wafers 5, so that the productivity of the semiconductor device 8 can be improved. Furthermore, the semiconductor wafer 1 is formed with a single-layer or multi-layer wiring layer on a silicon substrate. In the semiconductor wafer 1 described below, the surface on the wiring layer formation side is referred to as a circuit formation surface.

此處之第1黏接構件20與第2黏接構件30，皆可為黏接膠帶單體，亦可為在支持基材上形成有黏接層之積層片。以下所舉之第2黏接構件30之示例，係在支持基材200上形成有熱剝離性黏接層210者，以下參照圖2～圖4，以說明本實施形態之製造方法。 再者，有關在本實施形態之製造方法之各步驟中所使用的保護膜10、第1黏接構件20（亦稱切片黏合膜20）、第2黏接構件30（亦稱轉印構件30）、及離型膜50，其詳細且容待後述。Here, both the first adhesive member 20 and the second adhesive member 30 may be a single adhesive tape, or may be a laminate with an adhesive layer formed on a supporting substrate. The second example of the second adhesive member 30 given below is one in which the thermally peelable adhesive layer 210 is formed on the support substrate 200. The manufacturing method of this embodiment will be described below with reference to FIGS. 2 to 4. Furthermore, the protective film 10, the first adhesive member 20 (also referred to as a slice adhesive film 20), and the second adhesive member 30 (also referred to as a transfer member 30) used in each step of the manufacturing method of this embodiment ), and the release film 50, the details of which will be described later.

首先如圖2（a）所示，準備有在電路形成面安裝著複數個焊接凸塊2之半導體晶圓1。First, as shown in FIG. 2( a ), a semiconductor wafer 1 in which a plurality of solder bumps 2 are mounted on a circuit formation surface is prepared.

接著，如圖2（b）所示，為了要保護所準備之半導體晶圓1之電路形成面，對於該電路形成面貼上保護膜10，以藉由該保護膜10來覆蓋該電路形成面。藉此方式，在後述之對於半導體晶圓1之電路形成面的反向側之面進行研磨時，能防止因受到施加於電路形成面之衝擊，而造成搭載於該電路形成面之電力部品等的破損。Next, as shown in FIG. 2(b), in order to protect the circuit forming surface of the prepared semiconductor wafer 1, a protective film 10 is pasted on the circuit forming surface to cover the circuit forming surface with the protective film 10 . In this way, when polishing the surface on the opposite side of the circuit forming surface of the semiconductor wafer 1 to be described later, it is possible to prevent electric parts mounted on the circuit forming surface due to the impact applied to the circuit forming surface Of damage.

繼而，如圖2（c）所示，對已貼有保護膜10之半導體晶圓1之電路形成面的反向側之面進行研磨。具體而言，係將呈保護膜10之貼附狀態之半導體晶圓1固定於研磨裝置上，然後對於與電路形成面成為反向側之面進行研磨，以使該半導體晶圓1的厚度成為既定之厚度。Then, as shown in FIG. 2( c ), the surface on the opposite side of the circuit formation surface of the semiconductor wafer 1 to which the protective film 10 has been applied is polished. Specifically, the semiconductor wafer 1 in the attached state of the protective film 10 is fixed to the polishing device, and then the surface opposite to the circuit forming surface is polished so that the thickness of the semiconductor wafer 1 becomes The established thickness.

又，在本實施形態之製造方法中，係如上述般的在貼有保護膜10之狀態下，對於半導體晶圓1中與電路形成面成為反向側之面進行研磨，因此，能有效防止在研磨時因為所發生之應力，而造成搭載於半導體晶圓1之電路形成面之電力部品等受到破損。In addition, in the manufacturing method of this embodiment, the surface on the side opposite to the circuit formation surface of the semiconductor wafer 1 is polished in the state where the protective film 10 is attached as described above, therefore, it can be effectively prevented The power components mounted on the circuit forming surface of the semiconductor wafer 1 are damaged due to the stress generated during polishing.

繼而，如圖2（d）所示，對於研磨後而得之半導體晶圓1之電路形成面之反向側的面，在電路形成面貼附著保護膜10之狀態下，進行切片黏合膜20之貼附。接著如圖2（e）所示，從半導體晶圓1將保護膜10予以剝離。此時，較佳係先降低該保護膜10與半導體晶圓1之間之密合性，才從半導體晶圓1剝離保護膜10。具體而言，可對於保護膜10與半導體晶圓1之接著部位進行例如紫外線照射或熱處理，藉以劣化形成該接著部位之保護膜10的黏接層，以降低密合性。Next, as shown in FIG. 2( d ), the surface on the opposite side of the circuit forming surface of the semiconductor wafer 1 obtained after polishing is subjected to the dicing adhesive film 20 with the protective film 10 attached to the circuit forming surface. Attached. Next, as shown in FIG. 2( e ), the protective film 10 is peeled off from the semiconductor wafer 1. At this time, it is preferable to first reduce the adhesion between the protective film 10 and the semiconductor wafer 1 before peeling the protective film 10 from the semiconductor wafer 1. Specifically, the bonding portion of the protective film 10 and the semiconductor wafer 1 may be subjected to ultraviolet irradiation or heat treatment, for example, to degrade the adhesive layer of the protective film 10 forming the bonding portion to reduce the adhesion.

繼而，以圖2（f）所示，在圖2（e）所示之電路形成面之反向側之面貼附著切片黏合膜20之狀態下，沿著半導體晶圓1之切割區域，對於半導體晶圓1之電路形成面形成複數個具有既定寬度之切口100。亦即，在保持著將切片黏合膜20貼附於與電路形成面成為反向側之面之狀態下，從半導體晶圓1之電路形成面，對該半導體晶圓1進行半切割（half cut）。切口100之形成，可使用切割刀、雷射等。切口100的寬度並無特別限定，但以30μm以上300μm以下為佳，50μm以上200μm以下則更佳。又，切口100之較佳形成方式，係對半導體晶圓1之電路形成面以等間隔方式形成。該切口100的寬度設定，一般係考慮到在形成該切口100後之半導體晶圓1的強度或電路配置等之條件。因此，切口100之寬度可在半導體裝置8之設計階段經過考慮上述之條件後，適當的設定於上述數值範圍內。 又，切口100的深度，可按照半導體晶圓1之尺寸或是所製得之半導體封包體的厚度，而適當的調整，但基於作業性或半導體裝置8之小型化的考量，例如，可設成30μm以上300μm以下。Then, as shown in FIG. 2(f), with the dicing adhesive film 20 attached to the surface opposite to the circuit forming surface shown in FIG. 2(e), along the cutting area of the semiconductor wafer 1, for A plurality of slits 100 having a predetermined width are formed on the circuit forming surface of the semiconductor wafer 1. That is, the semiconductor wafer 1 is half cut from the circuit formation surface of the semiconductor wafer 1 while keeping the dicing adhesive film 20 attached to the surface opposite to the circuit formation surface. ). For the formation of the notch 100, a cutter, laser, etc. can be used. The width of the notch 100 is not particularly limited, but it is preferably 30 μm or more and 300 μm or less, and more preferably 50 μm or more and 200 μm or less. In addition, a preferable formation method of the cutout 100 is to form the circuit formation surface of the semiconductor wafer 1 at equal intervals. The setting of the width of the slit 100 generally takes into consideration the conditions such as the strength of the semiconductor wafer 1 after the slit 100 is formed, the circuit arrangement, and the like. Therefore, the width of the notch 100 can be appropriately set within the above numerical range after considering the above conditions at the design stage of the semiconductor device 8. In addition, the depth of the notch 100 can be appropriately adjusted according to the size of the semiconductor wafer 1 or the thickness of the semiconductor package manufactured, but based on workability or the miniaturization of the semiconductor device 8, for example, it can be set 30 μm or more and 300 μm or less.

此處之切口100，係指在將切片黏合膜20貼附於與電路形成面成為反向側之面之狀態下，沿著半導體晶圓1之切割區域，例如以插入切割刀並且不將半導體晶圓1完全切斷即停止上述切割刀動作之方式，而據以形成。亦即，切口100所意指者，係在半導體晶圓1之厚度方向，從半導體晶圓1之電路形成面對該半導體晶圓1進行半切割後，所形成的溝。再者，將上述半導體晶圓1進行半切割所意指者，係不將該半導體晶圓1完全切斷，而對半導體晶圓1之厚度切削5成至7成左右使其留有部分連接之意。The notch 100 here means that the dicing adhesive film 20 is attached to the surface opposite to the circuit forming surface, along the dicing area of the semiconductor wafer 1, for example, by inserting a dicing knife and not inserting the semiconductor The wafer 1 is completely cut, that is, the manner of stopping the operation of the above-mentioned dicing blade is formed accordingly. That is, the notch 100 means a groove formed by half-cutting the semiconductor wafer 1 from the circuit formation of the semiconductor wafer 1 in the thickness direction of the semiconductor wafer 1. In addition, the semi-dicing of the semiconductor wafer 1 means that the semiconductor wafer 1 is not completely cut, but the thickness of the semiconductor wafer 1 is cut by about 50% to 70% to leave some connections. Meaning.

繼而，如圖3（a）所示，在貼附著切片黏合膜20之狀態下，對於半導體晶圓1之所有電路形成面均貼附轉印構件30。此時，轉印構件30係以僅覆蓋於焊接凸塊2之表面一部分之方式而貼附，以避免使該轉印構件30中之熱剝離性黏接層210的表面與半導體晶圓1之電路形成面有接觸。具體而言，在將轉印構件30貼附於半導體晶圓1時，上述半導體晶圓1之電路形成面，與上述轉印構件30中之熱剝離性黏接層210之表面之間的距離，較佳係控制成10μm以上200μm以下，更佳係控制成20μm以上180μm以下。又，有關上述將轉印構件30貼附於半導體晶圓1之步驟，從設置於半導體晶圓1之電路形成面之焊接凸塊2的埋設狀態看來，在該焊接凸塊2之平均高度為R時，從焊接凸塊2與電路形成面相連接位置之反向側之前端部算起，若有（1/4）R以上（3/4）R以下之區域被埋設於轉印構件30之熱剝離性黏接層210中，則為較佳，若是被埋設於轉印構件30之熱剝離性黏接層210中為（3/8）R以上（5/8）R以下之區域，則為更佳。本實施形態之製造方法中，係以控制轉印構件30之貼附程度之方式，而在使用半導體封裝用樹脂組成物40以進行封裝之步驟中（如後述），調節被樹脂所封裝之區域。Next, as shown in FIG. 3( a ), in a state where the dicing adhesive film 20 is attached, the transfer member 30 is attached to all circuit formation surfaces of the semiconductor wafer 1. At this time, the transfer member 30 is attached so as to cover only a part of the surface of the solder bump 2 to prevent the surface of the thermally peelable adhesive layer 210 in the transfer member 30 and the semiconductor wafer 1 There is contact on the circuit forming surface. Specifically, when attaching the transfer member 30 to the semiconductor wafer 1, the distance between the circuit forming surface of the semiconductor wafer 1 and the surface of the thermally peelable adhesive layer 210 in the transfer member 30 It is preferably controlled to 10 μm or more and 200 μm or less, and more preferably controlled to 20 μm or more and 180 μm or less. In addition, regarding the above step of attaching the transfer member 30 to the semiconductor wafer 1, the average height of the solder bumps 2 is seen from the embedded state of the solder bumps 2 provided on the circuit forming surface of the semiconductor wafer 1 When R, from the front end of the opposite side of the position where the solder bump 2 is connected to the circuit forming surface, if (1/4) R or more (3/4) R or less is buried in the transfer member 30 The heat-peelable adhesive layer 210 is preferably, if it is buried in the heat-peelable adhesive layer 210 of the transfer member 30 is a region of (3/8) R or more (5/8) R or less, Is better. In the manufacturing method of this embodiment, the area encapsulated by the resin is adjusted in the step of using the resin composition for semiconductor encapsulation 40 for encapsulation (as described later) by controlling the degree of attachment of the transfer member 30 .

接著，如圖3（b）所示，從半導體晶圓1將切片黏合膜20剝離。再者，較佳係在降低該切片黏合膜20與半導體晶圓1之間之密合性後，才從該半導體晶圓1剝離切片黏合膜20。具體而言，可舉例如下方法：對於切片黏合膜20與半導體晶圓1之接著部位進行例如紫外線照射或熱處理，以劣化用以形成該接著部位之切片黏合膜20的黏接層，以降低密合性。Next, as shown in FIG. 3( b ), the dicing adhesive film 20 is peeled from the semiconductor wafer 1. Furthermore, it is preferable to peel off the slicing adhesive film 20 from the semiconductor wafer 1 after reducing the adhesion between the slicing adhesive film 20 and the semiconductor wafer 1. Specifically, the following method may be exemplified: the bonding portion of the dicing adhesive film 20 and the semiconductor wafer 1 is subjected to, for example, ultraviolet irradiation or heat treatment to degrade the adhesive layer of the dicing adhesive film 20 used to form the bonding portion to reduce the density Fit.

之後，如圖3（c）所示，對於呈轉印構件30之貼附狀態之半導體晶圓1進行分片化，以製得呈轉印構件30之貼附狀態之複數個半導體晶片5。藉此，可沿著形成上述切口100之區域，將半導體晶圓1予以分片化。此時之半導體晶圓1之分片化進行，亦可從半導體晶圓1中與電路形成面成為反向側之面，沿著半導體晶圓1之切割區域，對於該半導體晶圓1中與電路形成面成為反向側之面進行研磨以達成分片化，亦可使用切割刀或雷射等以達成分片化。其中，基於作業性的考量，半導體晶圓1之分片化之較佳進行方式，係從半導體晶圓1中與電路形成面成為反向側之面，沿著半導體晶圓1之切割區域，對於該半導體晶圓1中與電路形成面成為反向側之面進行研磨之方式。再者，在半導體晶圓1之分片化時，較佳係不將轉印構件30切斷，而是將其保持著切附於所得到之複數個半導體晶片5之狀態。After that, as shown in FIG. 3( c ), the semiconductor wafer 1 in the attached state of the transfer member 30 is divided into pieces to prepare a plurality of semiconductor wafers 5 in the attached state of the transfer member 30. As a result, the semiconductor wafer 1 can be sliced along the area where the cut 100 is formed. At this time, the semiconductor wafer 1 is divided into pieces, and the surface on the semiconductor wafer 1 opposite to the circuit formation surface may also be along the cutting area of the semiconductor wafer 1. The surface on which the circuit formation surface becomes the opposite side is polished to be divided into pieces, and a dicing blade, a laser, or the like can also be used to form pieces. Among them, based on the consideration of workability, the preferred method of dividing the semiconductor wafer 1 from the semiconductor wafer 1 and the circuit forming surface becomes the opposite side surface, along the cutting area of the semiconductor wafer 1, This semiconductor wafer 1 is polished on the surface opposite to the circuit formation surface. In addition, when the semiconductor wafer 1 is divided into pieces, it is preferable not to cut the transfer member 30 but to keep it in a state of being attached to the obtained plurality of semiconductor wafers 5.

接著，如圖3（d）所示，準備離型膜50，並使該離型膜50塗布著因為溶融而呈流動狀態之半導體封裝用樹脂組成物40。又，如圖3（e）所示，將流動狀態之半導體封裝用樹脂組成物40，壓接於複數個半導體晶片5中與電路形成面成為反向側之面，用以將半導體封裝用樹脂組成物40充填於相鄰之半導體晶片5間的間隙，且藉由半導體封裝用樹脂組成物40來覆蓋封裝半導體晶片5之電路形成面、其反向側之面、及側面，而施以封裝。亦即，係以流動狀態之半導體封裝用樹脂組成物40埋入在相鄰之半導體晶片5間所形成之間隙，且以外露焊接凸塊2之一部分的方式，由半導體封裝用樹脂組成物40來封裝半導體晶片5之電路形成面、其反向側之面、以及側面。藉此方式，在以筒夾上提所製作之半導體晶片5之際，能藉由半導體封裝用樹脂組成物之硬化物40，來保護被該筒夾所吸附的部位。藉此，能在半導體晶片5之電路形成面、連同其反向側之面及側面受到半導體封裝用樹脂組成物40之硬化體所覆蓋保護之狀態下，藉由筒夾等握持裝置予以上提所獲得之半導體晶片5。因之，依照本實施形態之製造方法，可防止半導體晶片5因為筒夾等握持裝置在上提時所加諸的衝擊，而造成該半導體晶片5的破損。Next, as shown in FIG. 3( d ), a release film 50 is prepared, and the release film 50 is coated with the resin composition 40 for semiconductor encapsulation in a flowing state due to melting. Furthermore, as shown in FIG. 3(e), the resin composition 40 for semiconductor packaging in a flowing state is pressure-bonded to the surface on the side opposite to the circuit formation surface of the plurality of semiconductor wafers 5 for the resin for semiconductor packaging The composition 40 is filled in the gap between the adjacent semiconductor wafers 5, and the circuit formation surface, the opposite side surface, and the side surfaces of the packaged semiconductor wafer 5 are covered with the resin composition 40 for semiconductor packaging to apply the package . That is, the resin composition 40 for semiconductor encapsulation is a method in which the resin composition 40 for semiconductor encapsulation in a flowing state is buried in the gap formed between adjacent semiconductor wafers 5 and a part of the solder bump 2 is exposed. To encapsulate the circuit forming surface of the semiconductor wafer 5, the surface on the opposite side, and the side surface. In this way, when the semiconductor wafer 5 produced by the collet is lifted, the hardened object 40 of the resin composition for semiconductor encapsulation can protect the portion attracted by the collet. With this, the circuit forming surface of the semiconductor wafer 5 and its reverse side and side surfaces are covered and protected by the hardened body of the resin composition 40 for semiconductor encapsulation by a gripping device such as a collet.提的finished semiconductor wafer 5 Therefore, according to the manufacturing method of the present embodiment, it is possible to prevent the semiconductor wafer 5 from being damaged due to the impact exerted by the gripping device such as a collet when it is lifted up.

此處，呈流動狀態之半導體封裝用樹脂組成物40，可為溶融狀態之熱硬化性樹脂組成物，亦可為液狀之樹脂組成物，亦可為使成形為膜狀之樹脂組成物呈現軟化狀態者。Here, the resin composition 40 for semiconductor encapsulation in a fluid state may be a thermosetting resin composition in a molten state, a liquid resin composition, or a resin composition formed into a film shape Soften the state.

以下之示例，係以使用固態之顆粒狀樹脂組成物來作為半導體封裝用樹脂組成物40，用以詳述半導體晶片5之封裝步驟。 使用半導體封裝用樹脂組成物40以封裝半導體晶片5之方法，並無特別限定，可使用轉注成形法、壓縮成形法、射出成形法等，但以難以造成已固定之半導體晶片5發生位置偏離之壓縮成形法為較佳方式。又，在進行壓縮成形以封裝半導體晶片5之情形時，可使用粉粒狀之樹脂組成物以進行樹脂封裝。再者，有關半導體封裝用樹脂組成物40之詳細，容待後述。In the following example, a solid particulate resin composition is used as the resin composition 40 for semiconductor packaging to describe the packaging step of the semiconductor wafer 5 in detail. The method of packaging the semiconductor wafer 5 by using the resin composition 40 for semiconductor packaging is not particularly limited, and a transfer molding method, a compression molding method, an injection molding method, etc. may be used, but it is difficult to cause a positional deviation of the fixed semiconductor wafer 5 Compression molding is the preferred method. In addition, in the case of performing compression molding to encapsulate the semiconductor wafer 5, a resin composition in powder form may be used for resin encapsulation. In addition, the details of the resin composition 40 for semiconductor packages will be described later.

具體而言，在壓縮成形模具之上型與下型之間，設置著已收容有顆粒狀樹脂組成物之樹脂材料供應容器。接著，將已貼附轉印構件30之半導體晶片5，藉由夾持、吸附之類的固定手段，而固定於壓縮成型模具之上型與下型的一方。在以下所舉之說明例，係將半導體晶片5固定於壓縮成型模具的上型，而將與電路形成面成為反向側之面，面向於樹脂材料供應容器。Specifically, between the upper mold and the lower mold of the compression molding die, a resin material supply container in which a granular resin composition has been stored is provided. Next, the semiconductor wafer 5 to which the transfer member 30 has been attached is fixed to one of the upper and lower types of the compression molding die by fixing means such as clamping and suction. In the following illustrative example, the semiconductor wafer 5 is fixed to the upper mold of the compression molding die, and the surface opposite to the circuit forming surface faces the resin material supply container.

繼而，在減壓下，邊縮小模具之上型與下型之間隔，邊藉由構成樹脂材料供應容器之底面之推拉門（shutter）等樹脂材料供應機構，將量秤後之顆粒狀的樹脂組成物供應至下型所具備之下型空腔內。在該模具空腔內，在事前必須靜置離型膜50。藉此，顆粒狀之樹脂組成物在下型空腔內被加熱成既定溫度，其結果，可在離型膜50上製備有溶融狀態之半導體封裝用樹脂組成物40。之後，使模具之上型與下型結合，將溶融狀態之半導體封裝用樹脂組成物40抵接至固定於上型之半導體晶片5。藉此方式，可藉由溶融狀態之半導體封裝用樹脂組成物40，埋入在相鄰之半導體晶片5間所形成的間隙，且，能使半導體晶片5之電路形成面、其反向側之面、及側面，被半導體封裝用樹脂組成物40所覆蓋。之後，邊保持使模具之上型與下型結合之狀態，邊使半導體封裝用樹脂組成物40硬化。 此處，在進行壓縮成形時，較佳係在模具內邊進行減壓邊進行樹脂封裝，更佳係在真空條件下進行。藉此方式，可在未餘留有未充填部分的情況下，良好的將半導體封裝用樹脂組成物40充填至在相鄰的半導體晶片5間所形成之間隙。Then, under reduced pressure, while reducing the gap between the upper and lower molds, the granular resin after the scale is weighed by a resin material supply mechanism such as a shutter that constitutes the bottom surface of the resin material supply container The composition is supplied into the lower cavity of the lower mold. In the cavity of the mold, the release film 50 must be allowed to stand beforehand. As a result, the granular resin composition is heated to a predetermined temperature in the lower cavity, and as a result, the molten resin composition 40 for semiconductor encapsulation can be prepared on the release film 50. After that, the upper mold and the lower mold of the mold are combined to contact the molten resin composition 40 for semiconductor encapsulation to the semiconductor wafer 5 fixed to the upper mold. In this way, the gap formed between the adjacent semiconductor wafers 5 can be buried by the molten resin composition 40 for semiconductor encapsulation, and the circuit forming surface of the semiconductor wafer 5 and its reverse side can be made The surface and the side surface are covered with the resin composition 40 for semiconductor encapsulation. Thereafter, the resin composition 40 for semiconductor encapsulation is cured while maintaining the state in which the upper mold and the lower mold are bonded. Here, when performing compression molding, it is preferable to perform resin encapsulation while depressurizing in the mold, and more preferably to perform under vacuum conditions. In this way, the resin composition 40 for semiconductor encapsulation can be satisfactorily filled into the gap formed between adjacent semiconductor wafers 5 without leaving unfilled portions.

壓縮成形之成形溫度，並無特別限定，較佳係50～200℃，80～180℃則更佳。又，成形壓力並無特別限定，0.5～12Mpa為較佳，1～10Mpa則更佳。再者，成形時間以30秒～15分為較佳，1～10分則更佳。藉著將成形溫度、壓力、時間設定於上述範圍，既可防止發生溶融狀態之半導體封裝用樹脂組成物40有未能完全充填之情形，亦能防止半導體晶片5的位置偏離。The molding temperature of compression molding is not particularly limited, preferably 50 to 200°C, and more preferably 80 to 180°C. In addition, the forming pressure is not particularly limited, preferably 0.5 to 12 MPa, and more preferably 1 to 10 MPa. Furthermore, the molding time is preferably 30 seconds to 15 minutes, and more preferably 1 to 10 minutes. By setting the molding temperature, pressure, and time within the above range, it is possible to prevent the molten resin composition 40 for semiconductor encapsulation from being completely filled, and to prevent the semiconductor wafer 5 from shifting in position.

接著，如圖4（a）所示，將離型膜50予以剝離。Next, as shown in FIG. 4( a ), the release film 50 is peeled off.

接著，如圖4（b）所示，在將轉印構件30貼附於半導體晶片5之狀態下，對於半導體封裝用樹脂組成物40（其被配置於該半導體晶片5中與電路形成面成為反向側之面的面方向）的硬化體，貼上切片黏合膜20。Next, as shown in FIG. 4( b ), in a state where the transfer member 30 is attached to the semiconductor wafer 5, the resin composition for semiconductor package 40 (which is arranged in the semiconductor wafer 5 and the circuit forming surface becomes The hardened body of the surface on the reverse side) is attached with a slice adhesive film 20.

繼而，如圖4（c）所示，將轉印構件30予以剝離。此時，形成於轉印構件30之表面之熱剝離性黏接層210，較佳係由包含主劑與發泡劑之材料所形成。藉此，藉由將轉印構件30中用以形成熱剝離性黏接層210之材料加熱至發泡溫度，可更為容易的從半導體晶片5剝離該轉印構件30。具體而言，藉上述材料以形成熱剝離性黏接層210之情形時，亦即，使形成熱剝離性黏接層210之黏接劑具有發泡性之情形時，藉由將該黏接劑加熱至發泡之溫度，可實質的去除該黏接劑之接著力。因此，使用具有熱剝離性黏接層210之轉印構件30之情形，藉由加熱處理，可易於從半導體晶片5剝離轉印構件30。又，上述之主劑為丙烯酸系黏接劑、橡膠系黏接劑、苯乙烯、共軛二烯嵌段共聚物，較佳可舉例為丙烯酸系黏接劑等，上述之發泡劑，可使用無機系、有機系等之各種發泡劑。Then, as shown in FIG. 4(c), the transfer member 30 is peeled off. At this time, the heat-peelable adhesive layer 210 formed on the surface of the transfer member 30 is preferably formed of a material containing a main agent and a foaming agent. In this way, by heating the material used to form the thermally peelable adhesive layer 210 in the transfer member 30 to the foaming temperature, the transfer member 30 can be more easily peeled from the semiconductor wafer 5. Specifically, when the thermal peelable adhesive layer 210 is formed by the above materials, that is, when the adhesive forming the thermal peelable adhesive layer 210 has foamability, the adhesive The adhesive is heated to the foaming temperature, which can substantially remove the adhesion of the adhesive. Therefore, in the case where the transfer member 30 having the thermally peelable adhesive layer 210 is used, the transfer member 30 can be easily peeled from the semiconductor wafer 5 by heat treatment. In addition, the above-mentioned main agent is an acrylic adhesive, a rubber adhesive, styrene, a conjugated diene block copolymer, preferably an acrylic adhesive, etc. The above-mentioned foaming agent may be Various blowing agents such as inorganic and organic systems are used.

接著，如圖4（d）所示，例如在將切片黏合膜20貼附於半導體晶片5之狀態下，將充填至間隙之半導體封裝用樹脂組成物40之硬化體予以切斷，以對於被半導體封裝用樹脂組成物40所封裝之複數個半導體晶片5進行分片化。此時，切片黏合膜20亦可連同半導體封裝用樹脂組成物40之硬化體一起切斷，亦可在不切斷的情況下，將其保持成貼附於複數個半導體晶片5之狀態，然而，基於提昇半導體裝置8之生產性之觀點，在進行半導體晶片5之分片化時，較佳係在不切斷切片黏合膜20的情況下，保持成貼附於半導體晶片5之狀態。再者，上述之半導體晶片5之分片化，可使用切割刀、雷射等。Next, as shown in FIG. 4( d ), for example, in a state where the dicing adhesive film 20 is attached to the semiconductor wafer 5, the hardened body of the resin composition 40 for semiconductor encapsulation filled in the gap is cut to prevent The plurality of semiconductor wafers 5 encapsulated by the resin composition 40 for semiconductor packaging are divided into pieces. At this time, the dicing adhesive film 20 may be cut together with the cured body of the resin composition 40 for semiconductor encapsulation, or it may be kept in a state of being attached to a plurality of semiconductor wafers 5 without cutting. From the viewpoint of improving the productivity of the semiconductor device 8, when the semiconductor wafer 5 is divided into pieces, it is preferable to maintain the state of being attached to the semiconductor wafer 5 without cutting the dicing adhesive film 20. In addition, to divide the semiconductor wafer 5 as described above, a dicing blade, a laser, or the like can be used.

接著，如圖4（e）所示，從半導體裝置8將切片黏合膜20剝離。藉此方式，可製得本實施形態之半導體裝置8。再者，較佳係在降低該切片黏合膜20與半導體裝置8之間之密合性後，才從該半導體晶片5剝離切片黏合膜20。具體而言，可舉例如下方法：對於切片黏合膜20與半導體晶片5之接著部位進行例如紫外線照射或熱處理，以劣化用以形成該接著部位之切片黏合膜20的黏接層，以降低密合性。Next, as shown in FIG. 4( e ), the dicing adhesive film 20 is peeled from the semiconductor device 8. In this way, the semiconductor device 8 of this embodiment can be manufactured. Furthermore, it is preferable to peel off the slicing adhesive film 20 from the semiconductor wafer 5 after reducing the adhesion between the slicing adhesive film 20 and the semiconductor device 8. Specifically, the following method may be exemplified: performing a UV irradiation or heat treatment on the bonding portion of the slicing adhesive film 20 and the semiconductor wafer 5 to deteriorate the adhesive layer of the slicing adhesive film 20 used to form the bonding portion to reduce the adhesion Sex.

又，所得到之半導體裝置8，亦可按照必要性而構裝至基板。再者，在將製得之半導體裝置構裝至基板時，可使用覆晶黏晶機或晶片貼合機等周知的裝置。In addition, the obtained semiconductor device 8 may be mounted on the substrate as necessary. Furthermore, when mounting the fabricated semiconductor device to a substrate, a well-known device such as a flip chip bonding machine or a wafer bonding machine can be used.

依照本實施形態之製造方法，除了半導體晶片5之電路形成面，反向側之面及側面亦受半導體封裝用樹脂組成物之硬化體40所覆蓋保護，可得到能在該狀態下藉由筒夾等握持裝置予以上提之半導體晶片5。藉此，可防止筒夾等握持裝置直接接觸於半導體晶片5，且能藉由半導體封裝用樹脂組成物之硬化體40，來緩和藉筒夾等握持裝置予以上提時對半導體晶片5所加諸之衝擊。因此，依照本實施形態之製造方法，可防止因為受筒夾等握持裝置上提時所加諸之衝擊，而造成半導體晶片5的破損。亦即，依照本實施形態之製造方法，在藉由筒夾等握持裝置予以吸附上提時，可緩和對於半導體晶片5所加諸的衝擊。因此，依照本實施形態之製造方法，相較於習知的製造方法，可製得可靠性佳的半導體裝置。又，依照本實施形態之製造方法，在分片化後無需配置於基板，而可對於所取得之複數個半導體晶片5整體性的施以樹脂封裝。因此，相較於習知的製造方法，能大寬度提昇生產效率。又，在將本實施形態之製造方法所製得之半導體裝置8構裝至基板時，由於封裝材40與基板成為分離之構造，而亦可抑制封裝材40與基板間所產生之密合不良，而能進一步提昇可靠性。According to the manufacturing method of the present embodiment, in addition to the circuit forming surface of the semiconductor wafer 5, the opposite side surface and side surface are also covered and protected by the hardened body 40 of the resin composition for semiconductor packaging, and it is possible to obtain The semiconductor wafer 5 lifted by a holding device such as a clip. Thereby, the holding device such as a collet can be prevented from directly contacting the semiconductor wafer 5, and the cured body 40 of the resin composition for semiconductor encapsulation can ease the lifting of the semiconductor chip 5 when the holding device such as a collet is lifted. The added shock. Therefore, according to the manufacturing method of this embodiment, it is possible to prevent the semiconductor wafer 5 from being damaged due to an impact applied when the gripping device such as a collet is lifted up. That is, according to the manufacturing method of the present embodiment, when suction is lifted by a gripping device such as a collet, the impact applied to the semiconductor wafer 5 can be alleviated. Therefore, according to the manufacturing method of this embodiment, compared with the conventional manufacturing method, a semiconductor device with high reliability can be manufactured. In addition, according to the manufacturing method of the present embodiment, it is not necessary to dispose on the substrate after dicing, but the obtained plural semiconductor wafers 5 can be integrally encapsulated with resin. Therefore, compared with the conventional manufacturing method, the production efficiency can be increased in a large width. In addition, when the semiconductor device 8 manufactured by the manufacturing method of the present embodiment is mounted on a substrate, since the packaging material 40 and the substrate are separated, it is possible to suppress poor adhesion between the packaging material 40 and the substrate , And can further improve reliability.

本實施形態之保護膜10，在研磨半導體晶圓1中與電路形成面成為反向側之面時，係基於保護該半導體晶圓1之電路形成面之目的而使用，然而，亦可具有在本實施形態中對半導體晶圓1進行分片化時所使用之切片黏合膜20的功能，以及具有在本實施形態中使半導體晶片5中與電路形成面之反向側之面及側面受到覆蓋封裝時，所使用之轉印構件30的功能。因此，以生產效率之觀點而言，以僅僅使用保護膜10來代替切片黏合膜20與轉印構件30之方式為較佳， 但依照本實施形態之製造方法，若在各製程係使用相異之黏接構件（保護膜10、切片黏接膜20、及轉印構件30），則亦具有可供個別維持各該黏接材件所具強度等優點。亦即，依照本實施形態之製造方法，可高精度的製得可靠性良好之半導體裝置。The protective film 10 of the present embodiment is used for the purpose of protecting the circuit forming surface of the semiconductor wafer 1 when polishing the surface on the semiconductor wafer 1 opposite to the circuit forming surface, however, it may also have The function of the slicing adhesive film 20 used when the semiconductor wafer 1 is singulated in this embodiment, and the surface and side surfaces of the semiconductor wafer 5 opposite to the circuit formation surface in this embodiment are covered The function of the transfer member 30 used during packaging. Therefore, from the viewpoint of production efficiency, it is preferable to use only the protective film 10 in place of the slicing adhesive film 20 and the transfer member 30, but according to the manufacturing method of this embodiment, if different processes are used The adhesive members (protective film 10, slice adhesive film 20, and transfer member 30) also have the advantages of maintaining the strength of each adhesive material individually. That is, according to the manufacturing method of this embodiment, a highly reliable semiconductor device can be manufactured with high accuracy.

以下，將說明各實施形態之半導體封裝用樹脂組成物40、切片黏合膜20、轉印構件30、保護膜10、及離型膜50之構成。Hereinafter, the configurations of the resin composition 40 for semiconductor encapsulation, the dicing adhesive film 20, the transfer member 30, the protective film 10, and the release film 50 of each embodiment will be described.

〈半導體封裝用樹脂組成物40〉 以下，以顆粒狀之樹脂組成物作為半導體封裝用樹脂組成物40，以下雖詳述其態樣，但其並不侷限於此。<Resin Composition 40 for Semiconductor Packaging> Hereinafter, a resin composition in the form of pellets is used as the resin composition 40 for semiconductor packaging. Although the form is described in detail below, it is not limited thereto.

本實施形態之顆粒狀之樹脂組成物，其構成材料，較佳為含有環氧樹脂者。環氧樹脂可列舉在1個分子內含有2個以上環氧基之單體、低聚物、聚合物整體，其分子量及分子構造並無特別限定。具體而言可列舉聯苯型環氧樹脂、雙酚A型環氧樹脂、雙酚F型環氧樹脂、二苯乙烯型環氧樹脂、對苯二酚型環氧樹脂等結晶性環氧樹脂；甲酚酚醛（cresol novolac）型環氧樹脂、苯酚酚醛（phenol novolac）型環氧樹脂、萘酚酚醛型環氧樹脂等酚醛型環氧樹脂；含伸苯基骨架之苯酚芳烷基型環氧樹脂、含亞聯苯基骨架之苯酚芳烷基型環氧樹脂、含伸苯基骨架之萘酚芳烷基型（naphthol aralkyl）環氧樹脂等苯酚芳烷型（phenol aralkyl）環氧樹脂；三苯酚甲烷（triphenol methane）型環氧樹脂、芳烷改性三苯酚甲烷型環氧樹脂等3官能型環氧樹脂；二環戊二烯（dicyclopentadiene）改性苯酚型環氧樹脂、萜烯改性苯酚型環氧樹脂等改性苯酚型環氧樹脂；含三

Figure 105124544-A0304-12-0020-4
（triazine）核之環氧樹脂等之含雜環的環氧樹脂等，可使用其中之1種或2種以上的組合。The granular resin composition of the present embodiment preferably contains epoxy resin as its constituent material. Examples of the epoxy resin include monomers, oligomers, and entire polymers containing two or more epoxy groups in one molecule, and the molecular weight and molecular structure are not particularly limited. Specifically, crystalline epoxy resins such as biphenyl type epoxy resin, bisphenol A type epoxy resin, bisphenol F type epoxy resin, stilbene type epoxy resin, and hydroquinone type epoxy resin can be cited. ; Cresol novolac epoxy resin, phenol novolac epoxy resin, naphthol novolac epoxy resin and other phenolic epoxy resin; phenol aralkyl ring containing phenylene skeleton Oxygen resin, phenol aralkyl epoxy resin with biphenylene skeleton, naphthol aralkyl epoxy resin with phenylene skeleton and other phenol aralkyl epoxy resins ; Trifunctional methane epoxy resin, trifunctional methane epoxy resin such as trifunctional methane type epoxy resin; dicyclopentadiene (dicyclopentadiene) modified phenol epoxy resin, terpene Modified phenol-type epoxy resin and other modified phenol-type epoxy resin; containing three
Figure 105124544-A0304-12-0020-4
(Triazine) Heterocyclic ring-containing epoxy resins such as core epoxy resins, and one or a combination of two or more of them can be used.

又，可取得顆粒狀之樹脂組成物之方法，並無特別限定，可舉例如下方法：由具有複數個小孔之圓筒狀外周部與圓盤狀之底面而構成轉子，對於轉子之內側，供應經過溶融混練之樹脂組成物，藉由轉子旋轉時之離心力而使該樹脂組成物通過小孔之方法（以下亦稱「離心製粉法」。）；將各原料成分以混合機予以預做混合後，藉由輪片、捏合機（Kneader)或押出機等之混練機予以加熱混練後，對於經過冷卻、粉碎步驟之粉碎物，使用篩子以去除粗粒與微粉之方法（以下，亦稱「粉碎篩分法」。）；將各原料成分以混合機預做混合後，使用在螺桿前端部配置有複數個小孔之設有模孔（die）之押出機，邊進行加熱混練，且對於被配置於模孔之小孔所擠出之帶狀溶融樹脂，以大致平行於模孔面呈滑動旋轉之切刀予以切斷之方法（以下亦稱為熱切法。）等。其中任一種方法，皆可藉由混練條件、離心條件、篩分條件、及切斷條件等之選擇，而得到所要之粒度分布或顆粒分布。特別適用之製法係離心製粉法，藉此而獲得之顆粒狀之樹脂組成物，能穩定的保有所要之粒度分布或顆粒密度，因此，在搬送路徑上之搬送性或避免粘著方面，表現尤佳。又，在離心製粉法中，可使粒子表面具有某種程度的平滑，亦不會有粒子彼此間的牽引、或是與搬送路面有磨擦阻力偏大的情形，可防止在朝向搬送路徑之供給口有發生阻塞，在防止於搬送路徑上之滯留，表現亦佳。又，在離心製粉法中，係從溶融之狀態使用離心力以形成，因而在粒子內含有某種程度之空隙，能使顆粒密度低於某種程度，有利於壓縮成形時之搬送性。In addition, the method for obtaining the granular resin composition is not particularly limited, and the following method can be exemplified: a rotor is composed of a cylindrical outer peripheral portion having a plurality of small holes and a disc-shaped bottom surface, and for the inner side of the rotor, The method of supplying the resin composition after melting and kneading, and passing the resin composition through the small holes by the centrifugal force when the rotor rotates (hereinafter also referred to as the "centrifugal powder method"); pre-mixing each raw material component with a mixer Then, after being heated and kneaded by a kneader such as a wheel, a kneader or an extruder, a method of removing coarse particles and fine powders by using a sieve for the crushed material after cooling and crushing steps (hereinafter also referred to as " Crushing and sieving method"); After pre-mixing each raw material component with a mixer, use an extruder equipped with a plurality of small holes at the front end of the screw and equipped with a die to carry out heating and kneading. The method of cutting the strip-shaped melted resin extruded from the small hole arranged in the die hole with a sliding knife that is roughly parallel to the die hole surface (hereinafter also referred to as hot cutting method). In any of these methods, the desired particle size distribution or particle distribution can be obtained by the selection of kneading conditions, centrifugal conditions, screening conditions, and cutting conditions. The particularly suitable manufacturing method is the centrifugal milling method. The granular resin composition obtained by this method can stably maintain the required particle size distribution or particle density. Therefore, it is particularly effective in the transportability of the transport path or the avoidance of adhesion. good. In addition, in the centrifugal pulverization method, the surface of the particles can be smoothed to a certain degree, and there is no traction between the particles or the friction resistance with the transportation road surface is too large, which can prevent the supply toward the transportation path. There is a blockage at the mouth, which also performs well in preventing stagnation on the transport path. In addition, in the centrifugal pulverization method, the centrifugal force is used to form from the melted state, so the particles contain a certain degree of voids, which can make the particle density lower than a certain degree, which is conducive to the transportability during compression molding.

另一方面，若使用粉碎篩分法，雖然必須考慮因篩分而產生之大量粉塵，以及粗粒之處理方法，但篩分裝置等係在半導體封裝用樹脂組成物40之既存製造線已有使用者，故而，可以原原本本的使用既有之製造線，此點為較適合之處。又，若採用粉碎篩分法，有較多可供獨立控制本發明之粒度分布之因子，例如在粉碎前將溶融樹脂予以薄片化時之薄片厚度的選擇、粉碎時之粉碎條件、濾片之選擇、篩分時所選用的篩子等，因此，有較多的選項可供調整成所要的粒度分布，此點為較適合之處。又，若採用熱切法，例如，以在押出機的前端附加熱切機構的方式，亦可原原本本的使用既有的製造線，此點亦為較佳之處。On the other hand, if the crushing and sieving method is used, although it is necessary to consider the large amount of dust generated by the sieving and the treatment method of coarse particles, the sieving device is already in the existing manufacturing line of the resin composition 40 for semiconductor packaging The user can therefore use the existing manufacturing line originally, which is more suitable. In addition, if the crushing and screening method is used, there are many factors that can be used to independently control the particle size distribution of the present invention, such as the selection of the thickness of the sheet when the melted resin is sheeted before crushing, the crushing conditions during crushing, and the filter The sieve used for selection and sieving, so there are more options to adjust to the desired particle size distribution, this point is more suitable. In addition, if the hot cutting method is adopted, for example, by adding a hot cutting mechanism at the front end of the extruder, the original manufacturing line can be used originally, which is also a better point.

半導體封裝用樹脂組成物40亦可為錠狀之樹脂組成物。上述之錠狀之樹脂組成物之取得方法，可列舉將各原料成分以混合機等而混合，進而以滾輪、捏合機或押出機等之混練機進行加熱溶融與混練，將冷卻之後之粉碎物打錠成錠狀而取得。The resin composition 40 for semiconductor encapsulation may also be an ingot-shaped resin composition. The method of obtaining the above-mentioned ingot-shaped resin composition includes mixing each raw material component with a mixer, etc., and further heating and melting and kneading with a kneading machine such as a roller, a kneader, or an extruder, and the pulverized material after cooling Obtained by hitting ingots.

上述之薄片狀之樹脂組成物之取得方法，可列舉將各原料成分或是在事前即混合有各成分之樹脂組成物溶解至有機溶劑等，或是調製分散之透明塗料，然後在膜上進行塗布、乾燥以形成薄片狀。塗布之方法並無特定限定，可列舉為使用缺角輪塗佈機（comma coater）或狹縫塗佈機（die coater）之類的塗佈機以進行塗布之方法、或使用模板印刷或凹版印刷之類的印刷方法等。或者，亦可將樹脂組成物直接由捏合機等予以混練，藉以調製混練物，將經此方式而取得之混練物擠壓而出，使形成為薄片狀。The method of obtaining the above-mentioned sheet-like resin composition may include dissolving each raw material component or the resin composition in which the components were previously mixed into an organic solvent, etc., or preparing and dispersing a transparent paint, and then performing on the film Coated and dried to form flakes. The coating method is not particularly limited, and examples include a coating method using a coater such as a comma coater or a die coater, or stencil printing or gravure. Printing methods such as printing. Alternatively, the resin composition may be kneaded directly by a kneader or the like, whereby the kneaded material is prepared, and the kneaded material obtained in this manner is extruded and formed into a sheet shape.

〈切片黏合膜20（第1黏接構件20）〉 本實施形態之切片黏合膜20，在對半導體晶圓1實施分片化時，能在不被切斷之情況下，保持成貼附於所獲得之半導體晶片5之狀態。該種切片黏合膜20，只要可供接著於半導體晶圓1，則並無特別限定，例如，由支持膜與黏接劑層所構成者亦可。<Slice Adhesive Film 20 (First Adhesive Member 20)> The slice adhesive film 20 of the present embodiment can be kept attached to the semiconductor wafer 1 without being cut when it is sliced The state of the obtained semiconductor wafer 5. The dicing adhesive film 20 is not particularly limited as long as it can be attached to the semiconductor wafer 1, for example, it may be composed of a supporting film and an adhesive layer.

支持膜之構成材料例如宜含有從聚乙烯、聚丙烯、乙烯•丙烯共聚物、聚烯烴、聚丁烯、聚丁二烯、聚甲基戊烯、聚氯乙烯、聚偏二氯乙烯、氯乙烯共聚物、聚對苯二甲酸乙二酯、聚對苯二甲酸丁二酯、聚萘二甲酸乙二醇酯、聚氨酯、乙烯•醋酸乙烯酯共聚物、離子聚合物、乙烯•（甲基）丙烯酸共聚物、乙烯•（甲基）丙烯酸酯共聚物、聚苯乙烯、乙烯基聚異戊二烯（vinyl polyisoprene）、聚碳酸酯、聚苯硫、聚醚醚酮、丙烯腈•丁二烯•苯乙烯共聚物、聚醯亞胺、聚醚醯亞胺、聚醯胺、及氟樹脂構成之群當中選出之1種以上之樹脂者。The material constituting the support film preferably contains, for example, polyethylene, polypropylene, ethylene-propylene copolymer, polyolefin, polybutene, polybutadiene, polymethylpentene, polyvinyl chloride, polyvinylidene chloride, chlorine Ethylene copolymer, polyethylene terephthalate, polybutylene terephthalate, polyethylene naphthalate, polyurethane, ethylene•vinyl acetate copolymer, ionic polymer, ethylene•(methyl ) Acrylic copolymer, ethylene•(meth)acrylate copolymer, polystyrene, vinyl polyisoprene, polycarbonate, polyphenylene sulfide, polyether ether ketone, acrylonitrile•butane One or more resins selected from the group consisting of olefin/styrene copolymer, polyimide, polyetherimide, polyamide, and fluororesin.

又，為了使支持膜的表面與黏接劑層之密合性提高，可施以化學性或物理性之表面處理。再者，在不損及發明效果之範圍內，支持膜中亦可含有各種添加劑（充填劑、可塑劑、氧化防止劑、難燃劑、帶電防止劑）。In addition, in order to improve the adhesion between the surface of the support film and the adhesive layer, chemical or physical surface treatment may be applied. Furthermore, various additives (fillers, plasticizers, oxidation inhibitors, flame retardants, electrification inhibitors) may be contained in the support film as long as the effects of the invention are not impaired.

又，切割膠帶之黏接劑層所使用者，可由包含丙烯酸系黏接劑、橡膠系黏接劑、乙烯基烷基醚系黏接劑、矽系黏接劑、聚酯系黏接劑等之第一樹脂組成物所構成，其中以丙烯酸系黏接劑為較佳。In addition, the user of the adhesive layer of the cutting tape can include acrylic adhesives, rubber adhesives, vinyl alkyl ether adhesives, silicon adhesives, polyester adhesives, etc. The first resin composition is preferably made of acrylic adhesive.

〈轉印構件30（黏接構件30）〉 接著，本實施形態之轉印構件30，較佳係積層著基材層200與熱剝離性黏接層210者。<Transfer Member 30 (Adhesive Member 30)> Next, the transfer member 30 of this embodiment is preferably one in which the base material layer 200 and the heat-peelable adhesive layer 210 are laminated.

熱剝離性黏接層210之較佳者，係由包含主劑與發泡劑之材料所形成。該主劑係丙烯酸系黏接劑、橡膠系黏接劑、苯乙烯•共軛二烯嵌段共聚物，較佳可舉例為丙烯酸系黏接劑等，上述之發泡劑，可使用無機系、有機系等之各種發泡劑。The heat-peelable adhesive layer 210 is preferably formed of a material containing a main agent and a foaming agent. The main agent is an acrylic adhesive, a rubber adhesive, a styrene-conjugated diene block copolymer, preferably an acrylic adhesive, etc. The above-mentioned foaming agent may use an inorganic adhesive , Organic and other foaming agents.

又，基材層200可列舉聚乙烯、聚丙烯等之聚烯烴、乙烯-醋酸乙烯酯共聚物、聚酯、聚醯亞胺、聚對苯二甲酸乙二酯、聚氯乙烯、聚醯胺、聚氨酯等所製作之耐熱性或耐藥品性良好的膜。基材層的厚度並無特別限定，通常以30～500μm為佳。In addition, the base material layer 200 may include polyolefins such as polyethylene and polypropylene, ethylene-vinyl acetate copolymers, polyesters, polyimide, polyethylene terephthalate, polyvinyl chloride, and polyamide , Polyurethane and other films with good heat resistance or chemical resistance. The thickness of the base material layer is not particularly limited, but it is usually preferably 30 to 500 μm.

〈保護膜10〉 接著，保護膜10係在對半導體晶圓1中與電路形成面成為反向側之面進行研磨時，用以保護電路形成面者。該保護膜10只要是可接著於半導體晶圓1者即可，例如，其構成可為積層有背面研磨膠帶與熱剝離性黏接層210者。又，保護膜10亦可作為對半導體晶圓1分片化時的保護構件之用，亦有使該保護膜10在面內方向擴張之情形，亦有因為硬化半導體封裝用樹脂組成物40而有加熱情形。因此，保護膜10之較佳者，係兼具有某種程度之擴張性、能承受對半導體封裝用樹脂組成物40加熱以使硬化之耐熱性、以及避免使固定於保護膜10上之半導體晶片5發生脫離之黏接性。<Protective Film 10> Next, the protective film 10 is used to protect the circuit forming surface when the surface of the semiconductor wafer 1 opposite to the circuit forming surface is polished. The protective film 10 may be any material that can be adhered to the semiconductor wafer 1. For example, the protective film 10 may be formed by laminating a back grinding tape and a thermally peelable adhesive layer 210. In addition, the protective film 10 can also be used as a protective member when the semiconductor wafer 1 is diced, and the protective film 10 may be expanded in the in-plane direction, or because the resin composition 40 for semiconductor packaging is hardened. There is a heating situation. Therefore, it is preferable that the protective film 10 has a certain degree of expandability, can withstand the heat resistance of heating the resin composition 40 for semiconductor encapsulation to harden it, and avoid the semiconductor fixed on the protective film 10 The adhesion of the chip 5 is detached.

保護膜10係由背面研磨膠帶與熱剝離性黏接層210所構成。再者，在背面研磨膠帶與熱剝離性黏接層210之間，亦可設有離型膜50。藉此，能使背面研磨膠帶與熱剝離性黏接層210之間的剝離趨於容易。The protective film 10 is composed of a back grinding tape and a thermally peelable adhesive layer 210. Furthermore, a release film 50 may be provided between the back grinding tape and the thermally peelable adhesive layer 210. Thereby, peeling between the back grinding tape and the heat-peelable adhesive layer 210 can be facilitated.

使用之背面研磨膠帶（back grind tape）可列舉聚乙烯、聚丙烯等之聚烯烴、乙烯-醋酸乙烯酯共聚物、聚酯、聚醯亞胺、聚對苯二甲酸乙二酯、聚氯乙烯、聚醯胺、聚氨酯等所製作之耐熱性或耐藥品性良好的膜。背面研磨膠帶的厚度，通常以30～500μm為佳。The back grind tape used includes polyolefins such as polyethylene and polypropylene, ethylene-vinyl acetate copolymer, polyester, polyimide, polyethylene terephthalate, and polyvinyl chloride. , Polyamide, polyurethane and other films with good heat resistance or chemical resistance. The thickness of the back grinding tape is usually 30 to 500 μm.

〈離型膜50〉 接著，本實施形態之離型膜50，只要其構成係具有良好離型性者即可，例如，包含聚酯樹脂材料之離型層為較佳。<Release Film 50> Next, the release film 50 of the present embodiment may be any one as long as its configuration has good release properties. For example, a release layer containing a polyester resin material is preferable.

本實施形態之離型膜50，具有包含聚酯樹脂材料之離型層（第1離型層）。The release film 50 of this embodiment has a release layer (first release layer) containing a polyester resin material.

本實施形態之離型膜50中的離型層係指，至少係在將該離型膜50配置於對象物之上時，用以形成與對象物之接觸面（以下亦稱「離型面」）之樹脂層；聚酯樹脂係指，多價羧酸（二羧酸）與多元醇（二元醇）之聚縮物，為具有複數個羧基（－COOH）之化合物。The release layer in the release film 50 of this embodiment means that, at least when the release film 50 is disposed on the object, it is used to form a contact surface with the object (hereinafter also referred to as "release surface" ") resin layer; polyester resin refers to the polycondensate of polyvalent carboxylic acid (dicarboxylic acid) and polyol (glycol), which is a compound with a plurality of carboxyl groups (-COOH).

又，本實施形態中之聚酯樹脂材料的具體示例為，聚對苯二甲酸乙二酯樹脂、聚對苯二甲酸丁二酯樹脂、聚對苯二甲酸丙二酯樹脂、聚對苯二甲酸己二酯樹脂等之聚對苯二甲酸亞烷基酯樹脂（polyalkylene terephthalate）。其中以使用聚對苯二甲酸丁二酯樹脂為較佳。In addition, specific examples of the polyester resin material in this embodiment are polyethylene terephthalate resin, polybutylene terephthalate resin, polytrimethylene terephthalate resin, and poly terephthalate Polyalkylene terephthalate resin such as hexamethylene formate resin. Among them, it is preferable to use polybutylene terephthalate resin.

本實施形態之離型膜50，可形成為單層構造，亦可形成為多層構造。The release film 50 of this embodiment may be formed into a single-layer structure or a multilayer structure.

以上，雖已陳述本發明之實施形態，但其等為本發明之示例，亦可採用上述以外之各種構成。 又，在上述實施形態中，在封裝半導體晶片5時所舉之說明例，係使用顆粒狀之半導體封裝用樹脂組成物40以進行壓縮成形之情形時，但亦可將液狀之半導體封裝用樹脂組成物40，藉由旋塗法、印刷法、調劑法（dispense）而塗布至半導體晶片5中與電路形成面成為反向側之面後，然後使其乾燥；亦可利用毛細管現象，使液狀之半導體封裝用樹脂組成物40流入相鄰的半導體晶片5間的間隙。Although the embodiments of the present invention have been described above, they are examples of the present invention, and various configurations other than the above can also be adopted. In addition, in the above embodiment, the illustrative example given when packaging the semiconductor wafer 5 is the case of using the granular semiconductor packaging resin composition 40 for compression molding, but liquid semiconductor packaging may also be used. The resin composition 40 is applied to the semiconductor wafer 5 by the spin coating method, the printing method, and the dispensing method (dispense) and the circuit forming surface becomes the opposite side surface, and then it is dried; the capillary phenomenon can also be used to make The liquid resin composition 40 for semiconductor encapsulation flows into the gap between adjacent semiconductor wafers 5.

又，在上述實施形態中，在封裝半導體晶片5時所舉之說明例，係使用顆粒狀之半導體封裝用樹脂組成物40以進行壓縮成形時，但亦可使用被加工成片狀之半導體封裝用樹脂組成物40，藉以下之方法進行壓縮成形。In addition, in the above embodiment, the illustrative example given when packaging the semiconductor wafer 5 is when the pellet-shaped semiconductor packaging resin composition 40 is used for compression molding, but a semiconductor package processed into a sheet shape may also be used The resin composition 40 is compression-molded by the following method.

將貼附著轉印構件30之半導體晶片5，藉由夾持、吸附之類的固定手段而固定於壓縮成形模具之上型與下型的一方。在以下所舉之說明例，係將半導體晶片5固定於壓縮成型模具的上型，而將與電路形成面成為反向側之面，面向於樹脂材料供應容器。The semiconductor wafer 5 to which the transfer member 30 is attached is fixed to one of the upper and lower types of the compression molding die by fixing means such as clamping and suction. In the following illustrative example, the semiconductor wafer 5 is fixed to the upper mold of the compression molding die, and the surface opposite to the circuit forming surface faces the resin material supply container.

接著，將片狀之半導體封裝用樹脂組成物40配置於模具之下型空腔內，以使其位置與固定於模具之上型之半導體晶片5相對應。繼而，在減壓下，縮小模具之上型與下型的間隔，以使片狀之半導體封裝用樹脂組成物40在下型空腔內被加熱成既定溫度，而成溶融狀態。之後，使模具之上型與下型結合，以將溶融狀態之半導體封裝用樹脂組成物40抵接至固定於上型之半導體晶片5。藉此方式，可將溶融狀態之半導體封裝用樹脂組成物40埋填至在相鄰之半導體晶片5間所形成之間隙，且，可使半導體晶片5之電路形成面、其反向側之面、以及側面，被溶融狀態之半導體封裝用樹脂組成物40所覆蓋。之後，邊保持模具之上型與下型之結合狀態，邊使半導體封裝用樹脂組成物40之硬化作業達既定時間。藉此方式，能在未留下未充填部分的情況下，將半導體封裝用樹脂組成物40良好的充填至形成於相鄰之半導體晶片5間之間隙。Next, the sheet-like resin composition for semiconductor encapsulation 40 is disposed in the cavity below the mold so that its position corresponds to the semiconductor wafer 5 fixed above the mold. Then, under reduced pressure, the gap between the upper mold and the lower mold is reduced so that the sheet-like semiconductor encapsulating resin composition 40 is heated to a predetermined temperature in the lower mold cavity to become a molten state. After that, the upper mold and the lower mold of the mold are combined to contact the molten resin composition 40 for semiconductor encapsulation to the semiconductor wafer 5 fixed to the upper mold. In this way, the resin composition 40 for the semiconductor package in the molten state can be buried in the gap formed between the adjacent semiconductor wafers 5, and the circuit formation surface of the semiconductor wafer 5 and the surface on the opposite side can be made And, the side is covered with the resin composition 40 for the semiconductor package in the molten state. After that, while maintaining the combined state of the upper mold and the lower mold of the mold, the curing operation of the resin composition 40 for semiconductor packaging is performed for a predetermined time. In this way, the resin composition 40 for semiconductor encapsulation can be well filled into the gap formed between adjacent semiconductor wafers 5 without leaving unfilled portions.

又，被加工成片狀之半導體封裝用樹脂組成物40，能以例如以下之方式進行貼合。 首先，將已被製備成滾輪形狀之片狀的半導體封裝用樹脂組成物40，安裝在真空加壓式貼合機之捲出裝置，而接連至捲取裝置。接著，將已形成第1金屬圖案50之底層基板10搬送至隔膜（彈性膜）式貼合部。接著，在減壓下開始加壓後，使片狀之半導體封裝用樹脂組成物40被加熱成既定溫度，成為溶融狀態，之後，將溶融狀態之半導體封裝用樹脂組成物40透過隔膜進行加壓，以使抵接於半導體晶片5，而能將溶融狀態之半導體封裝用樹脂組成物40，埋入相鄰之半導體晶片5間所形成之間隙，且，可使半導體晶片5之電路形成面、天井面、及側面，被溶融狀態之半導體封裝用樹脂組成物40所覆蓋。之後，使得用以形成有機樹脂膜之樹脂組成物，硬化達既定時間。藉此方式，能在未留下未充填部分的情況下，將半導體封裝用樹脂組成物40良好的充填至形成於相鄰之半導體晶片5間之間隙。 再者，對於半導體封裝用樹脂組成物40有要求更高精度之平坦性時，亦可在隔膜式貼合機所進行之加壓後，藉由已被調整為高精度之平坦化加壓裝置來追加加壓步驟，以使成型。In addition, the resin composition 40 for semiconductor encapsulation processed into a sheet shape can be bonded as follows, for example. First, the sheet-shaped resin composition for semiconductor encapsulation 40 that has been prepared in the shape of a roller is mounted on the unwinding device of a vacuum pressure bonding machine and connected to the take-up device. Next, the base substrate 10 on which the first metal pattern 50 has been formed is transferred to the diaphragm (elastic film) type bonding portion. Next, after the pressurization is started under reduced pressure, the sheet-like semiconductor encapsulating resin composition 40 is heated to a predetermined temperature to be in a molten state, and thereafter, the molten semiconductor encapsulating resin composition 40 is pressed through the separator to pressurize In order to make contact with the semiconductor wafer 5, the resin composition 40 for the semiconductor package in the molten state can be buried in the gap formed between the adjacent semiconductor wafers 5, and the circuit forming surface of the semiconductor wafer 5 can be made The patio surface and the side surfaces are covered with the resin composition 40 for melting semiconductor packages. After that, the resin composition used to form the organic resin film is cured for a predetermined time. In this way, the resin composition 40 for semiconductor encapsulation can be well filled into the gap formed between adjacent semiconductor wafers 5 without leaving unfilled portions. In addition, when higher precision flatness is required for the resin composition 40 for semiconductor packaging, the flattening and pressing device that has been adjusted to high precision may be used after the pressing by the diaphragm bonding machine To add a pressurization step to make the molding.

又，在封裝半導體晶片5時，亦可使用已被加工成錠狀之半導體封裝用樹脂組成物40，藉以下之方法來進行轉注成形。In addition, when packaging the semiconductor wafer 5, the resin composition 40 for semiconductor packaging that has been processed into an ingot shape may be used to perform transfer molding by the following method.

首先，備有已設置半導體晶片5之成形模具。此處所準備之成形模具，其中設置有：熔罐（pod），用以置入錠狀之半導體封裝用樹脂組成物40；柱塞，其具有輔助撞鎚以供插入熔罐而進行施壓以溶融半導體封裝用樹脂組成物40；及澆口，用以將溶融之半導體封裝用樹脂組成物40送入成形空間內。First, a molding die in which the semiconductor wafer 5 has been installed is prepared. The forming mold prepared here is provided with: a pod for placing the ingot-shaped resin composition 40 for semiconductor encapsulation; a plunger with an auxiliary ram for inserting the molten pot to apply pressure The molten resin packaging resin composition 40; and the gate for feeding the molten semiconductor packaging resin composition 40 into the molding space.

接著，在成型模具已關閉之狀態下，將錠狀之半導體封裝用樹脂組成物40送入熔罐內。此處，被送入熔罐內之半導體封裝用樹脂組成物40的形態，可為先被預加熱器等所加熱以成半溶融狀態者。繼而，為了使已送入熔罐內之半導體封裝用樹脂組成物40溶融，將具備輔助撞鎚之柱塞插入熔罐，以對半導體封裝用樹脂組成物40施加壓力。之後，將溶融之半導體封裝用樹脂組成物40透過澆口而導入成形空間內。接著，使得被充填至成形空間內之半導體封裝用樹脂組成物40，經過加熱加壓而硬化。在半導體封裝用樹脂組成物40已硬化後，打開成型模具，藉此而形成之半導體晶片5，已由溶融狀態之半導體封裝用樹脂組成物40埋入形成於相鄰之半導體晶片5間之間隙，且，半導體晶片5之電路形成面、其反向側之面、及側面，被半導體封裝用樹脂組成物40所覆蓋。Next, in a state where the molding die is closed, the ingot-shaped resin composition 40 for semiconductor encapsulation is sent into the melting pot. Here, the form of the resin composition for semiconductor encapsulation 40 that is fed into the melting pot may be one that is first heated by a pre-heater or the like to be in a semi-melted state. Next, in order to melt the resin composition 40 for semiconductor packaging that has been fed into the can, a plunger equipped with an auxiliary hammer is inserted into the can to apply pressure to the resin composition 40 for semiconductor packaging. After that, the melted resin composition 40 for semiconductor encapsulation is introduced into the molding space through the gate. Next, the resin composition 40 for semiconductor encapsulation filled in the molding space is cured by heating and pressing. After the resin composition 40 for semiconductor packaging has hardened, the molding die is opened, and the semiconductor wafer 5 formed thereby is buried in the gap formed between the adjacent semiconductor wafers 5 by the resin composition 40 for semiconductor packaging in a molten state And, the circuit formation surface of the semiconductor wafer 5, the surface on the opposite side, and the side surface are covered with the resin composition 40 for semiconductor packaging.

此申請案，係以2015年8月12日提出之日本申請案特願2015-159389號為基礎而主張優先權，在此援引其揭示之全部內容。This application claims priority on the basis of Japanese application No. 2015-159389 filed on August 12, 2015, and the entire contents of the disclosure are cited here.

1‧‧‧半導體晶圓 2‧‧‧焊接凸塊 5‧‧‧半導體晶片 7‧‧‧構造體 8‧‧‧半導體裝置 10‧‧‧保護膜 20‧‧‧第1黏接構件（切片黏合膜） 30‧‧‧第2黏接構件（轉印構件） 40‧‧‧封裝材 50‧‧‧離型膜 100‧‧‧切口 200‧‧‧基材層 210‧‧‧熱剝離性黏接層1‧‧‧Semiconductor wafer 2‧‧‧Solder bump 5‧‧‧Semiconductor chip 7‧‧‧Structure 8‧‧‧Semiconductor device 10‧‧‧Protection film 20‧‧‧The first bonding member (slice adhesive film) 30‧‧‧Second adhesion member (transfer member) 40‧‧‧Packaging materials 50‧‧‧release film 100‧‧‧cut 200‧‧‧Base layer 210‧‧‧ Hot peeling adhesive layer

上述之目的及其他之目的、特徵、及特點，可由下述之較佳實施形態及附圖而進一步明瞭。The above objects and other objects, features, and characteristics will be further clarified by the following preferred embodiments and drawings.

［圖1］係本實施形態之半導體裝置之一例之截面圖。 ［圖2］（a）～（f）係用以說明本實施形態之半導體裝置之製造方法之一示例之圖。 ［圖3］（a）～（e）係用以說明本實施形態之半導體裝置之製造方法之一示例之圖。 ［圖4］（a）～（f）係用以說明本實施形態之半導體裝置之製造方法之一示例之圖。[FIG. 1] A cross-sectional view of an example of a semiconductor device of this embodiment. [Fig. 2] (a) to (f) are diagrams for explaining an example of a method of manufacturing a semiconductor device of this embodiment. [FIG. 3] (a) to (e) are diagrams for explaining an example of a method of manufacturing a semiconductor device of this embodiment. [FIG. 4] (a) to (f) are diagrams for explaining an example of a method of manufacturing a semiconductor device of this embodiment.

2‧‧‧焊接凸塊 2‧‧‧Solder bump

5‧‧‧半導體晶片 5‧‧‧Semiconductor chip

7‧‧‧構造體 7‧‧‧Structure

20‧‧‧第1黏接構件(切片黏合膜) 20‧‧‧The first adhesive member (slice adhesive film)

30‧‧‧第2黏接構件(轉印構件) 30‧‧‧Second adhesion member (transfer member)

40‧‧‧封裝材 40‧‧‧Packaging materials

50‧‧‧離型膜 50‧‧‧release film

200‧‧‧支持基材 200‧‧‧Support substrate

210‧‧‧熱剝離性黏接層 210‧‧‧ Hot peeling adhesive layer

Claims (5)

一種半導體裝置之製造方法，包含以下步驟：在半導體晶圓中，於設有焊接凸塊之電路形成面的反向側之面貼附著第1黏接構件之狀態下，沿著該半導體晶圓之切割區域，對於該半導體晶圓之電路形成面形成複數個具有既定寬度之切口之步驟；在將該第1黏接構件貼附於已形成該切口之該半導體晶圓的狀態下，將第2黏接構件貼附於該半導體晶圓之電路形成面之步驟；在將該第2黏接構件貼附於該半導體晶圓之電路形成面的狀態下，將該第1黏接構件予以剝離之步驟；在貼附著該第2黏接構件之狀態下，對於該半導體晶圓之電路形成面的反向側之面，沿著該半導體晶圓之切割區域，從該半導體晶圓之電路形成面的反向側之面進行研磨，對該半導體晶圓進行分片化，藉以準備下述構造體之步驟，該構造體：具備該第2黏接構件、及貼附於該第2黏接構件之黏接面之複數個半導體晶片，且將複數個該半導體晶片以彼此隔開既定間隙之方式而配置，並將設於複數個該半導體晶片的電路形成面之焊接凸塊的一部分，貼附於該第2黏接構件之黏接面，而使該電路形成面外露；使流動狀態之半導體封裝用樹脂組成物接觸於複數個該半導體晶片，將該半導體封裝用樹脂組成物充填於該間隙，且將該半導體晶片中之電路形成面、及該電路形成面的反向側之面、與側面，藉由該半導體封裝用樹脂組成物予以覆蓋封裝之步驟；及使該半導體封裝用樹脂組成物硬化之步驟。 A method for manufacturing a semiconductor device, comprising the steps of: attaching a first adhesive member to a surface of a semiconductor wafer opposite to a circuit forming surface provided with solder bumps, along the semiconductor wafer The cutting area, a step of forming a plurality of cuts having a predetermined width on the circuit forming surface of the semiconductor wafer; in a state where the first bonding member is attached to the semiconductor wafer that has formed the cut, the first 2 Step of attaching the adhesive member to the circuit forming surface of the semiconductor wafer; peeling off the first adhesive member in a state where the second adhesive member is attached to the circuit forming surface of the semiconductor wafer The step of forming the circuit from the semiconductor wafer along the cutting area of the semiconductor wafer on the side opposite to the circuit forming surface of the semiconductor wafer with the second adhesive member attached The surface on the opposite side of the surface is polished, and the semiconductor wafer is divided into pieces to prepare a step of constructing the structure including the second bonding member and attaching to the second bonding A plurality of semiconductor wafers on the bonding surface of the component, and the plurality of semiconductor wafers are arranged with a predetermined gap apart from each other, and part of the solder bumps provided on the circuit forming surfaces of the plurality of semiconductor wafers are pasted Attached to the bonding surface of the second bonding member to expose the circuit forming surface; contacting the resin composition for semiconductor packaging in a flowing state to a plurality of the semiconductor wafers, and filling the resin composition for semiconductor packaging in the A gap, and the step of covering and packaging the circuit forming surface in the semiconductor wafer, and the opposite side and side surfaces of the circuit forming surface with the semiconductor encapsulating resin composition; and making the semiconductor encapsulating resin The step of hardening the composition. 如申請專利範圍第1項之半導體裝置之製造方法，其中，在形成該複數個切口之步驟中，該切口之寬度係30μm以上300μm以下。 As in the method of manufacturing a semiconductor device according to item 1 of the patent application range, in the step of forming the plurality of cuts, the width of the cut is 30 μm or more and 300 μm or less. 如申請專利範圍第1項之半導體裝置之製造方法，其中，該第2黏接構件在表面具有熱剝離性黏接層。 As in the method of manufacturing a semiconductor device according to item 1 of the patent application, the second adhesive member has a thermally peelable adhesive layer on the surface. 如申請專利範圍第3項之半導體裝置之製造方法，其中該構造體，係將該焊接凸塊的一部分埋設於該熱剝離性黏接層。 As in the method of manufacturing a semiconductor device according to item 3 of the patent application, in the structure, a part of the solder bump is buried in the thermally peelable adhesive layer. 如申請專利範圍第1至4項中任一項之半導體裝置之製造方法，其中更包含，將充填於該間隙之半導體封裝用樹脂組成物之硬化體予以切斷，以對於被該半導體封裝用樹脂組成物所封裝之複數個半導體晶片實施分片化之步驟。 The method for manufacturing a semiconductor device according to any one of the patent application items 1 to 4 further includes cutting the hardened body of the resin composition for semiconductor encapsulation filled in the gap to prevent the semiconductor package from being used. A plurality of semiconductor wafers encapsulated in the resin composition are subjected to a step of slicing.
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