TWI690046B - Semiconductor device and its manufacturing method - Google Patents
Semiconductor device and its manufacturing method Download PDFInfo
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
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- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Dicing (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
本發明提供了一種確保無引腳式的半導體裝置的引腳部的可焊性的半導體裝置及其製造方法。DFN具有:半導體晶片;管芯焊盤;複數個引腳部,其配置在上述管芯焊盤的周圍,並且在各個引腳部的前端部形成有缺口部;複數個引線,其將上述半導體晶片的表面電極與複數個引腳部中的某個引腳部電性連接:樹脂製的密封體,其將上述半導體晶片以及複數個引腳部中的每一個引腳部的一部分覆蓋。而且,複數個引腳部中的每一個具有在密封體的背面露出的端子部,缺口部在沿著複數個引腳部的排列方向的方向上的寬度比端子部在沿著排列方向的方向上的寬度小。The present invention provides a semiconductor device that ensures solderability of the lead portion of a leadless semiconductor device and a method of manufacturing the same. The DFN has: a semiconductor wafer; a die pad; a plurality of lead portions arranged around the die pad, and a notch portion is formed at the front end portion of each lead portion; a plurality of leads, which connect the semiconductor The surface electrode of the wafer is electrically connected to one of the plurality of lead portions: a resin-made sealing body that covers the semiconductor wafer and a part of each of the plurality of lead portions. Moreover, each of the plurality of lead portions has a terminal portion exposed on the back surface of the sealing body, and the width of the notch portion in the direction along the arrangement direction of the plurality of lead portions is larger than the direction of the terminal portion in the arrangement direction The width on the top is small.
Description
本發明涉及一種例如無引腳式(Leadless Type)的半導體裝置及其製造技術。The present invention relates to, for example, a leadless type semiconductor device and its manufacturing technology.
公知有被稱為MAP(模製陣列封裝:Mold Array Package)的半導體裝置的製造方法,該方法使用密封體將複數個器件區域統一覆蓋,針對每個密封體進行切割(封裝切割:Package Dicing)而單片化。A method for manufacturing a semiconductor device called MAP (Mold Array Package) is known. This method uses a sealing body to uniformly cover a plurality of device regions, and performs cutting for each sealing body (Package Dicing) And monolithic.
作為MAP製造方法,例如美國專利第8017447號說明書(專利文獻1)公開有如下技術:對與相鄰結構相連接且形成有連接棒的引腳框架(Lead Frame)進行二次注塑(Overmold)成型,對形成有連接棒的槽上照射雷射而除去將槽填滿的成型材料。As a MAP manufacturing method, for example, US Patent No. 8017447 (Patent Document 1) discloses the following technique: Overmold molding of a lead frame (Lead Frame) connected to an adjacent structure and formed with a connecting rod The laser beam is irradiated to the groove where the connecting rod is formed to remove the molding material that fills the groove.
另外,例如JP特開2013-143445號公報(專利文獻2)中公開有如下技術:對從密封半導體晶片的密封體的下表面露出的引腳照射雷射,從而與由引腳的第一厚度構成的部分的側面相鄰地形成槽,並使側面和部分的下表面從密封體露出。In addition, for example, Japanese Patent Laid-Open No. 2013-143445 (Patent Document 2) discloses a technique of irradiating a lead exposed from the lower surface of a sealing body that seals a semiconductor wafer with A groove is formed adjacent to the side surface of the constructed part, and the side surface and the lower surface of the part are exposed from the sealing body.
現有技術文獻Existing technical literature
專利文獻Patent Literature
專利文獻1:美國專利第8017447號說明書;Patent Literature 1: Specification of US Patent No. 8017447;
專利文獻2:JP特開2013-143445號公報。Patent Document 2: JP-A-2013-143445.
無引腳封裝由於是利用劃片機(Dicing Saw)將引腳端子和塑封化合物(Mold Compound)切斷而單片化,因此雖然引腳端子的下表面由焊錫浸潤性材料覆蓋,但是引腳端子的側面並未由焊錫浸潤性材料覆蓋,在利用焊錫材料對安裝基板進行熱安裝之際,側面引腳的外部下端的連接可靠性差,另外,焊錫接合部的目視檢查也困難。The leadless package is divided into single pieces using a dicing saw (Dicing Saw) to cut the lead terminal and the mold compound. Therefore, although the lower surface of the lead terminal is covered with solder-wetting material, the lead The side of the terminal is not covered with solder-wetting material. When the mounting substrate is thermally mounted with solder material, the connection reliability of the outer lower end of the side pin is poor, and visual inspection of the solder joint is also difficult.
即,在利用塑封化合物二次注塑側面引腳的外部下端部分(在引腳框架的連接條形成高低差)之後,僅透過利用雷射將塑封化合物除去,並不能將塑封化合物完全除去,以後的焊錫浸潤性材料的覆蓋變得不均勻,難以確保可焊性。That is, after overmolding the outer lower end portion of the side pin with the molding compound (forming a height difference in the connection bar of the lead frame), the molding compound can not be completely removed only by using a laser to remove the molding compound. The coverage of the solder-wetting material becomes uneven, making it difficult to ensure solderability.
另外,當使用雷射將塑封化合物除去時,由於雷射對側面引腳的外部下端部分(在引腳框架的連接條形成高低差)的周邊過度照射,因此在端子的兩個側面上產生模製樹脂的空化部分,這可能使耐濕性變差。In addition, when the molding compound is removed using a laser, the laser is excessively irradiated to the periphery of the outer lower end portion of the side pin (a height difference is formed on the connection bar of the lead frame), so molds are generated on both sides of the terminal The cavitation part of the resin may make the moisture resistance worse.
本發明的目的在於提供一種能夠確保半導體裝置的引腳部的可焊性的技術。An object of the present invention is to provide a technique capable of ensuring solderability of a lead portion of a semiconductor device.
本發明的所述的目的和新的特徵可根據本申請文件的記述以及所附附圖來明確。The objects and new features of the present invention can be made clear from the description of the application file and the accompanying drawings.
針對本申請中公開的實施方式之中的代表性的例子的概要簡單說明如下。A brief description of representative examples among the embodiments disclosed in the present application is as follows.
基於一個實施方式的半導體裝置,具有:半導體晶片;晶片裝載部,其裝載有半導體晶片;複數個引腳部,其配置在晶片裝載部的周圍,且在各個引腳部的晶片裝載部側的相反側的前端部形成有缺口部。還具有:複數個導電性部件,其將半導體晶片的表面電極與該些個引腳部的其中之一電性連接;樹脂製的密封體,其將半導體晶片、該些個導電性部件以及該些個引腳部中的每一個引腳部的一部分覆蓋。而且,該些個引腳部的每一個具有在密封體的背面露出的端子部,缺口部在沿著該些個引腳部的排列方向的方向上的寬度比端子部在沿著排列方向的方向上的寬度小。A semiconductor device according to an embodiment includes: a semiconductor wafer; a wafer loading portion on which a semiconductor wafer is loaded; and a plurality of lead portions arranged around the wafer loading portion and on the wafer loading portion side of each lead portion A notch is formed on the front end of the opposite side. It also has: a plurality of conductive members that electrically connect the surface electrode of the semiconductor wafer to one of the pins; a resin-made sealing body that connects the semiconductor wafer, the conductive members, and the A part of each of the pin parts is covered. Moreover, each of the pin portions has a terminal portion exposed on the back surface of the sealing body, and the width of the notch portion in the direction along the arrangement direction of the pin portions is larger than that of the terminal portion in the arrangement direction The width in the direction is small.
另外,基於一個實施方式的半導體裝置的製造方法,具有以下的工序。(a)在引腳框架的複數個器件形成區域中的每一個器件形成區域的晶片裝載部裝載半導體晶片的工序,其中引腳框架具有該些個器件形成區域和橫跨相鄰的器件形成區域而配置的連接條;(b)透過導電性部件將複數個半導體晶片中的每一個半導體晶片的表面電極與相連於連接條的該些個引腳部的每一個引腳部電性連接的工序。還具有:(c)形成將引腳框架的該些個器件形成區域、連接條以及該些個半導體晶片統一覆蓋的樹脂製的統一密封體的工序;(d)將在連接條的凹狀的高低差部中填充的樹脂除去的工序;(e)在連接條的高低差部將連接條切斷而進行單片化的工序。在此,所述(d)工序包括:對高低差部的樹脂照射雷射的(d1)工序;在所述(d1)工序後,實施水沖處理或液體研磨處理而將在高低差部填充的樹脂除去的(d2)工序。而且,在所述(d1)工序中,以在第一方向上,使得對高低差部的樹脂照射雷射的照射寬度比與高低差部一體形成的端子部的寬度窄的方式照射雷射,其中第一方向是該些個引腳部的排列方向。In addition, the method for manufacturing a semiconductor device according to an embodiment includes the following steps. (A) The process of loading a semiconductor wafer in the wafer loading portion of each of the device forming regions of the lead frame, where the lead frame has the device forming regions and the adjacent device forming regions A connecting strip; (b) a process of electrically connecting the surface electrode of each of the plurality of semiconductor wafers to each of the pin portions connected to the connecting strip through a conductive member . It also includes: (c) a process of forming a resin-made unified sealing body that uniformly covers the device forming regions of the lead frame, the connection strip, and the semiconductor wafers; (d) the concave shape of the connection strip The step of removing the resin filled in the stepped portion; (e) the step of cutting the connecting bar at the stepped portion of the connecting bar to form a single piece. Here, the step (d) includes: a step (d1) of irradiating laser on the resin at the level difference portion; after the step (d1), performing water flushing treatment or liquid polishing treatment to fill the level difference portion (D2) step of resin removal. Furthermore, in the step (d1), the laser is irradiated in the first direction so that the irradiation width of the resin irradiating the laser on the step portion is narrower than the width of the terminal portion formed integrally with the step portion, The first direction is the arrangement direction of the pin portions.
對本申請中公開的發明之中,透過代表性的發明而得到的效果簡單說明該如下。Among the inventions disclosed in this application, the effects obtained by the representative inventions are briefly explained as follows.
在注塑後,對在引腳框架的連接條的高低差部填充的樹脂照射雷射,進而進行水沖處理或液體研磨處理,從而能夠將高低差部的樹脂除去。由此,能夠確保半導體裝置的引腳部的可焊性。另外,透過對高低差部的樹脂照射雷射的照射寬度比端子部的寬度窄的方式照射雷射,能夠防止在引腳部的缺口部的兩側面產生樹脂的空化部分,能夠提高半導體裝置的品質以及可靠性。After injection molding, the resin filled in the level difference portion of the lead frame connection bar is irradiated with laser, and then water flushing treatment or liquid polishing treatment is performed, so that the resin in the level difference portion can be removed. Thereby, the solderability of the lead portion of the semiconductor device can be ensured. In addition, by irradiating the laser so that the irradiation width of the laser irradiating the resin at the level difference portion is narrower than the width of the terminal portion, it is possible to prevent the occurrence of cavitation of the resin on both side surfaces of the notch portion of the lead portion, and to improve the semiconductor device Quality and reliability.
圖1繪示本發明實施方式的半導體裝置的安裝面側的結構的一個例子的立體圖,圖2是繪示圖1的A部的結構的放大局部立體圖。FIG. 1 is a perspective view showing an example of a structure on a mounting surface side of a semiconductor device according to an embodiment of the present invention, and FIG. 2 is an enlarged partial perspective view showing a structure of part A of FIG. 1.
<半導體裝置><Semiconductor device>
圖1所示的本實施方式的半導體裝置,是利用在組裝中透過封裝切割而單片化的所謂的MAP方法來組裝的無引腳封裝。本實施方式中,作為利用上述MAP方法而組裝的無引腳封裝的一個例子,採用DFN6(雙邊扁平無引腳:Dual-Flat No-leads)進行說明。DFN6是如下的半導體封裝:沿著樹脂製的密封體4的相對的兩個側面4ca中的每一個配置複數個引腳部2a,各引腳部2a的端子部2b被配置在密封體4作為安裝面的背面4b上。The semiconductor device of the present embodiment shown in FIG. 1 is a leadless package assembled by a so-called MAP method that is singulated by package cutting during assembly. In this embodiment, DFN6 (Dual-Flat No-leads) is used as an example of a leadless package assembled by the MAP method described above. The DFN 6 is a semiconductor package in which a plurality of
對DFN6的詳細結構進行說明,DFN6具有:半導體晶片1,其在後述的圖3所示那樣的主面1a上形成有複數個焊盤1c(bonding pad)(表面電極、電極焊盤、鍵合電極);管芯焊盤2e,其是裝載半導體晶片1的晶片裝載部;複數個引腳部2a,被配置在管芯焊盤2e的周圍。還具有:複數個引線3(導電性部件),將半導體晶片1的焊盤1c與複數個引腳部2a之中的某個引腳部2a電性連接引線3(導電性部件);樹脂製的密封體4,覆蓋半導體晶片1、複數個引線3以及複數個引腳部2a中的每一個的一部分。The detailed structure of the DFN6 will be described. The DFN6 has a
DFN6是從半導體晶片1產生大量熱量的類型的半導體封裝。因此構成為如下結構:管芯焊盤2e的下表面2eb露出在密封體4的背面4b,並從管芯焊盤2e的下表面2eb放出(或者傳導出)來自半導體晶片1的熱量。如後述的圖3所示,半導體晶片1經由管芯接合材料5裝載在管芯焊盤2e的上表面2ea上。換而言之,半導體晶片1的背面1b經由管芯接合材料5固定在管芯焊盤2e的上表面2ea上。The DFN 6 is a type of semiconductor package that generates a large amount of heat from the
另外,DFN6的密封體4具有:作為安裝面的背面4b和背面4b的相反側的面的上表面4a(參照後述的圖3);還具有位於背面4b與上表面4a之間的四個側面4c。複數個引腳部2a的側面2d露出在四個側面4c之中的相對的兩個側面4ca的每一個上。另一方面,支撐管芯焊盤2e的懸掛引腳(未圖示)的切斷面2ec露出在四個側面4c之中的相對的兩個側面4cb的每一個上。In addition, the sealing
在本實施方式的DFN6中,複數個引腳部2a的每一個具有在密封體4的背面4b露出的端子部2b。而且,在複數個引腳部2a的每一個上,在與管芯焊盤2e側相反一側的前端部分別形成有缺口部2c。缺口部2c是從密封體4的背面4b和側面4ca凹陷的部分,是配置在端子部2b與側面2d之間而且與端子部2b和側面2d相連的部分。In the DFN 6 of the present embodiment, each of the plurality of
如圖2所示,缺口部2c在沿著複數個引腳部2a的排列方向(第一方向)P的方向上的寬度L1比端子部2b沿著排列方向P的方向上的寬度L2小(L1<L2)。As shown in FIG. 2, the width L1 of the
詳細而言,在缺口部2c的排列方向P上的兩側部配置有樹脂突出部4d,樹脂突出部4d從端子部2b的排列方向P上的兩端部向內側伸出。由此,缺口部2c在沿著複數個引腳部2a的排列方向P的方向上的寬度L1比端子部2b在沿著排列方向P的方向上的寬度L2小(窄(L1<L2))。Specifically,
另外,設置在缺口部2c兩側的樹脂突出部4d之間的表面被金屬膜覆蓋。如後述的圖4所示,金屬膜是焊錫浸潤性膜7。即,焊錫浸潤性膜7是對焊錫的浸潤性良好的金屬膜,例如是由Sn、Pb-Sn、Sn-Bi或Sn-Ag-Cu等構成的鍍膜。In addition, the surfaces between the
另外,如圖1以及圖2所示,DFN6的複數個引腳部2a中的每一個都具有從密封體4的側面4ca露出且並未由上述金屬膜覆蓋的側面2d。由於側面2d是在後述的圖3所示的引腳框架2的連接條2g的高低差部2h形成上述金屬膜之後進行切斷而形成的面,因此沒有被上述金屬膜覆蓋。As shown in FIGS. 1 and 2, each of the plurality of
在此,半導體晶片1例如由Si或SiC等構成。Here, the
另外,複數個引腳部2a以及管芯焊盤2e例如由Cu合金或Fe-Ni合金等構成。In addition, the plurality of
另外,引線3例如由Au、Cu、Al或Ag等構成。In addition, the
另外,密封體4例如由熱固性的環氧類樹脂等構成。In addition, the
另外,管芯接合材料5由Ag焊膏、高熔點焊錫或燒結金屬等構成。The die
<半導體裝置的組裝><Assembly of semiconductor device>
圖3繪示圖1所示的半導體裝置的組裝順序的一個例子的流程圖,圖4繪示圖3的B部的結構的放大局部剖視圖。3 is a flowchart showing an example of the assembly procedure of the semiconductor device shown in FIG. 1, and FIG. 4 is an enlarged partial cross-sectional view of the structure of the portion B of FIG. 3.
另外,在本實施方式中,在半導體裝置(DFN6)的組裝的說明中,為了易於理解,僅使用設置有複數個器件區域2f之中的兩個器件區域2f進行說明。In addition, in the present embodiment, in the description of the assembly of the semiconductor device (DFN6), for ease of understanding, only two
1.準備引腳框架21. Prepare the
首先,準備圖3所示的引腳框架2。引腳框架2具有複數個器件區域2f和橫跨相鄰的器件區域2f而配置的連接條2g。器件區域2f是形成一個DFN6的區域,在各器件區域2f形成有能夠支撐半導體晶片1的作為晶片裝載部的管芯焊盤2e和配置在管芯焊盤2e的周圍的複數個引腳部2a。另外,複數個引腳部2a中的每一個與連接條2g相連。First, the
而且,在連接條2g形成有從引腳部2a的形成端子部2b的面側凹陷而成的高低差部2h。高低差部2h例如透過蝕刻加工等而形成。所以,高低差部2h的截面形狀構成為彎曲形狀(R形狀),凹陷的高低差部2h的部分橫跨相鄰的器件區域2f而配置。Further, the connecting
2.貼片(Chip Mounter)2. Chip (Chip Mounter)
在準備了引腳框架2之後,進行圖3的步驟S1所示的貼片。在此,在複數個器件區域2f中的每一個器件區域2f的管芯焊盤2e上裝載半導體晶片1。此時,在管芯焊盤2e的上表面2ea上經由管芯接合材料5(也稱為晶片貼裝(Die Attach)材料)裝載半導體晶片1。由此,半導體晶片1的背面1b經由管芯接合材料5固定在管芯焊盤2e的上表面2ea上。After the
3.線焊(Wire Bond)3. Wire Bond
貼片後,進行圖3的步驟S2所示的線焊。在此,複數個半導體晶片1中的每一個半導體晶片1的焊盤1c與相連於連接條2g的複數個引腳部2a之中的某個引腳部2a透過引線3(導電性部件、佈線材料)而電性連接。After the placement, the wire bonding shown in step S2 of FIG. 3 is performed. Here, the
4.二次注塑(Over Mold)4. Over Mold
焊線後,進行圖3的步驟S3所示的二次注塑。在此,形成樹脂製的統一密封體4e,其統一覆蓋引腳框架2的複數個器件區域2f、連接條2g的高低差部2h、複數個半導體晶片1以及複數個引線3。即,透過二次注塑,在凹狀的高低差部2h中也填充樹脂4ea(塑封化合物)(高低差部2h由樹脂4ea覆蓋)。另一方面,如圖3的步驟S3所示,以使得管芯焊盤2e的下表面2eb、連接條2g的端子部2b不被樹脂4ea(塑封化合物)覆蓋的方式進行二次注塑。After wire bonding, the second injection shown in step S3 of FIG. 3 is performed. Here, a
5.除去樹脂5. Remove resin
二次注塑後,進行圖3的步驟S4所示的樹脂除去。在此,除去填充在連接條2g的凹狀的高低差部2h中的樹脂4ea。具體而言,對填充在高低差部2h中的樹脂4ea照射後述的圖6所示的雷射8a而將樹脂4ea除去。After the second injection, the resin removal shown in step S4 of FIG. 3 is performed. Here, the resin 4ea filled in the
在此,對透過照射雷射進行的樹脂4ea的除去進行詳細說明。圖5繪示圖1所示的半導體裝置的組裝中在注塑後的連接條的高低差部的狀態的一個例子的局部立體圖,圖6繪示向圖5所示的高低差部照射雷射的狀態的一個例子的局部立體圖,圖7是繪示圖6所示的雷射照射時的掃描狀態的一個例子的局部立體圖。進一步,圖8繪示圖6所示的雷射照射時的照射寬度的一個例子的局部立體圖,圖9繪示比較例中的雷射照射後的密封體的空穴狀態的結構的局部立體圖。Here, the removal of the resin 4ea by irradiation laser will be described in detail. FIG. 5 is a partial perspective view showing an example of a state of the stepped portion of the connecting bar after injection molding in the assembly of the semiconductor device shown in FIG. 1, and FIG. 6 is a diagram illustrating laser irradiation to the stepped portion shown in FIG. 5 FIG. 7 is a partial perspective view illustrating an example of the scanning state during laser irradiation shown in FIG. 6. Further, FIG. 8 is a partial perspective view showing an example of the irradiation width during laser irradiation shown in FIG. 6, and FIG. 9 is a partial perspective view showing the structure of the cavity state of the sealing body after laser irradiation in the comparative example.
如圖5所示,透過二次注塑,樹脂4ea填充到連接條2g的高低差部2h中。因此,在本實施方式中,首先,如圖6所示,從雷射振盪部8對填充在高低差部2h中的樹脂4ea照射雷射8a以除去高低差部2h的樹脂4ea。As shown in FIG. 5, the resin 4ea is filled into the
此時,如圖7所示,以在與複數個引腳部2a(參照圖1)的每一個的排列方向(第一方向)P交叉的長度方向(第二方向)Q上,透過掃描方法照射圖6所示的雷射8a,以使雷射8a照到連接條2g的高低差部2h與端子部2b的邊界2i(即,端子部2b的邊緣部分)。也就是說,如雷射8a的圖7所示的照射軌跡8b那樣,對高低差部2h進行照射,並且以在長度方向Q上使得雷射8a照到高低差部2h與端子部2b的邊界2i的方式,在高低差部2h反覆照射雷射8a。另外,雷射8a對高低差部2h的照射的軌跡可以是沿著一個方向反覆照射的軌跡,也可以是往復照射的軌跡。由此,除了高低差部2h之外對端子部2b的邊緣部分也照射雷射8a,因此能夠將高低差部2h的樹脂4ea除去。At this time, as shown in FIG. 7, in the longitudinal direction (second direction) Q crossing the arrangement direction (first direction) P of each of the plurality of
而且,在本實施方式中,在照射雷射8a之際,如圖7以及圖8所示,是以在複數個引腳部2a的排列方向P上的對高低差部2h的樹脂4ea照射雷射8a的照射寬度L3,比與高低差部2h一體形成的端子部2b的寬度L2窄(L3<L2)的方式,利用掃描方法對樹脂4ea照射雷射8a。Furthermore, in this embodiment, when irradiating the
具體而言,在引腳部2a的長度方向Q上,透過掃描方法對高低差部2h的樹脂4ea反覆照射雷射8a。此時,進行控制以使得雷射8a不會照到圖7所示的R部所示的高低差部2h的兩側部,也就是說,使得雷射8a的軌跡為照射軌跡8b。即,控制雷射8a進行照射,使得雷射8a在排列方向P上的照射位置的端部為圖8所示的端子部2b的端部的延長線T1、T2的內側的部位。Specifically, in the longitudinal direction Q of the
換而言之,如圖6、圖8所示,控制雷射8a進行照射,使得複數個引腳部2a的排列方向P上的對高低差部2h的樹脂4ea照射雷射8a的照射寬度L3比端子部2b的寬度L2窄(L3<L2)。由此,在缺口部2c的兩側部形成比上述延長線T1、T2更向內側伸出的樹脂突出部4d。也就是說,照射雷射8a在高低差部2h的排列方向P上的兩側部,使得樹脂突出部4d比端子部2b的排列方向P上的兩端部更向內側伸出而形成。In other words, as shown in FIGS. 6 and 8, the
由此,缺口部2c(高低差部2h)在排列方向P上的開口的寬度L3比端子部2b在排列方向P上的寬度L2窄(小)。As a result, the width L3 of the opening in the arrangement direction P of the notched
其結果是,能夠防止產生如圖9的比較例所示那樣在引腳部2a的缺口部2c的兩側部形成的樹脂空化部分9。即,能夠避免在缺口部2c的兩側部產生的樹脂空化部分9。As a result, it is possible to prevent the occurrence of the
另外,優選控制雷射8a進行照射,以使得在圖8所示的缺口部2c(圖7的高低差部2h),使排列方向P上的雷射8a的照射寬度L3與排列方向P上的端子部2b的寬度L2的差的1/2(雷射8a的非照射寬度15)為期望的數值。作為一個例子,上述期望的數值是30μm左右。這例如是基於引腳框架2上的目標的蝕刻加工的實際交叉、雷射照射位置的偏差交叉、正裕度這三個要素的總和的大小,其中引腳框架2上的目標用於識別雷射照射時的位置。換而言之,透過控制上述期望的數值(雷射8a的非照射寬度15),能夠避免樹脂空化部分9,並且能夠確保高低差部2h(缺口部2c)的開口區域。In addition, it is preferable to control the irradiation of the
雷射照射後,進行水沖(Water Jet)處理或者液體研磨(Liquid Honing)處理。在此,圖10繪示圖6所示的雷射照射後的高低差部的殘留樹脂的狀態的一個例子的局部立體圖,圖11繪示透過水沖處理除去圖10所示的殘留樹脂的狀態的一個例子的局部立體圖,圖12繪示透過液體研磨處理除去圖10所示的殘留樹脂的狀態的一個例子的局部立體圖。After laser irradiation, water jet (Water Jet) treatment or liquid grinding (Liquid Honing) treatment is performed. Here, FIG. 10 illustrates a partial perspective view of an example of the state of the residual resin in the level difference portion after laser irradiation shown in FIG. 6, and FIG. 11 illustrates the state of removing the residual resin shown in FIG. 10 by water flushing. FIG. 12 is a partial perspective view of an example of a state in which the residual resin shown in FIG. 10 is removed by liquid polishing treatment.
當雷射8a對高低差部2h上的樹脂4ea的照射結束時,如圖10所示,在連接條2g的高低差部2h存在作為樹脂殘留的殘留樹脂4f。殘留樹脂4f是僅透過雷射照射沒有完全除去的樹脂的殘留。因此,實施水沖處理或者液體研磨處理中的任一種處理來除去高低差部2h的殘留樹脂4f。When the
在進行水沖處理的情況下,如圖11所示,從噴嘴10噴射液體10a,沖擊附著在高低差部2h上的作為對象物的殘留樹脂4f,由此,將殘留樹脂4f從高低差部2h除去。另一方面,在進行液體研磨處理的情況下,如圖12所示,從噴射槍11噴射漿液11a(Slurry),對附著在高低差部2h上的作為對象物的殘留樹脂4f進行噴吹,由此將殘留樹脂4f從高低差部2h除去。另外,高低差部2h處的殘留樹脂4f的除去在高低差部2h處,只要對有助於DFN安裝時的焊錫接合的有效尺寸的範圍進行即可。即,上述有效尺寸的範圍之外,即使存在殘留樹脂4f也是可以的。In the case of performing the water flushing process, as shown in FIG. 11, the liquid 10 a is ejected from the
本實施方式中,在二次注塑後的樹脂除去工序中,首先,對連接條2g的高低差部2h照射雷射8a,之後,透過進行水沖處理或液體研磨處理,能夠毫無殘留地除去填充或附著在高低差部2h上的樹脂4ea。In the present embodiment, in the resin removal step after overmolding, first, the
6.覆蓋金屬膜6. Covered with metal film
在除去樹脂後,進行圖3的步驟S5所示的金屬膜覆蓋。在此,在連接條2g的高低差部2h的所露出的面以及引腳部2a的端子部2b、以及管芯焊盤2e的下表面2eb覆蓋作為金屬膜的焊錫浸潤性膜7。焊錫浸潤性膜7是對焊錫浸潤性良好的金屬膜,例如是由Sn、Pb-Sn、Sn-Bi或者Sn-Ag-Cu等構成的鍍膜。After removing the resin, the metal film coating shown in step S5 of FIG. 3 is performed. Here, the exposed surface of the
7.單片化7. Monolithic
在覆蓋金屬膜後,進行圖3的步驟S6所示的單片化。在此,在連接條2g的高低差部2h處切斷連接條2g而單片化為各個DFN6。此時,使用劃片機14以比高低差部2h在與排列方向P交叉的長度方向Q(參照圖5)上的寬度小的寬度,切斷高低差部2h。即,使用寬度比連接條2g的高低差部2h在長度方向Q上的寬度小的劃片機14進行切斷及單片化。如圖4所示,使透過上述切斷而形成的位於複數個引腳部2a的每一個引腳部的側面2d與端子部2b之間的缺口部2c由焊錫浸潤性膜7覆蓋的面露出。也就是說,成為如下狀態:由焊錫浸潤性膜7覆蓋的缺口部2c配置在複數個引腳部2a的每一個引腳部的側面2d的下方側。After covering the metal film, singulation as shown in step S6 of FIG. 3 is performed. Here, the
透過以上工序,完成圖1所示的DFN6的製造。Through the above steps, the manufacture of DFN6 shown in FIG. 1 is completed.
<半導體裝置的安裝結構><Mounting structure of semiconductor device>
圖13繪示圖1所示的半導體裝置的安裝結構的端子部接合部分的一個例子的放大局部剖視圖。另外,圖13繪示了將圖1所示的DFN6安裝到安裝基板12的導體圖案12a上的結構中的端子部接合部分。即,安裝基板12的導體圖案12a與上述DFN6的引腳部2a透過焊錫13而電性連接。FIG. 13 is an enlarged partial cross-sectional view showing an example of a junction portion of a terminal portion of the mounting structure of the semiconductor device shown in FIG. 1. In addition, FIG. 13 illustrates a terminal portion joining portion in a structure in which the DFN 6 shown in FIG. 1 is mounted on the
另外,如圖13所示,在上述DFN6的引腳部2a形成與安裝面側的端子部2b相連且呈凹陷形狀的缺口部2c,在端子部2b和缺口部2c的各個的面上覆蓋著焊錫浸潤性膜7。由此,能夠提高焊錫13對引腳部2a的浸潤性。In addition, as shown in FIG. 13, the
特別是,透過在引腳部2a形成被焊錫浸潤性膜7覆蓋的缺口部2c,焊錫13能夠向上浸潤到引腳部2a的缺口部2c的上方,從而能夠形成高度高的焊錫13的角焊縫13a。In particular, by forming the
由此,能夠提高DFN6的安裝強度。Thereby, the mounting strength of DFN6 can be improved.
<效果><Effect>
根據本實施方式的DFN6的製造方法,透過在二次注塑後,對在引腳框架2的連接條2g的高低差部2h中填充的樹脂4ea照射雷射8a,進而進行水沖處理或液體研磨處理,從而能夠毫無殘留地除去高低差部2h的樹脂4ea。According to the method for manufacturing DFN6 of the present embodiment, after overmolding, the resin 4ea filled in the
由此,能夠在高低差部2h(缺口部2c)均勻地進行焊錫浸潤性膜7的覆蓋,能夠確保DFN6的引腳部2a的可焊性。This makes it possible to uniformly cover the solder-wetting
另外,透過雷射8a對引腳框架2的連接條2g的高低差部2h的樹脂4ea的照射寬度L3比端子部2b的寬度L2窄(L3<L2)的方式照射雷射8a,能夠防止在引腳部2a的缺口部2c的兩側面產生樹脂空化部分,能夠提高DFN6的品質以及可靠性。In addition, by irradiating the
另外,引腳框架2的連接條2g的高低差部2h的形成能夠透過蝕刻工藝容易地進行。In addition, the formation of the
另外,關於用於除去連接條2g的高低差部2h處的樹脂的雷射照射、水沖處理或液體研磨處理,可透過已知工藝容易地實施,不用特別引入新的工藝就能夠實施。In addition, laser irradiation, water flushing treatment, or liquid polishing treatment for removing the resin at the
另外,關於對引腳部2a的缺口部2c的兩側部的內側的範圍照射雷射8a的方法,也能夠透過基於掃描方法的已知工藝進行雷射照射,能夠容易確保其精度。In addition, regarding the method of irradiating the
另外,根據本實施方式的DFN6,透過在各引腳部2a的前端部形成缺口部2c,並在缺口部2c形成焊錫浸潤性膜7,在其安裝結構中,能夠形成焊錫13的角焊縫13a,能夠進行焊錫接合部的目視檢查。In addition, according to the DFN 6 of the present embodiment, by forming the
而且,透過在DFN6的各引腳部2a形成缺口部2c,並且由焊錫浸潤性膜7覆蓋缺口部2c,從而焊錫13向上浸潤到引腳部2a的缺口部2c的上方,因此能夠形成高度高的焊錫13的角焊縫13a。其結果是,能夠提高DFN6的安裝強度。In addition, by forming the
另外,在DFN6中,由於能夠透過在各引腳部2a的缺口部2c的兩側部的雷射照射來避免樹脂空化部分9,因此能夠抑制DFN6的耐濕性下降。In addition, in the DFN 6, since the
另外,在DFN6的各引腳部2a,透過在缺口部2c的兩側部形成樹脂突出部4d,能夠抑制各個引腳部2a從密封體4的脫落。其結果是,能夠提高DFN6的品質。In addition, by forming the
以上基於實施方式對本發明人所完成的發明進行了具體說明,但是本發明並不限定於以上描述的實施方式,毫無疑問,能夠在不脫離其宗旨的範圍內進行各種變更。The invention made by the present inventors has been specifically described above based on the embodiments, but the present invention is not limited to the above-described embodiments, and it is without a doubt that various changes can be made within the scope not departing from the gist thereof.
例如,上述實施方式中,作為無引腳式的半導體裝置的一個例子,舉出DFN6進行了說明,但上述半導體裝置即使是QFN(四側扁平無引腳:Quad-Flat Non-leaded )也能夠適用。For example, in the above embodiment, DFN6 has been described as an example of a leadless semiconductor device, but the above semiconductor device can be QFN (Quad-Flat Non-leaded) Be applicable.
另外,上述實施方式中,作為半導體裝置,舉出裝載半導體晶片1的管芯焊盤2e從密封體4的背面4b露出的結構進行了說明,但是上述半導體裝置也可以是管芯焊盤2e埋入到密封體4內部的管芯焊盤埋入型結構。In addition, in the above-described embodiment, the
1‧‧‧半導體晶片1a‧‧‧主面1b‧‧‧背面1c‧‧‧焊盤2‧‧‧引腳框架2a‧‧‧引腳部2b‧‧‧端子部2c‧‧‧缺口部2d‧‧‧側面2e‧‧‧管芯焊盤2ea‧‧‧上表面2eb‧‧‧下表面2ec‧‧‧切斷面2f‧‧‧器件區域2g‧‧‧連接條2h‧‧‧高低差部2i‧‧‧邊界3‧‧‧引線4‧‧‧密封體4a‧‧‧上表面4b‧‧‧背面4c、4ca、4cb‧‧‧側面4d‧‧‧樹脂突出部4e‧‧‧統一密封體4ea‧‧‧樹脂4f‧‧‧殘留樹脂5‧‧‧管芯接合材料6‧‧‧DFN7‧‧‧焊錫浸潤性膜8‧‧‧雷射振盪部8a‧‧‧雷射8b‧‧‧照射軌跡9‧‧‧樹脂空化部分10‧‧‧噴嘴10a‧‧‧液體11‧‧‧噴射槍11a‧‧‧漿液12‧‧‧安裝基板12a‧‧‧導體圖案13‧‧‧焊錫13a‧‧‧角焊縫14‧‧‧劃片機15‧‧‧非照射寬度T1、T2‧‧‧延長線L1、L2、L3‧‧‧寬度Q‧‧‧長度方向P‧‧‧排列方向1‧‧‧Semiconductor chip 1a‧‧‧Main surface 1b‧‧‧Back surface 1c‧‧‧Pad 2‧‧‧Lead frame 2a‧‧‧Pin part 2b‧‧‧Terminal part 2c‧‧‧Notch part 2d ‧‧‧Side 2e‧‧‧ Die pad 2ea‧‧‧Upper surface 2eb‧‧‧Lower surface 2ec‧‧‧Cut section 2f‧‧‧Device area 2g‧‧‧Connecting strip 2h‧‧‧Height difference 2i‧‧‧Border 3‧‧‧Lead 4‧‧‧Sealing body 4a‧‧‧Upper surface 4b‧‧‧Back surface 4c, 4ca, 4cb‧‧‧Side 4d‧‧‧‧Resin protrusion 4e‧‧‧Uniform sealing body 4ea‧‧‧Resin 4f‧‧‧Resin Resin 5‧‧‧ Die Bonding Material 6‧‧‧DFN7‧‧‧Solder Wetting Film 8‧‧‧Laser Oscillator 8a‧‧‧Laser 8b‧‧‧Irradiation Trajectory 9‧‧‧Resin cavitation part 10‧‧‧ nozzle 10a‧‧‧liquid 11‧‧‧ spray gun 11a‧‧‧slurry 12‧‧‧mounting board 12a‧‧‧conductor pattern 13‧‧‧solder 13a‧‧ ‧ Fillet weld 14‧‧‧Scribe machine 15‧‧‧ Non-irradiation width T1, T2‧‧‧Extension line L1, L2, L3‧‧‧Width Q‧‧‧Length direction P‧‧‧Arrangement direction
圖1繪示本發明實施方式的半導體裝置的安裝面側的結構的一個例子的立體圖。FIG. 1 is a perspective view showing an example of a structure on a mounting surface side of a semiconductor device according to an embodiment of the present invention.
圖2繪示圖1的A部的結構的放大局部立體圖。FIG. 2 is an enlarged partial perspective view of the structure of part A of FIG. 1.
圖3繪示圖1所示的半導體裝置的組裝順序的一個例子的流程圖。FIG. 3 is a flowchart showing an example of the assembly procedure of the semiconductor device shown in FIG. 1.
圖4繪示圖3的B部的結構的放大局部剖視圖。FIG. 4 is an enlarged partial cross-sectional view of the structure of part B of FIG. 3.
圖5繪示圖1所示的半導體裝置的組裝中模制後連接條的高低差部的狀態的一個例子的局部立體圖。FIG. 5 is a partial perspective view showing an example of a state of a step portion of a connection bar after molding in the assembly of the semiconductor device shown in FIG. 1.
圖6繪示向圖5所示的高低差部照射雷射的狀態的一個例子的局部立體圖。FIG. 6 is a partial perspective view showing an example of a state where laser beams are irradiated to the level difference portion shown in FIG. 5.
圖7繪示圖6所示的雷射照射時的掃描狀態的一個例子的局部立體圖。7 is a partial perspective view showing an example of a scanning state during laser irradiation shown in FIG. 6.
圖8繪示圖6所示的雷射照射時的照射寬度的一個例子的局部立體圖。FIG. 8 is a partial perspective view showing an example of the irradiation width during laser irradiation shown in FIG. 6.
圖9繪示比較例中的雷射照射後的密封體的空化狀態的結構的局部立體圖。9 is a partial perspective view showing the structure of the cavitation state of the sealing body after laser irradiation in the comparative example.
圖10繪示圖6所示的雷射照射後的高低差部的殘留樹脂的狀態的一個例子的局部立體圖。FIG. 10 is a partial perspective view showing an example of the state of residual resin in the level difference portion after laser irradiation shown in FIG. 6.
圖11繪示透過水沖處理除去圖10所示的殘留樹脂的狀態的一個例子的局部立體圖。FIG. 11 is a partial perspective view showing an example of a state where the residual resin shown in FIG. 10 is removed by water flushing.
圖12繪示透過液體研磨處理而除去圖10所示的殘留樹脂的狀態的一個例子的局部立體圖。FIG. 12 is a partial perspective view showing an example of a state in which the residual resin shown in FIG. 10 is removed by liquid polishing.
圖13繪示圖1所示的半導體裝置的安裝結構的引腳部接合部分的一個例子的放大局部剖視圖。13 is an enlarged partial cross-sectional view of an example of a pin joint portion of the mounting structure of the semiconductor device shown in FIG. 1.
2a‧‧‧引腳部 2a‧‧‧Lead
2b‧‧‧端子部 2b‧‧‧Terminal
2c‧‧‧缺口部 2c‧‧‧Notch
2d‧‧‧側面 2d‧‧‧Side
2e‧‧‧管芯焊盤 2e‧‧‧die pad
2eb‧‧‧下表面 2eb‧‧‧Lower surface
2ec‧‧‧切斷面 2ec‧‧‧cut surface
4‧‧‧密封體 4‧‧‧sealing body
4b‧‧‧背面 4b‧‧‧Back
4c、4ca‧‧‧側面 4c, 4ca‧‧‧side
4d‧‧‧樹脂突出部 4d‧‧‧resin protrusion
6‧‧‧DFN 6‧‧‧DFN
Q‧‧‧長度方向 Q‧‧‧Long
P‧‧‧排列方向 P‧‧‧Arrange direction
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