TWI688203B - Wideband transimpedance amplifier circuit - Google Patents

Wideband transimpedance amplifier circuit Download PDF

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TWI688203B
TWI688203B TW106143937A TW106143937A TWI688203B TW I688203 B TWI688203 B TW I688203B TW 106143937 A TW106143937 A TW 106143937A TW 106143937 A TW106143937 A TW 106143937A TW I688203 B TWI688203 B TW I688203B
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coupled
amplifier circuit
bias
transimpedance amplifier
circuit
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TW106143937A
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TW201929422A (en
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李泰興
簡才淦
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財團法人工業技術研究院
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Priority to CN201711373943.9A priority patent/CN109962685B/en
Priority to US15/872,911 priority patent/US10348255B1/en
Publication of TW201929422A publication Critical patent/TW201929422A/en
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Publication of TWI688203B publication Critical patent/TWI688203B/en

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/04—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only
    • H03F3/08—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only controlled by light
    • H03F3/082—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only controlled by light with FET's
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/42—Modifications of amplifiers to extend the bandwidth
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/56—Modifications of input or output impedances, not otherwise provided for
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/04—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only
    • H03F3/08—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only controlled by light
    • H03F3/087—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only controlled by light with IC amplifier blocks
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/181—Low-frequency amplifiers, e.g. audio preamplifiers
    • H03F3/183—Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only
    • H03F3/185—Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only with field-effect devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
    • H03F3/45183—Long tailed pairs
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G3/00—Gain control in amplifiers or frequency changers
    • H03G3/20—Automatic control
    • H03G3/30—Automatic control in amplifiers having semiconductor devices
    • H03G3/3084—Automatic control in amplifiers having semiconductor devices in receivers or transmitters for electromagnetic waves other than radiowaves, e.g. lightwaves
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/408—Indexing scheme relating to amplifiers the output amplifying stage of an amplifier comprising three power stages
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45031—Indexing scheme relating to differential amplifiers the differential amplifier amplifying transistors are compositions of multiple transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45154—Indexing scheme relating to differential amplifiers the bias at the input of the amplifying transistors being controlled

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Multimedia (AREA)
  • Amplifiers (AREA)

Abstract

A wideband transimpedance amplifier is provided in the disclosure. The wideband transimpedance amplifier includes a common-gate transistor, a bias current controlling circuit and an amplifier circuit. The bias current controlling circuit is coupled to a source of the common-gate transistor. The amplifier circuit is coupled to a drain of the common-gate transistor. The bias current controlling circuit adjusts an input impedance of the wideband transimpedance amplifier according to a output signal of the amplifier circuit.

Description

寬頻轉阻放大器電路 Broadband transimpedance amplifier circuit

本發明係關於一放大器電路，特別關於一種寬頻轉阻放大器電路。 The invention relates to an amplifier circuit, in particular to a broadband transimpedance amplifier circuit.

在一般光接收器電路中，都會配置轉阻放大器(Transinpedance Anplifier，TIA)，以將電流訊號轉換為電壓訊號。更舉體來說，當光接收器的光二極體接收到光訊號後，會先將光訊號轉換為電流訊號，並將電流信號傳送給轉阻放大器。轉阻放大器接收到電流訊號後，就會再將電流訊號轉為電壓訊號，並且放大電壓振幅。 In general optical receiver circuits, a transimpedance amplifier (Transinpedance Anplifier, TIA) is configured to convert a current signal into a voltage signal. More specifically, when the optical diode of the optical receiver receives the optical signal, it will first convert the optical signal into a current signal and transmit the current signal to the transimpedance amplifier. After receiving the current signal, the transimpedance amplifier converts the current signal into a voltage signal and amplifies the voltage amplitude.

在傳統轉阻放大器之輸入阻抗匹配之設計，通常會是以回授(Feedback)電阻或串接電感的方式來實現。然而，使用回授電阻的方式會產生較大的熱雜訊。使用串接電感的方式則是會使得品質因子(Q值)會較差，且轉阻放大器之面積會較大。 The input impedance matching design of the traditional transimpedance amplifier is usually implemented by means of a feedback resistor or a series inductance. However, the use of feedback resistors will generate greater thermal noise. The use of series inductors results in a poor quality factor (Q value) and a large transimpedance amplifier area.

本發明提供了藉由一共閘極電晶體作為輸入阻抗，並適應性調整輸入阻抗之寬頻轉阻放大器電路。 The present invention provides a wide-band transimpedance amplifier circuit that uses a common gate transistor as an input impedance and adaptively adjusts the input impedance.

本發明提供了一種寬頻轉阻放大器電路。上述寬頻轉阻放大器電路包括一共閘極電晶體、一偏壓電流控制電路以及一放大器電路。偏壓電流控制電路會耦接上述共閘極電晶體之一源極。上述放大器電路會耦接上述閘極電晶體之一汲極。上述偏壓電流控制電路根據上述放大器電路之一輸出信號，調整上述寬頻轉阻放大器電路之一輸入阻抗。 The invention provides a broadband transimpedance amplifier circuit. The broadband transimpedance amplifier circuit includes a common gate transistor, a bias current control circuit, and an amplifier circuit. The bias current control circuit is coupled to one source of the above common gate transistor. The amplifier circuit is coupled to a drain of the gate transistor. The bias current control circuit adjusts the input impedance of one of the broadband transimpedance amplifier circuits according to the output signal of one of the amplifier circuits.

在一實施例中，上述寬頻轉阻放大器電路，更包括一並聯尖峰調整電路。上述並聯尖峰調整電路耦接上述共閘極電晶體之汲極。在一實施例中，上述並聯尖峰調整電路包括一電阻以及一電感串接。 In an embodiment, the wideband transimpedance amplifier circuit further includes a parallel spike adjustment circuit. The parallel spike adjustment circuit is coupled to the drain of the common gate transistor. In an embodiment, the parallel spike adjustment circuit includes a resistor and an inductor connected in series.

在一實施例中，上述偏壓電流控制電路包括一偏壓電晶體以及一偏壓調整電路。在一實施例中，上述偏壓調整電路包括一比較器。上述比較器比較上述放大器電路之輸出信號和一參考信號，以產生一調整信號。在一實施例中，上述偏壓電晶體耦接上述共閘極電晶體之源極，且根據上述調整信號調整上述偏壓電晶體之閘極偏壓。當上述偏壓電晶體之閘極偏壓被調整時，上述共閘極電晶體之一偏壓電流被改變，以調整上述輸入阻抗。 In an embodiment, the bias current control circuit includes a bias piezoelectric crystal and a bias voltage adjustment circuit. In one embodiment, the bias voltage adjustment circuit includes a comparator. The comparator compares the output signal of the amplifier circuit with a reference signal to generate an adjustment signal. In one embodiment, the bias piezoelectric crystal is coupled to the source of the common gate transistor, and the gate bias voltage of the bias piezoelectric crystal is adjusted according to the adjustment signal. When the gate bias voltage of the bias piezoelectric crystal is adjusted, the bias current of one of the common gate transistors is changed to adjust the input impedance.

在一實施例中，上述放大器電路可係一多級放大器電路。 In an embodiment, the above-mentioned amplifier circuit may be a multi-stage amplifier circuit.

關於本發明其他附加的特徵與優點，此領域之熟習技術人士，在不脫離本發明之精神和範圍內，當可根據本案實施方法中所揭露之寬頻轉阻放大器電路，做些許的更動與潤飾而得到。 With regard to other additional features and advantages of the present invention, those skilled in the art can make some changes and modifications according to the wide-band transimpedance amplifier circuit disclosed in the implementation method of the present invention without departing from the spirit and scope of the present invention. And get.

100‧‧‧寬頻轉阻放大器電路 100‧‧‧Broadband transimpedance amplifier circuit

110‧‧‧共閘極電晶體 110‧‧‧Common gate transistor

120‧‧‧偏壓電流控制電路 120‧‧‧bias current control circuit

121‧‧‧偏壓電晶體 121‧‧‧bias piezoelectric crystal

122‧‧‧偏壓調整電路 122‧‧‧bias adjustment circuit

130‧‧‧放大器電路 130‧‧‧Amplifier circuit

140‧‧‧並聯尖峰調整電路 140‧‧‧ Parallel spike adjustment circuit

200‧‧‧光二極體 200‧‧‧Photodiode

300‧‧‧比較器 300‧‧‧Comparator

Cds‧‧‧寄生電容 C ds ‧‧‧ Parasitic capacitance

C1~C13‧‧‧電容 C1~C13‧‧‧Capacitance

L1~L9電感M1~M3‧‧‧電晶體 L1~L9 Inductance M1~M3 ‧‧‧Transistor

PIN‧‧‧輸入端 PIN‧‧‧input

POUT‧‧‧輸出端 POUT‧‧‧Output

R1~R11‧‧‧電阻 R1~R11‧‧‧Resistance

VD1、VD2‧‧‧汲極電源 VD1, VD2 ‧‧‧ Drain power supply

VG1‧‧‧閘極電源 VG1‧‧‧Gate power supply

VG2‧‧‧調整電壓 VG2‧‧‧adjust voltage

Vout‧‧‧輸出電壓 Vout‧‧‧Output voltage

Vref‧‧‧參考電壓 Vref‧‧‧Reference voltage

第1圖係本發明寬頻轉阻放大器電路之方塊圖。 FIG. 1 is a block diagram of the broadband transimpedance amplifier circuit of the present invention.

第2圖係本發明寬頻轉阻放大器電路之電路圖。 FIG. 2 is a circuit diagram of the broadband transimpedance amplifier circuit of the present invention.

第3圖係本發明偏壓調整電路之電路圖。 FIG. 3 is a circuit diagram of the bias adjustment circuit of the present invention.

第4圖係本發明放大器電路之電路圖。 Fig. 4 is a circuit diagram of the amplifier circuit of the present invention.

本章節所敘述的是實施本發明之最佳方式，目的在於說明本發明之精神而非用以限定本發明之保護範圍，本發明之保護範圍當視後附之申請專利範圍所界定者為準。 This section describes the best way to implement the present invention, the purpose is to illustrate the spirit of the present invention and not to limit the scope of protection of the present invention, the scope of protection of the present invention shall be subject to the scope of the attached patent application shall prevail .

第1圖係本發明寬頻轉阻放大器電路之方塊圖。本發明寬頻轉阻放大器電路100可應用於一光接收器或一射頻寬頻放大器，但本發明不以此為限。在本發明中之實施例係以寬頻轉阻放大器電路100應用在光接收器來做說明。如第1圖所示，寬頻轉阻放大器電路100中可包括了一共閘極電晶體(common gate transistor)110、一偏壓電流控制電路120，以及一放大器電路130。在第1圖中之方塊圖，係為了方便說明本發明之實施例，但本發明並不以此為限。上述寬頻轉阻放大器電路100亦可包括其他元件。 FIG. 1 is a block diagram of the broadband transimpedance amplifier circuit of the present invention. The broadband transimpedance amplifier circuit 100 of the present invention can be applied to an optical receiver or a radio frequency broadband amplifier, but the present invention is not limited thereto. In the embodiment of the present invention, the broadband transimpedance amplifier circuit 100 is applied to an optical receiver for illustration. As shown in FIG. 1, the broadband transimpedance amplifier circuit 100 may include a common gate transistor 110, a bias current control circuit 120, and an amplifier circuit 130. The block diagram in FIG. 1 is for convenience of describing the embodiments of the present invention, but the present invention is not limited thereto. The wide frequency transimpedance amplifier circuit 100 may also include other components.

如第1圖所示，上述偏壓電流控制電路120會耦接至上述共閘極電晶體110之源極，且上述放大器電路130耦接至上述共閘極電晶體110之汲極。上述共閘極電晶體110之 汲極耦接一汲極電源VD1，且上述共閘極電晶體110之閘極耦接一閘極電源VG1。此外，上述共閘極電晶體110之源極與上述偏壓電流控制電路120間耦接一光二極體(photodiode)200。上述光二極體200將接收到之光訊號轉換為電流訊號，並把電流訊號傳送至上述寬頻轉阻放大器電路100之輸入端PIN。 As shown in FIG. 1, the bias current control circuit 120 is coupled to the source of the common gate transistor 110, and the amplifier circuit 130 is coupled to the drain of the common gate transistor 110. The above common gate transistor 110 The drain is coupled to a drain power supply VD1, and the gate of the common gate transistor 110 is coupled to a gate power supply VG1. In addition, a photodiode 200 is coupled between the source of the common gate transistor 110 and the bias current control circuit 120. The optical diode 200 converts the received optical signal into a current signal, and transmits the current signal to the input terminal PIN of the broadband transimpedance amplifier circuit 100.

在一實施例中，上述共閘極電晶體110可用來將來自上述光二極體200之電流信號轉換為一電壓信號。上述共閘極電晶體110可作為上述寬頻轉阻放大器電路100之一輸入阻抗。上述輸入阻抗根據上述共閘極電晶體110之尺寸和操作電流之不同而做適應性之調整。 In one embodiment, the common gate transistor 110 can be used to convert the current signal from the photodiode 200 into a voltage signal. The common gate transistor 110 can be used as an input impedance of the broadband transimpedance amplifier circuit 100. The input impedance is adaptively adjusted according to the size of the common gate transistor 110 and the operating current.

在一實施例中，上述偏壓電流控制電路120根據上述放大器電路130之一輸出信號，產生一調整信號。上述調整信號可用來調整上述共閘極電晶體110的偏壓電流，以改變輸入阻抗，以使得輸入阻抗和上述光二極體200會達成阻抗匹配，以增加信號傳輸之效益。更詳細之內容會在底下做說明。 In one embodiment, the bias current control circuit 120 generates an adjustment signal according to an output signal of the amplifier circuit 130. The adjustment signal can be used to adjust the bias current of the common gate transistor 110 to change the input impedance, so that the input impedance and the photodiode 200 will achieve impedance matching to increase the efficiency of signal transmission. More detailed content will be explained below.

第2圖係本發明寬頻轉阻放大器電路之電路圖。在第2圖中之電路圖，係為了說明本發明之實施例，但本發明並不以此為限。 FIG. 2 is a circuit diagram of the broadband transimpedance amplifier circuit of the present invention. The circuit diagram in FIG. 2 is for explaining the embodiment of the present invention, but the present invention is not limited thereto.

如第2圖所示，上述寬頻轉阻放大器電路100更可包括一電阻R2以及電容C1和C2。上述汲極電源VD1會耦接至一接地以及上述電容C1，且上述閘極電源VG1會耦接至一接地以及上述電阻R2。上述電阻R2會耦接上述共閘極電晶體110之閘極，以及串聯上述電容C2。上述電容C2還會耦接至一接地。 As shown in FIG. 2, the wideband transimpedance amplifier circuit 100 may further include a resistor R2 and capacitors C1 and C2. The drain power VD1 is coupled to a ground and the capacitor C1, and the gate power VG1 is coupled to a ground and the resistor R2. The resistor R2 is coupled to the gate of the common gate transistor 110 and the capacitor C2 is connected in series. The capacitor C2 is also coupled to a ground.

如第2圖所示，上述寬頻轉阻放大器電路100之偏壓電流控制電路120可包括一偏壓電晶體121、一偏壓調整電路122、一電阻R3以及一電容C3。上述偏壓電晶體121之閘極會耦接至上述偏壓調整電路122。電阻R3會耦接上述偏壓電晶體121之閘極，以及串聯電容C3。電阻R3還會耦接偏壓調整電路122以及一接地。此外，在本實施例中，上述寬頻轉阻放大器電路100更可包括一並聯尖峰(shunt-peaking)調整電路140，且上述並聯尖峰調整電路140耦接上述共閘極電晶體110之汲極。 As shown in FIG. 2, the bias current control circuit 120 of the wide-band transimpedance amplifier circuit 100 may include a bias piezoelectric crystal 121, a bias adjustment circuit 122, a resistor R3 and a capacitor C3. The gate electrode of the bias piezoelectric crystal 121 is coupled to the bias voltage adjustment circuit 122. The resistor R3 is coupled to the gate of the bias piezoelectric crystal 121 and the series capacitor C3. The resistor R3 is also coupled to the bias adjustment circuit 122 and a ground. In addition, in this embodiment, the broadband transimpedance amplifier circuit 100 may further include a shunt-peaking adjustment circuit 140, and the shunt peak adjustment circuit 140 is coupled to the drain of the common gate transistor 110.

在一實施例中，上述偏壓調整電路122根據從上述寬頻轉阻放大器電路100之輸出端POUT(或從放大器電路130)輸出之輸出信號，產生一調整信號，並將上述調整信號傳送至上述偏壓電晶體121之閘極，以調整上述偏壓電晶體121之閘極偏壓。當上述偏壓電晶體121之閘極偏壓被調整後，上述共閘極電晶體110的偏壓電流會跟著改變，以使得輸入阻抗因而被調整。因此，當輸入阻抗和上述光二極體200未達成阻抗匹配時(例如：串接的光二極體200之型號和原先串接之光二極體之型號不同，或操作頻率不同時)，調整後之輸入阻抗將會和光二極體200達成阻抗匹配。底下將以第3圖為例來做說明。 In one embodiment, the bias adjustment circuit 122 generates an adjustment signal according to the output signal output from the output terminal POUT of the broadband transimpedance amplifier circuit 100 (or from the amplifier circuit 130), and transmits the adjustment signal to the above The gate of the bias piezoelectric crystal 121 is used to adjust the gate bias of the bias piezoelectric crystal 121. After the gate bias voltage of the bias piezoelectric crystal 121 is adjusted, the bias current of the common gate transistor 110 will change accordingly, so that the input impedance is adjusted accordingly. Therefore, when the input impedance and the above-mentioned optical diode 200 have not achieved impedance matching (for example: the model of the serially connected optical diode 200 is different from the model of the original serially connected optical diode, or the operating frequency is different), the adjusted The input impedance will achieve impedance matching with the photodiode 200. The third figure will be used as an example to illustrate.

第3圖係本發明偏壓調整電路之電路圖。在第3圖中之電路圖，係為了說明本發明之實施例，但本發明並不以此為限。 FIG. 3 is a circuit diagram of the bias adjustment circuit of the present invention. The circuit diagram in FIG. 3 is for explaining the embodiment of the present invention, but the present invention is not limited thereto.

如第3圖所示，上述偏壓調整電路122可包括一 比較器300、一電阻R4以及一電容C4。電阻R4會耦接上述比較器300之一輸入端以及上述寬頻轉阻放大器電路100之輸出端POUT，以及串聯電容C4。電容C4還會耦接至一接地。上述比較器300之輸入端接收來自上述放大器電路130之輸出端之輸出信號(即輸出電壓Vout)，以及上述比較器300之另一接收端接收一參考信號(即參考電壓Vref)。接著，上述比較器300比較上述放大器電路130之輸出端之輸出信號和上述參考信號，以產生一調整信號(即調整電壓VG2)，並將上述調整信號輸出至上述偏壓電晶體121。 As shown in FIG. 3, the bias adjustment circuit 122 may include a The comparator 300, a resistor R4 and a capacitor C4. The resistor R4 is coupled to an input terminal of the comparator 300 and the output terminal POUT of the broadband transimpedance amplifier circuit 100, and a series capacitor C4. The capacitor C4 is also coupled to a ground. The input terminal of the comparator 300 receives the output signal (ie, output voltage Vout) from the output terminal of the amplifier circuit 130, and the other receiving terminal of the comparator 300 receives a reference signal (ie, reference voltage Vref). Next, the comparator 300 compares the output signal of the output terminal of the amplifier circuit 130 with the reference signal to generate an adjustment signal (that is, adjustment voltage VG2), and outputs the adjustment signal to the bias piezoelectric crystal 121.

舉例來說，當輸入阻抗將和光二極體200未達成阻抗匹配，造成上述放大器電路130的輸出端下降，所以上述輸出電壓Vout也會下降，上述比較器300經比較上述輸出電壓Vout和上述參考電壓Vref後，就會將上述調整電壓VG2提高。當上述偏壓電晶體121之閘極收到調整之調整電壓VG2後，上述偏壓電晶體121之閘極偏壓就會被改變。當上述偏壓電晶體121之閘極偏壓被改變後，上述共閘極電晶體110的偏壓電流亦會改變，因而使得輸入阻抗將適應性地被進行調整。因此，經調整後之輸入阻抗將可和光二極體200達成阻抗匹配。 For example, when the input impedance does not match the impedance of the photodiode 200, the output of the amplifier circuit 130 drops, so the output voltage Vout also drops. The comparator 300 compares the output voltage Vout with the reference After the voltage Vref, the above adjustment voltage VG2 will be increased. When the gate of the bias piezoelectric crystal 121 receives the adjusted adjustment voltage VG2, the gate bias of the bias piezoelectric crystal 121 will be changed. When the gate bias voltage of the bias piezoelectric crystal 121 is changed, the bias current of the common gate transistor 110 will also change, so that the input impedance will be adjusted adaptively. Therefore, the adjusted input impedance can achieve impedance matching with the optical diode 200.

回到第2圖，在一實施例中，上述並聯尖峰調整電路140可包括一電阻R1以及一電感L1串連。上述並聯尖峰調整電路140補償上述共閘極電晶體110之汲極和源極間的寄生電容Cds所產生之影響，以增加上述寬頻轉阻放大器電路100之操作頻寬。 Returning to FIG. 2, in an embodiment, the parallel spike adjustment circuit 140 may include a resistor R1 and an inductor L1 connected in series. The parallel spike adjustment circuit 140 compensates for the influence of the parasitic capacitance C ds between the drain and the source of the common gate transistor 110 to increase the operating bandwidth of the broadband transimpedance amplifier circuit 100.

在一實施例中，上述放大器電路130可用來放大上述共閘極電晶體110輸入之信號。在一實施例中，上述放大器電路130可為一多級放大器電路。第4圖係本發明放大器電路之電路圖。如第4圖所示，上述放大器電路130可為一4級放大器電路，但本發明並不以此為限。上述放大器電路130包括電晶體M1、M2以及M3、電阻R5、R6、R7、R8、R9、R10以及R11、電容C5、C6、C7、C8、C9以及C10，以及電感L2、L3、L4、L5、L6、L7、L8、L9。一汲極電源VD2會耦接上述電晶體M1、M2以及M3之汲極。上述電容C5、C6、C7都會耦接上述汲極電源VD1以及一接地。上述電阻R5會和上述電感L2串聯，且耦接至上述電晶體M1之汲極。上述電阻R6會和上述電感L3串聯，且耦接至上述電晶體M2之汲極。上述電阻R7會和上述電感L4串聯，且耦接至上述電晶體M3之汲極。上述電阻R8會和上述電感L5串聯，且耦接至上述寬頻轉阻放大器電路100之輸出端POUT。 In one embodiment, the amplifier circuit 130 may be used to amplify the signal input by the common gate transistor 110. In one embodiment, the amplifier circuit 130 can be a multi-stage amplifier circuit. Fig. 4 is a circuit diagram of the amplifier circuit of the present invention. As shown in FIG. 4, the above-mentioned amplifier circuit 130 may be a 4-stage amplifier circuit, but the invention is not limited thereto. The amplifier circuit 130 includes transistors M1, M2, and M3, resistors R5, R6, R7, R8, R9, R10, and R11, capacitors C5, C6, C7, C8, C9, and C10, and inductors L2, L3, L4, L5 , L6, L7, L8, L9. A drain power supply VD2 is coupled to the drains of the transistors M1, M2 and M3. The capacitors C5, C6, and C7 are all coupled to the drain power supply VD1 and a ground. The resistor R5 is connected in series with the inductor L2 and is coupled to the drain of the transistor M1. The resistor R6 is connected in series with the inductor L3 and is coupled to the drain of the transistor M2. The resistor R7 will be connected in series with the inductor L4 and coupled to the drain of the transistor M3. The resistor R8 is connected in series with the inductor L5 and is coupled to the output terminal POUT of the broadband transimpedance amplifier circuit 100.

上述電晶體M1之閘極會經由串聯之上述電容C8以及上述電感L6耦接至上述共閘極電晶體110之汲極。上述電晶體M1之汲極會經由串聯之上述電容C9以及上述電感L7耦接至上述電晶體M2之閘極。上述電晶體M2之汲極會經由串聯之上述電容C10以及上述電感L8耦接至上述電晶體M3之閘極。上述電晶體M3之汲極會經由上述電感L9耦接至上述寬頻轉阻放大器電路100之輸出端POUT。上述電晶體M1、M2以及M3之源極都會耦接至一接地。此外，第4圖所示之上述放大器電路130會藉由上述電阻R9、R10以及R11耦接 至偏壓電流控制電路120。上述電阻R9、R10以及R11會分別和電容C11、C12以及C13串聯，並經由上述電容C11、C12以及C13耦接至一接地。 The gate of the transistor M1 is coupled to the drain of the common gate transistor 110 via the capacitor C8 and the inductor L6 connected in series. The drain of the transistor M1 is coupled to the gate of the transistor M2 via the capacitor C9 and the inductor L7 connected in series. The drain of the transistor M2 is coupled to the gate of the transistor M3 via the capacitor C10 and the inductor L8 connected in series. The drain of the transistor M3 is coupled to the output terminal POUT of the broadband transimpedance amplifier circuit 100 through the inductor L9. The sources of the transistors M1, M2 and M3 are all coupled to a ground. In addition, the amplifier circuit 130 shown in FIG. 4 is coupled through the resistors R9, R10 and R11 To bias current control circuit 120. The resistors R9, R10, and R11 are connected in series with the capacitors C11, C12, and C13, respectively, and coupled to a ground through the capacitors C11, C12, and C13.

本發明之共閘極電晶體110可被作為輸入阻抗，且上述偏壓電流控制電路120可根據上述寬頻轉阻放大器電路100對應上述光二極體輸入之電流訊號所產生之輸入訊號，改變上述共閘極電晶體110之偏壓電流，以適應性地調整輸入阻抗。因此，即使上述寬頻轉阻放大器電路100耦接不同型號之光二極體，或光二極體操作在不同的操作頻率時，經適應性調整後之輸入阻抗都可和光二極體達成阻抗匹配。此外，相較於傳統寬頻轉阻放大器電路之設計，由於本發明所提出之寬頻轉阻放大器電路100係藉由共閘極電晶體110來作為輸入阻抗，因此所需製程之面積會較小。 The common gate transistor 110 of the present invention can be used as an input impedance, and the bias current control circuit 120 can change the common signal according to the input signal generated by the wideband transimpedance amplifier circuit 100 corresponding to the current signal input by the photodiode. The bias current of the gate transistor 110 adjusts the input impedance adaptively. Therefore, even if the broadband transimpedance amplifier circuit 100 is coupled to different types of photodiodes, or when the photodiodes are operated at different operating frequencies, the input impedance after adaptive adjustment can achieve impedance matching with the photodiodes. In addition, compared to the design of the conventional wideband transimpedance amplifier circuit, since the wideband transimpedance amplifier circuit 100 proposed by the present invention uses the common gate transistor 110 as the input impedance, the area required for the manufacturing process will be smaller.

在本說明及申請專利範圍中會使用到耦接及連接等詞，以及他們的衍生詞句。在特定的實施例中，連接用來代表二個或多個元件間互相有直接實體或電性接觸。耦接是表示二個或多個元件是直接實體接觸或電接觸。但是，耦接亦可表示二個或多個元件相互間並非直接接觸，但他們仍互相配合或互動。 In this description and the scope of patent application, the words coupling and connection will be used, as well as their derivatives. In a specific embodiment, the connection is used to indicate that two or more elements are in direct physical or electrical contact with each other. Coupling means that two or more elements are in direct physical or electrical contact. However, coupling can also mean that two or more components are not in direct contact with each other, but they still cooperate or interact with each other.

本說明書中所提到的「一實施例」或「實施例」，表示與實施例有關之所述特定的特徵、結構、或特性是包含根據本發明的至少一實施例中，但並不表示它們存在於每一個實施例中。因此，在本說明書中不同地方出現的「在一實施例中」或「在實施例中」詞組並不必然表示本發明的相同實施例。 "One embodiment" or "embodiment" mentioned in this specification means that the specific feature, structure, or characteristic related to the embodiment is included in at least one embodiment according to the present invention, but does not mean They are present in every embodiment. Therefore, the phrases "in one embodiment" or "in an embodiment" appearing in different places in this specification do not necessarily mean the same embodiment of the present invention.

以上段落使用多種層面描述。顯然的，本文的教示可以多種方式實現，而在範例中揭露之任何特定架構或功能僅為一代表性之狀況。根據本文之教示，任何熟知此技藝之人士應理解在本文揭露之各層面可獨立實作或兩種以上之層面可以合併實作。 The above paragraphs use multiple levels of description. Obviously, the teachings in this article can be implemented in many ways, and any specific architecture or function disclosed in the example is only a representative situation. According to the teaching of this article, anyone who is familiar with this skill should understand that each level disclosed in this article can be implemented independently or two or more levels can be implemented in combination.

雖然本發明已以較佳實施例揭露如上，然其並非用以限定本發明，任何熟習此技藝者，在不脫離本發明之精神和範圍內，當可作些許之更動與潤飾，因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。 Although the present invention has been disclosed as above with preferred embodiments, it is not intended to limit the present invention. Anyone who is familiar with this skill can make some modifications and retouching without departing from the spirit and scope of the present invention. Therefore, the present invention The scope of protection shall be deemed as defined by the scope of the attached patent application.

100‧‧‧寬頻轉阻放大器電路 100‧‧‧Broadband transimpedance amplifier circuit

110‧‧‧共閘極電晶體 110‧‧‧Common gate transistor

120‧‧‧偏壓電流控制電路 120‧‧‧bias current control circuit

130‧‧‧放大器電路 130‧‧‧Amplifier circuit

200‧‧‧光二極體 200‧‧‧Photodiode

PIN‧‧‧輸入端 PIN‧‧‧input

POUT‧‧‧輸出端 POUT‧‧‧Output

VD1‧‧‧汲極電源 VD1‧‧‧ Drain power supply

VG1‧‧‧閘極電源 VG1‧‧‧Gate power supply

Claims (7)

一種寬頻轉阻放大器電路，包括：一共閘極電晶體；一偏壓電流控制電路，耦接上述共閘極電晶體之一源極；以及一放大器電路，耦接上述共閘極電晶體之一汲極，其中上述偏壓電流控制電路包括一偏壓電晶體以及一偏壓調整電路，且上述偏壓電晶體之一閘極耦接上述偏壓調整電路，且上述偏壓電晶體之一汲極耦接上述共閘極電晶體之上述源極，其中上述偏壓電流控制電路更包括一第二電阻以及一第一電容，其中上述偏壓調整電路包括一比較器，其中上述比較器之一輸入端耦接上述放大器電路之輸出端，且上述比較器比較上述放大器電路之一輸出信號和一參考信號，以產生一調整信號來調整上述寬頻轉阻放大器電路之一輸入阻抗，其中上述第二電阻會耦接上述偏壓電晶體之上述閘極和上述比較器之一輸出端，以及串聯上述第一電容，且上述第一電容耦接上述比較器之上述輸出端和一接地端之間。 A wide-band transimpedance amplifier circuit includes: a common gate transistor; a bias current control circuit, coupled to one source of the above common gate transistor; and an amplifier circuit, coupled to one of the above common gate transistor Drain, wherein the bias current control circuit includes a bias piezoelectric crystal and a bias adjustment circuit, and one gate of the bias piezoelectric crystal is coupled to the bias adjustment circuit, and one of the bias piezoelectric crystal The pole is coupled to the source of the common gate transistor, wherein the bias current control circuit further includes a second resistor and a first capacitor, wherein the bias adjustment circuit includes a comparator, one of the comparators The input terminal is coupled to the output terminal of the amplifier circuit, and the comparator compares an output signal of the amplifier circuit with a reference signal to generate an adjustment signal to adjust an input impedance of the broadband transimpedance amplifier circuit, wherein the second The resistor is coupled to the gate of the bias piezoelectric crystal and an output terminal of the comparator, and the first capacitor is connected in series, and the first capacitor is coupled between the output terminal of the comparator and a ground terminal. 如申請專利範圍第1項所述之寬頻轉阻放大器電路，其中上述共閘極電晶體之上述源極耦接一光二極體，以接收來自上述光二極體之一電流信號，並將上述電流信號轉換為一電壓信號。 The wideband transimpedance amplifier circuit as described in item 1 of the patent application scope, wherein the source of the common gate transistor is coupled to an optical diode to receive a current signal from the optical diode and convert the current The signal is converted into a voltage signal. 如申請專利範圍第1項所述之寬頻轉阻放大器電路，更 包括：一並聯尖峰調整電路，耦接上述共閘極電晶體之上述汲極，其中上述並聯尖峰調整電路包括一第一電阻以及一第一電感，且上述第一電阻和上述第一電感相互串聯，其中上述第一電阻之一端耦接上述第一電感之一端，上述第一電阻之另一端耦接一汲極電源，上述第一電感之一端耦接上述第一電阻之一端，上述第一電感之另一端耦接上述共閘極電晶體之上述汲極。 The wide-band transimpedance amplifier circuit as described in item 1 of the patent scope, more The method includes: a parallel spike adjustment circuit coupled to the drain of the common gate transistor, wherein the parallel spike adjustment circuit includes a first resistor and a first inductor, and the first resistor and the first inductor are connected in series Where one end of the first resistor is coupled to one end of the first inductor, the other end of the first resistor is coupled to a drain power supply, one end of the first inductor is coupled to one end of the first resistor, and the first inductor The other end is coupled to the drain of the common gate transistor. 如申請專利範圍第1項所述之寬頻轉阻放大器電路，其中上述偏壓調整電路更包括一第三電阻以及一第二電容，且上述第三電阻會耦接上述寬頻轉阻放大器電路之一輸出端和上述比較器之上述輸入端之間，以及串聯上述第二電容，以及上述第二電容耦接上述寬頻轉阻放大器電路之上述輸出端和上述接地端之間。 The wideband transimpedance amplifier circuit as described in item 1 of the patent application range, wherein the bias adjustment circuit further includes a third resistor and a second capacitor, and the third resistor is coupled to one of the wideband transimpedance amplifier circuits The output terminal and the input terminal of the comparator are connected in series with the second capacitor, and the second capacitor is coupled between the output terminal and the ground terminal of the broadband transimpedance amplifier circuit. 如申請專利範圍第1項所述之寬頻轉阻放大器電路，其中上述偏壓電晶體耦接上述共閘極電晶體之上述源極，且根據上述調整信號，上述偏壓電晶體之一閘極偏壓會被調整。 The wideband transimpedance amplifier circuit as described in item 1 of the patent application range, wherein the bias piezoelectric crystal is coupled to the source of the common gate transistor, and according to the adjustment signal, one gate of the bias piezoelectric crystal The bias voltage will be adjusted. 如申請專利範圍第5項所述之寬頻轉阻放大器電路，其中當上述偏壓電晶體之上述閘極偏壓被調整時，上述共閘極電晶體之一偏壓電流會被改變，以調整上述輸入阻抗。 The wideband transimpedance amplifier circuit as described in item 5 of the patent application range, wherein when the gate bias voltage of the bias piezoelectric crystal is adjusted, the bias current of one of the common gate transistors is changed to adjust The above input impedance. 如申請專利範圍第1項所述之寬頻轉阻放大器電路，其中上述放大器電路可係一多級放大器電路，上述多級放大器電路耦接至上述偏壓電流控制電路。 The wideband transimpedance amplifier circuit as described in item 1 of the patent scope, wherein the amplifier circuit may be a multi-stage amplifier circuit, and the multi-stage amplifier circuit is coupled to the bias current control circuit.
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US20190190466A1 (en) 2019-06-20

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