TWI682466B - Manufacturing method of an oxide layer, manufacturing method of a semiconductor structure using the same and semiconductor structure manufactured thereby - Google Patents

Abstract

A manufacturing method of an oxide layer, a manufacturing method of a semiconductor structure using the same and a semiconductor structure manufactured thereby are provided. The manufacturing method of an oxide layer comprises the following steps. First, a first oxide layer is formed by atomic layer deposition. Then, a silazane layer is formed on the first oxide layer by flowable chemical vapor deposition. The silazane layer is cured in an ozone atmosphere, and an annealing process is carried out, so as to transform the silazane layer to a second oxide layer.

Description

Manufacturing method of oxide layer, manufacturing method of semiconductor structure using the same, and by This manufactured semiconductor structure

The invention relates to a method for manufacturing an oxide layer, a method for manufacturing a semiconductor structure using the same, and a semiconductor structure manufactured therefrom.

As the volume of the device shrinks, the lateral dimensions of the gaps and trenches in the semiconductor structure also shrink to a certain extent. At the same time, the variation of the gap and the depth of the groove is not so large. As a result, high aspect ratio structures have appeared in semiconductor structures. Such a structure would make the process of filling materials (such as dielectrics) into it difficult. For example, before the gaps and trenches are completely filled, the opening at the top is blocked by the deposited material, resulting in a hollow structure. One solution to this is Flowable Chemical Vapor Deposition (FCVD). By filling precursors with good fluidity into gaps or trenches and then converting them into required materials (such as dielectrics), a good filling effect can be obtained.

The invention provides a method for manufacturing an oxide layer and half of its application Manufacturing method of conductor structure and semiconductor structure manufactured thereby. The manufacturing method of this oxide layer is a further improvement of the flow chemical vapor deposition process.

According to some embodiments, a method of manufacturing an oxide layer includes the following steps. First, a first oxide layer is formed by Atomic Layer Deposition (ALD). Next, a silazane layer is formed on the first oxide layer by flow chemical vapor deposition. Curing the silazane layer under an ozone environment and performing an annealing process to convert the silazane layer into a second oxide layer.

According to some embodiments, a method of manufacturing a semiconductor structure includes the following steps. First, a plurality of fins are formed on a substrate. On the fin strip and the substrate, a first oxide layer conformal with the fin strip is formed by atomic layer deposition. The first oxide layer has a substantially uniform thickness. Next, a silazane layer is formed on the first oxide layer by flow chemical vapor deposition. The silazane layer fills the grooves between the fins. The silazane layer is hardened under an ozone environment, and an annealing process is performed to convert the silazane layer into a second oxide layer.

According to some embodiments, a semiconductor structure includes a substrate, a plurality of fins, a first oxide layer, and a second oxide layer. The fin bar is located on the substrate. The first oxide layer is located on a part of the fin bar and the substrate. The first oxide layer is conformal with the fin strip and has a substantially uniform thickness. The second oxide layer is located in the trench between the fins and on the first oxide layer. The silicon/oxygen ratio of the first oxide layer is smaller than the silicon/oxygen ratio of the second oxide layer.

In order to have a better understanding of the above and other aspects of the present invention, the preferred embodiments are described below in conjunction with the attached drawings, which are described in detail as follows:

102‧‧‧ substrate

104‧‧‧fin

106‧‧‧oxide liner layer

108‧‧‧Nitride liner

110‧‧‧oxide protective layer

112‧‧‧ storey

114‧‧‧First oxide layer

116‧‧‧ Silazane layer

118‧‧‧Second oxide layer

120‧‧‧dielectric layer

122‧‧‧electrode layer

t1‧‧‧thickness

t2‧‧‧thickness

FIGS. 1A-1G illustrate a method of manufacturing a semiconductor structure according to an embodiment of the invention.

The method of manufacturing a semiconductor structure according to an embodiment of the present invention will be described below with reference to the drawings. This semiconductor structure manufacturing method uses an oxide layer manufacturing method. In the method of manufacturing the oxide layer, a first oxide layer is first formed by atomic layer deposition. Then, a silazane layer is formed on the first oxide layer by flow chemical vapor deposition. The silazane layer is hardened under an ozone environment, and an annealing process is performed to convert the silazane layer into a second oxide layer. In this process, the first oxide layer located below also provides oxygen to the silazane layer, thereby improving the quality of the second oxide layer.

Referring to FIG. 1A, a plurality of fin bars 104 are formed on a substrate 102. The substrate 102 is, for example, a silicon substrate. In an embodiment, the fin bar 104 may be formed by the substrate 102.

Referring to FIG. 1B, when forming the fins 104, an oxide liner layer 106, a nitride liner layer 108, and an oxide protection layer 110 may be selectively formed on the fins 104 in sequence, and A layer 112 is selectively formed on the sidewall of the fin 104. The layer 112 may include at least one of an oxide repair layer, an oxide volume maintenance layer, and an amorphous silicon volume compensation layer. The oxide repair layer is, for example, an oxide layer formed by In-Situ Steam Generation (ISSG), and the oxide volume maintenance layer is, for example, an oxide layer formed by atomic layer deposition.

Next, a first oxide layer is formed by atomic layer deposition 114. Specifically, on the fin bar 104 and the substrate 102, a first oxide layer 114 conformal to the fin bar 104 is formed by atomic layer deposition. The first oxide layer 114 has a substantially uniform thickness t1. The thickness of the first oxide layer 114 should not be too thin to avoid insufficient oxygen supply. In one embodiment, the thickness of the first oxide layer 114 is greater than 3Å, such as greater than 5Å, such as about 15Å. In addition, if the thickness of the first oxide layer 114 is too thick, the process time may be too long.

In one embodiment, the step of forming the first oxide layer 114 by atomic layer deposition includes the steps of alternately providing a silicon-containing precursor and an oxygen source, and terminating in a step of providing an oxygen source, terminated The duration of this step (eg, may be as long as 10 seconds) is longer than the duration of the previous step of providing the silicon-containing precursor and the step of providing the oxygen source (eg, may be only 1 second or less, respectively). The silicon-containing precursor includes, for example, organosilane, such as H ₂ Si[N(C ₂ H ₅ ) ₂ ] ₂ , tetramethoxysilane (TMOS), or tetrachlorosilane (TCS). The oxygen source includes, for example, oxygen (O ₂ ), oxygen plasma, water vapor (H ₂ O), ozone (O ₃ ), or hydrogen peroxide (H ₂ O ₂ ).

Referring to FIG. 1C, a silazane layer 116 is formed on the first oxide layer 114 by flow chemical vapor deposition. Specifically, the silazane layer 116 fills the plurality of trenches between the fins 104.

Referring to FIG. 1D, the silazane layer 116 is hardened under an ozone environment, and an annealing process is performed to convert the silazane layer 116 into a second oxide layer 118. In one embodiment, the thickness t2 of the second oxide layer 118 is 2000Å~8000Å, for example, 3000Å~5000Å. During the hardening and annealing process of the second oxide layer 118 of this thickness, if there is no first oxide layer 114 to supplement oxygen underneath and only rely on the ozone environment for oxygen supply, the bottom may be loose due to insufficient oxygen content. And even produce Cracks. In one embodiment, after the annealing process, there may be no obvious boundary between the first oxide layer 114 and the second oxide layer 118.

Referring to FIG. 1E, after the silazane layer 116 is converted into the second oxide layer 118, most of the second oxide layer 118 is removed, leaving only a portion in the trench. And, the oxide liner layer 106, the nitride liner layer 108, and the oxide protection layer 110 above the fins 104 are removed.

Referring to FIG. 1F, a dielectric layer 120 is conformally formed on the exposed fins 104. The dielectric layer 120 is formed of, for example, a common gate dielectric material, such as a stack of a silicon oxide layer and a high dielectric constant dielectric layer. Referring to FIG. 1G, an electrode layer 122 is formed on the dielectric layer 120. The extending direction of the electrode layer 122 is different from the extending direction of the fin bar 104 and is separated from the fin bar 104 by the dielectric layer 120. The electrode layer 122 may be formed of multiple layers of metal, for example.

So far, the method for manufacturing a semiconductor structure according to an embodiment of the present invention has been described. The semiconductor structure manufactured by such a manufacturing method includes a substrate 102, a plurality of fins 104, a first oxide layer 114, and a second oxide layer 118. The fin bar 104 is located on the substrate 102. The first oxide layer 114 is located on a part of the fin bar 104 and the substrate 102. The first oxide layer 114 is conformal with the fin bar 104 and has a substantially uniform thickness. In one embodiment, the thickness of the first oxide layer 114 is greater than 3Å. The second oxide layer 118 is located in the trench between the fins 104 and on the first oxide layer 114. Due to the characteristics brought about by the manufacturing process of the first oxide layer 114 and the second oxide layer 118, the silicon/oxygen ratio of the first oxide layer 114 is smaller than that of the second oxide layer 118. Also, the density of the first oxide layer 114 may be greater than the density of the second oxide layer 118, and the etch rate of the first oxide layer 114 may be less than the etch rate of the second oxide layer 118.

The semiconductor structure may further include a dielectric layer 120 and an electrode layer 122. The dielectric layer 120 is located on the fin bar 104, and the dielectric layer 120 and the fin bar 104 are conformal. The electrode layer 122 is located on the dielectric layer 120. The extending direction of the electrode layer 122 is different from the extending direction of the fin bar 104, and is separated from the fin bar 104 by the dielectric layer 120. The portions of the fin bars 104 on both sides of the electrode layer 122 can be used as source and drain respectively, and the electrode layer 122 can be used as a gate.

In summary, the method for manufacturing an oxide layer according to the present invention and the method for manufacturing a semiconductor structure using the same are formed by atomic layer deposition before forming the oxide layer by flow chemical vapor deposition An oxide layer below. In this way, during the hardening and annealing processes of the flow chemical vapor deposition process, oxygen sources are present above and below the layer. In this way, the manufactured semiconductor structure can have a more uniform and good-quality oxide layer.

Although the present invention has been disclosed as above with preferred embodiments, it is not intended to limit the present invention. Those with ordinary knowledge in the technical field to which the present invention belongs can make various modifications and retouching without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be deemed as defined by the scope of the attached patent application.

102‧‧‧ substrate

104‧‧‧fin

112‧‧‧ storey

114‧‧‧First oxide layer

118‧‧‧Second oxide layer

120‧‧‧dielectric layer

122‧‧‧electrode layer

Claims (15)

A method for manufacturing an oxide layer includes: forming a first oxide layer by atomic layer deposition (ALD); forming a silicon nitride on the first oxide layer by flow chemical vapor deposition (FCVD) An alkane layer; and curing the silazane layer in an ozone environment and performing an annealing process to convert the silazane layer into a second oxide layer. The method for manufacturing an oxide layer as described in Item 1 of the patent application, wherein the step of forming the first oxide layer by atomic layer deposition includes the step of alternately providing a silicon-containing precursor and an oxygen source, And it terminates in a step of providing an oxygen source, the duration of the terminated step is longer than that of the step of providing a silicon-containing precursor and the step of providing an oxygen source. The method for manufacturing an oxide layer as described in item 2 of the patent application scope, wherein the silicon-containing precursor includes organic silane, and the oxygen source includes oxygen (O ₂ ), oxygen plasma, water vapor (H ₂ O), Ozone (O ₃ ) or hydrogen peroxide (H ₂ O ₂ ). The method for manufacturing an oxide layer as described in item 3 of the patent application scope, wherein the silicon-containing precursor includes H ₂ Si[N(C ₂ H ₅ ) ₂ ] ₂ , tetramethoxysilane (TMOS) or Tetrachlorosilane (tetrachlorosilane, TCS). The method for manufacturing an oxide layer as described in item 1 of the patent application, wherein the thickness of the first oxide layer is greater than 3Å. The method for manufacturing an oxide layer as described in item 1 of the patent application, wherein the thickness of the second oxide layer is 2000Å~8000Å. A method for manufacturing a semiconductor structure, comprising: forming a plurality of fins on a substrate; On the fins and the substrate, a first oxide layer conformal to the fins is formed by atomic layer deposition (ALD), the first oxide layer has a substantially uniform thickness; On an oxide layer, a silazane layer is formed by flow chemical vapor deposition (FCVD), and the silazane layer is filled into the plurality of grooves between the fins; and hardened in an ozone environment ( curing) the silazane layer and performing an annealing process to convert the silazane layer into a second oxide layer. The method for manufacturing a semiconductor structure as described in item 7 of the patent application scope, wherein the step of forming the first oxide layer by atomic layer deposition includes the step of alternately providing a silicon-containing precursor and an oxygen source, and Terminating in a step of providing an oxygen source, the duration of the terminated step is longer than the previous step of providing a silicon-containing precursor and the step of providing an oxygen source. The method for manufacturing a semiconductor structure as described in item 8 of the patent application scope, wherein the silicon-containing precursor includes organic silane, and the oxygen source includes oxygen (O ₂ ), oxygen plasma, water vapor (H ₂ O), ozone (O ₃ ) or hydrogen peroxide (H ₂ O ₂ ). The method for manufacturing a semiconductor structure as described in item 9 of the patent application scope, wherein the silicon-containing precursor includes H ₂ Si[N(C ₂ H ₅ ) ₂ ] ₂ , tetramethoxysilane (TMOS) or tetra Chlorosilane (tetrachlorosilane, TCS). The method for manufacturing a semiconductor structure as described in item 7 of the patent application, wherein the thickness of the first oxide layer is greater than 3Å. The method for manufacturing a semiconductor structure as described in item 7 of the patent application scope further includes: after forming the fins and before forming the first oxide layer, on the fins An oxide liner layer, a nitride liner layer and an oxide protective layer are formed in this order, and an oxide repair layer, an oxide volume maintenance layer and an amorphous silicon volume compensation layer are formed on the side walls of the fins At least one of the layers. The method for manufacturing a semiconductor structure as described in item 12 of the patent application scope further includes: after converting the silazane layer into the second oxide layer, removing most of the second oxide layer, leaving only The next part is located in the trenches and removes the oxide liner layer, the nitride liner layer and the oxide protective layer above the fins. The method for manufacturing a semiconductor structure as described in item 7 of the patent application, wherein the thickness of the second oxide layer is 2000Å~8000Å. The method for manufacturing a semiconductor structure as described in item 7 of the patent application scope further includes: after converting the silazane layer into the second oxide layer, removing most of the second oxide layer, leaving only The next part is located in the trenches; on the exposed fins, a dielectric layer is conformally formed; and an electrode layer is formed on the dielectric layer, the extension direction of the electrode layer is different from those The extending direction of the fin bars is separated from the fin bars by the dielectric layer.

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