TWI665847B - Power switch system - Google Patents

Abstract

The power switching system includes a first power supply, a plurality of transistors, a first resistor, a first acceleration circuit, a second power supply, a second resistor, a second acceleration circuit, a capacitor, and a load. Some of the plurality of transistors are used to receive a first control signal, a second control signal, a third control signal, and a fourth control signal. The first power supply is used to provide a first voltage. The second power supply is used to provide a second voltage. The capacitor is used to output the voltage to the load. The first control signal, the second control signal, the third control signal, and the fourth control signal are used to pass a plurality of transistors, and the control voltage is switched from the first voltage to the second voltage, or from the second voltage to the first voltage.

Description

Power switching system

The invention describes a power supply switching system, in particular a power supply switching system with fast switching speed and high stability.

With the rapid development of technology, many electronic products are becoming more powerful and faster. However, expanding the functions of electronic products and increasing computing power will increase power consumption. Therefore, electronic products that have multiple functions and powerful computing capabilities also reduce operating time due to increased power consumption. In order to extend the operating time of electronic products or expand the supportability of the power supply source of electronic products, dual-battery or dual-power supply systems are becoming more and more common in current life. For example, a notebook computer's main battery and a backup battery in a Power Docking device can be connected to the notebook computer at the same time. In other words, the laptop can be powered by a built-in main battery or a backup battery in an external power expansion port device.

When the current dual-battery or dual-power supply system is applied to electronic products, a Single Pole Double Throw (SPDT) switch is required to switch the power source, and the controller uses the main battery and the backup battery to switch the power source. The state of energy storage determines the switching state of this switch. However, for a current dual-battery or dual-power supply system with a single-pole double-throw switch, it is difficult to balance switching speed and static power consumption. In other words, the common resistance in a single pole double throw switch is related to the switching speed and static power consumption. The larger the common resistance, the smaller the static power consumption, but the slower the switching speed. on the contrary, The smaller the common resistance, the faster the switching speed, but the larger the static power consumption. Excessive static power consumption will increase the amount of extra power consumption, and too slow switching speed will cause the transient time of the power supply system to be too long, resulting in voltage instability.

An embodiment of the present invention provides a power switching system including a first power supply subsystem, a second power supply subsystem, a capacitor, and a load. The first power supply subsystem includes a first power supply, a first transistor, a second transistor, a third transistor, a first resistor, a first acceleration circuit, and a fourth transistor. The second power supply subsystem includes a second power supply, a fifth transistor, a sixth transistor, a seventh transistor, a second resistor, a second acceleration circuit, and an eighth transistor. The first power supply is used to provide a first voltage. The first transistor includes a first terminal, a control terminal, and a second terminal coupled to the first power supply. The second transistor includes a first terminal coupled to the control terminal of the first transistor, a control terminal for receiving the first control signal, and a second terminal coupled to the ground terminal. The third transistor includes a first terminal, a control terminal for receiving a second control signal, and a second terminal coupled to the ground terminal. The first resistor includes a first terminal coupled to the second terminal of the first transistor, and a second terminal coupled to the first terminal of the third transistor. The first acceleration circuit is coupled to the first terminal of the first resistor, the second terminal of the first resistor, and the first terminal of the second transistor. The fourth transistor includes a first terminal coupled to the first terminal of the first resistor, a control terminal coupled to the first terminal of the second transistor, and a second terminal. The second power supply is used to provide a second voltage. The fifth transistor includes a first terminal, a control terminal, and a second terminal coupled to the second power supply. The sixth transistor includes a first terminal coupled to the control terminal of the fifth transistor, a control terminal for receiving a third control signal, and a second terminal coupled to the ground terminal. The seventh transistor includes a first terminal, a control terminal for receiving a fourth control signal, and a second terminal coupled to the ground terminal. The second resistor includes a first terminal coupled to the second terminal of the fifth transistor, and a second terminal coupled to the first terminal of the seventh transistor. The second acceleration circuit is coupled to the first terminal of the second resistor, the second terminal of the second resistor, and the first terminal of the sixth transistor. The eighth transistor includes a coupling A first terminal of the first terminal of the two resistors, a control terminal coupled to the first terminal of the sixth transistor, and a second terminal coupled to the second terminal of the fourth transistor. The capacitor includes a first terminal coupled to the second terminal of the eighth transistor to output a voltage, and a second terminal coupled to the ground terminal. The load is coupled to the first terminal of the capacitor for receiving a voltage. The first control signal, the second control signal, the third control signal and the fourth control signal are used to control the voltage to be switched from the first voltage to the second voltage, or from the second voltage to the first voltage.

100‧‧‧ Power Switching System

SYS1‧‧‧First Power Supply Subsystem

SYS2‧‧‧Second power supply subsystem

EN1‧‧‧First Control Signal

EN2‧‧‧Second Control Signal

EN3‧‧‧Third Control Signal

EN4‧‧‧Fourth control signal

AS1‧‧‧first acceleration circuit

AS2‧‧‧second acceleration circuit

PS1‧‧‧First Power Supply

PS2‧‧‧Second Power Supply

L‧‧‧Load

C1‧‧‧capacitor

GND‧‧‧ ground terminal

R1‧‧‧first resistor

R2‧‧‧Second resistor

R3‧‧‧Third resistor

R4‧‧‧Fourth resistor

T1‧‧‧First transistor

T2‧‧‧Second transistor

T3‧‧‧Third transistor

T4‧‧‧Fourth transistor

T5‧‧‧Fifth transistor

T6‧‧‧sixth transistor

T7‧‧‧Seventh transistor

T8‧‧‧Eight transistor

T9‧‧‧Ninth transistor

T10‧‧‧Tenth transistor

A to F‧‧‧nodes

F1 to F5‧‧‧ Current direction

PS1C‧‧‧First power supply interval

PS2C‧‧‧Second Power Supply Section

OPN‧‧‧Open Road

FIG. 1 is a circuit architecture diagram of an embodiment of a power switching system according to the present invention.

FIG. 2 is a schematic diagram of the state of all control signals and electronic components when the first power supply provides the first voltage and the second power supply is open in the power switching system of FIG.

FIG. 3 is a schematic diagram of the states of all control signals and electronic components in the power switching system of FIG. 1 when the second power supply provides a second voltage and the first power supply is open.

FIG. 4 is a schematic diagram of the control signals and the states of the electronic components in the power switching system of FIG. 1 when the first power supply and the second power supply are open.

Figure 5 is a schematic diagram of the waveforms of all control signals in the power switching system of Figure 1 as a function of time.

FIG. 1 is a circuit architecture diagram of an embodiment of a power switching system 100 according to the present invention. The power switching system 100 can be regarded as a dual-battery or dual-power supply system, and has the ability to switch between two power sources. For example, in the power switching system 100, the first power supply subsystem SYS1 can be regarded as a system of one power source, and the second power supply subsystem SYS2 can be regarded as a system of another power source. The first power supply subsystem SYS1 and the second power supply subsystem SYS2 may have symmetrical circuit architectures. The two systems have similar circuit architectures. The circuit details of the power switching system 100 will be described below. The power switching system 100 includes a first power supply subsystem SYS1, a second power supply subsystem SYS2, a capacitor C1, and a load L. The first power supply subsystem SYS1 includes a first power supply PS1, a first transistor T1, a second transistor T2, a third transistor T3, a first resistor R1, a first acceleration circuit AS1, and a fourth transistor T4. The second power supply subsystem SYS2 includes a second power supply PS2, a fifth transistor T5, a sixth transistor T6, a seventh transistor T7, a second resistor R2, a second acceleration circuit AS2, and an eighth transistor T8. The first power supply PS1 is used to provide a first voltage. The first power supply PS1 may be any type of battery pack or an external power source. The first transistor T1 includes a first terminal, a control terminal, and a second terminal coupled to the first power supply PS1. The second transistor T2 includes a first terminal coupled to the control terminal of the first transistor T1, a control terminal for receiving the first control signal EN1, and a second terminal coupled to the ground terminal GND. The third transistor T3 includes a first terminal, a control terminal for receiving the second control signal EN2, and a second terminal coupled to the ground terminal GND. The first resistor R1 includes a first terminal coupled to the second terminal of the first transistor T1 and a second terminal coupled to the first terminal of the third transistor T3. The first acceleration circuit AS1 is coupled to a first terminal of the first resistor R1, a second terminal of the first resistor R1, and a first terminal of the second transistor T2. The fourth transistor T4 includes a first terminal coupled to the first terminal of the first resistor R1, a control terminal coupled to the first terminal of the second transistor T2, and a second terminal.

The second power supply PS2 is used to provide a second voltage. The second power supply PS2 can be any type of battery pack or an external power supply. The fifth transistor T5 includes a first terminal, a control terminal, and a second terminal coupled to the second power supply PS2. The sixth transistor T6 includes a first terminal coupled to the control terminal of the fifth transistor T5, a control terminal for receiving the third control signal EN3, and a second terminal coupled to the ground terminal GND. The seventh transistor T7 includes a first terminal, a control terminal for receiving the fourth control signal EN4, and a second terminal coupled to the ground terminal GND. The second resistor R2 includes a first terminal coupled to the second terminal of the fifth transistor T5 and a second terminal coupled to the first terminal of the seventh transistor T7. The second acceleration circuit AS2 is coupled to the first terminal of the second resistor R2, the second terminal of the second resistor R2, and the first terminal of the sixth transistor T6. Eighth transistor T8 includes a first terminal coupled to the first terminal of the second resistor R2, a control terminal coupled to the first terminal of the sixth transistor T6, and a second terminal coupled to the second terminal of the fourth transistor T4. . The capacitor C1 includes a first terminal coupled to the second terminal of the eighth transistor T8 and used to output a voltage, and a second terminal coupled to the ground terminal GND. The load L is coupled to the first terminal of the capacitor C1 for receiving a voltage. In the power switching system 100, the first control signal EN1, the second control signal EN2, the third control signal EN3, and the fourth control signal EN4 can control the operating states of the first power supply subsystem SYS1 and the second power supply subsystem SYS2. So that the voltage received by the capacitor C1 is switched from the first voltage to the second voltage, or from the second voltage to the first voltage. In addition, the first transistor T1, the fourth transistor T4, the fifth transistor T5, and the eighth transistor T8 may be P-Type Metal-Oxide-Semiconductor (PMOS), In addition, the second transistor T2, the third transistor T3, the sixth transistor T6, and the seventh transistor T7 may be N-type metal oxide semiconductor field effect transistors (N-Type Metal-Oxide-Semiconductor, NMOS).

As mentioned earlier, the power switching system 100 has the ability to switch between two power sources. In addition, in order to reduce the switching time to increase the voltage stability, the power switching system 100 introduces the aforementioned first acceleration circuit AS1 and the second acceleration circuit AS2. The functions of the first acceleration circuit AS1 and the second acceleration circuit AS2 and the method for the power source switching system 100 to switch the power source will be described in detail later. In the power switching system 100, the first acceleration circuit AS1 includes a ninth transistor T9 and a third resistor R3. The ninth transistor T9 includes a first terminal coupled to the first terminal of the first resistor R1, a control terminal coupled to the second terminal of the first resistor R1, and a second terminal. The third resistor R3 includes a first terminal coupled to the second terminal of the ninth transistor T9 and a second terminal coupled to the first terminal of the second transistor T2. In the first acceleration circuit AS1, the ninth transistor T9 may be a P-type metal oxide semiconductor field effect transistor (PMOS), and a resistance value of the third resistor R3 is smaller than a resistance value of the first resistor R1. For example, the resistance value of the third resistor R3 may be 100 ohms, and the resistance value of the first resistor R1 may be 10,000 ohms. Similarly, the second acceleration circuit AS2 includes a tenth transistor T10 and a fourth resistor R4. The tenth transistor T10 includes a first terminal coupled to the first terminal of the second resistor R2, a control terminal coupled to the second terminal of the second resistor R2, and a second terminal. The fourth resistor R4 includes a resistor coupled to the tenth resistor. The first end of the second end of the crystal T10 and the second end of the first end of the sixth transistor T6 are coupled. In the second acceleration circuit AS2, the tenth transistor T10 may be a P-type metal oxide semiconductor field effect transistor (PMOS), and a resistance value of the fourth resistor R4 is smaller than a resistance value of the second resistor R2. For example, the resistance value of the fourth resistor R4 may be 100 ohms, and the resistance value of the second resistor R2 may be 10,000 ohms. However, the structure of the first acceleration circuit AS1 can also be reasonably changed, and its circuit also falls into the scope of the disclosure of the present invention.

To make the description more logical, the three states of the power switching system 100 will be described below. The first state is that the power switching system 100 uses the energy provided by the first power supply PS1 as a power source. Therefore, the first power supply PS1 is short-circuited to the load L, and thus can provide the first voltage of the load L. At the same time, the second power supply PS2 is open to the load L and therefore cannot provide energy. The second state is that the power switching system 100 uses the energy provided by the second power supply PS2 as a power source, so the second power supply PS2 is short-circuited to the load L, and therefore can provide the second voltage of the load L. At the same time, the first power supply PS1 is open to the load L and therefore cannot provide energy. The third state is that the power switching system 100 must implement a protection mechanism between switching the first state to the second state, or switching the second state to the first state, that is, "Break-Before -Make) ". Therefore, in the third state, the first power supply PS1 and the second power supply PS2 are both open to the load L.

FIG. 2 is a schematic diagram of states of all control signals and electronic components when the first power supply PS1 provides a first voltage and the second power supply PS2 is open in the power switching system 100. Fig. 2 can be regarded as a schematic diagram of the first state mentioned above. Here, the first control signal EN1 is a high voltage, the second control signal EN2 is a low voltage, the third control signal EN3 is a low voltage, and the fourth control signal EN4 is a high voltage. For the first power supply subsystem SYS1 (as shown in FIG. 1), since the first control signal EN1 is a high voltage, the second transistor T2 is turned on. After the second transistor T2 is turned on, the voltage of the node A approaches the low voltage of the ground terminal GND. Because node A has a low voltage, The crystal T1 is turned on, and the fourth transistor T4 is also turned on. In addition, since the second control signal EN2 has a low voltage, the third transistor T3 is turned off. In the case where there is no leakage path, the node B will maintain the first voltage of the high voltage provided by the first power supply PS1 through the first transistor T1. Since the node B is at a high voltage and the third transistor T3 is turned off, the node C is also at a high voltage, so that the ninth transistor T9 is turned off. Therefore, the energy (first voltage) provided by the first power supply PS1 is transmitted to the load L through the first transistor T1 and the fourth transistor T4 that are turned on along the current direction F1, and the capacitor C1 is also charged . The voltage output by the capacitor C1 is a first voltage.

For the second power supply subsystem SYS2 (as shown in FIG. 1), since the third control signal EN3 is a low voltage, the sixth transistor T6 is turned off. Since the fourth control signal EN4 is a high voltage, the seventh transistor T7 is turned on. Since the seventh transistor T7 is turned on, the voltage of the node F will approach the low voltage of the ground terminal GND. Since the node F has a low voltage, the tenth transistor T10 is turned on. After the tenth transistor T10 is turned on, a current path is formed with the fourth resistor R4. The initial state of the fifth transistor T5 and the eighth transistor T8 is on, so the initial voltage of the node E is a high voltage. However, since the tenth transistor T10 is turned on to form a current path with the fourth resistor R4, the high voltage of node E will pass the fifth transistor T5 and the eighth transistor through the tenth transistor T10 and the fourth resistor R4. T8 ends. In addition, the second resistor R2 and the seventh transistor T7 form a current direction F2. However, when the second resistor R2 is large, the power leaked in the current direction F2 is reduced, so the additional power consumption is almost negligible. In addition, when the fourth resistor R4 is very small, the node D will be quickly boosted and the fifth transistor T5 and the eighth transistor T8 will be quickly turned off. Since the fifth transistor T5 and the eighth transistor T8 are turned off, the energy (second voltage) of the second power supply PS2 is blocked, which is equivalent to the second power supply PS2 being open to the load L. Therefore, the aforementioned function of the "second acceleration circuit AS2" is to quickly turn the second power supply PS2 into an open circuit state.

FIG. 3 is a schematic diagram of the state of all control signals and electronic components when the second power supply PS2 provides a second voltage and the first power supply PS1 is open in the power switching system 100. Fig. 3 can be regarded as the schematic diagram of the second state mentioned above. Here, the first control signal EN1 is a low voltage, the second control signal EN2 is a high voltage, the third control signal EN3 is a high voltage, and the fourth control signal EN4 is a low voltage. For the first power supply subsystem SYS1 (as shown in FIG. 1), since the first control signal EN1 is a low voltage, the second transistor T2 is turned off. Since the second control signal EN2 is at a high voltage, the third transistor T3 is turned on. Since the third transistor T3 is turned on, the voltage of the node C will approach the low voltage of the ground terminal GND. Since the node C has a low voltage, the ninth transistor T9 is turned on. After the ninth transistor T9 is turned on, a current path is formed in cooperation with the third resistor R3. The initialization states of the first transistor T1 and the fourth transistor T4 are on, so the initial voltage of the node B is a high voltage. However, because the ninth transistor T9 and the third resistor R3 form a current path after being turned on, the high voltage of the node B will pass the first transistor T1 and the fourth transistor through the ninth transistor T9 and the third resistor R3. T4 ends. In addition, the first resistor R1 and the third transistor T3 form a current direction F3. However, when the first resistor R1 is large, the power leaked in the current direction F3 is reduced, so the additional power consumption can be almost ignored. In addition, when the third resistor R3 is very small, the node A will be quickly boosted and the first transistor T1 and the fourth transistor T4 will be quickly turned off. Since the first transistor T1 and the fourth transistor T4 are off, the energy (first voltage) of the first power supply PS1 will be blocked, which is equivalent to the first power supply PS1 being open to the load L. Therefore, the aforementioned function of the "first acceleration circuit AS1" is to quickly turn the first power supply PS1 into an open circuit state.

For the second power supply subsystem SYS2 (as shown in FIG. 1), since the third control signal EN3 is a high voltage, the sixth transistor T6 is turned on. After the sixth transistor T6 is turned on, the voltage of the node D approaches the low voltage of the ground terminal GND. Because the node D has a low voltage, the fifth transistor T5 will be turned on, and the eighth transistor T8 will also be turned on. In addition, since the fourth control signal EN4 is at a low voltage, the seventh transistor T7 is turned off. In the case where there is no leakage path, the node E will maintain the second voltage of the high voltage provided by the second power supply PS2 through the fifth transistor T5. Since the node E is at a high voltage and the seventh transistor T7 is turned off, the node F is also at a high voltage, and the tenth transistor T10 is turned off. Therefore, the energy (second voltage) provided by the second power supply PS2 is transmitted to the load L through the fifth transistor T5 and the eighth transistor T8 that are turned on along the current direction F4, and the capacitor C1 is also charged . The voltage output by the capacitor C1 is the second voltage.

FIG. 4 is a schematic diagram of the control signals and the states of various electronic components when the first power supply PS1 and the second power supply PS2 are both open in the power switching system 100. As mentioned above, the power switching system 100 must implement a protection mechanism between switching the first state to the second state, or switching the second state to the first state, that is, "Break-Before- Make) "transient operation. In the transient operation, both the first power supply PS1 and the second power supply PS2 are open. Moreover, as described in the foregoing FIG. 2 and FIG. 3, when the first control signal EN1 is a low voltage and the second control signal EN2 is a high voltage, the first power supply PS1 is open to the load L. When the third control signal EN3 is a low voltage and the fourth control signal EN4 is a high voltage, the second power supply PS2 is open to the load L. Therefore, when the first control signal EN1 is a low voltage, the second control signal EN2 is a high voltage, the third control signal EN3 is a low voltage, and the fourth control signal EN4 is a high voltage, two power supplies (the first power supply Both the power supply PS1 and the second power supply PS2) are open to the load L. In other words, under the condition of FIG. 4, the first power supply PS1 or the second power supply PS2 stops charging the capacitor C1. The capacitor C1 needs to dissipate the energy stored in it, and provides the load L energy along the current direction F5. In addition, the operation principle of the first power supply PS1 and the second power supply PS2 becoming open is described in detail above, so the details will not be repeated here.

As mentioned above, since the first acceleration circuit AS1 and the second acceleration circuit AS2 can optimize the switching time of the first power supply PS1 and the second power supply PS2. Therefore, the time of the third state of the power switching system 100 shown in FIG. 4 during the transient operation can be greatly shortened. The shortening of the transient operation time also means that the energy storage space of the capacitor C1 does not need to be large, because the capacitor C1 only needs to maintain the voltage of the input load L for a short time without a power supply source.

Figure 5 shows the waveforms of all control signals in the power switching system 100. The schematic. The Y axis represents the time axis. In the first power supply interval PS1C, the first control signal EN1 is a high voltage, the second control signal EN2 is a low voltage, the third control signal EN3 is a low voltage, and the fourth control signal EN4 is a high voltage. Corresponding to the result of FIG. 2, the first power supply PS1 is short-circuited to the load L, so it can provide energy of the first voltage to the load L. The second power supply PS2 is open to the load L, so its energy will be blocked. In the second power supply interval PS2C, the first control signal EN1 is a low voltage, the second control signal EN2 is a high voltage, the third control signal EN3 is a high voltage, and the fourth control signal EN4 is a low voltage. Corresponding to the result of FIG. 3, the first power supply PS1 is open to the load L, so its energy will be blocked. The second power supply PS2 is short-circuited to the load L, so it can provide energy of the second voltage to the load L. The first voltage and the second voltage may be two identical or different voltages. In the open circuit interval OPN of the first power supply interval PS1C and the second power supply interval PS2C, the first control signal EN1 is a low voltage, the second control signal EN2 is a high voltage, the third control signal EN3 is a low voltage, and the fourth control signal EN4 is high voltage. Corresponding to the result of FIG. 4, the two power supplies (the first power supply PS1 and the second power supply PS2) are both open to the load L. Regardless of the operation mode, the first control signal EN1 and the second control signal EN2 are opposite to each other, and the third control signal EN3 and the fourth control signal EN4 are opposite to each other. However, as mentioned above, the open-circuit interval OPN of the power switching system 100 during transient operation may be short, so the capacitor C1 with a large energy storage space is not required.

In addition, as shown in FIGS. 1 to 4, the resistance corresponding to the static power consumption (low self-discharge path) in the power switching system 100 is different from the resistance used in the acceleration circuit. For example, the resistor used in the current direction F3 of the first power supply subsystem SYS1 is the first resistor R1, and the resistor used by the first acceleration circuit AS1 is the third resistor R3. The resistor used in the current direction F2 of the second power supply subsystem SYS2 is a second resistor R2, and the resistor used in the second acceleration circuit AS2 is a fourth resistor R4. When the first resistor R1 is much larger than the third resistor R3 and the second resistor R2 is much larger than the fourth resistor R4. The static power consumption in the power switching system 100 will be reduced, and the switching speed will be faster. Therefore, the power switching system 100 can simultaneously satisfy the characteristics of excellent static power consumption and high-speed switching speed.

In summary, the present invention describes a power switching system. The power switching system uses multiple control signals to control the power supply state of the power switching system. Because the power switching system has an acceleration circuit, the power switching system has a fast switching speed, so the time of transient operation can be greatly shortened. The power switching system does not require a large energy storage capacitor to achieve high-speed power supply switching. Features. In addition, since the resistance corresponding to the static power consumption in the power switching system is different from the resistance used in the acceleration circuit, the power switching system can achieve a balance between the static power consumption and the switching speed. In other words, the power switching system of the present invention can simultaneously satisfy the functions of excellent static power consumption and high-speed switching speed, and thus can provide excellent and high-stability power supply quality.

The above description is only a preferred embodiment of the present invention, and all equivalent changes and modifications made in accordance with the scope of patent application of the present invention shall fall within the scope of the present invention.

Claims (12)

A power switching system includes: a first power supply subsystem including: a first power supply for providing a first voltage; a first transistor including: a first terminal coupled to the first A power supply; a control terminal; and a second terminal; a second transistor including: a first terminal coupled to the control terminal of the first transistor; a control terminal for receiving a first A control signal; and a second terminal coupled to a ground terminal; a third transistor including: a first terminal; a control terminal for receiving a second control signal; and a second terminal, coupled Connected to the ground terminal; a first resistor including: a first terminal coupled to the second terminal of the first transistor; and a second terminal coupled to the first transistor of the third transistor A first acceleration circuit coupled to the first terminal of the first resistor, the second terminal of the first resistor, and the first terminal of the second transistor; and a fourth transistor including: : A first terminal coupled to the first terminal of the first resistor; a control terminal coupled to the first terminal of the second transistor And a second terminal; a second power supply subsystem including: a second power supply for providing a second voltage; a fifth transistor including: a first terminal coupled to the first Two power supplies; a control terminal; and a second terminal; a sixth transistor including: a first terminal coupled to the control terminal of the fifth transistor; a control terminal for receiving a first Three control signals; and a second terminal coupled to the ground terminal; a seventh transistor including: a first terminal; a control terminal for receiving a fourth control signal; and a second terminal, coupled Connected to the ground terminal; a second resistor including: a first terminal coupled to the second terminal of the fifth transistor; and a second terminal coupled to the first transistor of the seventh transistor A second acceleration circuit, coupled to the first terminal of the second resistor, the second terminal of the second resistor, and the first terminal of the sixth transistor; and an eighth transistor, including : A first terminal coupled to the first terminal of the second resistor; a control terminal coupled to the first terminal of the sixth transistor; and a Two terminals are coupled to the second terminal of the fourth transistor; a capacitor includes: a first terminal coupled to the second terminal of the eighth transistor to output a voltage; and a first Two terminals are coupled to the ground terminal; and a load is coupled to the first terminal of the capacitor to receive the voltage; wherein the first control signal, the second control signal, the third control signal and The fourth control signal is used to control the voltage to be switched from the first voltage to the second voltage, or from the second voltage to the first voltage. The power switching system according to claim 1, wherein the first transistor, the fourth transistor, the fifth transistor, and the eighth transistor system are P-type metal oxide semiconductor field effect transistors (P- Type Metal-Oxide-Semiconductor), and the second transistor, the third transistor, the sixth transistor, and the seventh transistor system are N-type metal-oxide semiconductor field effect transistors (N-Type Metal- Oxide-Semiconductor). The power switching system according to claim 1, wherein the first acceleration circuit includes: a ninth transistor, including: a first terminal coupled to the first terminal of the first resistor; a control terminal, coupled Connected to the second terminal of the first resistor; and a second terminal; and a third resistor including: a first terminal coupled to the second terminal of the ninth transistor; and a second terminal Is coupled to the first terminal of the second transistor. The power switching system according to claim 3, wherein the ninth transistor system is a P-type metal-oxide semiconductor field effect transistor (P-Type Metal-Oxide-Semiconductor), and the resistance value of the third resistor is less than the The resistance value of the first resistor. The power switching system according to claim 1, wherein the second acceleration circuit includes: a tenth transistor, including: a first terminal coupled to the first terminal of the second resistor; a control terminal, coupled Connected to the second terminal of the second resistor; and a second terminal; and a fourth resistor including: a first terminal coupled to the second terminal of the tenth transistor; and a second terminal Is coupled to the first terminal of the sixth transistor. The power switching system according to claim 5, wherein the tenth transistor system is a P-type metal-oxide semiconductor field effect transistor (P-Type Metal-Oxide-Semiconductor), and the resistance value of the fourth resistor is less than the The resistance value of the second resistor. The power switching system according to claim 1, wherein the first transistor, the first resistor, and the third transistor form a first low self-discharge path, and when the resistance value of the first resistor is large, The power leaked by the first power supply through the first low self-discharge path is reduced. The power switching system according to claim 1, wherein the fifth transistor, the second resistor, and the seventh transistor form a second low self-discharge path, and when the resistance value of the second resistor is large, The power leaked by the second power supply through the second low self-discharge path is reduced. The power switching system according to claim 1, wherein the first control signal and the second control signal are opposite to each other, and the third control signal and the fourth control signal are opposite to each other. The power switching system according to claim 9, wherein when the first control signal is a high voltage, the second control signal is a low voltage, the third control signal is the low voltage and the fourth control When the signal is the high voltage, the voltage output by the capacitor is the first voltage. The power switching system according to claim 9, wherein when the first control signal is a low voltage, the second control signal is a high voltage, the third control signal is the high voltage and the fourth control When the signal is the low voltage, the voltage output by the capacitor is the second voltage. The power switching system according to claim 9, wherein when the first control signal is a low voltage, the second control signal is a high voltage, the third control signal is the low voltage and the fourth control When the signal is the high voltage, the first power supply or the second power supply stops charging the capacitor.