TWI665720B - Processing method of wafer - Google Patents
Processing method of wafer Download PDFInfo
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- TWI665720B TWI665720B TW105110762A TW105110762A TWI665720B TW I665720 B TWI665720 B TW I665720B TW 105110762 A TW105110762 A TW 105110762A TW 105110762 A TW105110762 A TW 105110762A TW I665720 B TWI665720 B TW I665720B
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- 238000003672 processing method Methods 0.000 title claims abstract description 18
- 239000002390 adhesive tape Substances 0.000 claims abstract description 53
- 238000010438 heat treatment Methods 0.000 claims abstract description 24
- 238000000034 method Methods 0.000 claims abstract description 14
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 4
- 239000004575 stone Substances 0.000 claims description 4
- 239000007787 solid Substances 0.000 claims 1
- 230000001678 irradiating effect Effects 0.000 abstract description 6
- 239000004065 semiconductor Substances 0.000 description 56
- 238000003384 imaging method Methods 0.000 description 13
- 238000002407 reforming Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 3
- 230000003287 optical effect Effects 0.000 description 3
- 230000002093 peripheral effect Effects 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 238000005520 cutting process Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 238000009751 slip forming Methods 0.000 description 2
- 239000004925 Acrylic resin Substances 0.000 description 1
- 229920000178 Acrylic resin Polymers 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000003754 machining Methods 0.000 description 1
- 239000004800 polyvinyl chloride Substances 0.000 description 1
- 230000011218 segmentation Effects 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30625—With simultaneous mechanical treatment, e.g. mechanico-chemical polishing
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
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- Optics & Photonics (AREA)
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- Mechanical Treatment Of Semiconductor (AREA)
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Abstract
本發明提供一種即使未在晶圓內部沿著分割預定線積層而形成複數個改質層，依然能夠沿著形成有改質層的分割預定線確實地分割晶圓之晶圓的加工方法。 The present invention provides a processing method for a wafer capable of reliably dividing a wafer along a predetermined dividing line on which a modified layer is formed even if a plurality of modified layers are not laminated on a wafer along a predetermined dividing line.
本發明是將表面上呈格子狀地形成有複數條分割預定線，並在由複數條分割預定線區劃成的複數個區域上形成有器件的晶圓，沿著分割預定線分割成一個個的器件之晶圓的加工方法，其包含，在晶圓表面黏貼黏著膠帶的黏著膠帶黏貼步驟、將對於晶圓具有透射性的波長的脈衝雷射光之聚光點從晶圓的背面側定位到內部並沿著分割預定線進行照射，在晶圓內部沿著分割預定線形成改質層之改質層形成步驟、將實施過改質層形成步驟之晶圓的表面上所黏貼的黏著膠帶予以加熱，藉而使裂縫從改質層向晶圓的表面擴展之黏著膠帶加熱步驟，和，對實施過黏著膠帶加熱步驟的晶圓施加外力，沿著形成有改質層及向表面擴展的裂縫之分割預定線，將晶圓分割成一個個的器件之分割步驟。 In the present invention, a plurality of predetermined division lines are formed in a grid pattern on the surface, and a device is formed on a plurality of regions divided by the plurality of predetermined division lines. The wafer is divided into one along the predetermined division lines. A method for processing a wafer of a device includes an adhesive tape sticking step of attaching an adhesive tape on a surface of the wafer, and positioning a condensing point of pulsed laser light having a wavelength that is transmissive to the wafer from the back side of the wafer to the inside. And irradiating along the predetermined dividing line, forming a modified layer forming step along the predetermined dividing line inside the wafer, and heating the adhesive tape adhered on the surface of the wafer that has undergone the modifying layer forming step A heating step of the adhesive tape for cracks extending from the modified layer to the surface of the wafer, and an external force is applied to the wafer that has been subjected to the heating step of the adhesive tape, along the formation of the modified layer and the cracks extending to the surface. Dividing a predetermined line to divide a wafer into individual devices.
Description
本發明涉及一種將表面上有形成格子狀的複數條分割預定線，並在由該複數條分割預定線區劃成的複數個區域上形成有器件的晶圓，沿著分割預定線進行分割之晶圓的加工方法。 The present invention relates to a wafer in which a plurality of predetermined division lines forming a grid shape are formed on a surface, and a device is formed on a plurality of regions divided by the plurality of predetermined division lines, and the crystals are divided along the predetermined division lines. Round machining method.
在半導體器件製造程序中，略呈圓板形狀之半導體晶圓的表面上，由配列成格子狀的分割預定線區劃成複數個區域，並在這個被區劃出來的區域上形成IC、LSI等之器件。沿分割預定線對如此形成的半導體晶圓切斷，從而將形成有器件的區域加以分割而製造各個器件。 In the semiconductor device manufacturing process, the surface of a semiconductor wafer having a slightly circular plate shape is divided into a plurality of regions by a predetermined division line arranged in a grid shape, and ICs, LSIs, etc. are formed on the divided region. Device. The semiconductor wafer thus formed is cut along a predetermined division line, and a region where the device is formed is divided to manufacture each device.
作為分割半導體晶圓等之晶圓的方法，已經實用化的有，使用對於晶圓具有透射性的波長之脈衝雷射光，將聚光點定位於應分割區域的內部再照射脈衝雷射光之稱為內部加工的雷射加工方法。採用這個稱為內部加工的雷射加工方法的分割方法是，將對於晶圓具有透射性的波長之脈衝雷射光的聚光點定位於晶圓內部並沿著分割預定線進行照射，藉而在晶圓內部沿著分割預定線連續地形成改 質層，再透過對晶圓施加外力的方式，沿著形成改質層而強度降低的分割預定線將晶圓分割成一個個器件的技術(參照例如，專利文獻1)。 As a method of dividing a wafer such as a semiconductor wafer, it has been practically used to use pulsed laser light having a wavelength that is transmissive to the wafer, and to position the focusing point inside the region to be divided and irradiate the pulsed laser light. Laser processing method for internal processing. The division method using the laser processing method called internal processing is to locate the light-condensing point of the pulse laser light having a wavelength which is transmissive to the wafer inside the wafer and irradiate it along a predetermined division line, so that The wafer interior is continuously formed along the planned division line. A technology for dividing a wafer into individual devices along a predetermined dividing line that reduces the strength of the modified layer by applying an external force to the wafer (see, for example, Patent Document 1).
作為對晶圓施加外力的方法，下述專利文獻2中公開了將黏著膠帶黏貼於晶圓表面，並磨削晶圓背面形成指定的厚度，且透過磨削對晶圓施加外力，藉以將晶圓沿著形成有改質層的分割預定線分割成一個個器件的技術。 As a method of applying an external force to a wafer, the following Patent Document 2 discloses that an adhesive tape is adhered to the surface of the wafer, the back surface of the wafer is ground to a specified thickness, and external force is applied to the wafer by grinding, thereby crystallizing the wafer. A technology of dividing a circle into individual devices along a predetermined dividing line in which a modified layer is formed.
此外，作為對晶圓施加外力的方法，下述專利文獻3中公開了將黏著膠帶黏貼於晶圓，再透過擴張該黏著膠帶的方式，將晶圓沿著形成有改質層的分割預定線分割成一個個器件的技術。 In addition, as a method of applying an external force to a wafer, Patent Document 3 below discloses a method of adhering an adhesive tape to a wafer and then expanding the adhesive tape along a predetermined division line where a modified layer is formed. Technology of dividing into individual devices.
【專利文獻1】特許第3408805号公報 [Patent Document 1] Patent No. 3408805
【專利文獻2】特開第2009-290148号公報 [Patent Document 2] JP 2009-290148
【專利文獻3】特開第2006-229021号公報 [Patent Document 3] JP 2006-229021
然而，在上述的每一種方法，由於都是透過外力的施加而使裂縫從改質層往晶圓的表面及背面成長，再將晶圓沿著分割預定線分割成一個個的器件，因此，為了將晶圓確實地沿著分割預定線進行分割，就必須在晶圓內部沿分割預定線積層而形成複數個改質層，而有生產生差的 問題。 However, in each of the above methods, cracks grow from the modified layer to the surface and back of the wafer through the application of an external force, and the wafer is divided into individual devices along a predetermined division line. In order to divide a wafer along a predetermined dividing line surely, it is necessary to laminate a plurality of modified layers inside the wafer along the predetermined dividing line. problem.
本發明即是有鑑於上述事實而完成的，其主要的技術課題在於，提供一種即使未在晶圓內部沿著分割預定線積層而形成複數個改質層，依然能夠沿著形成有改質層的分割預定線確實地分割晶圓之晶圓的加工方法。 The present invention has been completed in view of the above-mentioned facts, and its main technical problem is to provide a reformed layer that can be formed along a plurality of reformed layers even if a plurality of reformed layers are not formed by stacking along a predetermined division line inside the wafer. A method for processing a wafer with a predetermined dividing line.
為解決上述主要的技術課題，則依據本發明所提供的是一種將表面上呈格子狀地形成有複數條分割預定線，並在由該複數條分割預定線區劃成的複數個區域上形成有器件的晶圓，沿著分割預定線分割成一個個的器件之晶圓的加工方法，特徵在於其係包含：在晶圓表面黏貼黏著膠帶的黏著膠帶黏貼步驟，將對於晶圓具有透射性的波長的脈衝雷射光之聚光點從晶圓的背面側定位到內部並沿著分割預定線進行照射，在晶圓內部沿著分割預定線形成改質層之改質層形成步驟，將實施過該改質層形成步驟之晶圓的表面上所黏貼的黏著膠帶予以加熱，藉而使裂縫從改質層向晶圓的表面擴展之黏著膠帶加熱步驟，和，對實施過該黏著膠帶加熱步驟的晶圓施加外力，沿著形成有改質層及向表面擴展的裂縫之分割預定線，將晶圓分割成一個個的器件之分割步驟，之晶圓的加工方法。 In order to solve the above-mentioned main technical problem, what is provided according to the present invention is a method of forming a plurality of predetermined division lines in a grid shape on a surface, and forming a plurality of areas divided by the plurality of predetermined division lines. A device wafer processing method for dividing a device into individual devices along a predetermined dividing line is characterized in that it includes an adhesive tape sticking step of sticking an adhesive tape on the surface of the wafer, which will be transparent to the wafer. The condensing point of the pulsed laser light with a wavelength is positioned from the back side of the wafer to the inside and irradiated along the planned division line. The modified layer formation step of forming a modified layer along the planned division line inside the wafer will be implemented. The step of heating the adhesive tape adhered on the surface of the wafer in the step of forming the modified layer, thereby heating the adhesive tape in which cracks extend from the modified layer to the surface of the wafer; and, performing the step of heating the adhesive tape An external force is applied to divide the wafer into individual devices along a predetermined dividing line formed with a modified layer and a crack extending toward the surface. Processing methods.
上述分割步驟是將黏貼於晶圓表面的黏著膠帶側保持於吸盤工作台，用磨削磨石磨削晶圓背面以形成指 定厚度，並沿著形成有改質層及向表面擴展的裂縫的分割預定線，將晶圓分割成一個個的器件。 In the above slicing step, the side of the adhesive tape adhered to the surface of the wafer is held on the chuck table, and the back of the wafer is ground with a grinding stone to form a finger. The wafer is divided into individual devices along a predetermined dividing line having a predetermined thickness and a modified layer and a crack extending toward the surface.
本發明中之晶圓的加工方法包含，在晶圓表面黏貼黏著膠帶的黏著膠帶黏貼步驟、將對於晶圓具有透射性的波長的脈衝雷射光之聚光點從晶圓的背面側定位到內部並沿著分割預定線進行照射，在晶圓內部沿著分割預定線形成改質層之改質層形成步驟、將實施過該改質層形成步驟之晶圓的表面上所黏貼的黏著膠帶予以加熱，藉而使裂縫從改質層向晶圓的表面擴展之黏著膠帶加熱步驟，和，對實施過該黏著膠帶加熱步驟的晶圓施加外力，沿著形成有改質層及向表面擴展的裂縫之分割預定線，將晶圓分割成一個個的器件之分割步驟；在實施分割步驟時，由於黏著膠帶因實施上述黏著膠帶加熱步驟而變得柔軟，作用於晶圓表面側的壓縮應力被釋出，達到形成有改質層之晶圓的表面的裂縫擴展，所以即使並未積層而形成複數個改質層，還是能夠將晶圓沿著分割預定線確實地進行分割。從而，因為不需要積層而形成複數個改質層，所以能夠使生產性提高。 The method for processing a wafer according to the present invention includes an adhesive tape sticking step of attaching an adhesive tape on a surface of the wafer, and positioning a condensing point of pulsed laser light having a wavelength that is transmissive to the wafer from the back side of the wafer to the inside. And irradiating along the predetermined dividing line, forming a modified layer forming step along the predetermined dividing line inside the wafer, and applying an adhesive tape adhered on the surface of the wafer that has undergone the modifying layer forming step A heating step of heating the adhesive tape by which cracks extend from the reforming layer to the surface of the wafer, and applying an external force to the wafer subjected to the heating step of the adhesive tape, along the forming of the reforming layer and expanding toward the surface The dividing line of the crack is a dividing step for dividing the wafer into individual devices. When the dividing step is performed, since the adhesive tape is softened by the heating step of the adhesive tape, the compressive stress acting on the wafer surface side is affected. It is released that cracks on the surface of the wafer on which the modified layer is formed are spread, so even if multiple modified layers are formed without being laminated, the wafer can still be divided along the Reliably split the line. Therefore, since a plurality of modified layers are not required to be laminated, productivity can be improved.
2‧‧‧半導體晶圓 2‧‧‧ semiconductor wafer
2a‧‧‧表面 2a‧‧‧ surface
2b‧‧‧背面 2b‧‧‧ back
3‧‧‧黏著膠帶 3‧‧‧ Adhesive tape
4‧‧‧雷射加工裝置 4‧‧‧laser processing equipment
5‧‧‧加熱板 5‧‧‧ heating plate
6‧‧‧磨削裝置 6‧‧‧Grinding device
7‧‧‧膠帶擴張裝置 7‧‧‧Tape expansion device
21‧‧‧分割預定線 21‧‧‧ divided scheduled line
22‧‧‧器件 22‧‧‧device
41‧‧‧雷射加工裝置的吸盤工作台 41‧‧‧ sucker table of laser processing device
42‧‧‧雷射光照射機構 42‧‧‧Laser light irradiation mechanism
51‧‧‧載置面 51‧‧‧mounting surface
61‧‧‧磨削裝置的吸盤工作台 61‧‧‧Suck table of grinding device
62‧‧‧磨削機構 62‧‧‧Grinding mechanism
63‧‧‧轉軸套 63‧‧‧rotating shaft sleeve
64‧‧‧旋轉心軸 64‧‧‧rotating mandrel
65‧‧‧安裝器 65‧‧‧mounter
66‧‧‧磨削輪 66‧‧‧Grinding Wheel
67‧‧‧基台 67‧‧‧ abutment
68‧‧‧磨削磨石 68‧‧‧ grinding stone
69‧‧‧接頭螺栓 69‧‧‧Joint bolt
71‧‧‧框保持機構 71‧‧‧ frame holding mechanism
72‧‧‧膠帶擴張機構 72‧‧‧Tape expansion mechanism
73‧‧‧拾取筒夾 73‧‧‧Pickup Collets
210‧‧‧改質層 210‧‧‧Modified layer
211‧‧‧裂縫 211‧‧‧Crack
210a‧‧‧分割線 210a‧‧‧ dividing line
421‧‧‧套管 421‧‧‧ Casing
422‧‧‧聚光器 422‧‧‧Condenser
711‧‧‧框保持構件 711‧‧‧Frame holding member
711a‧‧‧載置面 711a‧‧‧mounting surface
712‧‧‧夾具 712‧‧‧Fixture
721‧‧‧擴張鼓輪 721‧‧‧Expansion drum
722‧‧‧支持輪緣 722‧‧‧Support rim
723‧‧‧支持機構 723‧‧‧ Supporting Agency
723a‧‧‧氣缸 723a‧‧‧cylinder
723b‧‧‧活塞桿 723b‧‧‧Piston rod
F‧‧‧環狀框 F‧‧‧ ring frame
T‧‧‧切割膠帶 T‧‧‧Cutting Tape
【圖1】作為利用本發明之晶圓的加工方法進行分割的半導體晶圓的斜視圖。 FIG. 1 is a perspective view of a semiconductor wafer divided by a wafer processing method of the present invention.
【圖2】(a)、(b)依據本發明之晶圓的加工方法中，黏著膠帶黏貼步驟的示意說明圖。 [Fig. 2] (a), (b) Schematic explanatory diagram of an adhesive tape sticking step in a wafer processing method according to the present invention.
【圖3】依據本發明之晶圓的加工方法中，用來實施改質層形成步驟的雷射加工裝置的主要部分斜視圖。 [FIG. 3] A perspective view of a main part of a laser processing apparatus for performing a modified layer forming step in a wafer processing method according to the present invention.
【圖4】(a)、(b)依據本發明之晶圓的加工方法中，改質層形成步驟的示意說明圖。 [Fig. 4] (a), (b) Schematic explanatory diagrams of steps for forming a modified layer in a wafer processing method according to the present invention.
【圖5】(a)~(c)依據本發明之晶圓的加工方法中，黏著膠帶加熱步驟的示意說明圖。 [Fig. 5] (a) to (c) Schematic explanatory diagrams of a heating step of an adhesive tape in a wafer processing method according to the present invention.
【圖6】(a)、(b)依據本發明之晶圓的加工方法中，分割步驟之第1實施態樣的背面磨削步驟說明圖。 [Fig. 6] (a), (b) In the wafer processing method according to the present invention, an explanation drawing of a back grinding step in the first embodiment of the dividing step.
【圖7】依據本發明之晶圓的加工方法中，在實施過黏著膠帶加熱步驟之晶圓的背面黏貼切割膠帶，並以環狀的框架支撐切割膠帶的外周部之晶圓支撐步驟的說明圖。 [Fig. 7] In the wafer processing method according to the present invention, a description of a wafer supporting step of attaching a dicing tape to a back surface of a wafer that has been subjected to an adhesive tape heating step and supporting an outer peripheral portion of the dicing tape with a ring-shaped frame Illustration.
【圖8】依據本發明之晶圓的加工方法中，用於實施分割步驟的第2實施態樣之膠帶擴張裝置的斜視圖。 [FIG. 8] A perspective view of a tape expansion device of a second embodiment for performing a singulation step in a wafer processing method according to the present invention.
【圖9】(a)~(c)依據本發明之晶圓的加工方法中，分割步驟的第2實施態樣示意說明圖。 [Fig. 9] (a) to (c) In the wafer processing method according to the present invention, the second embodiment of the dividing step is a schematic explanatory diagram.
以下將就本發明之晶圓的加工方法的適當實施態樣，參照所附圖式詳細地做說明。 In the following, suitable implementation modes of the wafer processing method of the present invention will be described in detail with reference to the attached drawings.
圖1中所示為，作為依據本發明進行加工之晶圓的半導體晶圓之斜視圖。圖1中所示之半導體晶圓2，是由厚度為例如，500μm的矽晶圓做成，表面2a上呈格子狀地形成有複數條分割預定線21，並在由該複數條分割預定線21區劃成的複數個區域上形成有IC、LSI等的器件22。以下， 將就沿著分割預定線21將該半導體晶圓2分割成一個個的器件22之晶圓的加工方法進行說明。 FIG. 1 is a perspective view of a semiconductor wafer as a wafer processed according to the present invention. The semiconductor wafer 2 shown in FIG. 1 is made of a silicon wafer having a thickness of, for example, 500 μm. A plurality of division dividing lines 21 are formed in a grid pattern on the surface 2a, and the division dividing lines are formed by the plurality of division division lines. Devices 22 such as ICs and LSIs are formed on a plurality of areas divided into 21 areas. the following, A processing method of the wafer in which the semiconductor wafer 2 is divided into individual devices 22 along the planned division line 21 will be described.
首先，為了保護形成於半導體晶圓2的表面2a之器件22，要實施在半導體晶圓2的表面2a黏貼黏著膠帶的黏著膠帶黏貼步驟。亦即，如圖2所示地，將黏著膠帶3黏貼於半導體晶圓2的表面2a。而且，黏著膠帶3在圖示的實施態樣中，是在由厚度為100μm的聚氯乙烯(PVC)所形成之片狀基材的表面上塗布了厚度5μm左右之丙烯酸樹脂系的糊狀物。 First, in order to protect the device 22 formed on the surface 2 a of the semiconductor wafer 2, an adhesive tape attaching step of adhering an adhesive tape to the surface 2 a of the semiconductor wafer 2 is performed. That is, as shown in FIG. 2, the adhesive tape 3 is adhered to the surface 2 a of the semiconductor wafer 2. In the embodiment shown in the figure, the adhesive tape 3 is an acrylic resin-based paste having a thickness of about 5 μm on the surface of a sheet-like substrate formed of polyvinyl chloride (PVC) having a thickness of 100 μm. .
如果已經在半導體晶圓2的表面2a黏貼了黏著膠帶3，就實施將對於半導體晶圓2具有透射性的波長之雷射光的聚光點定位於內部沿著分割預定線21照射，並在半導體晶圓2的內部沿著分割預定線21形成改質層之改質層形成步驟。此改質層形成步驟是用圖3中所示的雷射加工裝置4來實施。圖3中所示的雷射加工裝置4具備，保持被加工物的吸盤工作台41、對保持在該吸盤工作台41上的被加工物照射雷射光之雷射光照射機構42，和對保持在吸盤工作台41上之被加工物進行攝像之攝像機構43。吸盤工作台41係裝配成吸引保持被加工物的狀態，並利用未圖示出之移動機構，使其在圖3中以箭頭X表示的加工進給方向及以箭頭Y表示之分度進給方向上移動。 If the adhesive tape 3 has been pasted on the surface 2a of the semiconductor wafer 2, the light-condensing point of the laser light having a wavelength which is transmissive to the semiconductor wafer 2 is positioned inside and irradiated along the planned division line 21, and the semiconductor A modified layer forming step of forming a modified layer inside the wafer 2 along the planned division line 21. This modified layer forming step is performed using a laser processing apparatus 4 shown in FIG. 3. The laser processing apparatus 4 shown in FIG. 3 includes a chuck table 41 holding a workpiece, a laser light irradiating mechanism 42 that irradiates laser light on a workpiece held on the chuck table 41, and An imaging mechanism 43 for imaging an object to be processed on the chuck table 41. The suction table 41 is assembled to attract and hold the workpiece, and uses a moving mechanism (not shown) to make the processing feed direction indicated by the arrow X and the index feed indicated by the arrow Y in FIG. 3 Move in the direction.
上述雷射光照射機構42是，從實質上水平地配置之圓筒形狀的套管421之前端上所安裝的聚光器422照射脈衝雷射光。另外，安裝在構成上述雷射光照射機構42的套 管421之前端部的攝像機構43，除了在圖示的實施態樣中利用可見光來進行攝像之一般的攝像元件(CCD)之外，是以對被加工物照射紅外線的紅外線照明機構、捕捉由該紅外線照明機構所照射之紅外線的光學系統，輸出對應於被該光學系統捕捉到之紅外線的電氣信號的攝像元件(紅外線CCD)等構成，並將所拍攝到的影像信號傳送到未圖示出之控制機構。 The laser light irradiating mechanism 42 irradiates pulsed laser light from a condenser 422 attached to the front end of a cylindrical sleeve 421 disposed substantially horizontally. In addition, it is mounted on a sleeve constituting the laser light irradiation mechanism 42 described above. The imaging mechanism 43 at the front end of the tube 421 is an infrared illuminating mechanism that captures the object to be processed, in addition to a general imaging element (CCD) that uses visible light for imaging in the illustrated embodiment. An optical system of infrared rays irradiated by the infrared illuminating mechanism is configured by an imaging element (infrared CCD) or the like that outputs electrical signals corresponding to infrared rays captured by the optical system, and transmits the captured image signals to an unillustrated image. Control agency.
關於使用上述的雷射加工裝置4來實施之改質層形成步驟，將參照圖3及圖4進行說明。 The modified layer forming step performed using the laser processing apparatus 4 described above will be described with reference to FIGS. 3 and 4.
此改質層形步驟，首先要將實施過上述黏著膠帶黏貼步驟的半導體晶圓2之黏著膠帶3側，載置於上述圖3中所示之雷射加工裝置4的吸盤工作台41上。然後，以未圖示出之吸引機構將半導體晶圓2隔著黏著膠帶3吸引保持於吸盤工作台41上(晶圓保持步驟)。因此，被保持在吸盤工作台41上的半導體晶圓2，其背面2b成為上側。像這樣地操作，吸引保持著半導體晶圓2的吸盤工作台41會由未圖示出之加工進給機構定位到攝像機構43的正下方。 In this modified layering step, first, the side of the adhesive tape 3 of the semiconductor wafer 2 that has been subjected to the above-mentioned adhesive tape sticking step is placed on the chuck table 41 of the laser processing apparatus 4 shown in FIG. 3 described above. Then, the semiconductor wafer 2 is sucked and held on the chuck table 41 by the suction mechanism (not shown) via the adhesive tape 3 (wafer holding step). Therefore, the semiconductor wafer 2 held on the chuck table 41 has its back surface 2b on the upper side. In this manner, the chuck table 41 that sucks and holds the semiconductor wafer 2 is positioned directly below the imaging mechanism 43 by a processing feed mechanism (not shown).
吸盤工作台41一被定位到攝像機構43的正下方，就由攝像機構43及未圖示出的控制機構執行檢測半導體晶圓2之應實施雷射加工的加工區域的對準作業。亦即，攝像機構43及未圖示出之控制機構要執行，用來實施形成於半導體晶圓2之指定方向上的分割預定線21，與沿著分割預定線21照射雷射光的雷射光照射機構42之聚光器422的對準之圖案匹配等的影像處理，完成雷射光照射位置的校準。 另外，對於相對於形成在半導體晶圓2之上述指定方向在直交的方向延伸之分割預定線21，也同樣地執行雷射光照射位置的校準。此時，形成有半導體晶圓2之分割預定線21的表面2a雖然是位於下側，但是因為攝像機構43係如上所述地具備以紅外線照明機構和捕捉紅外線的光學系統，以及輸出對應於紅外線的電氣信號之攝像元件(紅外線CCD)等構成的攝像機構，所以能夠從背面2b透過而對分割預定線21進行攝像。 As soon as the chuck table 41 is positioned directly below the imaging mechanism 43, the imaging mechanism 43 and a control mechanism (not shown) perform an alignment operation to detect a processing region of the semiconductor wafer 2 where laser processing should be performed. That is, the imaging mechanism 43 and a control mechanism (not shown) are executed to implement the planned division line 21 formed in the specified direction of the semiconductor wafer 2 and the laser light irradiation along which the laser light is irradiated along the planned division line 21. The image processing such as the pattern matching of the alignment of the condenser 422 of the mechanism 42 completes the calibration of the laser light irradiation position. In addition, the laser beam irradiation position calibration is performed similarly to the planned division line 21 extending in a direction orthogonal to the predetermined direction formed on the semiconductor wafer 2. At this time, although the surface 2a on which the division line 21 of the semiconductor wafer 2 is formed is located on the lower side, the imaging mechanism 43 is provided with an infrared illuminating mechanism and an optical system for capturing infrared rays as described above, and outputs corresponding to the infrared rays. The imaging mechanism including an imaging element (infrared CCD) of an electric signal can transmit the image of the planned division line 21 through the back surface 2b.
如以上所述地操作，如果對形成於被保持在吸盤工作台41上之半導體晶圓2的分割預定線21進行檢測，並實施過雷射光照射位置的校準，就如在圖4之(a)所示地，使吸盤工作台41移動到照射雷射光之雷射光照射機構42的聚光器422所位處的雷射光照射區域，將指定之分割預定線21的一端(在圖4之(a)中為左端)定位到雷射光照射機構42之聚光器422的正下方。接著，將由聚光器422所照射之脈衝雷射光的聚光點P定位至比半導體晶圓2的厚度方向中間部更靠表面側(下側)。然後，一邊從聚光器422照射對矽晶圓具有透射性的波長之脈衝雷射光，一邊使吸盤工作台41在圖4之(a)中以箭頭X1表示的方向上以指定的進給速度移動。接著，雷射光照射機構42之聚光器422的照射位置到達分割預定線21的另一端的位置之後，就停止脈衝雷射光的照射，並停止吸盤工作台41的移動。結果，如圖4之(b)所示，在半導體晶圓2的內部，沿著分割預定線21連續地形成改質層210。 Operating as described above, if the predetermined division line 21 of the semiconductor wafer 2 formed on the chuck table 41 is detected and the laser light irradiation position is calibrated, it is as shown in FIG. 4 (a As shown in the figure, the sucker table 41 is moved to the laser light irradiation area where the condenser 422 of the laser light irradiation mechanism 42 irradiating the laser light is located, and one end of the designated predetermined division line 21 (in FIG. 4 (( (a) is the left end) is positioned directly under the condenser 422 of the laser light irradiation mechanism 42. Next, the light-condensing point P of the pulsed laser light irradiated by the condenser 422 is positioned closer to the surface side (lower side) than the thickness middle portion of the semiconductor wafer 2. Then, while irradiating the pulse laser light having a wavelength which is transmissive to the silicon wafer from the condenser 422, the chuck table 41 is moved at a specified feed rate in a direction indicated by an arrow X1 in FIG. 4 (a). mobile. Next, after the irradiation position of the condenser 422 of the laser light irradiation mechanism 42 reaches the position of the other end of the division line 21, the irradiation of the pulse laser light is stopped, and the movement of the chuck table 41 is stopped. As a result, as shown in FIG. 4 (b), a modified layer 210 is continuously formed inside the semiconductor wafer 2 along the planned division line 21.
此外，上述改質層形成步驟中的加工條件舉例而言係設定如下。 The processing conditions in the modified layer forming step are set as follows, for example.
波長：1064nm的脈衝雷射 Wavelength: 1064nm pulsed laser
重複頻率：100kHz Repetition frequency: 100kHz
平均輸出：1W Average output: 1W
聚光點徑：φ1μm Condensing spot diameter: φ1μm
加工進給速度：100mm/秒 Processing feed speed: 100mm / s
如上所述地沿著指定的分割預定線21實施過上述改質層形成步驟之後，就在以箭頭Y表示的方向上將吸盤工作台41僅分度進給形成於半導體晶圓2之分割預定線21的間隔(分度進給步驟)，再執行上述改質層形成步驟。如果像這樣地操作，沿著指定方向上所形成之全部的分割預定線21實施完上述改質層形成步驟，就將吸盤工作台41轉動90度，再沿著延伸在對形成於上述指定方向的分割預定線21形成直交的方向之分割預定線21實行上述改質層形成步驟。 After performing the reforming layer forming step along the designated dividing line 21 as described above, the chuck table 41 is fed only in the direction indicated by the arrow Y only to the dividing plan formed on the semiconductor wafer 2 At the interval of the line 21 (the index feeding step), the modified layer forming step described above is performed again. If you operate in this way, after performing the above-mentioned modified layer forming step along all the predetermined division lines 21 formed in the specified direction, the suction cup table 41 is rotated 90 degrees, and then formed in the specified direction along the extension. The planned division line 21 in the direction orthogonal to the divided division line 21 performs the above-mentioned modified layer forming step.
實施完上述改質層形成步驟後，就對黏貼在形成有改質層之半導體晶圓2的表面之黏著膠帶3進行加熱，藉此實施使裂縫從改質層210向半導體晶圓2的表面擴展之黏著膠帶加熱步驟。此黏著膠帶加熱步驟在圖示的實施態樣中是採用圖5之(a)中所示的加熱板5來實施。亦即，如圖5之(b)所示地，將實施過上述改質層形成步驟而已形成改質層210之半導體晶圓2的表面上所黏貼著的黏著膠帶3側，載置於加熱板5的上面，即載置面51上。然後，使加熱板5作 動，將黏著膠帶3加熱到50~150度。結果，黏著膠帶3變柔軟，作用於半導體晶圓2的表面2a之壓縮應力被釋出，如圖5之(c)所示地，裂縫211向形成有改質層210之半導體晶圓2的表面2a擴展。 After the step of forming the modified layer is performed, the adhesive tape 3 adhered to the surface of the semiconductor wafer 2 on which the modified layer is formed is heated, thereby implementing the crack from the modified layer 210 to the surface of the semiconductor wafer 2. Extended adhesive tape heating step. This step of heating the adhesive tape is carried out using the heating plate 5 shown in FIG. 5 (a) in the illustrated embodiment. That is, as shown in FIG. 5 (b), the side of the adhesive tape 3 adhered to the surface of the semiconductor wafer 2 on which the modified layer 210 has been formed after performing the modified layer forming step is placed on heating The upper surface of the plate 5 is the mounting surface 51. Then, make the heating plate 5 work Then, heat the adhesive tape 3 to 50 ~ 150 degrees. As a result, the adhesive tape 3 becomes soft, and the compressive stress acting on the surface 2 a of the semiconductor wafer 2 is released. As shown in FIG. 5 (c), the crack 211 is directed toward the semiconductor wafer 2 on which the modified layer 210 is formed. Surface 2a expands.
如果已經實施過上述黏著膠帶加熱步驟，就對半導體晶圓2施加外力，實施沿著形成有改質層210及向表面擴展的裂縫211之分割預定線21，將半導體晶圓2分割成一個個的器件之分割步驟。關於此分割步驟的第1實施態樣(背面磨削步驟)，將參照圖6進行說明。分割步驟的第1實施態樣(背面磨削步驟)係使用圖6之(a)的磨削裝置6來實施。圖6之(a)所示的磨削裝置6具備，作為保持被加工物之保持機構的吸盤工作台61，和對被保持在該吸盤工作台61的被加工物進行磨削之磨削機構62。吸盤工作台61裝配成將被加工物吸引保持在上面，並以未圖示出之旋轉驅動機構在圖6之(a)中以箭頭A表示的方向上旋轉。磨削機構62具備轉軸套63、旋轉自如地為該轉軸套63所支持並以未圖示出之旋轉驅動機構做旋轉之旋轉心軸64、安裝在該旋轉心軸64下端的安裝器65，和裝設在該安裝器65下面的磨削輪66。此磨削輪66由圓環狀的基台67，和呈環狀地安裝在該基台67下面的磨削磨石68構成，基台67利是用接頭螺栓69安裝在安裝器65下面。 If the above-mentioned heating step of the adhesive tape has been performed, an external force is applied to the semiconductor wafer 2 and a division line 21 is formed along the planned division line 21 where the modified layer 210 and the crack 211 extending toward the surface are formed, and the semiconductor wafer 2 is divided into individual pieces. Of the device. A first embodiment of this division step (back surface grinding step) will be described with reference to FIG. 6. A first embodiment of the dividing step (back surface grinding step) is performed using the grinding device 6 of FIG. 6 (a). The grinding device 6 shown in (a) of FIG. 6 includes a chuck table 61 as a holding mechanism for holding a workpiece, and a grinding mechanism for grinding a workpiece to be held on the chuck table 61. 62. The chuck table 61 is mounted to suck and hold the object to be processed thereon, and rotates in a direction indicated by an arrow A in FIG. 6 (a) by a rotation driving mechanism (not shown). The grinding mechanism 62 includes a rotating shaft sleeve 63, a rotating mandrel 64 rotatably supported by the rotating shaft sleeve 63 and rotated by a rotation driving mechanism (not shown), and a mounter 65 mounted on the lower end of the rotating shaft 64. And a grinding wheel 66 mounted under the mounter 65. This grinding wheel 66 is composed of a ring-shaped base 67 and a grinding grindstone 68 which is annularly mounted below the base 67. The base 67 is mounted under the mounter 65 with joint bolts 69.
使用上述的磨削裝置6來實施分割步驟之第1實施態樣的背面磨削步驟時，係如圖6之(a)所示地，將黏貼在半導體晶圓2的表面之黏著膠帶3側載置於吸盤工作台61的 上面(保持面)。然後，以未圖示出之吸引機構將半導體晶圓2隔著黏著膠帶3吸引保持在吸盤工作台61上(晶圓保持步驟)。因此，被保持在吸盤工作台61上的半導體晶圓2就成了背面2b在上側。如果已經像這樣地將半導體晶圓2隔著黏著膠帶3吸引保持在吸盤工作台61上，就一邊使吸盤工作台61在圖6之(a)中用箭頭A表示的方向上以例如300rpm旋轉，一邊讓磨削機構62的磨削輪66在圖6之(a)中用箭頭B表示的方向上以例如6000rpm旋轉，如圖6之(b)所示地，使磨削磨石68接觸被加工面，即半導體晶圓2的背面2b，並且如箭頭C所示地，以例如1μm/秒的磨削進給速度，使磨削輪66向下方(對吸盤工作台61的保持面呈垂直的方向)進行指定量的磨削進給。結果，半導體晶圓2的背面2b受到磨削，半導體晶圓2形成指定的厚度(例如150μm)，且沿著形成有改質層210及向表面擴展的裂缝211而降低強度的分割預定線21形成分割線210a，進而分割成一個個的器件22。因為分別地被分割的複數個器件22在其表面上黏貼著黏著膠帶3，所以並不會四分五裂，而維持著半導體晶圓2的形態。這麼做，藉由實施背面磨削步驟，半導體晶圓2就會沿著形成有改質層210及向表面擴展的裂缝211而降低強度的分割預定線21確實地形成分割線210a，被分割成一個個的器件22。此分割步驟在實施背面磨削步驟時，因為裂縫211如上所述地從改質層210擴展達到表面，所以即使並未積層而形成複數個改質層，還是可以沿著分割預定線21確實地分割半導體晶圓2。從而，因為不須要積層而形成複數個改質層，所 以可以使生產性提高。 When the above-mentioned grinding device 6 is used to perform the back grinding step of the first embodiment of the dividing step, as shown in FIG. 6 (a), the side of the adhesive tape 3 adhered to the surface of the semiconductor wafer 2 Placed on suction cup table 61 Above (holding surface). Then, the semiconductor wafer 2 is sucked and held on the chuck table 61 by the suction mechanism (not shown) via the adhesive tape 3 (wafer holding step). Therefore, the semiconductor wafer 2 held on the chuck table 61 becomes the back surface 2b on the upper side. If the semiconductor wafer 2 has been attracted and held on the chuck table 61 via the adhesive tape 3 as described above, the chuck table 61 is rotated at, for example, 300 rpm in the direction indicated by the arrow A in FIG. 6 (a). While rotating the grinding wheel 66 of the grinding mechanism 62 in a direction indicated by arrow B in FIG. 6 (a) at, for example, 6000 rpm, as shown in FIG. 6 (b), the grinding stone 68 is brought into contact The processed surface, that is, the back surface 2b of the semiconductor wafer 2, and as shown by the arrow C, the grinding wheel 66 is moved downward at a grinding feed rate of, for example, 1 μm / s (presented to the holding surface of the chuck table 61 (Vertical direction) A specified amount of grinding feed is performed. As a result, the back surface 2b of the semiconductor wafer 2 is ground, the semiconductor wafer 2 is formed to a predetermined thickness (for example, 150 μm), and a predetermined dividing line 21 is formed to reduce the strength along the modified layer 210 and the crack 211 extending toward the surface. A dividing line 210a is formed, and further divided into individual devices 22. Since the plurality of divided devices 22 are each adhered with the adhesive tape 3 on the surface thereof, the shape of the semiconductor wafer 2 is not fragmented. In this way, by performing the back-grinding step, the semiconductor wafer 2 will surely form a dividing line 210a along the planned dividing line 21 where the modified layer 210 and the crack 211 extending toward the surface are reduced in strength, and is divided into One by one of the devices 22. When the back-grinding step is performed in this segmentation step, since the crack 211 extends from the reforming layer 210 to the surface as described above, even if a plurality of reforming layers are formed without being laminated, it is possible to reliably follow the planned division line 21 Divide the semiconductor wafer 2. Therefore, because multiple reformed layers are not required to be laminated, so So that productivity can be improved.
其次，關於分割步驟之第2實施態樣，將參照圖7至圖9進行說明。 Next, a second embodiment of the division step will be described with reference to FIGS. 7 to 9.
在此實施態樣中，要先實施晶圓支持步驟，在已實施過上述黏著膠帶加熱步驟之半導體晶圓2的背面2b黏貼切割膠帶，並且用環狀的框架支持該切割膠帶的外周部。亦即，如圖7所示，將已實施過上述黏著膠帶加熱步驟的半導體晶圓2之背面2b，黏貼到外周部被安裝成覆蓋環狀框F的內側開口部之切割膠帶T的表面上。然後，將黏貼在半導體晶圓2之表面2a的黏著膠帶3剝離。因此，黏貼在切割膠帶T表面的半導體晶圓2就變成表面2a在上側。 In this embodiment, a wafer supporting step is performed first, a dicing tape is adhered to the back surface 2b of the semiconductor wafer 2 that has been subjected to the above-mentioned adhesive tape heating step, and an outer peripheral portion of the dicing tape is supported by a ring-shaped frame. That is, as shown in FIG. 7, the back surface 2 b of the semiconductor wafer 2 that has been subjected to the above-mentioned heating step of the adhesive tape is adhered to the surface of the dicing tape T whose outer peripheral portion is mounted to cover the inner opening of the annular frame F. . Then, the adhesive tape 3 adhered to the surface 2 a of the semiconductor wafer 2 is peeled off. Therefore, the semiconductor wafer 2 adhered to the surface of the dicing tape T becomes the surface 2a on the upper side.
像這樣，實施過晶圓支持步驟後，就實施分割步驟，將黏貼著半導體晶圓2的切割膠帶T予以擴張，藉以對半導體晶圓2施加外力，沿著形成有改質層210及裂縫211的分割預定線21分割半導體晶圓2。此分割步驟是用圖8所示的膠帶擴張裝置7來實施。圖8中所示之膠帶擴張裝置7具備，保持上述環狀框F的框保持機構71、將安裝在被保持於該框保持機構71之環狀框F的切割膠帶T予以擴張之膠帶擴張機構72，和檢拾筒夾73。框保持機構71由環狀的框保持構件711，和配設在該框保持構件711的外周之作為固定機構的複數個夾具712組成。框保持構件711的上面形成載置環狀框F的載置面711a，環狀框F被載置於該載置面711a上。而且，載置面711a上所載置的環狀框F被夾具712固定在框保持構件711。如此構成的框保持機構71被膠帶擴張機構72能 夠在上下方向進退地支持著。 In this way, after the wafer support step is performed, a singulation step is performed to expand the dicing tape T adhered to the semiconductor wafer 2 to apply an external force to the semiconductor wafer 2 along with the modified layer 210 and the crack 211 formed. The planned dividing line 21 divides the semiconductor wafer 2. This dividing step is performed by the tape expansion device 7 shown in FIG. 8. The tape expansion device 7 shown in FIG. 8 includes a frame holding mechanism 71 that holds the ring frame F, and a tape expansion mechanism that expands the cutting tape T attached to the ring frame F held by the frame holding mechanism 71. 72, and pick up collet 73. The frame holding mechanism 71 is composed of a ring-shaped frame holding member 711 and a plurality of jigs 712 provided as a fixing mechanism on the outer periphery of the frame holding member 711. A mounting surface 711 a on which the ring-shaped frame F is placed is formed on the upper surface of the frame holding member 711, and the ring-shaped frame F is placed on the mounting surface 711 a. The ring frame F mounted on the mounting surface 711 a is fixed to the frame holding member 711 by the jig 712. The frame holding mechanism 71 configured in this manner can be Enough to support forward and backward.
膠帶擴張機構72具備配設在上述環狀的框保持構件711內側的擴張鼓輪721。此擴張鼓輪721具有比環狀框F的內徑小，而且比黏貼至該環狀框F上所安裝之切割膠帶T上的半導體晶圓2的外徑大的內徑及外徑。另外，擴張鼓輪721在下端具有支持輪緣722。圖示之實施態樣中的膠帶擴張機構72具備能夠使上述環狀的框保持構件711在上下方向進退的支持機構723。此支持機構723由配設在上述支持輪緣722上的複數個氣缸723a構成，其活塞桿723b連結於上述環狀的框保持構件711的下面。像這樣由複數個氣缸723a構成的支持機構723係在，如圖9之(a)所示，載置面711a與擴張鼓輪721的上端大約在同一高度的基準位置，和如圖9之(b)所示，比起擴張鼓輪721的上端在指定量下方的擴張位置之間，使環狀的框保持構件711於上下方向移動。 The tape expansion mechanism 72 includes an expansion drum 721 disposed inside the ring-shaped frame holding member 711. The expansion drum 721 has an inner diameter and an outer diameter smaller than the inner diameter of the ring frame F and larger than the outer diameter of the semiconductor wafer 2 attached to the dicing tape T mounted on the ring frame F. The expansion drum 721 has a supporting rim 722 at the lower end. The tape expansion mechanism 72 in the illustrated embodiment includes a support mechanism 723 capable of advancing and retreating the ring-shaped frame holding member 711 in the vertical direction. This support mechanism 723 is composed of a plurality of cylinders 723a arranged on the support rim 722, and a piston rod 723b thereof is connected to the lower surface of the annular frame holding member 711. As shown in FIG. 9 (a), the supporting mechanism 723 composed of a plurality of air cylinders 723a is such that the mounting surface 711a and the upper end of the expansion drum 721 are at a reference position at approximately the same height, as shown in FIG. 9 ( As shown in b), the ring-shaped frame holding member 711 is moved in the up-down direction between the expanded positions below the designated end of the expanded drum 721.
關於採用這樣地構成之膠帶擴張裝置7來實施的分割步驟，將參照圖9之(a)及(b)進行說明。亦即，將安裝著黏貼有半導體晶圓2之切割膠帶T的環狀框F，如圖9之(a)所示地載置於構成框保持機構71的框保持構件711的載置面711a上，並且用夾具712固定於框保持構件711(框保持步驟)。此時，框保持構件711被定位在圖9之(a)所示的基準位置。接著，使作為構成膠帶擴張機構72之支持機構723的複數個氣缸723a作動，讓環狀的框保持構件711下降到圖9之(b)所示的擴張位置。從而，因為固定在框保持構件711的載置面711a上之環狀框F也下降，所以如圖9之(b)所示，安裝 在環狀框F的切割膠帶T緊貼於擴張鼓輪721的上端緣而被擴張(膠帶擴張步驟)。結果，由於張力呈放射狀地作用在黏貼於切割膠帶T的半導體晶圓2，因此不但會沿著形成有上述改質層210及裂縫211且強度下降之分割預定線21分割成一個個的器件22，並會在器件22間形成間隔S。像這樣，在實施作為分割步驟的膠帶擴張步驟時，因為改質層210及裂缝211擴展達到表面，所以即使半導體晶圓2並未積層而形成複數個改質層，依然可以沿著分割預定線21確實地分割半導體晶圓2。從而，因為不必積層以形成複數個改質層，所以可以使生產性向上提昇。 The division steps performed using the tape expansion device 7 configured as described above will be described with reference to FIGS. 9 (a) and (b). That is, as shown in FIG. 9 (a), the ring frame F on which the dicing tape T of the semiconductor wafer 2 is mounted is placed on the mounting surface 711 a of the frame holding member 711 constituting the frame holding mechanism 71. And is fixed to the frame holding member 711 by the jig 712 (frame holding step). At this time, the frame holding member 711 is positioned at the reference position shown in (a) of FIG. 9. Next, a plurality of air cylinders 723a serving as the support mechanism 723 constituting the tape expansion mechanism 72 are operated to lower the ring-shaped frame holding member 711 to the expanded position shown in FIG. 9 (b). Therefore, since the ring frame F fixed on the mounting surface 711a of the frame holding member 711 is also lowered, it is mounted as shown in FIG. 9 (b). The dicing tape T in the ring frame F is in close contact with the upper end edge of the expansion drum 721 and is expanded (tape expansion step). As a result, since the tension acts radially on the semiconductor wafer 2 adhered to the dicing tape T, it is not only divided into individual devices along the planned dividing line 21 where the modified layer 210 and the crack 211 are formed and the strength is reduced. 22, and a space S will be formed between the devices 22. In this way, when the tape expansion step as the dividing step is performed, since the modified layer 210 and the crack 211 are expanded to the surface, even if the semiconductor wafer 2 is not laminated and a plurality of modified layers are formed, it can still be along the planned dividing line. 21 divides the semiconductor wafer 2 surely. Therefore, since it is not necessary to laminate to form a plurality of modified layers, productivity can be improved upward.
接著，如圖9之(c)所示，使拾取筒夾73作動以吸附器件22，再從切割膠帶T剝離並拾取，搬送到未圖示出的工作盤或黏晶步驟。此外，在拾取步驟中，因為如上所述地，黏貼於切割膠帶T的各個器件22間的間隙S被擴大，所以能夠在不與相鄰的器件22接觸之下容易地進行拾取。 Next, as shown in FIG. 9 (c), the pickup collet 73 is actuated to attract the device 22, and then it is peeled off from the dicing tape T and picked up, and then transferred to a work tray or a die attaching step (not shown). Further, in the picking step, as described above, the gap S between the devices 22 adhered to the dicing tape T is enlarged, so that picking can be easily performed without contacting the adjacent devices 22.
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| JP6855127B2 (en) * | 2017-06-05 | 2021-04-07 | 株式会社ディスコ | Chip manufacturing method |
| JP6879832B2 (en) * | 2017-06-14 | 2021-06-02 | 株式会社ディスコ | Wafer processing method |
| CN110098148A (en) * | 2018-01-30 | 2019-08-06 | 株式会社迪思科 | The processing method of chip |
| JP7075242B2 (en) * | 2018-02-28 | 2022-05-25 | 株式会社ディスコ | Processing method of work piece |
| JP7088768B2 (en) * | 2018-07-24 | 2022-06-21 | 株式会社ディスコ | Wafer division method |
| JP7154860B2 (en) * | 2018-07-31 | 2022-10-18 | 株式会社ディスコ | Wafer processing method |
| JP7204380B2 (en) | 2018-08-28 | 2023-01-16 | 株式会社ディスコ | table |
| JP2020061398A (en) * | 2018-10-05 | 2020-04-16 | 株式会社ディスコ | Processing method for wafer |
| JP2020077782A (en) * | 2018-11-08 | 2020-05-21 | 株式会社ディスコ | Method for processing wafer |
| TWI727860B (en) * | 2020-07-22 | 2021-05-11 | 環球晶圓股份有限公司 | Wafer transverse impact test device and wafer strength test method |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW201217134A (en) * | 2010-09-30 | 2012-05-01 | Disco Corp | Sapphire wafer dividing method |
| US20130017670A1 (en) * | 2000-09-13 | 2013-01-17 | Hamamatsu Photonics K.K. | Laser processing method and laser processing apparatus |
| TW201446928A (en) * | 2013-03-28 | 2014-12-16 | Furukawa Electric Co Ltd | Adhesive tape and wafer-processing tape |
Family Cites Families (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3408805B2 (en) | 2000-09-13 | 2003-05-19 | 浜松ホトニクス株式会社 | Cutting origin region forming method and workpiece cutting method |
| DE60313900T2 (en) * | 2002-03-12 | 2008-01-17 | Hamamatsu Photonics K.K., Hamamatsu | Method for separating substrates |
| JP4509720B2 (en) | 2002-03-12 | 2010-07-21 | 浜松ホトニクス株式会社 | Laser processing method |
| EP1742253B1 (en) * | 2004-03-30 | 2012-05-09 | Hamamatsu Photonics K.K. | Laser processing method |
| JP2006229021A (en) | 2005-02-18 | 2006-08-31 | Disco Abrasive Syst Ltd | Wafer dividing method |
| JP2007134390A (en) * | 2005-11-08 | 2007-05-31 | Disco Abrasive Syst Ltd | Processing process of wafer |
| JP4769560B2 (en) | 2005-12-06 | 2011-09-07 | 株式会社ディスコ | Wafer division method |
| JP5307384B2 (en) * | 2007-12-03 | 2013-10-02 | 株式会社ディスコ | Wafer division method |
| JP2009290148A (en) | 2008-06-02 | 2009-12-10 | Disco Abrasive Syst Ltd | Method of dividing wafer |
| JP5558129B2 (en) * | 2010-02-05 | 2014-07-23 | 株式会社ディスコ | Processing method of optical device wafer |
| JP5953645B2 (en) | 2010-11-16 | 2016-07-20 | 株式会社東京精密 | Semiconductor substrate cutting method and semiconductor substrate cutting apparatus |
| JP5825511B2 (en) * | 2011-06-13 | 2015-12-02 | 株式会社東京精密 | Semiconductor substrate cutting method |
| JP2014011381A (en) * | 2012-07-02 | 2014-01-20 | Disco Abrasive Syst Ltd | Wafer processing method |
| JP2014067818A (en) * | 2012-09-25 | 2014-04-17 | Disco Abrasive Syst Ltd | Fixing method of tape slack of frame unit |
| US20140145294A1 (en) * | 2012-11-28 | 2014-05-29 | Nxp B.V. | Wafer separation |
| JP2014165462A (en) * | 2013-02-27 | 2014-09-08 | Lintec Corp | Semiconductor chip manufacturing method |
| JP6232230B2 (en) * | 2013-08-30 | 2017-11-15 | 株式会社ディスコ | Wafer processing method |
-
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20130017670A1 (en) * | 2000-09-13 | 2013-01-17 | Hamamatsu Photonics K.K. | Laser processing method and laser processing apparatus |
| TW201217134A (en) * | 2010-09-30 | 2012-05-01 | Disco Corp | Sapphire wafer dividing method |
| TW201446928A (en) * | 2013-03-28 | 2014-12-16 | Furukawa Electric Co Ltd | Adhesive tape and wafer-processing tape |
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| JP2016213318A (en) | 2016-12-15 |
| KR20160131905A (en) | 2016-11-16 |
| CN106129003B (en) | 2019-05-31 |
| TW201715595A (en) | 2017-05-01 |
| KR102437901B1 (en) | 2022-08-29 |
| JP6456766B2 (en) | 2019-01-23 |
| CN106129003A (en) | 2016-11-16 |
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