TWI662719B - Light-emitting device - Google Patents

Light-emitting device Download PDF

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Publication number
TWI662719B
TWI662719B TW106141186A TW106141186A TWI662719B TW I662719 B TWI662719 B TW I662719B TW 106141186 A TW106141186 A TW 106141186A TW 106141186 A TW106141186 A TW 106141186A TW I662719 B TWI662719 B TW I662719B
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Taiwan
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layer
light
electrode
conductive layer
emitting stack
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TW106141186A
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TW201806187A (en
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陳世益
陳威佑
陳怡名
林敬倍
李宗憲
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晶元光電股份有限公司
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Abstract

一發光元件,包括:一發光疊層,具有一長度、一寬度、一第一電性半導體層、一活性層位於上述第一電性半導體層之上、以及一第二電性半導體層位於上述活性層之上,其中上述第一電性半導體層,上述活性層,及上述第二電性半導體層沿著一堆疊方向堆疊;一第一電極和上述第一電性半導體層相連結且向平行於上述堆疊方向之方向延伸;一第二電極和上述第二電性半導體層相連結且向平行於上述堆疊方向之方向延伸;以及一絕緣層位於上述第一電極和上述第二電極之間。A light emitting element includes: a light emitting stack having a length, a width, a first electrical semiconductor layer, an active layer on the first electrical semiconductor layer, and a second electrical semiconductor layer on the above. Above the active layer, the first electrical semiconductor layer, the active layer, and the second electrical semiconductor layer are stacked along a stacking direction; a first electrode is connected to the first electrical semiconductor layer and is parallel Extending in the direction of the stacking direction; a second electrode connected to the second electrical semiconductor layer and extending in a direction parallel to the stacking direction; and an insulating layer located between the first electrode and the second electrode.

Description

發光元件Light emitting element

本發明係關於發光元件,尤其關於可增加光取出之發光元件。 The present invention relates to a light-emitting element, and more particularly to a light-emitting element capable of increasing light extraction.

一般之發光二極體之示意簡圖如圖1A及圖1B所示,圖1A為上視圖,圖1B為側視圖。一般之發光二極體係在基板111上形成一發光疊層101,由下而上依序包括第一電性半導體層101a、活性層101b、及第二電性半導體層101c。第一電性半導體層101a和第二電性半導體層101c電性相異,例如第一電性半導體層101a是n型半導體層,而第二電性半導體層101c是p型半導體層。分別在第一電性半導體層101a上設有一第一電極104,及在第二電性半導體層101c上設有一第二電極105以傳遞電流。此外,在第二電性半導體層101c上亦設有一透明導電層103以為做為歐姆接觸層。目前金屬和透明導電材料都可應用在LED元件作為歐姆接觸材料,只是金屬有良好的電流傳遞的優點卻會有吸光的缺點,而透明導電材料雖具有透光的優點,但電流傳遞則不如金屬。所以目前的解決方式大多是使用透明導電層103來做歐姆接觸,再同時搭配金屬線來做延伸電極105a以傳遞電流。在有金屬線的延伸電極105a設計下,可以達到良好的電流擴散,但是也增加了金屬的遮光,因而導致亮度的損耗。 A schematic diagram of a general light emitting diode is shown in FIG. 1A and FIG. 1B. FIG. 1A is a top view and FIG. 1B is a side view. A general light emitting diode system forms a light emitting stack 101 on a substrate 111, and includes a first electrical semiconductor layer 101a, an active layer 101b, and a second electrical semiconductor layer 101c in this order from bottom to top. The first electrical semiconductor layer 101a and the second electrical semiconductor layer 101c are electrically different. For example, the first electrical semiconductor layer 101a is an n-type semiconductor layer, and the second electrical semiconductor layer 101c is a p-type semiconductor layer. A first electrode 104 is provided on the first electrical semiconductor layer 101a, and a second electrode 105 is provided on the second electrical semiconductor layer 101c to transmit current. In addition, a transparent conductive layer 103 is also provided on the second electrical semiconductor layer 101c as an ohmic contact layer. At present, both metal and transparent conductive materials can be applied to LED elements as ohmic contact materials. However, metal has the advantage of good current transmission but it has the disadvantage of light absorption. Although transparent conductive materials have the advantage of light transmission, current transmission is not as good as metal . Therefore, most of the current solutions are to use the transparent conductive layer 103 for ohmic contact, and then use metal wires as extension electrodes 105a to transfer current. Under the design of the extension electrode 105a with a metal line, good current diffusion can be achieved, but the shading of the metal is also increased, which results in loss of brightness.

一發光元件,包括:一發光疊層,具有一長度、一寬度、一第一電性半導體層、一活性層位於上述第一電性半導體層之上、以及一第二電性半導體層位於上述活性層之上,其中上述第一電性半導體層,上述活性層,及上述第二電性半導體層沿著一堆疊方向堆疊;一第一電極和上述第一電性半導體層相連結且向平行於上述堆疊方向之方向延伸;一第二電極和上述第二電性半導體層相連結且向平行於上述堆疊方向之方向延伸;以及一絕緣層位於上述第一電極和上述第二電極之間。 A light emitting element includes: a light emitting stack having a length, a width, a first electrical semiconductor layer, an active layer on the first electrical semiconductor layer, and a second electrical semiconductor layer on the above. Above the active layer, the first electrical semiconductor layer, the active layer, and the second electrical semiconductor layer are stacked along a stacking direction; a first electrode is connected to the first electrical semiconductor layer and is parallel Extending in the direction of the stacking direction; a second electrode connected to the second electrical semiconductor layer and extending in a direction parallel to the stacking direction; and an insulating layer located between the first electrode and the second electrode.

101‧‧‧發光疊層 101‧‧‧light emitting stack

101a‧‧‧第一電性半導體層 101a‧‧‧first electrical semiconductor layer

101b‧‧‧活性層 101b‧‧‧active layer

101c‧‧‧第二電性半導體層 101c‧‧‧Second electrical semiconductor layer

103‧‧‧透明導電層 103‧‧‧ transparent conductive layer

104‧‧‧第一電極 104‧‧‧first electrode

105‧‧‧第二電極 105‧‧‧Second electrode

105a‧‧‧延伸電極 105a‧‧‧Extended electrode

111‧‧‧基板 111‧‧‧ substrate

201‧‧‧發光疊層 201‧‧‧Light-emitting stack

201a‧‧‧第一電性半導體層 201a‧‧‧first electrical semiconductor layer

201b‧‧‧活性層 201b‧‧‧active layer

201c‧‧‧第二電性半導體層 201c‧‧‧Second electrical semiconductor layer

202‧‧‧導電層 202‧‧‧ conductive layer

202a‧‧‧(導電層202之)第一重疊部 202a‧‧‧ (of conductive layer 202) first overlapping portion

202b‧‧‧(導電層202之)第一延伸部 202b‧‧‧ (of the conductive layer 202) the first extension

203‧‧‧透明導電層 203‧‧‧Transparent conductive layer

203a‧‧‧(透明導電層203之)第二重疊部 203a‧‧‧ (transparent conductive layer 203) second overlapping portion

203b‧‧‧(透明導電層203之)第二延伸部 203b‧‧‧ (transparent conductive layer 203) second extension

204‧‧‧第一電極 204‧‧‧First electrode

205‧‧‧第二電極 205‧‧‧Second electrode

206‧‧‧永久基板 206‧‧‧Permanent substrate

206a‧‧‧絕緣層 206a‧‧‧Insulation

206b‧‧‧矽基板 206b‧‧‧Si substrate

207‧‧‧絕緣層 207‧‧‧Insulation

211‧‧‧基板 211‧‧‧ substrate

212‧‧‧暫時基板 212‧‧‧Temporary substrate

213,213’‧‧‧分割線 213, 213’‧‧‧ dividing line

214‧‧‧雷射光照射 214‧‧‧laser light

215‧‧‧接合面 215‧‧‧Joint surface

301‧‧‧發光疊層 301‧‧‧luminescent stack

302‧‧‧導電層 302‧‧‧ conductive layer

302a‧‧‧(導電層302之)第一重疊部 302a‧‧‧ (conducting layer 302) first overlapping portion

302b‧‧‧(導電層302之)第一延伸部 302b‧‧‧ (conducting layer 302) first extension

303‧‧‧透明導電層 303‧‧‧Transparent conductive layer

302a‧‧‧(透明導電層302之)第一重疊部 302a‧‧‧ (of the transparent conductive layer 302) first overlapping portion

303b‧‧‧(透明導電層303之)第二延伸部 303b‧‧‧ (transparent conductive layer 303) second extension

304‧‧‧第一電極 304‧‧‧First electrode

305‧‧‧第二電極 305‧‧‧Second electrode

306‧‧‧永久基板 306‧‧‧Permanent substrate

306a、306b‧‧‧(永久基板)欲形成電極之處 306a, 306b ‧‧‧ (permanent substrate) where electrodes are to be formed

307‧‧‧絕緣層 307‧‧‧ Insulation

307a‧‧‧(絕緣層)欲形成電極之處 307a‧‧‧ (insulation layer) where electrode is to be formed

361‧‧‧接合物質 361‧‧‧ bonding substance

362‧‧‧暫時基板 362‧‧‧Temporary substrate

400‧‧‧發光元件 400‧‧‧Light-emitting element

401‧‧‧發光疊層 401‧‧‧luminescent stack

402‧‧‧導電層 402‧‧‧ conductive layer

402a‧‧‧(導電層402之)第一重疊部 402a‧‧‧ (conducting layer 402) first overlapping portion

402b‧‧‧(導電層402之)第一延伸部 402b‧‧‧ (conducting layer 402) first extension

402c‧‧‧(導電層402之)第三延伸部 402c‧‧‧ (Conductive layer 402 of the third extension)

403‧‧‧透明導電層 403‧‧‧ transparent conductive layer

403a‧‧‧(透明導電層403之)第二重疊部 403a‧‧‧ (transparent conductive layer 403) second overlapping portion

403b‧‧‧(透明導電層403之)第二延伸部 403b‧‧‧ (transparent conductive layer 403) second extension

403c‧‧‧(透明導電層403之)第四延伸部 403c‧‧‧ (transparent conductive layer 403) fourth extension

403’‧‧‧透明導電層 403’‧‧‧ transparent conductive layer

404‧‧‧第一電極 404‧‧‧First electrode

405‧‧‧第二電極 405‧‧‧Second electrode

406‧‧‧永久基板 406‧‧‧Permanent substrate

407‧‧‧絕緣層 407‧‧‧Insulation

408‧‧‧接合層 408‧‧‧ bonding layer

462‧‧‧透明基板 462‧‧‧Transparent substrate

PP’‧‧‧平面 PP’‧‧‧plane

500‧‧‧發光裝置 500‧‧‧light-emitting device

501,502,503‧‧‧發光元件 501,502,503‧‧‧‧Light-emitting element

501a,501b‧‧‧電極 501a, 501b‧‧‧electrode

502a,502b‧‧‧電極 502a, 502b‧‧‧ electrode

503a,503b‧‧‧電極 503a, 503b‧‧‧electrode

510‧‧‧次載體(sub-mount) 510‧‧‧ sub-mount

511,512,513,514‧‧‧電路 511,512,513,514‧‧‧Circuits

601‧‧‧發光疊層 601‧‧‧luminescent stack

601a‧‧‧第一電性半導體層 601a‧‧‧first electrical semiconductor layer

601b‧‧‧活性層 601b‧‧‧active layer

601c‧‧‧第二電性半導體層 601c‧‧‧Second electrical semiconductor layer

603‧‧‧透明導電層 603‧‧‧ transparent conductive layer

604‧‧‧接觸層 604‧‧‧contact layer

604’‧‧‧第一電極 604’‧‧‧first electrode

604”‧‧‧第二電極 604 "‧‧‧Second electrode

604a‧‧‧接觸層移除區 604a‧‧‧contact layer removal area

605‧‧‧(導電層686之)一端 One end of 605‧‧‧ (conducting layer 686)

606‧‧‧透明基板 606‧‧‧Transparent substrate

607‧‧‧透明接合物質 607‧‧‧ transparent bonding substance

611‧‧‧基板 611‧‧‧ substrate

659‧‧‧保護層 659‧‧‧protective layer

681‧‧‧中間層結構 681‧‧‧ intermediate layer structure

682‧‧‧暫時基板 682‧‧‧Temporary substrate

683‧‧‧接合物質 683‧‧‧ bonding substance

684‧‧‧隔絕區 684‧‧‧ isolated area

685‧‧‧絕緣層 685‧‧‧ insulation

685a‧‧‧電性連接區 685a‧‧‧electrical connection area

686‧‧‧導電層 686‧‧‧ conductive layer

701‧‧‧發光疊層 701‧‧‧luminescent stack

701a‧‧‧第一電性半導體層 701a‧‧‧first electrical semiconductor layer

701b‧‧‧活性層 701b‧‧‧active layer

701c‧‧‧第二電性半導體層 701c‧‧‧Second electrical semiconductor layer

703‧‧‧透明導電層 703‧‧‧Transparent conductive layer

704‧‧‧接觸層 704‧‧‧contact layer

705‧‧‧(導電層686之)一端 One end of 705‧‧‧ (conducting layer 686)

706‧‧‧透明基板 706‧‧‧Transparent substrate

707‧‧‧透明接合物質 707‧‧‧ transparent bonding substance

759‧‧‧保護層 759‧‧‧protective layer

781‧‧‧中間層結構 781‧‧‧ intermediate layer structure

785‧‧‧絕緣層 785‧‧‧ insulation

786‧‧‧導電層 786‧‧‧ conductive layer

圖1A:示意先前技術之發光二極體上視圖 Figure 1A: Top view of a light-emitting diode showing the prior art

圖1B:示意先前技術之發光二極體側視圖 Fig. 1B: a side view illustrating a light emitting diode of the prior art

圖2A至2F:示意本發明第一實施例之發光二極體形成方法及結構 2A to 2F: a method and structure for forming a light emitting diode according to a first embodiment of the present invention

圖3A至3E:示意本發明第二實施例之發光二極體形成方法及結構 3A to 3E: a method and structure for forming a light emitting diode according to a second embodiment of the present invention

圖4A至4D:示意本發明第三實施例之發光二極體形成方法及結構 4A to 4D: a method and structure for forming a light emitting diode according to a third embodiment of the present invention

圖5:示意應用本發明實施例之發光二極體所形成之發光裝置 FIG. 5: A light-emitting device formed by applying the light-emitting diode according to the embodiment of the present invention

圖6A至6I:示意本發明第四實施例之發光二極體形成方法及結構 6A to 6I: a method and structure for forming a light emitting diode according to a fourth embodiment of the present invention

圖7:示意本發明第五實施例之發光二極體結構 FIG. 7 shows a light-emitting diode structure of a fifth embodiment of the present invention

圖2為本發明之第一實施例,如圖2A所示,先在一基板211上形成發光疊層201,發光疊層201由下而上依序包括第一電性半導體層201a、活性層201b、及第二電性半導體層201c。第一電性半導體層201a和第二電性半導體層201c電性相異,例如第一電性半導體層201a是n型半導體層,而第二電性半導體層201c是p型半導體層。然後自發光疊層201取其一部份以供後續步驟使用。其方式例如可以用磊晶掀移(Epitaxy Lift-Off,ELO)之方法,如圖2A所示,先在欲取用之C部份與鄰近保留之L部份及R部份間以雷射切割或微影及蝕刻之方式形成如分割線213及分割線213’,以便於後續之掀移。接著提供一暫時基板212,例如玻璃,以與欲取用之C部份相接合。接合之方式例如可以為利用形成接合物質(圖未示)於接合面215(如圖2B所示)間,並對暫時基板212及基板211加溫加壓以接合。接合物質可以是導電物質或非導電物質,導電物質例如包含金屬或合金材質,例如金、銀、或錫或其合金。非導電物質例如包含聚醯亞胺(PI)、苯并環丁烯(BCB)、過氟環丁烷(PFCB)、環氧樹酯(Epoxy)、其他有機黏結材料等。接合之方式為此技術領域所習知,故不多贅述。於形成接合後,可在欲取用之C部份與基板211之介面施以一雷射光照射214,同時藉由暫時基板212之接合將欲取用之C部份向上掀移取出,其情形如圖2B所示,完成磊晶掀移步驟。如圖2B所示,此取下之發光疊層201具有一長度為L,而寬度為W,而圖示之x軸平行於長度L,而y軸平行於寬度W。 FIG. 2 is a first embodiment of the present invention. As shown in FIG. 2A, a light-emitting stack 201 is first formed on a substrate 211. The light-emitting stack 201 includes a first electrical semiconductor layer 201a and an active layer in order from bottom to top. 201b, and a second electrical semiconductor layer 201c. The first electrical semiconductor layer 201a and the second electrical semiconductor layer 201c are electrically different. For example, the first electrical semiconductor layer 201a is an n-type semiconductor layer, and the second electrical semiconductor layer 201c is a p-type semiconductor layer. Then take a part from the light-emitting stack 201 for subsequent steps. The method can be, for example, an epitaxy lift-off (ELO) method, as shown in FIG. 2A. First, a laser is used between the C part to be accessed and the L and R parts reserved nearby. Cutting or lithography and etching are used to form division lines 213 and 213 'to facilitate subsequent tilting. A temporary substrate 212, such as glass, is then provided to bond with the part C to be accessed. The bonding method may be, for example, forming a bonding substance (not shown) between the bonding surfaces 215 (as shown in FIG. 2B), and applying heat and pressure to the temporary substrate 212 and the substrate 211 for bonding. The bonding substance may be a conductive substance or a non-conductive substance, and the conductive substance includes, for example, a metal or alloy material, such as gold, silver, or tin or an alloy thereof. Examples of the non-conductive material include polyimide (PI), benzocyclobutene (BCB), perfluorocyclobutane (PFCB), epoxy resin (Epoxy), and other organic bonding materials. The method of joining is well known in the technical field, so it will not be described in detail. After the bonding is formed, a laser light can be applied to the interface between the part C to be used and the substrate 211, and at the same time, the part C to be used can be lifted upwards by temporarily bonding the substrate 212. As shown in FIG. 2B, the epitaxial tilting step is completed. As shown in FIG. 2B, the removed light-emitting stack 201 has a length L and a width W, and the x-axis shown in the figure is parallel to the length L and the y-axis is parallel to the width W.

接著,如圖2C所示,提供一永久基板206。永久基板206可為導電基板或非導電基板,導電基板可以是例如矽(silicon)之半導體材料、碳化矽、或金屬。非導電基板可以是例如藍寶石(Al2O3)、玻璃、或陶磁材料。本實施例選擇業界常用之矽基板206b,又本實施例為水平結構,故於其上先形成一例如氧化矽之絕緣層206a,以構成本實施例之永久基板206。接著在永久基板206上形成一導電層202,且導電層202之寬度W’大於前述取下之發光疊層201之寬度 W。導電層202可以例如是金屬或金屬氧化物或二者之疊層。金屬例如是銦(In)、金(Au)、鈦(Ti)、鉑(Pt)、鋁(Al)與銀(Ag)等或上述金屬之合金,或上述金屬之疊層亦可。金屬氧化物例如是氧化銦錫(ITO)。接著將前述取下之發光疊層201接合至導電層202。此接合例如是先在發光疊層201上形成接合層208,然後接合至導電層202。一實施例如接合層208為氧化銦錫(ITO),而導電層202為由下而上為鈦(Ti)/金(Au)/銀(Ag)/氧化銦錫(ITO)之疊層。又接合層208亦可包含反射性金屬,以同時做為一反射鏡,此實施例如在發光疊層201上形成依序為銀(Ag)/鈦(Ti)/鉑(Pt)/金(Au)之疊層做為接合層208,而導電層202為由下而上為鈦(Ti)/金(Au)/銦(In)之疊層。同樣地,可以經由加溫加壓完成接合,並可如前述之雷射光照射方法,施以一雷射光照射於發光疊層201與暫時基板212之介面,以將暫時基板212移除。如圖2D所示,導電層202位於發光疊層201(之第一電性半導體層201a(未示於此圖,請參圖2A))之下,且由於導電層202之寬度W’大於發光疊層201之寬度W,因此導電層202可視為包括有與第一電性半導體層201a重疊之第一重疊部202a及未與第一電性半導體層201a重疊之第一延伸部202b,且此第一延伸部202b係向平行於寬度之第一方向(+y方向)延伸。接著,利用如化學氣相沈積(Chemical Vapor Deposition,CVD)法或電子束(E-Gun)法搭配如微影及蝕刻或光阻掀移(Lift-Off)法,形成絕緣層207於發光疊層201及導電層202之一側壁,如圖所示。絕緣層207之材質可以如二氧化矽(SiO2)、氮化矽(SiNx)、氧化鋁(Al2O3)等。 Next, as shown in FIG. 2C, a permanent substrate 206 is provided. The permanent substrate 206 may be a conductive substrate or a non-conductive substrate, and the conductive substrate may be a semiconductor material such as silicon, silicon carbide, or a metal. The non-conductive substrate may be, for example, sapphire (Al2O3), glass, or ceramic magnetic material. In this embodiment, a silicon substrate 206b commonly used in the industry is selected, and this embodiment has a horizontal structure. Therefore, an insulating layer 206a such as silicon oxide is formed thereon to form the permanent substrate 206 of this embodiment. Next, a conductive layer 202 is formed on the permanent substrate 206, and the width W 'of the conductive layer 202 is greater than the width of the light-emitting stack 201 removed as described above. W. The conductive layer 202 may be, for example, a metal or a metal oxide or a stack of both. The metal may be, for example, indium (In), gold (Au), titanium (Ti), platinum (Pt), aluminum (Al), silver (Ag), or an alloy thereof, or a laminate of the above metals. The metal oxide is, for example, indium tin oxide (ITO). Then, the light-emitting stack 201 removed as described above is bonded to the conductive layer 202. This bonding is, for example, forming a bonding layer 208 on the light emitting stack 201 first, and then bonding to the conductive layer 202. For example, the bonding layer 208 is indium tin oxide (ITO), and the conductive layer 202 is a stack of titanium (Ti) / gold (Au) / silver (Ag) / indium tin oxide (ITO) from bottom to top. In addition, the bonding layer 208 may also include a reflective metal to serve as a mirror at the same time. In this embodiment, for example, silver (Ag) / titanium (Ti) / platinum (Pt) / gold (Au) is sequentially formed on the light-emitting stack 201. ) Is used as the bonding layer 208, and the conductive layer 202 is made of titanium (Ti) / gold (Au) / indium (In) from bottom to top. Similarly, the bonding can be completed by heating and pressing, and the laser light irradiation method can be used to apply a laser light to the interface between the light-emitting stack 201 and the temporary substrate 212 to remove the temporary substrate 212. As shown in FIG. 2D, the conductive layer 202 is located under the light-emitting stack 201 (the first electrical semiconductor layer 201a (not shown in this figure, see FIG. 2A)), and because the width W 'of the conductive layer 202 is larger than the light-emitting layer The width W of the stacked layer 201, therefore, the conductive layer 202 can be regarded as including a first overlapping portion 202a overlapping the first electrical semiconductor layer 201a and a first extending portion 202b not overlapping the first electrical semiconductor layer 201a. The first extending portion 202b extends in a first direction (+ y direction) parallel to the width. Next, an insulating layer 207 is formed on the light-emitting stack by using, for example, a chemical vapor deposition (CVD) method or an electron beam (E-Gun) method in combination with lithography and etching or a lift-off method. One side wall of the layer 201 and the conductive layer 202 is shown in the figure. The material of the insulating layer 207 may be, for example, silicon dioxide (SiO2), silicon nitride (SiNx), aluminum oxide (Al2O3), or the like.

接著,如圖2E所示,在發光疊層201(之第二電性半導體層201c(未示於此圖,請參圖2A))之上形成透明導電層203,且同樣地,透明導電層203具有一寬度大於第二電性半導體層201c之寬度。所以透明導電層203可視為包括有與第二電性半導體層201c重疊之第二重疊部203a及未與第二電性半導體層201c重疊之第二延伸部203b,且此第二延伸部203b係向平行於寬度之第二方向(-y方 向)延伸,第二方向(-y方向)與前述第一方向(+y方向)方向相反。透明導電層203例如為金屬氧化物或厚度小於500埃之薄金屬。金屬氧化物例如為氧化銦錫(Indium Tin Oxide,ITO)、氧化鋁鋅(Aluminum Zinc Oxide,AZO)、氧化鎘錫、氧化銻錫、氧化鋅(ZnO)、氧化銦鋅(IZO)、及氧化鋅錫(ZTO)等材料或其所構成之群組。薄金屬例如為鋁、金、鉑、鋅、銀、鎳、鍺、銦、錫或上述這些金屬之合金。最後,如圖2F所示,形成第一電極204在第一延伸部202b之上,及第二電極205在第二延伸部203b之上。特別須說明的是,如圖所示,第一電極204大致只與導電層202之第一延伸部202b或其一部份相接,而第二電極205大致只與透明導電層203之第二延伸部203b或其一部份相接,亦即透明導電層203與第二電性半導體層201c重疊之第二重疊部203a上不具有第二電極205或任何先前技術之延伸電極,因此不會有金屬遮光所導致亮度的損耗。故本實施例發光疊層201之平行寬度之方向(y方向)之導電大致僅由透明導電層203之第二重疊部203a完成。以透明導電層203為氧化銦錫為例,其厚度一般介於50nm至1μm,以常用之120nm為例,在此厚度下,其導電(或傳遞電荷)之距離約為30μm至100μm(即0.1mm)。故本實施例發光疊層201之寬度W可設計約為100μm(即0.1mm),而對於一般商業常見之42mil*42mil(約當1mm*1mm,即1mm2)之面積規格的發光疊層而言,本實施例可拉長發光疊層201之長度L以達提供相同之發光面積,如此即利用第二電極205金屬優良的電流擴散特性傳遞電流,再利用高光穿透性的透明導電層203傳遞電流給發光疊層201,如此一來便可以均勻傳遞電流,又免於發光面積上因電極或延伸電極之金屬遮光。因此發光疊層201之長度L可設計約為10mm,(1mm2/0.1mm=10mm),故長度L與寬度W之比為10mm:0.1mm,即100:1。一般而言,隨著透明導電層203之氧化銦錫厚度越厚,其導電距離越長,如此寬度W之設計可較上例為寬,又或在各設計參數如發光面積上調整,例如發光面積調整較上例為小,則相對應設計上長度L亦較上例為小。例如寬度W較 上例放大為2倍,長度L縮小為上例之1/10,則發光疊層201之長度L與寬度W之比約大於5:1即可達上述之目的。 Next, as shown in FIG. 2E, a transparent conductive layer 203 is formed on the light-emitting stack 201 (the second electrical semiconductor layer 201c (not shown in this figure, see FIG. 2A)), and similarly, the transparent conductive layer 203 has a width larger than that of the second electrical semiconductor layer 201c. Therefore, the transparent conductive layer 203 can be regarded as including a second overlapping portion 203a overlapping with the second electrical semiconductor layer 201c and a second extending portion 203b not overlapping with the second electrical semiconductor layer 201c, and the second extending portion 203b is To the second direction parallel to the width (-y side Direction), and the second direction (-y direction) is opposite to the aforementioned first direction (+ y direction). The transparent conductive layer 203 is, for example, a metal oxide or a thin metal having a thickness of less than 500 angstroms. The metal oxide is, for example, indium tin oxide (ITO), aluminum zinc oxide (AZO), cadmium tin oxide, antimony tin oxide, zinc oxide (ZnO), indium zinc oxide (IZO), and oxide Materials such as zinc tin (ZTO) or the groups they form. The thin metal is, for example, aluminum, gold, platinum, zinc, silver, nickel, germanium, indium, tin, or an alloy of these metals. Finally, as shown in FIG. 2F, a first electrode 204 is formed on the first extension 202b, and a second electrode 205 is formed on the second extension 203b. In particular, as shown in the figure, the first electrode 204 is substantially only connected to the first extension 202b or a part of the conductive layer 202, and the second electrode 205 is generally only connected to the second of the transparent conductive layer 203 The extension portion 203b or a part thereof is connected, that is, the second overlapping portion 203a where the transparent conductive layer 203 and the second electrical semiconductor layer 201c overlap does not have the second electrode 205 or any extension electrode of the prior art, so The loss of brightness caused by metal shading. Therefore, the conduction in the parallel width direction (y direction) of the light emitting stack 201 in this embodiment is substantially completed only by the second overlapping portion 203a of the transparent conductive layer 203. Taking the transparent conductive layer 203 as indium tin oxide as an example, its thickness is generally between 50 nm and 1 μm, and the commonly used 120 nm is taken as an example. Under this thickness, the distance between its conductive (or charge transfer) is about 30 μm to 100 μm (that is, 0.1 mm). Therefore, the width W of the light-emitting stack 201 in this embodiment can be designed to be about 100 μm (that is, 0.1 mm), and for a light-emitting stack with an area specification of 42 mil * 42 mil (about 1 mm * 1 mm, that is, 1 mm 2) that is commonly used in general commerce. In this embodiment, the length L of the light-emitting stack 201 can be lengthened to provide the same light-emitting area. In this way, the current is transmitted using the excellent current diffusion characteristics of the second electrode 205 metal, and the transparent conductive layer 203 with high light transmission is used for transmission. The current is applied to the light-emitting stack 201 so that the current can be uniformly transmitted, and the light-emitting area is prevented from being blocked by the metal of the electrode or the extension electrode. Therefore, the length L of the light-emitting stack 201 can be designed to be about 10mm (1mm2 / 0.1mm = 10mm), so the ratio of the length L to the width W is 10mm: 0.1mm, that is, 100: 1. Generally speaking, as the thickness of the indium tin oxide of the transparent conductive layer 203 is thicker, the conductive distance is longer, so the design of the width W can be wider than the above example, or it can be adjusted on various design parameters such as the light emitting area, such as light emission. The area adjustment is smaller than the above example, and the corresponding design length L is also smaller than the above example. For example, the width W is greater than The above example is enlarged twice, and the length L is reduced to 1/10 of the above example. Then the ratio of the length L to the width W of the light-emitting stack 201 is greater than about 5: 1 to achieve the above purpose.

圖3A至圖3E顯示本發明之第二實施例。此第二實施例為上述第一實施例之變化型。在第一實施例中,如圖2F所示,第一電極204形成在第一延伸部202b之上,且第二電極205形成在第二延伸部203b之上。在本第二實施例中,如圖3E所示,第一電極304形成在第一延伸部302b之下,且第二電極305形成在第二延伸部303b之下。另外,本第二實施例中,將第一實施例中之上方有絕緣層206b之矽基板206a所構成之永久基板206,改為玻璃所構成之永久基板306。除此之外,第二實施例大致與第一實施例相同。因此,參考如前述第一實施例圖2A至圖2E之方法,將可得到與圖2E相似之圖3A之結構,包括玻璃所構成之永久基板306、導電層302、發光疊層301、絕緣層307、及透明導電層303。接著如圖3B所示,藉由一接合物質361將圖3A之結構接合至暫時基板362以便進行後續電極之形成。接著,如圖3C所示,藉由形成一例如光阻之防護層(圖未示)於永久基板306上,但曝露出欲形成電極之處306a、306b,並以微影及蝕刻或噴砂或二者混合使用之方法,將欲形成電極之處306a、306b的永久基板306移除,其中絕緣層307與欲形成電極之處306a相接之處307a亦予以移除。如此曝露出部份之導電層302及部份之透明導電層303,用以後續將第一電極304及第二電極305形成於其上,如圖3D所示,透明導電層303與發光疊層301之一頂面相接,從永久基板306往發光疊層301的方向觀之,第一電極304及第二電極305不高於發光疊層301之頂面。詳言之,第一電極304及第二電極305具有一上表面不高於發光疊層301之頂面。在某些應用上,接合物質361及暫時基板362可保留。而在本實施例,則以如前述雷射光照射接合物質361或蝕刻之方式,將接合物質361及暫時基板362移除,完成如圖3E之第二實施例之結構。同樣地,在本實施例中,第一電極304大致只與導電層302之第一延伸部302b或其一部份相接,而第二電極305 大致只與透明導電層303之第二延伸部303b或其一部份相接,亦即透明導電層303之第二重疊部303a上不具有第二電極305或延伸電極,因此不會有金屬遮光所導致亮度的損耗。 3A to 3E show a second embodiment of the present invention. This second embodiment is a modification of the above-mentioned first embodiment. In the first embodiment, as shown in FIG. 2F, the first electrode 204 is formed on the first extension portion 202b, and the second electrode 205 is formed on the second extension portion 203b. In the second embodiment, as shown in FIG. 3E, the first electrode 304 is formed under the first extension portion 302b, and the second electrode 305 is formed under the second extension portion 303b. In addition, in the second embodiment, the permanent substrate 206 made of the silicon substrate 206a with the insulating layer 206b above is replaced by the permanent substrate 306 made of glass. Otherwise, the second embodiment is substantially the same as the first embodiment. Therefore, referring to the method of FIG. 2A to FIG. 2E of the foregoing first embodiment, the structure of FIG. 3A similar to that of FIG. 2E can be obtained, including a permanent substrate 306 made of glass, a conductive layer 302, a light-emitting stack 301, and an insulating layer. 307 and a transparent conductive layer 303. Next, as shown in FIG. 3B, the structure of FIG. 3A is bonded to the temporary substrate 362 by a bonding substance 361 for subsequent electrode formation. Next, as shown in FIG. 3C, by forming a protective layer (not shown) such as a photoresist on the permanent substrate 306, but exposing the electrodes 306a, 306b, and lithography and etching or sandblasting or In a mixed method, the permanent substrate 306 where the electrodes 306a and 306b are to be formed is removed, and the insulating layer 307 and the place 307a where the electrodes are to be formed 307a are also removed. In this way, a part of the conductive layer 302 and a part of the transparent conductive layer 303 are exposed for subsequent formation of the first electrode 304 and the second electrode 305 thereon. As shown in FIG. 3D, the transparent conductive layer 303 and the light-emitting stack are stacked. One of the top surfaces of 301 is connected, and the first electrode 304 and the second electrode 305 are not higher than the top surface of the light-emitting stack 301 when viewed from the direction of the permanent substrate 306 toward the light-emitting stack 301. In detail, the first electrode 304 and the second electrode 305 have an upper surface that is not higher than a top surface of the light-emitting stack 301. In some applications, the bonding substance 361 and the temporary substrate 362 may remain. In this embodiment, the bonding material 361 and the temporary substrate 362 are removed in a manner such that the laser light irradiates the bonding material 361 or is etched to complete the structure of the second embodiment shown in FIG. 3E. Similarly, in this embodiment, the first electrode 304 is substantially only in contact with the first extension portion 302b or a part of the conductive layer 302, and the second electrode 305 It is generally only connected to the second extension portion 303b or a part of the transparent conductive layer 303, that is, the second overlap portion 303a of the transparent conductive layer 303 does not have the second electrode 305 or the extension electrode, so there is no metal shading The resulting loss of brightness.

圖4A至圖4D顯示本發明之第三實施例。此第三實施例亦為上述第一實施例之變化型。在第一實施例中,如圖2F所示,第一電極204形成在第一延伸部202b之上,且第二電極205形成在第二延伸部203b之上。在本第三實施例中,如圖4C所示,第一電極404形成在第一延伸部402b之下,且第二電極405形成在第二延伸部403b之上。另外,本第三實施例中,將第一實施例中之上方有絕緣層206a之矽基板206b所構成之永久基板206,改為一透明材料所構成之永久基板406,透明材料可例如為玻璃等介電材料。除此以外,第三實施例大致與第一實施例之相似。因此,參考如前述第一實施例圖2A至圖2E之方法,將可得到與圖2E相似之圖4A之結構,包括玻璃所構成之永久基板406、導電層402、發光疊層401、絕緣層407、及透明導電層403。須說明的是,本實施例之導電層402採用氧化銦錫(ITO),故發光疊層401與之接合則如前述第一實施例中已提及,先在發光疊層401上形成例如氧化銦錫(ITO)之接合層408,然後接合至導電層402。另須說明的是,永久基板406上的導電層402是整層覆蓋,因此對照於第一實施例,導電層402可視為包括除了第一重疊部402a及第一延伸部402b外,更包括另一第三延伸部402c。同樣地,透明導電層403可視為包括有第二重疊部403a、第二延伸部403b、及另一第四延伸部403c。且本實施例中,第一延伸部402b與第二延伸部403b係向同一方向(-y方向)延伸。第三延伸部402c及第四延伸部403c向同一方向(+y方向)延伸。 4A to 4D show a third embodiment of the present invention. This third embodiment is also a modification of the first embodiment described above. In the first embodiment, as shown in FIG. 2F, the first electrode 204 is formed on the first extension portion 202b, and the second electrode 205 is formed on the second extension portion 203b. In the third embodiment, as shown in FIG. 4C, the first electrode 404 is formed under the first extension portion 402b, and the second electrode 405 is formed over the second extension portion 403b. In addition, in the third embodiment, the permanent substrate 206 made of the silicon substrate 206b with the insulating layer 206a above is changed to a permanent substrate 406 made of a transparent material. The transparent material may be glass, for example. And other dielectric materials. Otherwise, the third embodiment is substantially similar to the first embodiment. Therefore, referring to the method of FIG. 2A to FIG. 2E of the foregoing first embodiment, the structure of FIG. 4A similar to FIG. 2E can be obtained, including a permanent substrate 406 made of glass, a conductive layer 402, a light-emitting stack 401, and an insulating layer. 407, and a transparent conductive layer 403. It should be noted that the conductive layer 402 of this embodiment uses indium tin oxide (ITO), so the light-emitting stack 401 is bonded to it as mentioned in the aforementioned first embodiment. For example, an oxide layer is formed on the light-emitting stack 401 first. A bonding layer 408 of indium tin (ITO) is then bonded to the conductive layer 402. It should also be noted that the conductive layer 402 on the permanent substrate 406 is covered in a whole layer. Therefore, compared with the first embodiment, the conductive layer 402 can be regarded as including the first overlapping portion 402a and the first extending portion 402b, and other A third extension 402c. Similarly, the transparent conductive layer 403 can be regarded as including a second overlapping portion 403a, a second extending portion 403b, and another fourth extending portion 403c. In this embodiment, the first extension portion 402b and the second extension portion 403b extend in the same direction (-y direction). The third extension portion 402c and the fourth extension portion 403c extend in the same direction (+ y direction).

接著,如圖4B所示,將另一透明材料,例如玻璃等介電材料之透明基板462,於其上形成例如氧化銦錫(ITO)之透明導電層403’後,將其與圖4A之結構接合,氧化銦錫(ITO)之透明導電層403’與同為氧化銦錫(ITO)之透明導 電層403相結合。接著,如圖4C所示,以微影及蝕刻或噴砂或二者混合使用之方法,將部份永久基板406及部份透明基板462移除,曝露出部份之導電層402及部份之透明導電層403’,並形成第一電極404在第一延伸部402b之下,及形成第二電極405在透明導電層403’之上,完成本第三實施例。 Next, as shown in FIG. 4B, another transparent material, such as a transparent substrate 462 of a dielectric material such as glass, is formed thereon with a transparent conductive layer 403 ', such as indium tin oxide (ITO), and then it is similar to that of FIG. 4A. Structural bonding, transparent conductive layer 403 'of indium tin oxide (ITO) and transparent conductive layer of indium tin oxide (ITO) The electrical layer 403 is combined. Next, as shown in FIG. 4C, a part of the permanent substrate 406 and a part of the transparent substrate 462 are removed by lithography and etching or sandblasting or a mixture of the two, and a part of the conductive layer 402 and a part of the conductive layer are exposed. The third embodiment is completed by forming a transparent conductive layer 403 ', forming a first electrode 404 under the first extension portion 402b, and forming a second electrode 405 over the transparent conductive layer 403'.

如圖4C所示,在本第三實施例中,第一電極404有一垂直於第一延伸部402b之第一表面(和PP’平面相接觸者),第二電極405有一垂直於第二延伸部403b之第二表面(和PP’平面相接觸者),且第一表面與第二表面大致為共平面,即共PP’平面。如此,可藉由此第一表面與第二表面接合至一載板(圖未示)上,載板表面即PP’平面。在應用上,將這樣的裝置旋轉90度,則如圖4D所示,發光疊層401發出之光可往多方向傳出,包括透明材料所構成之永久基板406、透明基板462及絕緣層407等都可透光,具有全週光之優點。 As shown in FIG. 4C, in the third embodiment, the first electrode 404 has a first surface (that is in contact with the PP 'plane) perpendicular to the first extension 402b, and the second electrode 405 has a perpendicular extension to the second extension The second surface of the portion 403b (those in contact with the PP 'plane), and the first surface and the second surface are substantially coplanar, that is, co-PP' plane. In this way, the first surface and the second surface can be bonded to a carrier board (not shown), and the surface of the carrier board is the PP 'plane. In application, if such a device is rotated 90 degrees, as shown in FIG. 4D, the light emitted by the light-emitting stack 401 can be transmitted in multiple directions, including a permanent substrate 406 made of a transparent material, a transparent substrate 462, and an insulating layer 407. It is transparent and has the advantages of full ambient light.

如圖5所示,上述之三個實施例之發光元件更可以進一步地與其他元件組合連接以形成一發光裝置500。發光裝置500包含一具有至少一電路511,512,513,514之次載體(sub-mount)510;至少一發光元件位於次載體510上,於本實施例則設置有3個發光元件501,502,503於次載體510上,發光元件501,502,503之任一可為上述之三個實施例之發光元件之任一,並可藉由焊料(solder,圖未示)將發光元件501,502,503之電極黏結至次載體510之電路511,512,513,514上,例如發光元件501之兩電極501a,501b分別黏結至電路511,512;發光元件502之兩電極502a,502b分別黏結至電路512,513;發光元件503之兩電極503a,503b分別黏結至電路513,514,如此可將發光元件501,502,503固定於次載體510上,同時發光元件501,502,503經電路511,512,513,514形成串聯(如本實施例)或並聯或串並聯皆有之電路,並經由導電材料結構521,522,例如是金線或銅線,提供外部電源予此裝置500。次載體510例如是陶瓷、玻璃、玻璃纖維、電木(Bakelite)等。 As shown in FIG. 5, the light-emitting elements of the three embodiments described above can be further combined with other elements to form a light-emitting device 500. The light-emitting device 500 includes a sub-mount 510 having at least one circuit 511, 512, 513, 514; at least one light-emitting element is located on the sub-carrier 510. In this embodiment, three light-emitting elements 501, 502, 503 are provided on the sub-carrier 510, and the light-emitting element Any of 501,502,503 can be any of the light emitting elements of the three embodiments described above, and the electrodes of the light emitting element 501,502,503 can be bonded to the circuit 511,512,513,514 of the sub-carrier 510 by solder (solder, not shown), such as a light emitting element The two electrodes 501a, 501b of 501 are respectively bonded to circuits 511, 512; the two electrodes 502a, 502b of light-emitting element 502 are respectively bonded to circuits 512, 513; the two electrodes 503a, 503b of light-emitting element 503 are respectively bonded to circuits 513, 514, so that the light-emitting elements 501, 502, 503 can be fixed On the sub-carrier 510, the light-emitting elements 501, 502, and 503 form circuits in series (such as this embodiment) or parallel or series-parallel circuits through the circuits 511, 512, 513, 514, and the conductive material structure 521, 522, such as gold or copper wires, to provide external power to This device 500. The secondary carrier 510 is, for example, ceramic, glass, fiberglass, Bakelite, or the like.

除上述實施例外,也可藉由製程方式將發光疊層上的電極及延伸電極移到發光疊層以外,只留較小的區域做電性連結,達到遮光面積極小化的效果,來解決金屬的遮光之問題。其實施例如圖6A至圖6I所示之本發明之第四實施例。在圖6A中,在基板611上依序形成包括第一電性半導體層601a、活性層601b、及第二電性半導體層601c之發光疊層601,在形成發光疊層601前可選擇性地先形成中間層結構681,例如緩衝層等。之後,在發光疊層601上形成接觸層604,此接觸層604可以例如是透明導電氧化物或金屬;透明導電氧化物例如為氧化銦錫(Indium Tin Oxide,ITO)、氧化鋁鋅(Aluminum Zinc Oxide,AZO)、氧化鎘錫、氧化銻錫、氧化鋅(ZnO)、氧化銦鋅(IZO)、及氧化鋅錫(ZTO)等材料或其所構成之群組;金屬例如為鋁、金、鉑、鋅、銀、鎳、鍺、銦、錫、鈹、鉑、銠或上述這些金屬之合金。當金屬選擇高反射性金屬,例如是鋁、銀等則可同時提供反射鏡功能;或者亦可選擇性地再於接觸層604加上反射結構(圖未示),如分散布拉格反射層(Distributed Bragg Reflector,DBR)或全方位反射層(Omni-Directional Reflector,ODR)等以提供反射功能。接著,以微影及蝕刻之方式,以移除部份之接觸層604,形成接觸層移除區604a。接著,如圖6B所示,形成一保護層659於接觸層604上,並且保護層659填入接觸層移除區604a,其中如圖所示,接觸層604上有兩處未被保護層659所覆蓋,係保留用以當作電極,即第一電極604’及第二電極604”。接著,如圖6C所示,藉由一接合物質683將圖6B之結構接合至暫時基板682以便進行後續製程。接著,以如前述雷射光照射方式施以一雷射光(圖未示)照射於基板611與中間層結構681之介面,以將基板611移除,基板611之移除亦可經由蝕刻製程完成。基板611移除後之結構如圖6D所示。 In addition to the above-mentioned implementation exceptions, the electrodes and extension electrodes on the light-emitting stack can also be moved to the light-emitting stack by a manufacturing process, leaving only a small area for electrical connection to achieve the effect of actively minimizing the light-shielding surface to solve the metal The problem of shading. The embodiment is a fourth embodiment of the present invention shown in FIGS. 6A to 6I. In FIG. 6A, a light-emitting stack 601 including a first electrical semiconductor layer 601a, an active layer 601b, and a second electrical semiconductor layer 601c is sequentially formed on a substrate 611. The light-emitting stack 601 may be selectively formed before forming the light-emitting stack 601. First, an intermediate layer structure 681 is formed, such as a buffer layer. Thereafter, a contact layer 604 is formed on the light-emitting stack 601. The contact layer 604 may be, for example, a transparent conductive oxide or a metal; the transparent conductive oxide is, for example, indium tin oxide (ITO), aluminum zinc (Aluminum Zinc) Oxide, AZO), cadmium tin oxide, antimony tin oxide, zinc oxide (ZnO), indium zinc oxide (IZO), and zinc tin oxide (ZTO) and other materials or groups thereof; metals such as aluminum, gold, Platinum, zinc, silver, nickel, germanium, indium, tin, beryllium, platinum, rhodium or alloys of these metals. When the metal is selected as a highly reflective metal, such as aluminum, silver, etc., it can also provide a mirror function; or a reflective structure (not shown) can be optionally added to the contact layer 604, such as a distributed Bragg reflective layer (Distributed Bragg Reflector (DBR) or Omni-Directional Reflector (ODR) to provide reflective functions. Then, a part of the contact layer 604 is removed by lithography and etching to form a contact layer removal area 604a. Next, as shown in FIG. 6B, a protection layer 659 is formed on the contact layer 604, and the protection layer 659 fills the contact layer removal area 604a. As shown in the figure, there are two unprotected layers 659 on the contact layer 604. The covering is reserved for use as electrodes, that is, the first electrode 604 'and the second electrode 604 ". Then, as shown in FIG. 6C, the structure of FIG. 6B is bonded to the temporary substrate 682 by a bonding substance 683 for Subsequent process. Then, a laser light (not shown) is applied to the interface between the substrate 611 and the intermediate layer structure 681 in the laser light irradiation method as described above to remove the substrate 611, and the removal of the substrate 611 can also be performed by etching. The process is completed. The structure after the substrate 611 is removed is shown in FIG. 6D.

接著如圖6E所示,以微影及蝕刻之方式將部份之中間層結構681及發光疊層601移除,以形成隔絕區684,並曝露出底下之接觸層604及(前述填入 接觸層移除區604a之)保護層659。如此,一整片大面積之發光疊層601將被分割成複數個相對較小面績之發光單位,如本實施例所示為分割成兩個相對較小面績之發光單位,此兩個發光單位間以隔絕區684彼此隔絕。接著,如圖6F所示,在圖6E之結構上形成一絕緣層685,如二氧化矽(SiO2)、氮化矽(SiNx)或氧化鋁(Al2O3)等,再以微影及蝕刻之方式將部份之絕緣層685移除,以形成電性連接區685a,並曝露出底下之接觸層604(某些情形下也可能曝露(前述填入接觸層移除區604a之)保護層659),而中間層結構681之表面也大致完全曝露,以讓發光疊層601所發之光得以出光。如此,絕緣層685電性隔絕各個發光單位,而經由後續填入電性連接區685a之導電層將各個發光單位形成串聯或並聯或串並聯皆有之電性連接。如圖6G所示,在圖6F之結構上形成一導電層686,如鋁、金、鉑、鋅、銀、鎳、鍺、銦、錫等金屬或上述這些金屬之合金等,再以微影及蝕刻之方式將部份之導電層686移除,以形成前述之電性連接。本實施例係顯示串聯之電性連接情形。此導電層686填入電性連接區685a並與曝露出之接觸層604形成電性連接,而導電層686之另一端(即605)則與中間層結構681之表面的部份相接。此外,如圖6G所示,在導電層686形成前,也可選擇性地先在中間層結構681之上面形成透明導電層603,故於本實施例中導電層686之另一端(605)係與透明導電層603之表面相接。如前所述,由於大面積之發光疊層601經分割成複數個相對較小面績之發光單位,各個發光單位之寬度(W)變小且係於電流有效傳遞之距離範圍內,因此在具有透明導電層603之情形下,不須要在各個發光單位上再設置延伸電極,且導電層686與發光疊層601電性相連之端點(即605)可設計的很小,如此可均勻傳遞電流,又免於發光面積上因電極或延伸電極之金屬遮光。而同樣地,也可如前述適當地決定各發光單位之長寬比(例如前述之發光疊層之長度與寬度之比約大於5:1)以達提供一般適用之發光面積。此外,由於本實施例亦可形成串並聯等不同之實施態樣,故即便不調整各發光單位之長寬比,經由 適當數量之發光單位之串連,亦可達提供一般商用規格之發光面積。接著,如圖6H所示,將圖6F之結構藉由透明接合物質607,如聚醯亞胺(PI)、苯并環丁烯(BCB)、及過氟環丁烷(PFCB)等與透明材料例如玻璃等之透明基板606相接合以做為出光面。接著,以例如蝕刻之方式將暫時基板682及接合物質683移除,如圖6I所示,完成本實施例。其中各發光單位之串連已如前述,而外部電源之提供則可經由前述之第一電極604’及第二電極604”。本實施例為串聯之實施態樣,而經由上述圖6A至圖6I所示之方法,熟悉此技藝者可對製程做簡單之調整,例如對圖6A之接觸層移除區604a調整、對圖6E之形成隔絕區684調整、及對圖6G之導電層686之移除調整,即可得到如圖7所示之並聯態樣之本發明第五實施例,其中圖6I之標號之第一碼由”6”改為”7”,例如標號606為透明基板606,則標號706亦同樣為透明基板,以此類推,故不再贅言介紹此第五實施例。而較須說明的是中間區塊之接觸層704(即透過導電層786和第一電性半導體層701a電性相連之接觸層704)為串聯之第一電極,兩側區塊之接觸層704(即位於第二電性半導體層701c下且與其電性相連之接觸層704)為串聯之第二電極(可經正面之電極圖案配置相連),如此構成兩發光單位之並聯。 Next, as shown in FIG. 6E, a part of the intermediate layer structure 681 and the light-emitting stack 601 are removed by lithography and etching to form an isolation region 684, and the underlying contact layer 604 and (the above-mentioned filling) are exposed. The contact layer removal region 604a) is a protection layer 659. In this way, a whole large-area light-emitting stack 601 will be divided into a plurality of light-emitting units of relatively small performance. As shown in this embodiment, it is divided into two light-emitting units of relatively small performance. The light emitting units are isolated from each other by an isolation area 684. Next, as shown in FIG. 6F, an insulating layer 685, such as silicon dioxide (SiO2), silicon nitride (SiNx), or aluminum oxide (Al2O3), is formed on the structure of FIG. 6E, and then lithography and etching are used. Remove a portion of the insulating layer 685 to form an electrical connection region 685a, and expose the underlying contact layer 604 (may also be exposed in some cases (filled in the contact layer removal region 604a) with the protective layer 659) The surface of the intermediate layer structure 681 is also substantially completely exposed, so that the light emitted by the light-emitting stack 601 can be emitted. In this way, the insulating layer 685 electrically isolates each light-emitting unit, and the light-emitting units are electrically connected in series or in parallel or in series and parallel via a conductive layer that is subsequently filled in the electrical connection area 685a. As shown in FIG. 6G, a conductive layer 686 is formed on the structure of FIG. 6F, such as aluminum, gold, platinum, zinc, silver, nickel, germanium, indium, tin and the like, or an alloy of these metals. And etching to remove a part of the conductive layer 686 to form the aforementioned electrical connection. This embodiment shows the situation of electrical connection in series. The conductive layer 686 fills the electrical connection region 685a and forms an electrical connection with the exposed contact layer 604, and the other end (ie, 605) of the conductive layer 686 is in contact with a portion of the surface of the intermediate layer structure 681. In addition, as shown in FIG. 6G, before the conductive layer 686 is formed, a transparent conductive layer 603 may be selectively formed on the intermediate layer structure 681. Therefore, the other end (605) of the conductive layer 686 in this embodiment is It is in contact with the surface of the transparent conductive layer 603. As mentioned above, since the large-area light-emitting stack 601 is divided into a plurality of relatively small-scale light-emitting units, the width (W) of each light-emitting unit becomes smaller and falls within the range of effective current transmission, so In the case of the transparent conductive layer 603, it is not necessary to provide an extension electrode on each light-emitting unit, and the terminal point (ie, 605) electrically connected to the conductive layer 686 and the light-emitting stack 601 can be designed to be very small, so that it can be uniformly transferred The current is protected from the light shielding area due to the metal of the electrode or the extension electrode. Similarly, the aspect ratio of each light-emitting unit (for example, the ratio of the length and width of the aforementioned light-emitting stack is greater than about 5: 1) can be appropriately determined as described above to provide a generally applicable light-emitting area. In addition, since this embodiment can also form different implementations such as series and parallel, even without adjusting the aspect ratio of each light-emitting unit, Appropriate number of light-emitting units in series can also provide light-emitting areas of general commercial specifications. Next, as shown in FIG. 6H, the structure of FIG. 6F is made transparent with a transparent bonding substance 607, such as polyimide (PI), benzocyclobutene (BCB), and perfluorocyclobutane (PFCB). Materials such as transparent substrates 606 such as glass are bonded to form a light emitting surface. Next, the temporary substrate 682 and the bonding substance 683 are removed by, for example, etching. As shown in FIG. 6I, this embodiment is completed. The series connection of each light-emitting unit is as described above, and the external power supply can be provided through the aforementioned first electrode 604 'and the second electrode 604 ". This embodiment is a series of implementations, and the above-mentioned FIG. 6A to FIG. The method shown in 6I, those skilled in the art can make simple adjustments to the process, such as adjusting the contact layer removal area 604a of FIG. 6A, adjusting the formation of the isolation area 684 of FIG. 6E, and the conductive layer 686 of FIG. 6G. After removing the adjustment, a fifth embodiment of the present invention in a parallel state as shown in FIG. 7 can be obtained, in which the first code of the number in FIG. 6I is changed from “6” to “7”, for example, the number 606 is a transparent substrate 606 , The reference numeral 706 is also a transparent substrate, and so on, so the fifth embodiment will not be described redundantly. It is more important to explain the contact layer 704 of the middle block (that is, the conductive layer 786 and the first electrical semiconductor) The layer 701a electrically connected to the contact layer 704) is the first electrode connected in series, and the contact layers 704 on both sides of the block (that is, the contact layer 704 located under the second electrical semiconductor layer 701c and electrically connected to it) are the first connected in series. Two electrodes (can be connected by the electrode pattern on the front) The light emitting units connected in parallel.

上述實施例僅為例示性說明本發明之原理及其功效,而非用於限制本發明。任何本發明所屬技術領域中具有通常知識者均可在不違背本發明之技術原理及精神的情況下,對上述實施例進行修改及變化。因此本發明之權利保護範圍如後述之申請專利範圍所列。 The above-mentioned embodiments are merely illustrative for explaining the principle of the present invention and its effects, and are not intended to limit the present invention. Any person having ordinary knowledge in the technical field to which the present invention pertains can modify and change the above embodiments without departing from the technical principles and spirit of the present invention. Therefore, the scope of protection of the rights of the present invention is listed in the scope of patent application described below.

Claims (10)

一發光裝置的製造方法,包括:提供一基板;形成一導電層於該基板上;提供一發光疊層於基板上,其中該發光疊層具有一第一電性半導體層、一第二電性半導體層、以及一活性層位於該第一電性半導體層與該第二電性半導體層之間,其中該第一電性半導體層、該活性層、及該第二電性半導體層沿著一堆疊方向堆疊;形成一透明導電層於該發光疊層上;形成一第一電極與該導電層相接;以及形成一第二電極與該透明導電層相接;其中該第一電極在該堆疊方向上不與該發光疊層重疊,且從該基板往該發光疊層的方向觀之,該第一電極及該第二電極不高於該發光疊層之一頂面。A method for manufacturing a light emitting device includes: providing a substrate; forming a conductive layer on the substrate; providing a light emitting stack on the substrate, wherein the light emitting stack has a first electrical semiconductor layer and a second electrical property The semiconductor layer and an active layer are located between the first electrical semiconductor layer and the second electrical semiconductor layer, wherein the first electrical semiconductor layer, the active layer, and the second electrical semiconductor layer are along a Stacked in the stacking direction; forming a transparent conductive layer on the light-emitting stack; forming a first electrode connected to the conductive layer; and forming a second electrode connected to the transparent conductive layer; wherein the first electrode is in the stack The direction does not overlap the light emitting stack, and the first electrode and the second electrode are not higher than a top surface of the light emitting stack when viewed from the substrate toward the light emitting stack. 如申請專利範圍第1項所述之方法,更包含形成一絕緣層位於該發光疊層與該第二電極之間。The method according to item 1 of the patent application scope further comprises forming an insulating layer between the light emitting stack and the second electrode. 如申請專利範圍第1項所述之方法,其中該第一電極與該基板位於該導電層之同一側,該第二電極與該發光疊層位於該透明導電層之同一側。The method according to item 1 of the patent application, wherein the first electrode and the substrate are located on the same side of the conductive layer, and the second electrode and the light-emitting stack are located on the same side of the transparent conductive layer. 如申請專利範圍第2項所述之方法,其中該絕緣層具有一上表面不高於該頂面。The method according to item 2 of the scope of patent application, wherein the insulating layer has an upper surface not higher than the top surface. 如申請專利範圍第2項所述之方法,其中該透明導電層具有一寬度大於該絕緣層之寬度。The method according to item 2 of the scope of patent application, wherein the transparent conductive layer has a width larger than that of the insulating layer. 如申請專利範圍第1項所述之方法,其中該第二電極具有一上表面,及該透明導電層具有一下表面與該上表面直接接觸。The method according to item 1 of the scope of patent application, wherein the second electrode has an upper surface, and the transparent conductive layer has a lower surface in direct contact with the upper surface. 如申請專利範圍第1項所述之方法,其中該第二電極在該堆疊方向上不與該發光疊層重疊。The method according to item 1 of the patent application scope, wherein the second electrode does not overlap the light emitting stack in the stacking direction. 如申請專利範圍第1項所述之方法,其中該第二電極具有一上表面不高於該頂面。The method according to item 1 of the scope of patent application, wherein the second electrode has an upper surface not higher than the top surface. 如申請專利範圍第1項所述之方法,其中該導電層包括與該發光疊層重疊之一第一重疊部及未與該發光疊層重疊之一第一延伸部,以及該透明導電層包括與該發光疊層重疊之一第二重疊部及未與該發光疊層重疊之一第二延伸部。The method of claim 1, wherein the conductive layer includes a first overlapping portion overlapping the light emitting stack and a first extending portion not overlapping the light emitting stack, and the transparent conductive layer includes A second overlapping portion overlapping the light emitting stack and a second extending portion not overlapping the light emitting stack. 如申請專利範圍第1項所述之方法,其中該透明導電層具有一部分與該發光疊層直接接觸。The method according to item 1 of the application, wherein the transparent conductive layer has a part in direct contact with the light-emitting stack.
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