TWI660077B - A semiconductor device, the method of making the same and an electronic device - Google Patents

Abstract

The invention provides a semiconductor element, a manufacturing method thereof, and an electronic device. The method includes: providing a first substrate; forming a cubic phase silicon carbide substrate on the first substrate; and performing an amorphous treatment on the cubic phase silicon carbide substrate to form a non-crystalline silicon on the top of the cubic phase silicon carbide substrate. A crystalline silicon carbide layer; performing a recrystallization treatment on the amorphous silicon carbide layer to form a single crystalline silicon carbide layer on top of the amorphous silicon carbide layer. The performance and yield of the SiC-based substrate formed by the method are greatly improved.

Description

Semiconductor element, manufacturing method thereof, and electronic device

The present invention relates to the field of semiconductor technology, and in particular, to a semiconductor element, a manufacturing method thereof, and an electronic device.

With the continuous development of integrated circuit technology, more components will be integrated on the chip, and the chip will also use faster speeds. With the advancement of these requirements, the geometric size of components will continue to shrink, and new materials, new technologies and new manufacturing processes will continue to be used in the wafer manufacturing process. At present, the preparation of semiconductor devices has developed to the nanometer level, and the manufacturing processes of conventional devices have gradually matured.

Over the past few decades, advances in the design and manufacture of silicon-based components and electronic components have proven that silicon-based components have exceptional levels of scalability and circuit complexity.

Integrating silicon-based and SiC-based components on the same chip is highly anticipated to improve the functionality and design flexibility of advanced applications.

SiC-based materials are attractive because they are used to prepare high-brightness light-emitting diodes (LEDs), power switching devices, adjustment devices, battery protectors, panel display drivers, and communications equipment. A component prepared using a SiC-based material is usually formed on a SiC-based substrate.

Therefore, how to prepare a high-performance SiC-based substrate is crucial for the preparation of SiC-based components.

A series of simplified forms of concepts are introduced in the summary section, which will be explained in further detail in the detailed description section. The summary of the present invention does not mean trying to define the key features and necessary technical features of the claimed technical solution, let alone trying to determine the protection scope of the claimed technical solution.

In view of the shortcomings of the prior art, the present invention provides a method for manufacturing a semiconductor device, the method includes: providing a first substrate; forming a cubic phase silicon carbide substrate on the first substrate; and performing the cubic phase silicon carbide substrate Amorphous processing to form an amorphous silicon carbide layer on top of the cubic phase silicon carbide substrate; recrystallizing the amorphous silicon carbide layer to form a single crystal carbide on the top of the amorphous silicon carbide layer Silicon layer.

Optionally, the cubic phase silicon carbide substrate is a 3C-SiC layer, and the single crystal silicon carbide layer is a 6H-SiC layer.

Optionally, the deposition gas source of the cubic phase silicon carbide substrate includes SiHCl ₃ , C ₃ H ₈ and H ₂ ; and / or the deposition pressure of the cubic phase silicon carbide substrate is 0.1 Torr -1 Torr; and / or The deposition temperature of the cubic phase silicon carbide substrate is from 950 ° C to 1200 ° C; and / or the thickness of the cubic phase silicon carbide substrate is from 0.1 μm to 1.0 μm.

Optionally, the amorphous treatment is performed by a method of electron beam irradiation.

Optionally, the acceleration voltage of the electron beam radiation is above 1 MV, and / or the intensity of the electron beam radiation is above 1 × 10 ²⁴ m ^-2 S ^-1 .

Optionally, the temperature of the electron beam radiation is above 170K, and / or the diameter of the electron beam radiation is 1 μm to 3 μm.

Optionally, the recrystallization process includes performing laser annealing on the amorphous silicon carbide layer, so that the temperature of the top surface of the amorphous silicon carbide layer is above 1500 ° C.

Optionally, the laser annealing uses pulsed laser annealing, the pulse is 10ns-30ns, and the number of loops is 5000-50000 times.

Optionally, the laser annealing uses a XeCl pulsed gas laser with a wavelength of 308 nm.

Optionally, the method further includes a step of forming an active element and / or a passive element on the single crystal silicon carbide layer and / or on the first substrate; the active element includes a transistor and two At least one of a pole body; the passive element includes at least one of a radio frequency, a load, and a capacitor.

Optionally, the first substrate includes a silicon substrate, and the cubic phase silicon carbide substrate is located on a part of the silicon substrate.

The present invention also provides a semiconductor element, the semiconductor element includes: a first substrate; a second substrate located on the first substrate, and the second substrate includes a cubic phase sequentially arranged from a surface of the first substrate upwardly Silicon carbide substrate, amorphous silicon carbide layer and single crystal silicon carbide layer.

Optionally, the cubic silicon carbide substrate is 3C-SiC, and the single crystal silicon carbide layer is 6H-SiC.

Optionally, the thickness of the cubic silicon carbide substrate is 0.1 μm to 1.0 μm.

Optionally, an active element and / or a passive element is formed on the first substrate and / or the second substrate; the active element includes at least one of a transistor and a diode; the passive element The source element includes at least one of a radio frequency, a load, and a capacitor.

The present invention also provides an electronic device including the above-mentioned semiconductor element.

According to the manufacturing method of the present invention, a method for forming a SiC-based substrate is provided. In the method, a cubic phase silicon carbide substrate is first formed; then an amorphous silicon carbide layer is formed on top of the cubic phase silicon carbide substrate; A top layer of the amorphous silicon carbide layer forms a single crystal silicon carbide layer to form a composite SiC-based substrate. The performance and yield of the SiC-based substrate formed by the method are greatly improved.

In the following description, numerous specific details are given to provide a more thorough understanding of the present invention. However, it will be apparent to one skilled in the art that the present invention may be practiced without one or more of these details. In other examples, in order to avoid confusion with the present invention, some technical features known in the art are not described.

It should be understood that the present invention can be implemented in different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, the sizes and relative sizes of layers and regions may be exaggerated for clarity. The same reference numerals denote the same elements throughout.

It will be understood that when an element or layer is referred to as being "on", "adjacent", "connected to" or "coupled to" another element or layer, it can be directly on the other element or layer. Layers, adjacent, connected, or coupled to other elements or layers, or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" another element or layer, there are no intervening elements or Floor. It should be understood that, although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below can be represented as a second element, component, region, layer or section without departing from the teachings of the present invention.

Spatial relation terms such as "below", "below", "below", "below", "above", "above", etc., in It may be used here for convenience of description to describe the relationship between one element or feature and other elements or features shown in the figure. It should be understood that in addition to the orientation shown in the figures, the spatial relationship terminology is intended to include different orientations of the elements in use and operation. For example, if an element in the drawing is turned over, then an element or feature described as "below" or "beneath" other elements or features would then be oriented "above" the other element or feature. Thus, the exemplary terms "below" and "below" can include both an orientation of above and below. The elements may be otherwise oriented (rotated 90 degrees or other orientations) and the spatial descriptors used herein are interpreted accordingly.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended as a limitation of the invention. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the terms "comprising" and / or "including", when used in this specification, determine the presence of stated features, integers, steps, operations, elements and / or components, but do not exclude one or more other The presence or addition of features, integers, steps, operations, elements, parts, and / or groups. As used herein, the term "and / or" includes any and all combinations of the associated listed items.

Embodiments of the invention are described herein with reference to cross-sectional views that are schematic diagrams of ideal embodiments (and intermediate structures) of the invention. As such, variations from the shapes shown can be expected due to, for example, manufacturing techniques and / or tolerances. Therefore, embodiments of the present invention should not be limited to the specific shape of the region shown here, but include shape deviations due to, for example, manufacturing. For example, an implanted region shown as a rectangle generally has round or curved features and / or implanted concentration gradients at its edges, rather than a binary change from the implanted region to the non-implanted region. Similarly, a buried area formed using implantation may result in some implantation in the area between the buried area and the surface through which the implantation proceeds. Thus, the regions shown in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of an element and are not intended to limit the scope of the invention.

In order to thoroughly understand the present invention, detailed steps will be provided in the following description in order to explain the technical solution proposed by the present invention. The preferred embodiments of the present invention are described in detail below. However, in addition to these detailed descriptions, the present invention may have other embodiments. Example one

In order to solve the foregoing technical problems and improve the performance of the device, an embodiment of the present invention provides a method for manufacturing a semiconductor device. As shown in FIG. 2, the method mainly includes: Step S1: providing a first substrate; Step S2: A cubic phase silicon carbide substrate is formed on the first substrate; step S3: performing an amorphous treatment on the cubic phase silicon carbide substrate to form an amorphous silicon carbide layer on top of the cubic phase silicon carbide substrate; step S4: Performing a recrystallization treatment on the amorphous silicon carbide layer to form a single crystal silicon carbide layer on a top layer of the amorphous silicon carbide layer.

According to the manufacturing method of the present invention, a method for forming a SiC-based substrate is provided. In the method, a cubic phase silicon carbide substrate is first formed; then an amorphous silicon carbide layer is formed on top of the cubic phase silicon carbide substrate; A top layer of the amorphous silicon carbide layer forms a single crystal silicon carbide layer to form a composite SiC-based substrate. The performance and yield of the SiC-based substrate formed by the method are greatly improved.

Specifically, the method for manufacturing a semiconductor element of the present invention is described in detail below with reference to FIGS. 1a to 1d, wherein FIGS. 1a to 1d illustrate elements obtained by relevant steps of the method for manufacturing a semiconductor element according to an embodiment of the present invention Schematic diagram of the structure.

The semiconductor element in the present invention may include a memory element, an active element, a passive element (passive element), a MEMS element, and the like, and is not limited to any one, and is not further limited in the present invention.

In the present invention, the entire formation process of the semiconductor element will not be further described, and only the formation of the SiC-based substrate will be described in detail.

It should be noted that the method for forming the SiC-based substrate can be applied to the preparation of various semiconductor elements.

First, step one is performed to provide a first substrate 201.

Specifically, as shown in FIG. 1a, the first substrate 201 in the present application may be at least one of the following materials: silicon, silicon on insulator (SOI), silicon on insulator (SSOI), Silicon germanium (S-SiGeOI), silicon germanium (SiGeOI) on insulator and germanium on insulator (GeOI) are laminated on the insulator.

Optionally, the substrate in the present invention is a silicon or polycrystalline silicon substrate, and its thickness is not limited to a certain numerical range.

The epitaxial method of the polycrystalline silicon substrate described in a specific embodiment of the present invention is: carrying hydrogen (H ₂ ) gas with silicon tetrachloride (SiCl ₄ ) or silicon trichlorohydrogen (SiHCl ₃ ), and silane (SiH ₄ ) or silicon dichlorohydrogen (SiH ₂ Cl ₂ ) and the like enter the reaction chamber on which the silicon substrate is placed, and perform a high-temperature chemical reaction in the reaction chamber to reduce or thermally decompose the silicon-containing reaction gas, and the generated silicon atoms are on the silicon surface of the substrate. On epitaxial growth. In this step, a high dilution ratio of 98.5% can be selected, the reaction temperature is 1500-1800 ° C, and the air pressure is controlled to about 1pa, and the silicon film can be epitaxially grown on a substrate at 200 ° C to obtain a silicon film of 200nm or more In this step, the temperature and time can also be adjusted to control the silicon film.

The formed first substrate 201 may be divided into a SiC-based element region and a Si-based element region to form a SiC-based element and a Si-based element, respectively.

Wherein, the SiC-based element and Si-based element include an active element and / or a passive element; the active element includes at least one of a transistor and a diode; the passive element includes a radio frequency, a load, and a capacitor At least one of.

Step two is performed to form a cubic silicon carbide substrate 203 on the substrate. Optionally, the cubic silicon carbide substrate is 3C-SiC. Silicon carbide is a group IV-IV compound semiconductor material with many isomeric types. Its typical structure can be divided into two types. One is the cubic silicon carbide crystal form of the sphalerite structure, which is called 3C-SiC or β-SiC, where 3 refers to the number of midplanes in the periodic sequence.

The basic SiC crystal is a tetragonal crystal in which four carbon atoms and one silicon atom are alternately bonded by sp3. The bonding distance between the carbon atom and the carbon atom is 3.08 angstroms. The bond distance is 1.89 Angstroms. There are different types of SiC crystals according to different atomic stacking methods, and currently up to 170 crystal types are known. Different crystal types of silicon carbide have different properties, such as the aforementioned 3C, 6H, 4H, 15R, C represents a cubic structure, H represents a hexagonal structure, and R represents a rhombohedron. The number indicates the number of periodic arrangements of the stack. 3C is stacked in the order of ABC, and 4H-SiC and 6H-SiC are stacked in different orders of ABCB and ABCACB, respectively.

The main growth method of silicon carbide / silicon structure growth is chemical vapor deposition (CVD), and most of them are amorphous, polycrystalline α-SiC films or 3C-SiC films.

Specifically, the deposition gas source of the cubic phase silicon carbide substrate includes SiHCl ₃ , C ₃ H _8, and H ₂ .

Optionally, the deposition pressure of the cubic phase silicon carbide substrate is 0.1-1 Torr, for example, the deposition pressure of the cubic phase silicon carbide substrate is 0.1 Torr, 0.2 Torr, 0.4 Torr, 0.5 Torr, 0.8 Torr, or 1 Torr.

Optionally, the deposition temperature of the cubic phase silicon carbide substrate is 950-1200 ° C. For example, the deposition temperature of the cubic phase silicon carbide substrate is 950 ° C, 1000 ° C, 1050 ° C, 1100 ° C, or 1150 ° C.

Optionally, the thickness of the cubic phase silicon carbide substrate is 0.1-1.0 μm, for example, the thickness of the cubic phase silicon carbide substrate is 0.1 μm, 0.2 μm, 0.4 μm, 0.5 μm, 0.7 μm, 0.9 μm, or 1 μm.

Specifically, in this step, the cubic silicon carbide substrate 203 is formed on a surface of a partial region of the first substrate 201.

Optionally, the cubic silicon carbide substrate 203 is formed in the SiC-based element region.

Specifically, a mask layer 202 is formed on the Si-based element region, and then the cubic phase silicon carbide substrate 203 is formed on the SiC-based element region not covered by the mask layer 202, as shown in FIG. 1b.

Wherein, the cubic silicon carbide substrate 203 is formed on the SiC-based element region to the top of the mask layer, but the thickness of the cubic silicon carbide substrate 203 is not limited to the example.

Step 3 is performed to perform an amorphous treatment on the cubic phase silicon carbide substrate to form an amorphous silicon carbide layer 204 on top of the cubic phase silicon carbide substrate.

Specifically, as shown in FIG. 1c, the cubic silicon carbide substrate is subjected to an amorphous treatment to form an amorphous silicon carbide layer 204 in a thickness from the surface of the cubic phase silicon carbide substrate down to nearly half the thickness.

In this step, the thickness of the amorphous silicon carbide layer 204 is half of the thickness of the cubic silicon carbide substrate.

The amorphous treatment is performed by a method of electron beam radiation.

Optionally, the acceleration voltage of the electron beam radiation is above 1MV, for example, the acceleration voltage of the electron beam radiation is 1MV, 1.5 MV, 5 MV, 10 MV, or 20 MV.

Alternatively, the intensity of electron beam radiation of 1 × 10 ²⁴ m ^-2 S ^-1 or more, for example, the intensity of electron beam radiation of ^{1 × 10 24 m -2 S -1} , 2 × 10 24 m - ² S ^-1 , 5 × 10 ²⁴ m ^-2 S ^-1 , 8 × 10 ²⁴ m ^-2 S ^-1 , 1 × 10 ²⁵ m ^-2 S ^-1, and so on.

Optionally, the temperature of the electron beam radiation is above 170K, for example, the temperature of the electron beam radiation is 170K, 190K, 220K, 370K, or 500K.

Optionally, the radiation diameter of the electron beam radiation is 1-3 μm, for example, the radiation diameter of the electron beam radiation is 1 μm, 1.5 μm, 2 μm, or 3 μm.

Step 4 is performed to recrystallize the amorphous silicon carbide layer to form a single crystal silicon carbide layer 205 on the top of the amorphous silicon carbide layer.

Specifically, as shown in FIG. 1d, the recrystallization process in this step includes performing laser annealing on the amorphous silicon carbide layer to 1500 ° C or higher.

For example, the amorphous silicon carbide layer is subjected to laser annealing to 1500 ° C, 1600 ° C, 1800 ° C, 1900 ° C, or 2000 ° C.

Wherein, the laser annealing uses pulsed laser annealing, the pulse is 10-30ns, and the number of loops is 5000-50000 times.

The depth of the laser radiation is about 0.3 μm, for example, the depth of the laser radiation is 0.25-035 μm.

Step 5 is performed to form an active element and / or a passive element on the single crystal silicon carbide layer and / or on the first substrate.

First, the cover layer is removed to expose the first substrate, and then active elements and / or passive elements are formed on the single crystal silicon carbide layer and / or on the first substrate.

Wherein, the active element includes at least one of a transistor and a diode; and the passive element includes at least one of a radio frequency, a load, and a capacitor.

The method for forming the active element and / or the passive element may be selected from methods commonly used in the art, and is not limited to a certain method.

So far, the detailed description of the manufacturing method of the semiconductor element of the present invention has been completed, and other process steps may be required for the fabrication of the complete element, which will not be repeated here.

According to the manufacturing method of the present invention, a method for forming a SiC-based substrate is provided. In the method, a cubic phase silicon carbide substrate is first formed; then an amorphous silicon carbide layer is formed on top of the cubic phase silicon carbide substrate; A top layer of the amorphous silicon carbide layer forms a single crystal silicon carbide layer to form a composite SiC-based substrate. The performance and yield of the SiC-based substrate formed by the method are greatly improved. Example two

The invention also provides a semiconductor element, which is prepared by using the method described in the first embodiment.

Wherein, the semiconductor element includes: a first substrate; a second substrate is located on the first substrate, and the second substrate includes a cubic phase silicon carbide substrate and an amorphous silicon carbide layer arranged in order from the surface of the first substrate upwards; And single crystal silicon carbide layer.

Specifically, as shown in FIG. 1d, the first substrate 201 in the present application may be at least one of the following materials: silicon, silicon on insulator (SOI), silicon on insulator (SSOI), Silicon germanium (S-SiGeOI), silicon germanium (SiGeOI) on insulator and germanium on insulator (GeOI) are laminated on the insulator.

Optionally, the substrate in the present invention is a silicon or polycrystalline silicon substrate, and its thickness is not limited to a certain numerical range.

The formed first substrate 201 may be divided into a SiC-based element region and a Si-based element region to form a SiC-based element and a Si-based element, respectively.

Wherein, the SiC-based element and Si-based element include an active element and / or a passive element; the active element includes at least one of a transistor and a diode; the passive element includes a radio frequency, a load, and a capacitor At least one of.

The second substrate includes a cubic phase silicon carbide substrate 203, an amorphous silicon carbide layer 204, and a single crystal silicon carbide layer 205, which are sequentially arranged from the surface of the first substrate upward.

Optionally, the cubic silicon carbide substrate is 3C-SiC. Silicon carbide is a group IV-IV compound semiconductor material with many isomeric types. Its typical structure can be divided into two types, one is the cubic silicon carbide crystal form of the sphalerite structure, called 3C-SiC or β-SiC, where 3 refers to the number of faces in the periodic order.

The basic SiC crystal is a tetragonal crystal in which four carbon atoms and one silicon atom are alternately bonded by sp3. The bonding distance between the carbon atom and the carbon atom is 3.08 angstroms. The bond distance is 1.89 Angstroms. There are different types of SiC crystals according to different atomic stacking methods, and currently up to 170 crystal types are known. Different crystal types of silicon carbide have different properties, such as the aforementioned 3C, 6H, 4H, 15R, C represents a cubic structure, H represents a hexagonal structure, and R represents a rhombohedron. The number indicates the number of periodic arrangements of the stack. 3C is stacked in the order of ABC, and 4H-SiC and 6H-SiC are stacked in different orders of ABCB and ABCACB, respectively.

The main growth method of silicon carbide / silicon structure growth is chemical vapor deposition (CVD), and most of them are amorphous, polycrystalline α-SiC films or 3C-SiC films.

Optionally, the thickness of the cubic phase silicon carbide substrate is 0.1-1.0 μm, for example, the thickness of the cubic phase silicon carbide substrate is 0.1 μm, 0.2 μm, 0.4 μm, 0.5 μm, 0.7 μm, 0.9 μm, or 1 μm.

Specifically, in this step, the cubic silicon carbide substrate 203 is formed on a surface of a partial region of the first substrate 201.

Optionally, the cubic silicon carbide substrate 203 is formed in the SiC-based element region.

Active elements and / or passive elements are formed on the single crystal silicon carbide layer and / or on the first substrate.

First, the mask layer, such as the first substrate, is removed, and then an active element and / or a passive element is formed on the single crystal silicon carbide layer and / or the first substrate.

Wherein, the active element includes at least one of a transistor and a diode; and the passive element includes at least one of a radio frequency, a load, and a capacitor.

The method for forming the active element and / or the passive element may be selected from methods commonly used in the art, and is not limited to a certain method.

The performance and yield of the SiC-based substrate of the present invention are greatly improved. Example three

Another embodiment of the present invention provides an electronic device including a semiconductor element, which is the semiconductor element in the foregoing second embodiment, or a semiconductor element obtained by the method for manufacturing a semiconductor element according to the first embodiment.

The electronic device can be any electronic product or device such as a mobile phone, tablet computer, notebook computer, netbook, game console, television, VCD, DVD, navigator, camera, video camera, voice recorder, MP3, MP4, PSP, etc. It may be an intermediate product having the above semiconductor, for example, a mobile phone motherboard having the integrated circuit.

FIG. 3 shows an example of a mobile phone. The mobile phone 300 is provided with a display portion 302, an operation button 303, an external port 304, a speaker 305, a microphone 306, and the like included in the housing 301.

Wherein, the mobile phone handset includes the aforementioned semiconductor element, the semiconductor element includes: a first substrate; a second substrate is located on the first substrate; and the second substrate includes cubes arranged in order from the surface of the first substrate upward. Phase silicon carbide substrate, amorphous silicon carbide layer and single crystal silicon carbide layer. The electronic device has all the advantages of the semiconductor element described above.

The present invention has been described using the above embodiments, but it should be understood that the above embodiments are only for the purpose of illustration and description, and are not intended to limit the present invention to the scope of the described embodiments. In addition, those skilled in the art can understand that the present invention is not limited to the above-mentioned embodiments. According to the teachings of the present invention, more variations and modifications can be made, and these variations and modifications all fall within the scope of protection of the present invention. Within range. The scope of protection of the present invention is defined by the appended claims and their equivalents.

201‧‧‧First substrate

202‧‧‧Cover layer

203‧‧‧ Cubic Phase Silicon Carbide Substrate

204‧‧‧Amorphous silicon carbide layer

205‧‧‧Single crystal silicon carbide layer

300‧‧‧ mobile phone

301‧‧‧shell

302‧‧‧Display section

303‧‧‧Operation buttons

304‧‧‧External port

305‧‧‧Speaker

306‧‧‧microphone

The following drawings of the present invention are used herein as a part of the present invention to understand the present invention. The drawings illustrate embodiments of the invention and their descriptions to explain the principles of the invention. In the drawings:

FIG. 1a to FIG. 1d are schematic diagrams showing the structure of an element obtained by the relevant steps of the method for manufacturing a semiconductor element according to an embodiment of the present invention;

FIG. 2 shows a process flow chart of a method for manufacturing a semiconductor device according to an embodiment of the present invention;

FIG. 3 is a schematic diagram of an electronic device according to an embodiment of the invention.

Claims (16)

A method for manufacturing a semiconductor element includes: providing a first substrate; forming a cubic phase silicon carbide substrate on the first substrate; and performing an amorphous treatment on the cubic phase silicon carbide substrate to form the cubic phase silicon carbide substrate An amorphous silicon carbide layer is formed on top of the amorphous silicon carbide layer; the amorphous silicon carbide layer is recrystallized to form a single crystal silicon carbide layer on top of the amorphous silicon carbide layer. The manufacturing method according to claim 1, wherein the cubic phase silicon carbide substrate is a 3C-SiC layer, and the single crystal silicon carbide layer is a 6H-SiC layer. The manufacturing method according to claim 1, wherein the cubic silicon carbide substrate comprises a deposition gas source SiHCl _3, C ₃ H ₈ and H _2; and the deposition pressure phase cubic silicon carbide substrate is 0.1Torr-1Torr ; And the deposition temperature of the cubic phase silicon carbide substrate is 950 ° C. to 1200 ° C .; and the thickness of the cubic phase silicon carbide substrate is 0.1 μm to 1.0 μm. The manufacturing method according to claim 1, wherein said amorphous processing is performed by a method of electron beam irradiation. The manufacturing method according to claim 4, wherein an acceleration voltage of the electron beam radiation is 1 MV or more, and an intensity of the electron beam radiation is 1 × 10 ²⁴ m ^-2 S ^-1 or more. The manufacturing method according to claim 4, wherein a temperature of the electron beam radiation is 170K or more, and a diameter of the electron beam radiation is 1 m to 3 m. The manufacturing method according to claim 1, wherein the recrystallization treatment includes laser annealing the amorphous silicon carbide layer so that a temperature of a top surface of the amorphous silicon carbide layer becomes 1500 ° C. or more. The manufacturing method according to claim 7, wherein the laser annealing uses pulsed laser annealing, the pulse is 10ns-30ns, and the number of loops is 5000-50000 times. The manufacturing method according to claim 7, wherein the laser annealing uses a XeCl pulsed gas laser having a wavelength of 308 nm. The manufacturing method according to claim 1, wherein the method further comprises a step of forming an active element and a passive element on the single-crystal silicon carbide layer and on the first substrate; the active element includes electricity At least one of a crystal and a diode; the passive element includes at least one of a radio frequency, a load, and a capacitor. The manufacturing method according to claim 1, wherein the first substrate comprises a silicon substrate, and the cubic silicon carbide substrate is located on a part of the silicon substrate. A semiconductor element includes a first substrate and a second substrate located on the first substrate. The second substrate includes a cubic phase silicon carbide substrate and an amorphous silicon carbide layer sequentially arranged from the surface of the first substrate upward. And single crystal silicon carbide layer. The semiconductor element according to claim 12, wherein the cubic phase silicon carbide substrate is 3C-SiC, and the single crystal silicon carbide layer is 6H-SiC. The semiconductor element according to claim 12, wherein a thickness of the cubic phase silicon carbide substrate is 0.1 μm to 1.0 μm. The semiconductor element according to claim 12, wherein an active element and a passive element are formed on the first substrate and the second substrate; the active element includes at least one of a transistor and a diode; The passive element includes at least one of a radio frequency, a load, and a capacitor. An electronic device, wherein the electronic device includes the semiconductor element according to any one of claims 12 to 15.