TWI650050B - Multilayer circuit board and manufacturing method thereof - Google Patents

Abstract

The present invention provides a method for fabricating a multi-layer circuit board, comprising the steps of: forming a first circuit board and a second circuit board, wherein the first circuit board comprises a first circuit pattern layer, a first dielectric layer and a setting a first conductive block in the first dielectric layer, the second circuit board includes a second circuit pattern layer, a second dielectric layer and a second conductive block disposed in the second dielectric layer Forming a plurality of solder balls on the first circuit pattern layer of the first circuit board; forming a plurality of conductive pillars on the second circuit pattern layer of the second circuit board; pressing and fixing the first circuit board and The second circuit board combines the plurality of solder balls with the plurality of conductive pillars. By using the plurality of conductive pillars, the amount of the plurality of solder balls is reduced, thereby reducing the problem of tin spillage when the laminated multilayer circuit board is pressed. The amount of the solder ball used refers to the volume or size of each of the solder balls used.

Description

Multilayer circuit board and manufacturing method thereof

The present invention relates to a multilayer circuit board and a method of fabricating the same, and more particularly to a multilayer circuit board capable of preventing spillage of tin and a method of fabricating the same.

With the trend of miniaturization of electronic devices, the wiring of the circuit diagram of the electronic device is denser, and the denser the circuit diagram, the more complicated the signal routing is. If all the lines are placed on the same circuit board, It may be impossible to put all the lines in the same layer of circuit board, or it may cause signal interference because the lines are too close, so the design of the multi-layer circuit board is required. The following describes the manufacturing process of the existing multilayer circuit board.

As shown in FIG. 4A, a first conductive layer 51 and a second conductive layer 52 are formed on a first surface 41 and a second surface 42 of a release layer 40, respectively.

As shown in FIG. 4B, processes such as dry film coating, development, plating, and cleaning are performed on the surfaces of the first conductive layer 51 and the second conductive layer 52, respectively, to form a first line pattern layer 53 at the first Above the conductive layer 51, a second line pattern layer 54 is formed over the second conductive layer 52.

As shown in FIG. 4C, a first dielectric layer 55 and a second are formed over the first conductive layer 51 and the first wiring pattern layer 53 and the second conductive layer 52 and the second wiring pattern layer 54 respectively. Dielectric layer 56.

Then, as shown in FIG. 4D, a plurality of openings 57 are formed on the first dielectric layer 55 and the second dielectric layer 56 by a laser process, and the first line is exposed through the plurality of openings 57. The pattern layer 53 and the second line pattern layer 54.

Next, as shown in FIG. 4E, processes such as dry film coating, development, plating, and cleaning are performed on the first dielectric layer 55 and the second dielectric layer 56 to respectively form the first line pattern layer 53 and A third conductive layer 58 and a fourth conductive layer 59 are formed over the second circuit pattern layer 54 to complete the fabrication of a first circuit board 60 and a second circuit board 70.

As shown in FIG. 4F, a dry film 80 is formed on the first circuit board 60 and the second circuit board 70 to protect the first circuit board 60 and the second circuit board 70, and the first circuit board 60 is prevented from being The second circuit board 70 is damaged during subsequent board disassembly. Next, a plate removing process is performed to separate the first circuit board 60 and the second circuit board 70 from the surface of the release layer 40.

Next, as shown in FIG. 4G and FIG. 4H, the dry film 80 on the first circuit board 60 and the second circuit board 70 are removed, respectively, to perform the third conductive layer 58 and the second circuit pattern layer. The surface treatment of 54 increases the adhesion of the third conductive layer 58 and the surface of the second line pattern layer 54 to make the third conductive layer 58 and the second line pattern layer 54 easy to interact with other conductive materials (such as other conductive materials). Etc.).

As shown in FIG. 4I and FIG. 4J, the dry film 80 and the first conductive layer 51 are completely removed from the surface of the first circuit board 60, and the dry film 80 and the second conductive layer 52 are removed from the first conductive layer 52. The surface of the two circuit boards 70 is completely removed to prevent the first circuit board 60 or the second circuit board 70 from being short-circuited.

As shown in FIG. 4K, a portion of the first dielectric layer 55 of the first circuit board 60 is removed, and the first line pattern layer 53, the third conductive layer 58, and the first line pattern layer 53 are retained. The first dielectric layer 55 of the third conductive layer 58.

As shown in FIG. 4L, a plurality of solder balls 91 are formed on the surface of the first line pattern layer 53. Further, a plurality of solder balls are formed on the surface of the first line pattern layer 53 by solder paste. 91.

As shown in FIG. 4M, a plurality of bonding films 92 are formed on the surface of the second dielectric layer 56. The plurality of bonding films 92 may be formed by first coating a bonding layer on the surface of the second dielectric layer 56. And then removing a portion of the bonding layer, leaving the plurality of bonding films 92 on both sides of the second wiring pattern layer 54, and forming a groove 93 between the plurality of bonding films 92, the groove 93 It is located on the surface of the second line pattern layer 54.

As shown in FIG. 4N, the first circuit board 60 and the second circuit board 70 are pressed together, so that the solder balls 91 of the first circuit board 60 are bonded to the recesses 93 of the second circuit board 70. And bonding the first circuit board 60 and the second circuit board 70 by the plurality of bonding films 92. And when the pressing is completed, each of the solder balls 91 will fill in each of the grooves 93, as shown in FIG. 4O.

Finally, as shown in FIG. 4P, the surface of the first circuit board 60 and the second circuit board 70 are finally processed after the pressing, for example, a protective film 94 is formed on the first circuit board 60 and the second circuit board. On the surface of the 70, to avoid collision or damage of the multilayer circuit board, the fabrication of the existing multilayer circuit board is completed.

However, due to the miniaturization of electronic products, the usage of the solder balls cannot be controlled accurately, resulting in overflowing the grooves due to excessive use of the solder balls during the pressing process, as shown in the attachment, resulting in the first circuit. The surface of the board and the second circuit board is contaminated, thereby affecting the conductivity of the multilayer circuit board or causing a short circuit. Therefore, it is necessary to improve the problem of overflowing tin in the multilayer circuit board to prevent a short circuit from occurring.

The purpose of this creation is to create a multi-layer circuit board to reduce the amount of solder balls used, to improve the problem of overflow tin, and to prevent the short circuit of the multilayer circuit board.

According to the above objective, the present invention provides a multilayer circuit board comprising: a first circuit board comprising: a first dielectric layer having a first surface and a second surface; a first line pattern layer formed on The first surface of the first dielectric layer is formed on the second surface of the first dielectric layer and electrically connected to the first circuit pattern layer; a plurality of solder balls are formed on The first circuit pattern layer is electrically connected to the first circuit pattern layer; and the second circuit board comprises: a second dielectric layer having a third surface and a fourth surface; and a second line pattern layer Forming on the third surface of the second dielectric layer; a plurality of second conductive blocks formed on the fourth surface of the second dielectric layer and electrically connected to the second circuit pattern layer; a plurality of conductive pillars Forming on the second circuit pattern layer to electrically connect the second circuit pattern layer; a plurality of bonding films formed on the second circuit board to overlap the first circuit board and the second circuit board Where the first circuit board and the second battery Pressure plate engaged, the plurality of solder balls corresponding to the plurality of conductive binding posts, so that the first circuit pattern layer and the second conductive layer pattern line.

Another object of the present invention is to create a method for fabricating a multi-layer circuit board by arranging a plurality of conductive pillars on the second circuit board to reduce the amount of solder balls used, thereby preventing the multilayer circuit board from being short-circuited.

According to the above object, the present invention provides a method for fabricating a multi-layer circuit board, comprising the steps of: forming a first circuit board and a second circuit board, wherein the first circuit board comprises a first circuit pattern layer, a first a dielectric layer and a plurality of first conductive blocks disposed in the first dielectric layer, the second circuit board includes a second circuit pattern layer, a second dielectric layer, and a second dielectric layer a plurality of second conductive blocks; forming a plurality of solder balls on the first circuit pattern layer of the first circuit board; forming a plurality of conductive pillars on the second circuit pattern layer of the second circuit board; The first circuit board and the second circuit board are fixed together, so that the plurality of solder balls are combined with the plurality of conductive columns.

The advantage of the present invention is that the use of the plurality of conductive pillars reduces the amount of use of the plurality of solder balls, thereby preventing the problem of overflowing tin when the first circuit board and the second circuit board are pressed together.

Referring to FIG. 1 and FIG. 2A to FIG. 2H, a method of fabricating the multilayer circuit board 10 of the present invention will be described. In the step S101, a first circuit board 11 and a second circuit board 12 are respectively formed. As shown in FIG. 2A, the first circuit board 11 and the second circuit board 12 are formed. A first line pattern layer 111 of the first circuit board 11 and a second line pattern layer 121 of the second circuit board 12 are then formed over the first line pattern layer 111 and the second line pattern layer 121, respectively. a first dielectric layer 112 and a second dielectric layer 122, and a plurality of first openings 113 and a plurality of the first dielectric layer 112 and the second dielectric layer 122 are respectively formed by a laser process. The second opening 123 is to expose the first line pattern layer 111 and the second line pattern layer 121. Then, as shown in FIG. 2B, a plurality of first conductive blocks 114 are formed in the plurality of first openings 113 by an electroplating process, and the plurality of first conductive blocks 114 are disposed above the first line pattern layer 111. The plurality of second conductive blocks 124 are formed in the plurality of second openings 123, and the second conductive blocks 124 are disposed above the second line pattern layer 121.

On the other hand, the first circuit board 11 and the second circuit board 12 may be formed separately on two surfaces of a release layer, or, in different embodiments, the first circuit board 11 may be separately formed. The second circuit board 12 is formed on a different release layer, which is not limited herein. In addition, the first circuit pattern layer 111 of the first circuit board 11 , the first dielectric layer 112 , the first opening 113 and the first conductive block 114 , and the second line of the second circuit board 12 The method for fabricating the pattern layer 121, the second dielectric layer 122, the second opening 123 and the second conductive block 124 has been described in detail in the prior art and will not be described herein.

Next, in step S102, a plurality of solder balls 115 are formed on the first line pattern layer 111 of the first circuit board 11. In the subsequent process step, the first line pattern layer 111 of the first circuit board 11 can be electrically connected to the second line pattern layer 121 of the second circuit board 12, in the first line pattern layer 111. The plurality of solder balls 115 are formed thereon, and the first circuit pattern layer 111 is electrically connected to the second line pattern layer 121 by using the plurality of solder balls 115. In addition, in the present invention, before the plurality of solder balls 115 are formed, the first circuit board 11 can be finished. As shown in FIG. 2C, the first conductive block 114 is not disposed on the first circuit board 11. The first dielectric layer 112 is removed from the region, and the plurality of solder balls 115 are formed on the first wiring pattern layer 111 of the first circuit board 11 as shown in FIG. 2D. Alternatively, in different embodiments, if the first line pattern layer 111 and the plurality of first conductive blocks 114 are evenly distributed on the first dielectric layer 112, the portion of the first dielectric layer 112 may not be removed. The steps are not limited here.

Next, as shown in FIG. 2E, in step S103, a plurality of conductive pillars 125 are formed on the plurality of second conductive blocks 124 of the second circuit board 12. The material of the plurality of conductive pillars 125 is preferably copper. However, in different embodiments, any metal having good electrical conductivity can be used as the material of the plurality of conductive pillars 125 (such as copper alloy, etc.). It is not limited, and the plurality of conductive pillars 125 can be formed by processes such as development, masking, plating, and cleaning. In order to reduce the usage of the plurality of solder balls 115 on the first circuit board 11, the present invention further forms the conductive pillars 125 on the second conductive blocks 124, when the first circuit board 11 and the second circuit When the plate 12 is pressed, because the conductive column 125 is disposed, the usage amount of the solder ball 115 can be reduced without affecting the conductivity. The amount of the solder ball 115 used herein refers to each of the solder balls 115. The size or size.

Then, as shown in FIG. 2F, in step S104, a plurality of bonding films 13 are formed on the second dielectric layer 122. The plurality of bonding films 13 may be formed by first coating a bonding layer on the surface of the second dielectric layer 122, and then removing a portion of the bonding layer to form a bonding film 13 on both sides of the conductive pillars 125. And a groove 131 is formed between the two bonding films 13 , and the groove 131 is located on the surface of the second conductive block 124 . The bonding film 13 is configured to fixedly bond the first circuit board 11 and the second circuit board 12 during pressing.

In the step S105, the first circuit board 11 and the second circuit board 12 are pressed and fixed by the plurality of bonding films 13, and the plurality of solder balls 115 are respectively coupled to the plurality of conductive pillars 125. As shown in Figure 2G. When the first circuit board 11 and the second circuit board 12 are pressed and fixed, each of the solder balls 115 corresponds to each of the conductive pillars 125, so that each of the solder balls 115 covers each of the conductive pillars 125. Because the recess 131 between the plurality of bonding films 13 and the conductive pillars 125 are disposed such that the solder balls 115 are bonded to the conductive pillars 125, the tin does not overflow outside the recesses 131, and the tin can be lowered. The amount of ball 115 used.

Finally, in step S106, the surface processing of the first circuit board 11 and the second circuit board 12 is performed to complete the structure of the multilayer circuit board 10 of the present invention, as shown in FIG. 2H. The surface treatment is to form a protective film 14 on the surface of the first circuit board 11 and the second circuit board 12 to avoid collision or damage of the multilayer circuit board 10.

In the present invention, by using the design of the conductive pillars 125, the amount of the solder balls 115 required is reduced, the risk of the solder balls 115 overflowing during the pressing step is reduced, and the short circuit of the multilayer circuit board 10 is reduced. It is advantageous for the fabrication of the multilayer circuit board 10 of high density.

Referring to FIG. 3A and FIG. 3B, the multilayer circuit board 30 of the present invention comprises a first circuit board 31, a second circuit board 32 and a plurality of bonding films 33. The first circuit board 31 includes a first circuit pattern layer 311, a first dielectric layer 312, a plurality of first conductive blocks 313 and a plurality of solder balls 314, and the second circuit board 32 includes a second circuit pattern layer. 321 , a second dielectric layer 322 , a plurality of second conductive blocks 323 and a plurality of conductive pillars 324 .

The first dielectric layer 312 has a first surface 315 and a second surface 316. The first circuit pattern layer 311 is formed on the first surface 315 of the first dielectric layer 312, and the plurality of first conductive layers The 313 is formed on the second surface 316 of the first dielectric layer 312 and electrically connected to the first circuit pattern layer 311. The plurality of solder balls 314 are formed on the first circuit pattern layer 311 to electrically connect the The first line pattern layer 311. The second dielectric layer 322 has a third surface 325 and a fourth surface 326. The second circuit pattern layer 321 is formed on the third surface 325 of the second dielectric layer 322. The plurality of second conductive blocks 323 is formed on the fourth surface 326 of the second dielectric layer 322 and electrically connected to the second circuit pattern layer 321 . The plurality of conductive pillars 324 are formed on the second circuit pattern layer 321 to electrically connect the first surface. Two line pattern layer 321 .

The bonding film 33 is formed on the second circuit board 32, and the first circuit board 31 and the second circuit board 32 are overlapped and joined. The plurality of bonding films 33 have a plurality of grooves 327 therebetween. A conductive post 324 is located in the plurality of grooves 327. The plurality of solder balls 314 are respectively combined with the plurality of conductive pillars 324 in the plurality of recesses 327.

Specifically, in the multilayer circuit board 30 of the present invention, a plurality of first openings and a plurality of second openings are formed in the laser processing manner on the first dielectric layer 312 and the second dielectric layer 322, respectively. And forming, by the electroplating, the plurality of first conductive blocks 313 and the plurality of second conductive blocks 323 respectively on the plurality of first openings and the second dielectric layer 322 of the first dielectric layer 312 In the second opening.

The plurality of solder balls 314 are disposed on the plurality of first conductive blocks 313. For example, the plurality of solder balls 314 are formed on the plurality of first conductive blocks 313 by soldering. . The plurality of conductive pillars 324 can be formed in various manners. For example, each of the conductive pillars 324 can be formed on each of the second conductive blocks 323 by a process such as development, masking, plating, and cleaning, and the conductive The shape of the pillar 324 is also not limited to the one shown in the drawing, as long as the shape of the conductive pillar 324 which reduces the amount of use of the solder ball 314 can be regarded as the shape of the conductive pillar 324. The material of the conductive pillar 324 is preferably copper.

In addition, when the first circuit board 31 is pressed into the second circuit board 32, the plurality of solder balls 314 are combined with the plurality of conductive pillars 324, so that the solder balls 314 cover the conductive pillars 324. In turn, each of the first conductive blocks 313 can be electrically connected to each of the second conductive blocks 323, and because the conductive pillars 324 are designed, the usage amount of each of the solder balls 314 can be reduced, and thus the first circuit board 31 is further When the second circuit board 32 is pressed, the solder ball 314 does not overflow the recess 327 formed by the bonding film 33, and the short circuit of the multilayer circuit board 30 is prevented from occurring.

Through the design of the conductive pillar 324 of the present invention, the usage amount of each of the solder balls 314 is reduced, thereby avoiding the problem that the solder ball 314 overflows when the first circuit board 31 and the second circuit board 32 are pressed together.

10‧‧‧Multilayer circuit board

11‧‧‧First board

111‧‧‧First line pattern layer

112‧‧‧First dielectric layer

113‧‧‧ first opening

114‧‧‧First conductive block

115‧‧‧ solder balls

12‧‧‧Second circuit board

121‧‧‧Second line pattern layer

122‧‧‧Second dielectric layer

123‧‧‧second opening

124‧‧‧Second conductive block

125‧‧‧conductive column

13‧‧‧ Bonding film

131‧‧‧ Groove

30‧‧‧Multilayer circuit board

31‧‧‧First board

311‧‧‧First line pattern layer

312‧‧‧First dielectric layer

313‧‧‧First conductive block

314‧‧‧ solder balls

315‧‧‧ first surface

316‧‧‧ second surface

32‧‧‧Second circuit board

321‧‧‧Second line pattern layer

322‧‧‧Second dielectric layer

323‧‧‧Second conductive block

324‧‧‧conductive column

325‧‧‧ third surface

326‧‧‧ fourth surface

327‧‧‧ Groove

33‧‧‧ Bonding film

40‧‧‧Fractal layer

41‧‧‧ first side

42‧‧‧ second side

51‧‧‧First conductive layer

52‧‧‧Second conductive layer

53‧‧‧First line pattern layer

54‧‧‧Second line pattern layer

55‧‧‧First dielectric layer

56‧‧‧Second dielectric layer

57‧‧‧ openings

58‧‧‧ Third conductive layer

59‧‧‧fourth conductive layer

60‧‧‧First board

70‧‧‧second board

80‧‧‧ dry film

91‧‧‧ solder balls

92‧‧‧ Bonding film

93‧‧‧ Groove

94‧‧‧Protective film

FIG. 1 is a flow chart of a method for fabricating a multilayer circuit board of the present invention. 2A-2H are schematic diagrams showing the manufacturing process of the multilayer circuit board of the present invention. 3A is an exploded perspective view of the multilayer circuit board of the present invention. FIG. 3B is a schematic plan view of the multilayer circuit board of the present invention. 4A-4P are schematic diagrams showing a manufacturing process of a conventional multilayer circuit board.

Claims (6)

A multi-layer circuit board comprising: a first circuit board comprising: a first dielectric layer having a first surface and a second surface; a first line pattern layer formed on the first dielectric layer a first surface; a plurality of first conductive blocks formed on the second surface of the first dielectric layer and electrically connected to the first line pattern layer; and a plurality of solder balls formed on the first line pattern layer Electrically connecting the first circuit pattern layer; a second circuit board comprising: a second dielectric layer having a third surface and a fourth surface; and a second line pattern layer formed on the second layer The third surface of the electrical layer; the plurality of second conductive blocks are formed on the fourth surface of the second dielectric layer and electrically connected to the second circuit pattern layer; and a plurality of conductive pillars are formed on the second line The pattern layer is electrically connected to the second circuit pattern layer; a bonding layer is formed on the second circuit board, and the first circuit board and the second circuit board are laminated and pressed; wherein the bonding layer is coated Laying on the third surface of the second dielectric layer, and the bonding layer surrounds the complex a portion of each of the conductive pillars is removed to form a plurality of recesses each surrounding one of the plurality of conductive pillars, and then the plurality of solder balls and the plurality of conductive pillars are in the plurality of recesses The slots are respectively coupled to turn on the first line pattern layer and the second line pattern layer, and the plurality of solder balls are prevented from overflowing the plurality of grooves when the corresponding combination is performed. The multi-layer circuit board of claim 1, wherein the first dielectric layer comprises a plurality of first openings and a plurality of second openings, and the plurality of first conductive blocks and the plurality of second conductive blocks are respectively formed on The plurality of first openings and the plurality of second openings. The multilayer circuit board of claim 1, wherein the material of the plurality of conductive pillars is copper. A method for fabricating a multi-layer circuit board, comprising the steps of: forming a first circuit board and a second circuit board, wherein the first circuit board comprises a first circuit pattern layer, a first dielectric layer, and a plurality of first conductive blocks in the first dielectric layer, the second circuit board includes a second circuit pattern layer, a second dielectric layer and a plurality of second conductive blocks disposed in the second dielectric layer Forming a plurality of solder balls on the first circuit pattern layer of the first circuit board; forming a plurality of conductive pillars on the second circuit pattern layer of the second circuit board; forming a bonding layer on the second circuit The board, in combination with the first circuit board and the second circuit board, comprising the steps of: coating the bonding layer on the second dielectric layer of the second circuit board; removing the bonding layer surrounding the plurality a portion of each of the conductive pillars to form a plurality of recesses, wherein the plurality of recesses respectively surround one of the plurality of conductive pillars; the plurality of solder balls and the plurality of conductive pillars in the plurality of conductive pillars Each groove is correspondingly combined to be turned on A first circuit pattern layer and the second wiring pattern layer, and the plurality of solder balls to avoid overflow during the above-described plurality of grooves corresponding to combination of the above. The method of fabricating a multilayer circuit board according to claim 4, wherein the plurality of conductive pillars are formed by a development, plating and etching process. The method for fabricating a multi-layer circuit board according to claim 4, wherein in the step of forming the first circuit board and the second circuit board, the first circuit board and the first Forming a plurality of first openings and a plurality of second openings in the two circuit boards, and forming the plurality of first conductive blocks and the plurality of seconds in the plurality of first openings and the plurality of second openings respectively by an electroplating process Conductive block.