TWI639252B - A photoelectronic semiconductor device with barrier layer - Google Patents

Abstract

An optoelectronic semiconductor component comprising: a barrier layer; a first semiconductor layer over the barrier layer, the first semiconductor layer comprising a first dopant and a second dopant; and a second semiconductor layer Forming a second dopant under the barrier layer, wherein in the first semiconductor layer, the concentration of the first dopant is greater than the concentration of the second dopant, and the concentration of the second dopant in the second semiconductor layer Greater than the concentration at the first semiconductor layer.

Description

Optoelectronic semiconductor component with barrier layer

The present invention relates to the structure of an optoelectronic semiconductor component.

Photoelectric semiconductor components, such as light-emitting diodes (LEDs), have been expanding from traditional indicator lights or decorative applications to light sources of various devices in recent years, and even in the near future, it is highly probable Replacing traditional fluorescent lamps has become a source of light in the new generation of lighting.

A conventional light emitting diode (LED) structure has a single pn junction structure. As shown in FIG. 1, the basic structure includes a substrate 13, an n-type semiconductor layer 11 on the substrate 13, and a p-type semiconductor layer 12. On the n-type semiconductor layer 11, and a light-emitting layer 10 is between the p-type semiconductor layer 12 and the n-type semiconductor layer 11.

In order to increase the amount of light emitted per unit area of the light-emitting diode (LED), as shown in FIG. 2, a light-emitting diode (LED) structure having a multi-layer light-emitting stack has a first pn junction structure I and a second The pn junction structure II is connected in series by a tunneling layer 17, so that the amount of light per unit area will increase in the same unit area, and the driving voltage will be doubled, but the driving current will not increase. . This high voltage, low current characteristic helps to apply to lighting products. The conventional tunneling layer 17 is composed of a highly doped n+ semiconductor layer and a p+ semiconductor layer. Since the high-concentration doped n+ semiconductor layer and the p+ semiconductor layer have poor transmittance to light, the tunneling layer 17 must be generally It is thin to increase the transmittance of light, but the tunneling layer 17 is too thin, and it is easy to incorporate dopants diffused from other semiconductor layers in the process to affect the function of the tunneling layer 17.

An optoelectronic semiconductor component comprising: a barrier layer; a first semiconductor layer over the barrier layer, the first semiconductor layer comprising a first dopant and a second dopant; and a second semiconductor layer Forming a second dopant under the barrier layer, wherein in the first semiconductor layer, the concentration of the first dopant is greater than the concentration of the second dopant, and the concentration of the second dopant in the second semiconductor layer Greater than the concentration at the first semiconductor layer.

The embodiments of the present invention will be described in detail, and in the drawings, the same or the like

First embodiment

Figure 3 is a schematic view showing the structure of the first embodiment of the present invention. The optoelectronic semiconductor component disclosed in the present invention is a dual pn junction structure, comprising a first semiconductor stack 1 and a second semiconductor stack 2 on a substrate 13, wherein the first semiconductor stack 1 is located in the second semiconductor On the stack 2, a tunneling layer 3 is located between the first semiconductor layer 1 and the second semiconductor layer 2, and a barrier layer 4 is located between the tunneling layer 3 and the second semiconductor layer 2, The first electrode 51 is disposed on the surface 53 of the first semiconductor laminate 1, and a second electrode 52 is disposed on the surface 54 of the substrate 13. The first electrode 51 and the second electrode 52 are used to conduct current through the first semiconductor stack. Layer 1 and second semiconductor stack 2.

The substrate 13 is a conductive substrate, and the material comprises one of bismuth (Si), gallium arsenide (GaAs), tantalum carbide (SiC), zinc oxide (ZnO), gallium nitride (GaN), aluminum nitride (AlN) or a metal material. Or a combination thereof.

The first semiconductor laminate 1, the second semiconductor laminate 2, the tunneling laminate 3, and the barrier layer 4 may be grown on the substrate 13 by epitaxial growth, or may be heated and pressurized by a para-adhesive method. The method is bonded to the substrate 13.

The first semiconductor stack 1 includes at least one first n-type semiconductor layer 11 having a first conductivity type, a first light-emitting layer 10 and a first p-type semiconductor layer 12 having a second conductivity type; and a second semiconductor stack 2 including at least one second n-type semiconductor layer 22 having a first conductivity type, a second luminescent layer 23 and a second p-type semiconductor layer 21 having a second conductivity type; the first semiconductor layer 1 and the second semiconductor The laminate 2 is sequentially epitaxially grown on the substrate 13. The first n-type semiconductor layer 11, the first p-type semiconductor layer 12, the second n-type semiconductor layer 22, and the second p-type semiconductor layer 21 may have two single-layer structures or two multi-layer structures (multilayer structure refers to two layers) Or two or more layers). The first n-type semiconductor layer 11 and the first p-type semiconductor layer 12 have different conductivity types, electrical, polar or doped elements to provide electrons or holes; the second n-type semiconductor layer 22 and the second p The type semiconductor layer 21 also has different conductivity types, electrical, polar or doped elements to provide electrons or holes. The first light emitting layer 10 is formed between the first n-type semiconductor layer 11 and the first p-type semiconductor layer 12, and the second light emitting layer 23 is formed between the second n-type semiconductor layer 22 and the second p-type semiconductor layer 21, The first luminescent layer 10 and the second luminescent layer 23 convert electrical energy into light energy. The wavelength of the emitted light is adjusted by changing the physical and chemical composition of one or more of the first semiconductor laminate 1 and the second semiconductor laminate 2. Commonly used materials are aluminum gallium indium phosphide (AlGaInP) series, aluminum gallium indium nitride (AlGaInN) series, zinc oxide (ZnO) series. The first luminescent layer 10 and the second luminescent layer 23 may be a single heterostructure (SH), a double heterostructure (DH), a double-side double heterostructure (DDH), a multilayer quantum. Well (multi-quantum well, MWQ). Specifically, the first luminescent layer 10 and the second luminescent layer 23 may be neutral, p-type or n-type semiconductors. When a current is passed through the first semiconductor layer 1 and the second semiconductor layer 2, the first light-emitting layer 10 and the second light-emitting layer 23 emit light, wherein the light emitted by the first light-emitting layer has a first wavelength, and second The light emitted by the luminescent layer has a second wavelength, and the difference between the first wavelength and the second wavelength is less than 20 nm. When the first luminescent layer 10 and the second luminescent layer 23 are made of an aluminum indium gallium phosphide (AlGaInP)-based material, red, orange, and yellow amber-based light is emitted, wherein the first wavelength and the second wavelength It is between 600nm and 620nm; when it is based on aluminum gallium indium nitride (AlGaInN), it emits blue or green light. In this embodiment, the materials of the first semiconductor laminate 1 and the second semiconductor laminate 2 are aluminum gallium indium phosphide (AlGaInP) series, the first p-type semiconductor layer 12 and the second p-type semiconductor layer. 21 doped magnesium (Mg) or zinc (Zn) element, wherein the concentration of the magnesium (Mg) or zinc (Zn) element in the first p-type semiconductor layer 12 and the second p-type semiconductor layer 21 is greater than 1017 cm-3, Preferably, the ratio is between 3*1017 and 5*1017 cm-3; the first n-type semiconductor layer 11 and the second n-type semiconductor layer 22 are doped with bismuth (Si) elements, wherein the bismuth (Si) element is first The concentration of the n-type semiconductor layer 11 and the second n-type semiconductor layer 22 is between 1017 and 1018 cm-3, preferably between 4*1017 and 6*1017 cm-3.

A tunneling stack 3 is disposed between the first semiconductor stack 1 and the second semiconductor stack 2. The tunneling stack 3 allows current to pass through a tunneling effect, allowing current to flow simultaneously through the first semiconductor stack 1 and the second semiconductor stack 2, the material of which contains more than one element selected from gallium ( Groups of Ga), aluminum (Al), indium (In), phosphorus (P), arsenic (As), nitrogen (N), zinc (Zn), cadmium (Cd), and selenium (Se). The tunneling layer 3 includes a first electrical tunneling layer 31 and a second electrical tunneling layer 32, wherein the first electrical tunneling layer 31 is adjacent to the second semiconductor layer 2, and the first electrical tunneling The polarity of the layer 31 is the same as that of the second p-type semiconductor layer 21. In this embodiment, the first electrical tunneling layer 31 and the second p-type semiconductor layer 21 are both p-type semiconductors, and the first electrical tunneling layer 31 is a compound comprising aluminum (Al), gallium (Ga), arsenic (As), and having a first dopant and a second dopant, wherein the first dopant is carbon (C), the first dopant The concentration is between 1019 and 1021 cm-3, preferably between 1019 and 5*1020 cm-3, the second dopant is magnesium (Mg) or zinc (Zn), and the concentration of the second dopant is less than 1018. Cm-3, preferably less than 1017 cm-3, the concentration of the first dopant is 10 times the concentration of the second dopant, preferably more than 100 times. The first dopant in the first electrical tunneling layer 31, such as carbon (C), is a deliberately doped substance, so that the first electrical tunneling layer 31 forms a p-type semiconductor having a high concentration of doping; The second dopant in the first electrical tunneling layer 31, such as magnesium (Mg) or zinc (Zn), is an unintentional dopant that diffuses from the second p-type semiconductor layer 21 during epitaxial processing. Come. The second electrical tunneling layer 32 is adjacent to the first semiconductor layer 1. The polarity of the second electrical tunneling layer 32 is the same as that of the first n-type semiconductor layer 11. In this embodiment, the second electrical tunneling layer 32 is The first n-type semiconductor layer 11 is an n-type semiconductor, and the second electrical tunneling layer 32 is a compound containing indium (In), gallium (Ga), and phosphorus (P), and is doped with cerium (Te), wherein cerium The concentration of (Te) is between 1019 and 1021 cm-3, preferably between 1019 and 2*1020 cm-3.

The barrier layer 4 between the second p-type semiconductor layer 21 and the first electrical tunneling layer 31 is a compound AlxGa1-xInP containing aluminum (Al), gallium (Ga), indium (In), and phosphorus (P). Wherein x may range from 0.05 to 0.95, preferably from 0.2 to 0.7, and x is from the portion of the barrier layer 4 adjacent to the second p-type semiconductor layer 21 toward the portion adjacent to the first electrical tunneling layer 31 The method of decrementing, decrementing includes linear decrement, or stepwise decrement. Therefore, as shown in the aluminum (Al) concentration profile shown in FIGS. 4A and 4B, in the barrier layer 4, the proportion of aluminum (Al) in the portion close to the second p-type semiconductor layer 21 is about 35%, which is linearly decreasing. (Fig. 4A) or stepwise degression (Fig. 4B), the content ratio is about 10% up to the portion close to the first electrical tunneling layer 31. After the barrier layer 4 is epitaxially grown on the second semiconductor layer 2, the tunneling layer 3 is successively epitaxially grown on the barrier layer 4. During the epitaxial growth process, the barrier layer 4 can be reduced by the second layer. An element doped in the semiconductor layer 2, such as magnesium (Mg) or zinc (Zn), diffuses into the first electrical tunneling layer 31. If the barrier-free layer 4 is formed between the second p-type semiconductor layer 21 and the first electrical tunneling layer 31, in the epitaxial process of the first electrical tunneling layer 31, the second p-type semiconductor layer 21 The two dopants, such as magnesium (Mg) or zinc (Zn), will diffuse into the first electrical tunneling layer 31 in a large amount, so that the concentration of the second dopant in the first electrical tunneling layer 31 is increased. When the concentration of the second dopant exceeds 1018 cm-3 or more, the resistance of the first electrical tunneling layer 31 is increased, so that the operating voltage (Vf) of the optoelectronic semiconductor component is increased, resulting in a decrease in efficiency.

Since the concentration ratio of aluminum (Al) in the barrier layer 4 is close to the second p-type semiconductor layer 21, the content ratio is about 35%, linearly decreasing or stepwise decreasing until the portion close to the first electrical tunneling layer 31. When the content ratio is about 10%, as shown in FIGS. 5A and 5B, the band gap (Ec-Ev) is linearly decreased from the portion of the second p-type semiconductor layer 21 (Fig. 5A) or stepwise (first) 5B) to the first electrical tunneling layer 31, the band gap (Ec-Ev) is gradually changed linearly or stepwise to prevent electrons from being blocked during transmission to lower the operating voltage (Vf).

Second embodiment

The second embodiment differs from the first embodiment in that the barrier layer 4 is a compound containing aluminum (Al), gallium (Ga), indium (In) or phosphorus (P), such as AlxGa1-xInP, wherein the range of x can be It is between 0.05 and 0.95, preferably between 0.2 and 0.7, and is doped with strontium (Sb), wherein the concentration of strontium (Sb) is between 1017 and 1018 cm-3. In the epitaxial process, since the barrier layer 4 is doped with antimony (Sb), elements doped in the second semiconductor stack 2, such as magnesium (Mg) or zinc (Zn), can be suppressed from diffusing to the first electrical property. In the tunneling layer 31, in the first electrical tunneling layer 31, the concentration of the second dopant is more than 1018 cm-3, and it is preferable to avoid exceeding 1017 cm-3.

Figure 6 is a schematic view showing the structure of another embodiment of the present invention. A bulb lamp 600 includes a lamp cover 602, a lens 604, a light emitting module 610, a lamp holder 612, a heat sink 614, a connecting portion 616, and an electrical connection component. The light emitting module 610 includes a carrying portion 606, and the optoelectronic semiconductor component 608 described in the plurality of the foregoing embodiments is on the carrying portion 606.

The examples of the invention are intended to be illustrative only and not to limit the scope of the invention. Any changes or modifications of the present invention to those skilled in the art will be made without departing from the spirit and scope of the invention.

It should be noted that the various embodiments set forth above are illustrative of the invention, but are not intended to limit the scope of the invention. Similar or identical elements in the various embodiments or elements having the same schematic symbols in different embodiments may have the same chemical or physical properties. Further, the elements shown in the different embodiments may be combined or replaced with each other as appropriate, and the element connection relationship of one embodiment may be applied to another embodiment. The above embodiments may be modified in any way without departing from the spirit and spirit of the invention, and are covered by the present invention and are protected by the scope of the patent application described below. this

1‧‧‧First semiconductor stack

10‧‧‧First luminescent layer

11‧‧‧First n-type semiconductor layer

12‧‧‧First p-type semiconductor layer

13‧‧‧Substrate

2‧‧‧Second semiconductor stack

21‧‧‧Second p-type semiconductor layer

22‧‧‧Second n-type semiconductor layer

23‧‧‧second luminescent layer

3‧‧‧Through tunneling

31‧‧‧First electrical tunneling layer

32‧‧‧Second electrical tunneling layer

4‧‧‧Barrier layer

51‧‧‧First electrode

52‧‧‧second electrode

53‧‧‧ surface

54‧‧‧ surface

Figure 1 is a schematic view of a conventional light emitting diode (LED) structure;

2 is a schematic view showing a structure of a conventional light emitting diode (LED) having a multilayer light emitting laminate;

Figure 3 is a schematic structural view of a first embodiment of the present invention;

4A-4B are diagrams showing the ratio of aluminum (Al) content according to the first embodiment of the present invention;

5A-5B are schematic diagrams of the energy band gap (Ec-Ev) according to the first embodiment of the present invention;

Figure 6 is a schematic view showing the structure of another embodiment of the present invention.

Claims (10)

An optoelectronic semiconductor component comprising: a barrier layer; a first semiconductor layer on the barrier layer, the first semiconductor layer comprising a first dopant and a second dopant; and a second semiconductor layer Locating the second dopant under the barrier layer; and a first luminescent layer comprising a first luminescent layer on the first semiconductor layer; wherein in the first semiconductor layer, the first doping The concentration of the substance is greater than the concentration of the second dopant, and the concentration of the second dopant in the second semiconductor layer is greater than the concentration of the first semiconductor layer. The optoelectronic semiconductor component of claim 1, further comprising: a second emissive layer comprising a second emissive layer under the barrier layer, and the second emissive layer comprising the second semiconductor layer . The optoelectronic semiconductor component of claim 1, wherein the concentration of the first dopant in the first semiconductor layer is greater than 10 times the concentration of the second dopant in the first semiconductor layer. The optoelectronic semiconductor component of claim 3, wherein the first dopant comprises carbon (C) and the second dopant comprises magnesium (Mg) or zinc (Zn). The optoelectronic semiconductor component of claim 1, wherein the barrier layer comprises bismuth (Sb)-doped aluminum gallium indium arsenide (Al _x Ga _1-x InP), wherein x ranges from 0.2 x 0.7 and the concentration of strontium (Sb) is between 10 ¹⁷ and 10 ¹⁸ cm ^-3 . The optoelectronic semiconductor component of claim 5, wherein x decreases from a portion of the barrier layer adjacent to the second semiconductor layer toward a portion adjacent to the first semiconductor layer. The optoelectronic semiconductor component of claim 2, further comprising a third semiconductor layer between the first semiconductor layer and the first light emitting layer, wherein the first light emitting layer further comprises a first p a semiconductor layer is disposed on the first luminescent layer and a first n-type semiconductor layer is under the first luminescent layer; the second luminescent layer further includes a second n-type semiconductor under the second luminescent layer Wherein the second semiconductor layer is a p-type semiconductor. The optoelectronic semiconductor component of claim 7, wherein the third semiconductor layer comprises a third dopant different from the second dopant, wherein the third dopant comprises germanium (Te), And the concentration of the third dopant is greater than 10 ¹⁹ cm ^-3 . The optoelectronic semiconductor component of claim 2, wherein the light emitted by the first luminescent layer has a first wavelength, and the light emitted by the second luminescent layer has a second wavelength, the first wavelength and The second wavelength difference is less than 20 nm. The optoelectronic semiconductor component of claim 1, wherein the barrier layer comprises Al _x Ga _1-x InP, wherein x can range from 0.05 to 0.95.