TWI635697B - Interleaved high-step-up zero-voltage switching dc-dc converter - Google Patents

Abstract

The invention relates to an isolated zero-voltage switching high-boost DC-DC converter, which is mainly connected by a series connection of two coupled inductors and introduced into a capacitor-diode voltage doubler circuit to raise a high voltage. The gain and high voltage gain have two design degrees of freedom of the coupled inductor turns ratio and the switch turn-on ratio, so the high voltage gain is achieved without having to operate at a very large turn-on ratio; since the primary side of the two coupled inductors is added to the active clamp The circuit enables all switches to achieve zero-switching soft-cutting performance, which can reduce switching losses and improve conversion efficiency; the two main switching voltage stresses are much lower than the output voltage, and the lower rated withstand voltage can be used and the on-resistance is smaller. The MOSFET power switch can reduce the conduction loss; due to the interleaved operation, the input current ripple is canceled, which can reduce the input current ripple. The energy of the leakage inductance of the coupled inductor can be recycled and reused, which not only improves efficiency, but also does not improve efficiency. This causes the voltage surge problem of the switch; thereby, it can be suitable for applications with high boost gain, high efficiency, and high power.

Description

Isolated Zero-Voltage Switching High-Boost DC-DC Converter

The invention relates to an isolated zero-voltage switching high-boost DC-DC converter, in particular to a function that not only enables all switches to achieve zero voltage switching performance, reduces switching loss, improves efficiency, and can reduce conduction loss, and at the same time Reduce the cost of the circuit, and increase the utility characteristics in its overall implementation.

According to the UNFCCC 21st Meeting of the Parties [COP21] referred to as the "Paris Climate Summit", in December 2015, a historic "Paris" to replace the "Kyoto Protocol" was reached. Agreement (Paris Agreement) to respond to global warming issues. Countries will be committed to drastically reducing greenhouse gas emissions. It is hoped that by the end of this century, the global average temperature rise will not exceed 2 degrees Celsius, and the goal of not exceeding 1.5 degrees will be pursued. I hope that countries can achieve emission reduction targets in a more efficient way through renewable energy sources. Seeking "green growth" in the economy. Therefore, renewable energy must be the focus of industrial development in various countries, including solar energy, wind energy, fuel cells, hydropower, geothermal energy, tidal energy and biomass energy.

After the announcement of China's "Renewable Energy Development Regulations", we will vigorously promote the use of solar photovoltaic renewable energy. In 2012, we will promote the "Sunshine Roofing Million Block Project". This year, the Executive Yuan has approved the "Sun Optoelectronics Two-Year Promotion Plan" with the goal of 2018. The solar energy installation is 1520MW, and the annual power generation is 1.9 billion kWh, which is equivalent to the reduction of carbon in 2085 Da'an Forest Park. The roof type has a target volume of 910MW and the plane type targets 610MW. Residential solar-powered grid-connected power systems installed in Japan, Europe, and the United States have recently become fast-growing markets. In addition, since the fuel cell generates current and water through chemical reaction using hydrogen and oxygen, it is not completely pollution-free, and avoids the problem of time-consuming charging of the conventional battery. It is a new energy mode with great development prospects and is applied to vehicles. And power generation systems will significantly improve air pollution and the greenhouse effect. Therefore, in the application of renewable energy power systems, the technological development of solar power generation systems and fuel cell power generation systems is becoming more and more mature, and often plays an important role in distributed generation systems.

In general, in the power system of solar cells or renewable energy applications based on fuel cell modules, the output voltage generated by the solar cell module and the fuel cell is low voltage due to safety and reliability problems. Not exceeding 40V, in order to meet the requirements of grid-connected power generation systems or DC microgrids, this low-voltage must first be boosted to a high-voltage DC-row using a high-boost DC-DC converter. For example, for a single-phase 220V _ac grid system, this high-voltage DC line is often 380-400V _dc to facilitate DC-AC power conversion of a full-bridge inverter. In theory, a conventional boost converter operating at very high turn-on ratio can achieve high voltage gain, but in practice it is affected by parasitic components, and the voltage conversion ratio is limited to about 5 times or less, so when the voltage gain is as high as Approximately 10 times the practical demand, the development of a new high-boost converter topology is necessary, making high-boost DC-DC converters one of the most common research topics in the field of power electronics engineering in recent years.

Among them, the commonly used high-boost DC-DC converter has the following disadvantages:

1. Existing non-isolated boost converters must achieve high switching ratios in order to achieve high boost ratios; however, very high turn-on ratios will generate large current ripples and severe The diode reverses the recovery current problem and produces severe power loss.

2. In order to achieve a high boost ratio, the existing method can also use a two-stage step-up converter to obtain a better boosting effect, but the secondary conversion of the power may cause inefficiency and non-compliance. Efficient practical needs.

3. Interleaved high-boost converters are also proposed using voltage multiplying modules and lifting capacitors; however, the main switches of such converters are hard switching, resulting in switching losses.

The reason is that the inventor has in view of this, and has been enriching the design of this related industry for many years. Developed and actual production experience, and researched and improved the existing structure and defects, and provided an isolated zero-voltage switching high-boost DC-DC converter for the purpose of achieving better practical value.

The main object of the present invention is to provide an isolated zero-voltage switching high-boost DC-DC converter, which not only enables zero-voltage switching performance of all switches, reduces switching loss, improves efficiency, and can reduce conduction loss, and at the same time Reduce the cost of the circuit, and increase the utility characteristics in its overall implementation.

The present invention is an isolated zero-voltage switching DC-DC step-up high main purpose and effect of the converter, based reached by the specific technology: it is mainly to make the converter input voltage V _in the positive electrode are respectively connected to a first clamp a first end of the capacitor C _c1 , a first end of the first coupled inductor primary side N _p1 , a first end of the second clamp capacitor C _c2 , and a first end of the second coupled inductor primary side N _p2 at the input voltage V _in the negative electrode are respectively connected to the first main switch S ₁ and the second end of the second main terminal of the second switch S _2, the first clamp of the second terminal of the capacitor C _c1 is connected to the first auxiliary switch S of _A1 a first end, the second end of the first auxiliary switch S _{a1 and} the second end of the first coupled inductor primary side N _p1 are simultaneously connected to the first end of the first main switch S ₁ , the second clamping capacitor C _c2 of the second end having a first end connected to the second auxiliary switch S _a2 of the second auxiliary switch S _a2 of the second end connected to the second terminal of the second coupling and a second inductance of the primary side while the N _p2 a first end of the main switch S _2; and D _d1 of the first coupling a first end of the secondary side inductor of the N _s1, respectively the first diode cathode voltage doubler D _d2 of the second negative voltage doubler diode, a second terminal of the first output capacitor C _o1 of the first end and a second output connected to the capacitor C _o2, a second terminal of the first inductor coupled to the secondary side of the N _s1 a second end connected to a second inductor coupled to the secondary side N _s2, the first end of the second inductor coupled to the secondary side of each pressure N _s2 and a second end and a second fold of the first voltage doubler capacitor C _d1 of The first end of the capacitor C _d2 is connected, and the first end of the first voltage doubled capacitor C _d1 is respectively opposite to the anode of the first voltage doubled diode D _{d1 and} the anode of the first output diode D _o1 Connecting, the second end of the second voltage doubled capacitor C _d2 is respectively connected to the positive pole of the second voltage doubled diode D _{d2 and} the negative pole of the second output diode D _o2 , the first output diode The anode of D _o1 is respectively connected to the first end of the first output capacitor C _o1 and the anode of the load R _{o , and} the anode of the second output diode D _o2 and the second end of the second output capacitor C _o2 respectively And connected to the negative electrode of the load R _o .

The present invention is an isolated high zero-voltage switching DC-DC converter boosting a preferred embodiment, wherein the first main switch S ₁ is formed with a first main switch parasitic capacitances C _S1.

A preferred embodiment of the isolated zero voltage switching high step-up DC-DC converter of the present invention, wherein the second main switch S _{2 is} formed with a second main switching parasitic capacitance C _S2 .

A preferred embodiment of the isolated zero-voltage switching high-boost DC-DC converter of the present invention, wherein the first coupled inductor includes a first magnetizing inductance L _m1 and a first leakage inductance L _k1 .

The present invention is an isolated high zero-voltage switching DC-DC converter boosting a preferred embodiment, wherein the second coupling comprises a second inductor L _m2 magnetizing inductance and the second leakage inductance L _k2.

A preferred embodiment of the isolated zero-voltage switching high-boost DC-DC converter of the present invention, wherein the first coupled inductor primary side N _p1 and the first coupled inductor secondary side N _s1 form a first ideal transformer, The second coupled inductor primary side N _p2 and the second coupled inductor secondary side N _s2 form a second ideal transformer.

A preferred embodiment of the isolated zero voltage switching high step-up DC-DC converter of the present invention, wherein the first ideal transformer and the second ideal transformer have the same turns ratio.

(1)‧‧‧ converter

First picture: circuit diagram of the invention

Second figure: equivalent circuit diagram of the present invention

Third figure: Steady-state waveform diagram of the main components of the present invention

Fourth figure: equivalent circuit diagram of the first operation stage of the present invention

Figure 5: Equivalent circuit diagram of the second operation stage of the present invention

Figure 6: Equivalent circuit diagram of the third operation stage of the present invention

Figure 7: Equivalent circuit diagram of the fourth operation stage of the present invention

Figure 8: Equivalent circuit diagram of the fifth operation stage of the present invention

Ninth diagram: equivalent circuit diagram of the sixth operation stage of the present invention

Figure 11: Equivalent circuit diagram of the seventh operation stage of the present invention

Eleventh figure: equivalent circuit diagram of the eighth operation stage of the present invention

Twelfth figure: equivalent circuit diagram of the ninth operation stage of the present invention

Thirteenth figure: equivalent circuit diagram of the tenth operation stage of the present invention

Figure 14: Equivalent circuit diagram of the eleventh operation stage of the present invention

Figure 15: Equivalent circuit diagram of the twelfth operation stage of the present invention

Figure 16: Equivalent circuit diagram of the thirteenth operation stage of the present invention

Figure 17: Equivalent circuit diagram of the fourteenth operation stage of the present invention

Figure 18: Equivalent circuit diagram of the fifteenth operation stage of the present invention

Figure 19: Equivalent circuit diagram of the sixteenth operation stage of the present invention

Figure 20: Graph of voltage gain and conduction ratio and coupling coefficient of the present invention

Twenty-first graph: graph of voltage gain and conduction ratio and coupled inductor turns ratio of the present invention

Twenty-second diagram: schematic diagram of the analog circuit of the present invention

Twenty-third graph: analog waveform diagram of the switch drive signal, input voltage and output voltage of the present invention

Figure 24: Analog waveform diagram of the main switch cross-over voltage of the present invention

Figure 25: Fuzzy waveform diagram of the auxiliary switch across the pressure of the present invention

Figure 26: Driving signal and cross-voltage analog waveform diagram of the main switch of the present invention

Figure 27: Analog waveform amplification of the first main switch switching instant of the present invention Figure

Twenty-eighth drawing: an enlarged view of the analog waveform of the second main switch switching instant of the present invention

Twenty-ninth figure: driving signal and cross-voltage analog waveform diagram of the auxiliary switch of the present invention

Thirty-fifth: enlarged waveform of the analog waveform of the first auxiliary switch switching instant of the present invention

The thirty-first figure: an enlarged view of the analog waveform of the second auxiliary switch switching instant of the present invention

Figure 32: Analog waveform diagram of leakage inductance current and total input current of the present invention

Thirty-third figure: simulation diagram of voltage waveform of double voltage capacitor and output capacitor of the present invention

Figure 34: Simulation diagram of the voltage waveform of the clamp capacitor of the present invention

For a more complete and clear disclosure of the technical content, the purpose of the invention and the effects thereof achieved by the present invention, the following is a detailed description, and please refer to the drawings and drawings: First, please refer to a first circuit diagram of the present invention shown in FIG, mainly converter (1) of the present invention to the input voltage V _in the positive electrode are respectively connected to a first end of a first clamp capacitance C _c1, the inductance of the primary side first coupling N _p1 a first end, a first end of the second clamp capacitor C _c2 and a first end of the second coupled inductor primary side N _p2 , and a second end of the first main switch S _{1 is} respectively connected to the cathode of the input voltage V _in And a second end of the second main switch S ₂ , the first main switch S _{1 is} formed with a first main switch parasitic capacitance C _S1 , and the second main switch S _{2 is} formed with a second main switch parasitic capacitance C _S2 , a second terminal of the first capacitor C _c1 clamp the first end connected to the first auxiliary switch S _a1, the first end of the second auxiliary switch S _a1 of a first and a second end coupled to the inductance of the primary side while the N _p1 connected to the first main terminal of the first switch S _1, the second end of the second clamp capacitor C _c2 is connected to a second auxiliary Off S _a2 of the first end, a second end of the second auxiliary switch S _a2 is connected to the second end of the second inductor coupled to the primary side of the N _p2 while the second to the first end of the main switch S _2; and section a first end of a coupled inductor secondary side N _s1 and a positive electrode of the first voltage doubled diode D _d1 , a negative electrode of the second voltage doubled diode D _d2 , a second end of the first output capacitor C _o1 , and a first end the second output capacitor C _o2 first end connected to the second terminal of the inductor coupled to a first secondary side connected to the N _s1 of the second end of the second secondary-side N _s2 coupled inductor, the secondary inductor of the second coupled The first end of the side voltage _s2 is respectively connected to the second end of the first voltage doubled capacitor C _{d1 and} the first end of the second voltage doubled capacitor C _{d2 , and} the first end of the first voltage doubled capacitor C _d1 Connected to the anode of the first voltage doubled diode D _{d1 and} the anode of the first output diode D _o1 , respectively, the second end of the second voltage doubled capacitor C _d2 and the second voltage doubled respectively the positive electrode and the negative electrode D _d2 of the body D _o2 of the second output diode is connected to the negative output D _o1 of the first diode and the cathode, respectively, a first terminal of the first output capacitor C _o1 and the phase of the load R _o Connection, the D _o2 bis positive output diode are connected to the load R _o and the negative electrode of the second output of the second end of the capacitor C _o2.

Please refer to the second diagram of the equivalent circuit diagram of the present invention. The first coupled inductor may include a first magnetizing inductance L _m1 and a first leakage inductance L _k1 , such that the first coupled inductor primary side N _p1 and The first coupled inductor secondary side N _s1 constitutes a first ideal transformer, and the second coupled inductor may include a second magnetizing inductance L _m2 and a second leakage inductance L _k2 , such that the second coupled inductor primary side N _p2 and The second coupled inductor secondary side N _s2 constitutes a second ideal transformer, the first ideal transformer and the second ideal transformer have the same turns ratio, and the turns ratio n is defined as N _s /N _p ; The first coupled inductor primary side N _p1 and the second coupled inductor primary side N _p2 are connected in parallel so that the total input current can be shared, and the interleaved operation can reduce the input current ripple; the first coupled inductor secondary side N _S1 is in series with the second coupled inductor secondary side _Ns2 such that the voltage gain can be increased.

The converter (1) operates in a continuous conduction mode (CCM) during use, the conduction ratio is greater than 0.5, and the first main switch S ₁ and the second main switch S ₂ are 180° out of phase with each other. In the interleaved operation, the first auxiliary switch S _a1 and the second auxiliary switch S _{a2 are} complementarily operated with the first main switch S ₁ and the second main switch S ₂ . In steady state, the converter (1) can be divided into 16 operating phases in one switching cycle according to the ON/OFF states of the switches and the diodes, and since the converter (1) The symmetry of the circuit, the following only the first eight stages of brief circuit action analysis, assuming: 1. Each of the switch and each of the two diodes have a zero voltage drop; 2. each of the capacitors can ignore the voltage chopping so that it can be regarded as constant capacitor voltage;. 3 of the first coupled inductor coupled to the second inductor turns ratio is equal to _{(N s1 / N p1 = N} s2 / N p2 = n), and the first magnetizing inductance L _M1 is equal to the inductance value of the second magnetizing inductance L _m2 (L _m1 = L _m2 ), and the first leakage inductance L _k1 is equal to the inductance value of the second leakage inductance L _k2 (L _k1 = L _k2 ), the first A magnetizing inductance L _m1 and the second magnetizing inductance L _{m2 are both} greater than the first leakage inductance L _k1 and the second leakage inductance L _k2 ; 4. the first magnetizing inductance L _{m1 of} the first coupling inductor and the first The current of the second magnetizing inductance L _m2 of the two coupled inductors is operated in a continuous conduction mode (CCM).

The linear equivalent circuit and the main component waveforms of each linear phase are as follows. Please refer to the third diagram for the steady-state waveform diagram of the main components of the present invention as shown in the following figure:

First stage [t ₀ ~ t ₁ ]: [first main switch S ₁ : ON, second main switch S ₂ : ON, first auxiliary switch S _a1 : OFF, second auxiliary switch S _a2 : OFF, first Double voltage diode D _d1 :OFF, second voltage doubled diode D _d2 :OFF, first output diode D _o1 :OFF, second output diode D _o2 :OFF]: Please refer to it again Fourth, the first circuit of the present invention shows an equivalent circuit diagram. The first phase starts at t=t ₀ , and the first main switch S ₁ and the second main switch S ₂ are both ON (on). Both the auxiliary switch S _a1 and the second auxiliary switch S _a2 are OFF [OFF]. The first voltage doubled diode D _d1 , the second voltage doubled diode D _{d2 ,} the first output diode D _o1 , and the second output diode D _o2 are both reverse biased and turned OFF. The input voltage V _in spans the first coupled inductor primary side N _p1 , the second coupled inductor primary side N _p2 , that is, across the first magnetizing inductance L _m1 and the first leakage inductance L _k1 and the second magnetization On the inductor L _m2 and the second leakage inductance L _k2 , the current rises linearly. On the output side, the first output capacitor C _o1 and the second discharge of the output capacitor C _o2 load R _o. When t=t ₁ and the first main switch S _{1 is} switched OFF, this phase ends.

Second stage [t ₁ ~ t ₂ ]: [first main switch S ₁ : OFF, second main switch S ₂ : OFF, first auxiliary switch S _a1 : OFF, second auxiliary switch S _a2 : OFF, first Double voltage diode D _d1 :OFF, second voltage doubled diode D _d2 :OFF, first output diode D _o1 :OFF, second output diode D _o2 :OFF]: Please refer to it again Fig. 5 is a diagram showing an equivalent circuit diagram of the second operational stage of the present invention. The second phase starts at t = t ₁ and the first main switch S _{1 is} switched OFF. L _k1 of the first current i _Lk1 leakage inductance of the main switch of the first parasitic capacitance C _S1 first main charging switch S _1, the voltage across the first main switch S ₁ v _ds1 the voltage begins to rise from zero, because The first main switch parasitic capacitance C _{S1 is} small, so the time in this phase is very short. When t=t ₂ , the voltage across the first main switch S ₁ v _ds1 rises to the input voltage V _in plus the voltage V _{Cc1 of} the first clamp capacitor C _c1 , the body of the first auxiliary switch S _a1 conducting diode, the voltage across the first main switch S ₁ v _ds1 of the clamp V _in + V _Cc1, this phase ends.

Third stage [t ₂ ~ t ₃ ]: [first main switch S ₁ : ON, second main switch S ₂ : OFF, first auxiliary switch S _a1 : OFF, second auxiliary switch S _a2 : OFF, first Double voltage diode D _d1 :OFF, second voltage doubled diode D _d2 :OFF, first output diode D _o1 :OFF, second output diode D _o2 :OFF]: Please refer to it again The sixth diagram shows the equivalent circuit diagram of the third operation stage of the present invention. The third stage starts at t=t ₂ , the body diode of the first auxiliary switch S _a1 is turned on, and the current i _{Lk1 of} the first leakage inductance L _k1 As a result, the current i _{Lk1 of} the first leakage inductance L _k1 charges the first clamping capacitor C _c1 via the body diode of the first auxiliary switch S _a1 . When t=t ₃ , the voltage V _{Cc1 of} the first clamp capacitor C _c1 rises such that the reverse bias voltage of the second voltage doubled diode D _d2 and the first output diode D _o1 decreases to 0, The second voltage doubled body D _d2 and the first output diode D _{o1 are} turned ON, and this stage ends.

The fourth stage [t ₃ ~ t ₄ ]: [first main switch S ₁ : OFF, second main switch S ₂ : ON, first auxiliary switch S _a1 : OFF, second auxiliary switch S _a2 : OFF, first Voltage doubled diode D _d1 :OFF, second voltage doubled diode D _d2 :ON, first output diode D _o1 :ON, second output diode D _o2 :OFF]: Please refer to it again 7 is a diagram showing an equivalent circuit diagram of the fourth operation stage of the present invention, the fourth stage starts at t=t ₃ , and the second voltage doubled body D _d2 and the first output diode D _{o1 are} turned ON. . The energy stored in the first magnetizing inductance L _m1 is transmitted to the secondary side of the first coupled inductor N _s1 , the current is shunted to two paths, one is flowing through the second voltage doubled diode D _d2 and the second time The capacitor C _d2 , the other path is via the first voltage doubled capacitor C _d1 , the first output diode D _o1 and the first output capacitor C _o1 . At this time, the current charges the second voltage doubled capacitor C _d2 , discharges the first voltage doubled capacitor C _{d1 ,} and charges the first output capacitor C _o1 . On the other hand, since the secondary side current is reflected to the ideal transformer primary side of the second coupled inductor, the current i _{Lk2 of} the second leakage inductance L _{k2 rises} rapidly. When t=t ₄ , the first auxiliary switch S _{a1 is} switched to ON, the phase ends.

The fifth stage [t ₄ ~ t ₅ ]: [first main switch S ₁ : OFF, second main switch S ₂ : ON, first auxiliary switch S _a1 : ON, second auxiliary switch S _a2 : OFF, first Voltage doubled diode D _d1 :OFF, second voltage doubled diode D _d2 :ON, first output diode D _o1 :ON, second output diode D _o2 :OFF]: Please refer to it again Figure 8 is a diagram showing an equivalent circuit diagram of the fifth operational phase of the present invention. The fifth phase starts at t = t ₄ and the first auxiliary switch S _{a1 is} switched ON. Since the body diode of the first auxiliary switch S _a1 is turned on at this time, the voltage across the first auxiliary switch S _a1 is zero, so the first auxiliary switch S _a1 achieves zero voltage switching [ZVS] performance. transferring the original current flowing through the first auxiliary switch S _a1 of the body diode of the first auxiliary switch S _a1 to charge the first clamp capacitance C _c1, the current leakage inductance L _k1 of the first i _Lk1 continued to decline, when after the current L _k1 of the first reduced leakage inductance i _Lk1 0, L _k1 of the first leakage inductance current i _Lk1 changing the current direction. When t = t _5, the first auxiliary switch S _a1 switch is OFF, the end of this phase.

The sixth stage [t ₅ ~ t ₆ ]: [first main switch S ₁ : OFF, second main switch S ₂ : ON, first auxiliary switch S _a1 : OFF, second auxiliary switch S _a2 : OFF, first Voltage doubled diode D _d1 :OFF, second voltage doubled diode D _d2 :ON, first output diode D _o1 :ON, second output diode D _o2 :OFF]: Please refer to it again Ninth Diagram The sixth circuit of the present invention shows an equivalent circuit diagram. The sixth phase starts at t=t ₅ and the first auxiliary switch S _{a1 is} switched OFF. At this time, the first leakage inductance L _k1 and the first main switch parasitic capacitance C _S1 start to resonate, and the energy stored in the first main switch parasitic capacitance C _S1 is transferred to the first leakage inductance L _k1 by resonance, The first main switch S ₁ begins to resonate across the voltage v _ds1 , and the energy stored in the first main switch parasitic capacitance C _S1 is transferred to the first leakage inductance L _k1 . When t=t ₆ , the second main switch S ₂ drops to zero across the voltage V _ds2 , and the body diode of the first main switch S ₁ starts to conduct, and the phase ends.

The seventh stage [t ₆ ~ t ₇ ]: [first main switch S ₁ : OFF, second main switch S ₂ : ON, first auxiliary switch S _a1 : OFF, second auxiliary switch S _a2 : OFF, first Voltage doubled diode D _d1 :OFF, second voltage doubled diode D _d2 :ON, first output diode D _o1 :ON, second output diode D _o2 :OFF]: Please refer to it again FIG seventh tenth stage of operation of the present invention shown in an equivalent circuit diagram of a seventh stage begins at t = t _6, the first main body switch S ₁ conducting diode, the first voltage across the main switch S ₁ v _ds1 is zero, the first main switch S ₁ is zero voltage switching conditions are satisfied] [ZVS. When t = t _7, the first main switch S ₁ is switched ON, the first main switch S ₁ is reached ZVS performance, the end of the stage.

The eighth stage [t ₇ ~ t ₈ ]: [first main switch S ₁ : ON, second main switch S ₂ : ON, first auxiliary switch S _a1 : OFF, second auxiliary switch S _a2 : OFF, first Voltage doubled diode D _d1 :OFF, second voltage doubled diode D _d2 :ON, first output diode D _o1 :ON, second output diode D _o2 :OFF]: Please refer to it again 11 is an eighth circuit diagram of the eighth operational phase of the present invention, the eighth phase starts at t=t ₇ , the first main switch S _{1 is} switched ON, and the second main switch S _{2 is} kept ON. L _k1 of a first current i _Lk1 increased leakage inductance, L _k1 when the leakage inductance of the first current is less than the current i _Lk1 i _Lm1 L _m1 of the first magnetizing inductance, i.e. i _Lk1 <i _Lm1 when the first magnetizing inductance The energy stored by L _m1 is transferred to the secondary side by the coupled inductor. Therefore, the second voltage doubled diode D _d2 and the first output diode D _o1 remain conductive, and the second voltage doubled diode D _d2 current i _Dd2 decreases, and the second voltage doubled capacitor C _d2 During charging, the first output diode D _o1 current i _Do1 falls, and the first output capacitor C _{o1 is} charged. When t=t ₈ , the leakage inductor current rises to i _Lk1 =i _Lm1 , at which time the second voltage doubled diode D _d2 current i _Dd2 and the first output diode D _o1 current i _Do1 fall to zero, The second voltage doubled body D _d2 and the first output diode D _o1 are turned OFF by a zero current switching [ZCS], and the first magnetizing inductance L _m1 and the first leakage inductance L _{k1 are} again subjected to an input voltage. Charging, the end of this phase, enters the next half of the switching cycle.

In the eight stages of the second half of the switching period of the converter (1), due to the symmetry of the circuit, the analysis of the operation of the last eight stages is similar (please refer to the twelfth to the nineteenth figure together). The analysis is omitted here.

The steady-state characteristic analysis of the converter (1) is performed as follows: In order to simplify the analysis, the transient characteristics of each switch and each of the diodes and the extremely short time are ignored. At the same time, ignore the transient phase with very short time, including the second, third, fourth, sixth, seventh, ten, eleventh, twelfth, fourteenth, fifteenth and sixteenth phases, only considering the first, fifth, eighth and ninth Thirteen stages. All capacitors are large enough to ignore capacitive voltage chopping so that the capacitor voltage can be considered constant.

Voltage gain: in the first, eighth, ninth, and thirteenth stages, the first magnetizing inductance L _{m1 is} across the voltage

In the fifth stage, the first voltage across the magnetizing inductance L _m1 is

According to the principle of volt-second balance, the average voltage of the inductor voltage is zero during a switching period, and the blind time with a small proportion of the period is ignored, so kV _in DT _s +k(-V can be obtained. _Cc1 )(1-D)T _s =0 (3)

Finishing (3) is available

In an interlaced mode of operation, the next half of the operation of the converter circuit similar to the above analysis, for the second magnetizing inductance L _m2, applied volt-second balance Theorem Similarly available

The second voltage doubled capacitor C _d2 voltage V _{Cd2 on the} secondary side of the coupled inductor can be obtained by decoupling the primary side voltage of the coupled inductor to the secondary side voltage. In the fifth stage, the first main switch S ₁ :OFF, the second main switch S ₂ :ON, the second voltage doubled diode D _d2 and the first output diode D _{o1 are} turned on, the second voltage double Capacitor C _d2 voltage V _Cd2 is

In the thirteenth stage, the first main switch S ₁ :ON, the second main switch S ₂ :OFF, and the first voltage doubled diode D _{d1 is} electrically connected to the second output diode D _o2 , the first Double voltage capacitor C _d1 voltage V _Cd1 is

The voltage V _Co1 of the first output capacitor C _o1 is

The second capacitor C _o2 of the output voltage is V _Co2

The total output voltage V _O at the load R _o is

Therefore, the voltage gain G of the converter (1) is

When n=1, the voltage gain G and the coupling coefficient k [k=1, 0.95, 0.9] of different coupled inductors have very little influence on each other (please refer to the voltage gain and conduction ratio of the present invention in the twenty-first embodiment). And the graph of the coupling coefficient is shown]. If the leakage inductance is ignored, the coupling coefficient k=1, the ideal voltage gain is obtained.

From the above formula, the voltage gain is known, and there are two design degrees of freedom of the coupled inductor turns ratio n and the turn-on ratio D. The converter (1) can achieve a high step-up ratio by appropriately designing the turns ratio of the coupled inductor without having to operate at a very large turn-on ratio. Corresponding to the voltage gain curve of the coupled inductor turns ratio n and the turn-on ratio D, that is, the voltage gain and the turn-on ratio and the coupled inductor turns ratio of the present invention as shown in the twenty-first embodiment. When the conduction ratio D=0.6, n=1, the voltage gain is 10 times; when D=0.6, n=3, the voltage gain is 30 times.

Voltage stress of the switching element: the voltage stress of the first main switch S ₁ and the second main switch S ₂ is

Since the power switching stress of the conventional interleaved boost converter is V _o and the switching voltage stress of the converter (1) is relatively small, only 1/4 n times the output voltage, the low rated withstand voltage can be used. Lower R _{ds (ON)} MOSFETs reduce switch conduction losses.

According to the above circuit action analysis results, the IsSpice simulation software and the implementation results are verified. Set the relevant parameters of the converter (1): input power supply 36V, output voltage 380V, maximum output power 1000W, switching frequency 50kHz, n=1.2; below test the characteristics of the converter (1) with analog waveform and implementation results [Please refer to the schematic diagram of the analog circuit of the present invention as shown in the twenty-second figure]:

A. Verification of steady-state characteristics: Please refer to the analog waveform diagram of the switch drive signal, input voltage and output voltage of the present invention as shown in the twenty-third figure to verify the steady-state characteristic of the converter (1), full load 500W At this time, it can be known that V _in = 36V, V _o = 380V, and the conduction ratio is approximately D = 0.63, which is in accordance with the formula of the voltage gain of the formula (12).

B. Verifying the switch voltage stress: Please refer to the twenty-fourth figure for the analog switch waveform diagram of the main switch across the present invention and the twenty-fifth figure. The fuzzy waveform diagram of the auxiliary switch across the voltage of the present invention is shown in the figure. When the output voltage V _o =380V of the converter (1), the voltage stress of the first main switch S ₁ and the second main switch S ₂ is 100V, and the first auxiliary switch S _a1 and the second auxiliary switch S _a2 The voltage stress is 98V. Verify that the converter (1) switch has the advantage of low voltage stress.

C. Verify that both the main switch and the auxiliary switch can achieve ZVS operation: Please refer to the twenty-sixth drawing of the main switch of the present invention for driving signals and voltage across the analog waveform diagram, and the twenty-seventh figure. The analog waveform enlarged view of the switch switching instant, the twenty-eighth figure shows the enlarged analog waveform of the second main switch switching instant of the present invention, and the first main switch S ₁ and the second are known when the full load is 1000 W the main switch S ₂ before switching to ON, the voltage across the first main switch S v _{ds1 1} and the second main switch S is the voltage across the v _{ds2 2} have been reduced to zero, thereby achieving ZVS operation; Please together Referring to the twenty-ninth aspect, the driving signal and the voltage-crossing analog waveform diagram of the auxiliary switch of the present invention, the thirty-first figure, the analog waveform of the first auxiliary switch of the present invention, the analog waveform, and the thirty-first figure, the second of the present invention. As shown in the enlarged analog waveform of the auxiliary switch switching moment, when the full load is 1000W, it can be known that the first auxiliary switch S _a1 and the second auxiliary switch S _{a2 are} switched ON, and the cross voltage of the first auxiliary switch S _a1 is _v dsa2 v dsa1 voltage across and the second auxiliary switch S _a2 been reduced to And thus achieve ZVS operation.

D. Verification of low input chopping current performance and CCM operation: Please refer to the thirty-second figure of the leakage inductance current and total input current of the present invention as shown in the analog waveform diagram, and the first leakage inductance L _k1 can be known. the current i _Lk1 and ripple current of the second current leakage inductance L _k2 i _Lk2 about 48A, while the input current i _in of the ripple current is only about 20.8A, thus interleaved operation with reduced input current ripple effect.

E. Verifying the output capacitor voltage: Please refer to the voltage waveform diagram of the voltage doubler capacitor and the output capacitor of the present invention as shown in the thirty-third figure. The voltage V _{Cd1 of} the first voltage doubled capacitor C _d1 and the The voltage V _{Cd2 of the} second voltage doubled capacitor C _d2 is approximately equal to 95V, and the voltage V _{Co1 of} the first output capacitor C _o1 and the voltage C _{Co2 of} the second output capacitor C _{o2 are} approximately equal to 190V, simulation and implementation results and analysis The results are consistent. Verify the correctness of the theoretical analysis. Please refer to the voltage waveform diagram of the clamp capacitor of the present invention as shown in the thirty-fourth embodiment. The voltage V _{Cc1 of} the first clamp capacitor C _c1 and the voltage V _{Cc2 of} the second clamp capacitor C _{c2 are} approximately Equal to 55V, in accordance with the derivation of formula (4).

From the above, the implementation description of the present invention shows that the present invention has the following advantages in comparison with the prior art means:

1. This case utilizes the active clamp circuit to achieve zero voltage switching performance for all switches, reducing switching losses and improving efficiency.

2. In this case, the voltage multiplying module composed of the coupled inductor is used to increase the voltage gain. The switching voltage stress is much lower than the output voltage. A power switch with a small on-resistance can be used to reduce the conduction loss and improve the efficiency.

3. This case uses interleaved operation to make the input current ripple cancel and reduce the input current ripple, which can reduce the number of capacitors at the power supply terminal and reduce the circuit cost.

However, the above-described embodiments or drawings are not intended to limit the structure or the use of the present invention, and any suitable variations or modifications of the invention will be apparent to those skilled in the art.

In summary, the embodiments of the present invention can achieve the expected use efficiency, and the specific structure disclosed therein has not been seen in similar products, nor has it been disclosed before the application, and has completely complied with the provisions of the Patent Law. And the request, the application for the invention of a patent in accordance with the law, please forgive the review, and grant the patent, it is really sensible.

Claims (7)

An isolated zero-voltage switching high-boost DC-DC converter mainly comprises a first end of a first clamp capacitor (C _c1 ) connected to a positive pole of an input voltage (V _in ), and a first coupling a first end of the inductor primary side (N _p1 ), a first end of the second clamp capacitor (C _c2 ), and a first end of the second coupled inductor primary side (N _p2 ) at the input voltage (V _in ) The second end of the first main switch (S ₁ ) and the second end of the second main switch (S ₂ ) are respectively connected to the negative pole, and the first auxiliary switch is connected to the second end of the first clamp capacitor (C _c1 ) a first end of (S _a1 ), a second end of the first auxiliary switch (S _a1 ) and a second end of the first coupled inductor primary side (N _p1 ) are simultaneously connected to the first main switch (S ₁ ) the first end of the second clamp capacitor (C _c2) connected to a second end of the second auxiliary switch (S _a2) of the first end, the second auxiliary switch (S _a2) a second end of the second a second end of the second coupled inductor primary side (N _p2 ) is simultaneously connected to the first end of the second main switch (S ₂ ); and the first end of the first coupled inductor secondary side (N _s1 ) is respectively connected to the first end the positive voltage doubler diode (D _d1), the second A negative voltage diode (D _d2), the first output capacitor (C _o1) and a second output terminal of the second capacitor (C _o2) of a first end connected to a first inductor coupled to the secondary side (N _s1 The second end of the second coupled inductor secondary side (N _s2 ) is connected to the second end of the second coupled inductor secondary side (N _s2 ) and the first voltage doubled capacitor (C The first end of _d1 ) and the first end of the second voltage doubled capacitor (C _d2 ) are connected, and the first end of the first voltage doubled capacitor (C _d1 ) and the first voltage doubled diode respectively The negative electrode of D _d1 ) is connected to the positive electrode of the first output diode (D _o1 ), and the second end of the second voltage doubled capacitor (C _d2 ) is respectively connected to the second voltage doubled diode (D _d2 ) The anode of the second output diode (D _o2 ) is connected to the cathode of the second output diode (D _o2 ), and the cathode of the first output diode (D _o1 ) and the first end of the first output capacitor (C _o1 ) and the load (R) _o) the positive electrode is connected to the positive output of the second diode (D _o2) respectively of the second output capacitor (C _o2) and a second end of the load (R & lt _o) is connected to the negative electrode. The isolated zero voltage switching high step-up DC-DC converter according to claim 1, wherein the first main switch (S ₁ ) is formed with a first main switch parasitic capacitance (C _S1 ). The scope of the patent application to item 1 isolated zero-voltage switching a high step-up DC-DC converter, wherein the second main switch (S ₂₎ formed on a second main switch parasitic capacitance (C _S2). The isolated zero voltage switching high-boost DC-DC converter according to claim 1, wherein the first coupled inductor includes a first magnetizing inductance (L _m1 ) and a first leakage inductance (L _k1 ). The isolated zero voltage switching high-boost DC-DC converter according to claim 1, wherein the second coupled inductor includes a second magnetizing inductance (L _m2 ) and a second leakage inductance (L _k2 ). The isolated zero voltage switching high-boost DC-DC converter according to claim 1, wherein the first coupled inductor primary side (N _p1 ) and the first coupled inductor secondary side (N _s1 ) constitute The first ideal transformer, the second coupled inductor primary side (N _p2 ) and the second coupled inductor secondary side (N _s2 ) form a second ideal transformer. The isolated zero-voltage switching high-boost DC-DC converter according to claim 6, wherein the first ideal transformer and the second ideal transformer have the same turns ratio.