TWI630445B - Active device substrate - Google Patents

Active device substrate Download PDF

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Publication number
TWI630445B
TWI630445B TW106128238A TW106128238A TWI630445B TW I630445 B TWI630445 B TW I630445B TW 106128238 A TW106128238 A TW 106128238A TW 106128238 A TW106128238 A TW 106128238A TW I630445 B TWI630445 B TW I630445B
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active device
device substrate
scan line
vertical projection
sides
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TW106128238A
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Chinese (zh)
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TW201913194A (en
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江逸凡
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友達光電股份有限公司
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Priority to TW106128238A priority Critical patent/TWI630445B/en
Priority to CN201710879375.3A priority patent/CN107579080B/en
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Publication of TW201913194A publication Critical patent/TW201913194A/en

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Abstract

一種主動元件基板包括多個畫素單元以及預設圖案。每一畫素單元包括沿著第一方向延伸的掃描線、與掃描線交錯的資料線、與掃描線及資料線電性連接的畫素電極以及與畫素電極重疊的共用電極。至少一畫素單元的掃描線具有預設開口。預設圖案與共用電極屬於同一膜層。預設圖案設置於至少一畫素單元的掃描線上。預設圖案具有相對的多個第一側邊及相對的多個第二側邊。第一側邊及第二側邊位於掃描線的面積內。第一側邊與第一方向垂直,而第二側邊且與第一方向平行。An active device substrate includes a plurality of pixel units and a preset pattern. Each of the pixel units includes a scan line extending along the first direction, a data line interleaved with the scan line, a pixel electrode electrically connected to the scan line and the data line, and a common electrode overlapping the pixel electrode. The scan line of at least one pixel unit has a predetermined opening. The preset pattern belongs to the same film layer as the common electrode. The preset pattern is set on a scan line of at least one pixel unit. The preset pattern has a plurality of opposing first sides and a plurality of opposing second sides. The first side and the second side are located within the area of the scan line. The first side is perpendicular to the first direction and the second side is parallel to the first direction.

Description

主動元件基板Active device substrate

本發明是有關於一種基板,且特別是有關於一種主動元件基板。The present invention relates to a substrate, and more particularly to an active device substrate.

隨著顯示科技的進步,顯示面板的解析度不斷提升。一般而言,現今顯示面板已具備足夠的高解析度,而消費者對顯示面板規格的關注不再限於此。詳言之,消費者更關注動態畫面的顯示流暢度。一般而言,為使動態畫面的顯示流暢,可提高顯示面板的畫面更新率(frame rate)。舉例而言,可將顯示面板的畫面更新率從一般的60Hz提升至144Hz。然而,在高頻(例如:144Hz)驅動下,若顯示面板的電阻電容負載(RC loading)過高,則易發生顯示不良的現象。有鑑於此,可變更顯示面板之掃描線的設計以降低電阻電容負載,但掃描線的設計變更時,掃描線所屬膜層的邊緣與透明電極所屬膜層的邊緣過近,量測系統易誤取錯誤的邊緣影像,進而造成判斷掃描線所屬膜層與透明電極所屬膜層之對位情況的困難。With the advancement of display technology, the resolution of display panels continues to increase. In general, today's display panels have sufficient high resolution, and consumer attention to display panel specifications is no longer limited. In particular, consumers pay more attention to the smoothness of the display of dynamic images. In general, in order to make the display of the dynamic picture smooth, the frame rate of the display panel can be increased. For example, the screen update rate of the display panel can be increased from a normal 60 Hz to 144 Hz. However, when driven by a high frequency (for example, 144 Hz), if the RC load of the display panel is too high, display failure is likely to occur. In view of this, the design of the scan line of the display panel can be changed to reduce the resistance and capacitance load. However, when the design of the scan line is changed, the edge of the film layer to which the scan line belongs is too close to the edge of the film layer to which the transparent electrode belongs, and the measurement system is easy to be mistaken. Taking the wrong edge image, it is difficult to judge the alignment of the film layer to which the scan line belongs and the film layer to which the transparent electrode belongs.

本發明提供一種主動元件基板,其掃描線所屬膜層與共用電極所屬膜層之對位情況易量測。The invention provides an active device substrate, which is easy to measure the alignment of the film layer to which the scanning line belongs and the film layer to which the common electrode belongs.

本發明的主動元件基板包括多個畫素單元以及預設圖案。每一畫素單元包括沿著第一方向延伸的掃描線、與掃描線交錯的資料線、與掃描線及資料線電性連接的畫素電極以及與畫素電極重疊的共用電極。至少一畫素單元的掃描線具有預設開口。預設圖案與共用電極屬於同一膜層。預設圖案設置於至少一畫素單元的掃描線上。預設圖案具有相對的多個第一側邊及相對的多個第二側邊。第一側邊及第二側邊位於掃描線的面積內。第一側邊與第一方向垂直,而第二側邊且與第一方向平行。The active device substrate of the present invention includes a plurality of pixel units and a preset pattern. Each of the pixel units includes a scan line extending along the first direction, a data line interleaved with the scan line, a pixel electrode electrically connected to the scan line and the data line, and a common electrode overlapping the pixel electrode. The scan line of at least one pixel unit has a predetermined opening. The preset pattern belongs to the same film layer as the common electrode. The preset pattern is set on a scan line of at least one pixel unit. The preset pattern has a plurality of opposing first sides and a plurality of opposing second sides. The first side and the second side are located within the area of the scan line. The first side is perpendicular to the first direction and the second side is parallel to the first direction.

在本發明的一實施例中,上述的預設圖案包括第一部及第二部。第一部具有多個第一側邊且與掃描線垂直。第二部具有多個第二側邊且與掃描線平行。In an embodiment of the invention, the preset pattern includes a first portion and a second portion. The first portion has a plurality of first sides and is perpendicular to the scan line. The second portion has a plurality of second sides and is parallel to the scan line.

在本發明的一實施例中,上述的第一部電性連接於相鄰之兩個畫素單元的兩個共用電極之間。In an embodiment of the invention, the first portion is electrically connected between two common electrodes of two adjacent pixel units.

在本發明的一實施例中,上述的第一部與第二部連接。In an embodiment of the invention, the first portion is coupled to the second portion.

在本發明的一實施例中,上述的第一部與第二部分離。In an embodiment of the invention, the first portion is separated from the second portion.

在本發明的一實施例中,上述的預設開口的垂直投影位於預設圖案的垂直投影面積之外。In an embodiment of the invention, the vertical projection of the predetermined opening is outside the vertical projected area of the preset pattern.

在本發明的一實施例中,上述的預設開口的垂直投影位於至少一畫素單元之薄膜電晶體的垂直投影與預設圖案的垂直投影之間。In an embodiment of the invention, the vertical projection of the predetermined opening is between a vertical projection of the thin film transistor of the at least one pixel unit and a vertical projection of the predetermined pattern.

在本發明的一實施例中,上述的預設開口的垂直投影與預設圖案的垂直投影重疊。In an embodiment of the invention, the vertical projection of the predetermined opening overlaps with the vertical projection of the preset pattern.

在本發明的一實施例中,上述的預設開口的垂直投影位於預設圖案的垂直投影面積之內。In an embodiment of the invention, the vertical projection of the preset opening is located within a vertical projection area of the preset pattern.

在本發明的一實施例中,上述的預設開口為封閉開口。In an embodiment of the invention, the predetermined opening is a closed opening.

在本發明的一實施例中,上述的封閉開口具有相對的多個第三側邊及相對的多個第四側邊,第三側邊與第一方向垂直,而第四側邊與第一方向平行。In an embodiment of the invention, the closed opening has a plurality of opposing third sides and an opposite plurality of fourth sides, the third side is perpendicular to the first direction, and the fourth side is first The directions are parallel.

在本發明的一實施例中,上述的預設開口為開放開口。In an embodiment of the invention, the predetermined opening is an open opening.

在本發明的一實施例中,上述的開放開口具有相對的多個第五側邊及連接於第五側邊之間的第六側邊,第五側邊與第一方向垂直,第六側邊與第一方向平行。In an embodiment of the invention, the open opening has a plurality of opposite fifth sides and a sixth side edge connected between the fifth sides, the fifth side is perpendicular to the first direction, and the sixth side The sides are parallel to the first direction.

在本發明的一實施例中,上述的預設開口之垂直投影與預設圖案之垂直投影的最短距離為L,而3μm≦L≦30μm。In an embodiment of the invention, the shortest distance between the vertical projection of the predetermined opening and the vertical projection of the preset pattern is L, and 3 μm ≦L ≦ 30 μm.

在本發明的一實施例中,上述的掃描線之不具預設開口的其餘部分的線寬一致。In an embodiment of the invention, the line widths of the remaining portions of the scan lines that do not have the predetermined openings are uniform.

在本發明的一實施例中,上述的薄膜電晶體包括閘極、半導體層以及與半導體層電性連接的源極與汲極,而半導體層、源極與汲極位於掃描線的上方。In an embodiment of the invention, the thin film transistor includes a gate, a semiconductor layer, and a source and a drain electrically connected to the semiconductor layer, and the semiconductor layer, the source and the drain are located above the scan line.

在本發明的一實施例中,上述的閘極為掃描線的一部分。In an embodiment of the invention, the gate is a portion of the scan line.

基於上述,利用與共用電極屬於同一膜層之預設圖案以及掃描線的預設開口能判斷共用電極所屬膜層與掃描線所屬膜層的對位狀況。由於預設圖案的第一側邊及第二側邊皆位於掃描線的面積內,因此量測系統的取像單元易取得第一側邊及第二側邊,而不易誤取其它圖案的邊緣。藉此,主動元件基板不但具備適當的電容電阻負載,且其掃描線所屬膜層與共用電極所屬膜層的對位情況易被檢測。Based on the above, the alignment pattern of the film layer to which the common electrode belongs and the film layer to which the scan line belongs can be judged by using the predetermined pattern belonging to the same film layer as the common electrode and the predetermined opening of the scanning line. Since the first side edge and the second side edge of the preset pattern are all located within the area of the scan line, the image capturing unit of the measurement system can easily obtain the first side edge and the second side edge, and the edges of other patterns are not easily misjudged. . Thereby, the active device substrate not only has an appropriate capacitive resistance load, but the alignment of the film layer to which the scanning line belongs and the film layer to which the common electrode belongs is easily detected.

為讓本發明的上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。The above described features and advantages of the invention will be apparent from the following description.

圖1為本發明一實施例之主動元件基板的上視示意圖。圖2為圖1之主動元件基板100之局部R的放大示意圖。請參照圖1及圖2,主動元件基板100包括多個畫素單元110以及預設圖案120。多個畫素單元110以及預設圖案120配置於基底(未繪示)上。基底主要是用以承載主動元件基板100的構件。在本實施例中,基底的材質可為玻璃、石英、有機聚合物、或是不透光/反射材料(例如:晶圓、陶瓷、或其它可適用的材料)、或是其它可適用的材料。1 is a top plan view of an active device substrate in accordance with an embodiment of the present invention. FIG. 2 is an enlarged schematic view showing a portion R of the active device substrate 100 of FIG. 1. Referring to FIGS. 1 and 2 , the active device substrate 100 includes a plurality of pixel units 110 and a preset pattern 120 . The plurality of pixel units 110 and the preset pattern 120 are disposed on a substrate (not shown). The substrate is mainly a member for carrying the active device substrate 100. In this embodiment, the material of the substrate may be glass, quartz, organic polymer, or an opaque/reflective material (for example, wafer, ceramic, or other applicable materials), or other applicable materials. .

每一畫素單元110包括掃描線SL、資料線DL、薄膜電晶體T、畫素電極112及共用電極114。掃描線SL及資料線DL設置於所述基底上。掃描線SL與資料線DL彼此交錯設置。掃描線SL沿著第一方向x延伸,資料線DL沿著第二方向y延伸,第一方向x與第二方向y不平行。舉例而言,在本實施例中,第一方向x與第二方向y可以垂直,但本發明不以此為限。另外,掃描線SL與資料線DL屬於不同的膜層。基於導電性的考量,掃描線SL與資料線DL一般是使用金屬材料,但本發明不限於此,在其他實施例中,掃描線SL與資料線DL也可以使用其他導電材料,例如:合金、金屬材料的氮化物、金屬材料的氧化物、金屬材料的氮氧化物、或是金屬材料與其它導電材料的堆疊層。Each of the pixel units 110 includes a scan line SL, a data line DL, a thin film transistor T, a pixel electrode 112, and a common electrode 114. The scan line SL and the data line DL are disposed on the substrate. The scan line SL and the data line DL are alternately arranged with each other. The scan line SL extends along the first direction x, and the data line DL extends along the second direction y, the first direction x being non-parallel to the second direction y. For example, in the embodiment, the first direction x and the second direction y may be perpendicular, but the invention is not limited thereto. In addition, the scan line SL and the data line DL belong to different film layers. Based on the conductivity considerations, the scan line SL and the data line DL are generally made of a metal material, but the present invention is not limited thereto. In other embodiments, the scan line SL and the data line DL may also use other conductive materials, such as an alloy, A nitride of a metal material, an oxide of a metal material, an oxynitride of a metal material, or a stacked layer of a metal material and other conductive materials.

掃描線SL具有預設開口116。在本實施例中,於垂直投影方向z上,預設開口116位於主動元件T的面積之外而不與主動元件T重疊。在本實施例中,預設開口116具有與第一方向x垂直的相對兩側邊116a(標示於圖2)以及連接於相對兩側邊116a之間的一側邊116b(標示於圖2),其中側邊116b與第一方向x平行。預設開口116之側邊116a的一端連接至側邊116b,而預設開口116之側邊116a的另一端可直接連接於掃描線SL的邊緣116c。換言之,在本實施例中,預設開口116可以是掃描線SL的缺口,但本發明不以此為限。在本實施例中,預設開口116可以是矩形缺口。然而,本發明不限於此,在其它實施例中,預設開口116也可以是其它適當形狀的缺口。The scan line SL has a preset opening 116. In the present embodiment, in the vertical projection direction z, the predetermined opening 116 is located outside the area of the active element T without overlapping with the active element T. In the present embodiment, the predetermined opening 116 has opposite side edges 116a (shown in FIG. 2) perpendicular to the first direction x and one side 116b (shown in FIG. 2) connected between the opposite side edges 116a. Where side edge 116b is parallel to first direction x. One end of the side 116a of the predetermined opening 116 is connected to the side 116b, and the other end of the side 116a of the predetermined opening 116 is directly connectable to the edge 116c of the scanning line SL. In other words, in the embodiment, the preset opening 116 may be a gap of the scan line SL, but the invention is not limited thereto. In this embodiment, the predetermined opening 116 may be a rectangular notch. However, the invention is not limited thereto, and in other embodiments, the predetermined opening 116 may also be a gap of other suitable shape.

在本實施例中,於垂直投影方向z上,預設開口116的垂直投影可位於預設圖案120的垂直投影面積之外,其中垂直投影方向z與第一方向x及第二方向y垂直。舉例而言,在本實施例中,預設開口116的垂直投影可位於薄膜電晶體T的垂直投影與預設圖案120的垂直投影之間,但本發明不以此為限。此外,在本實施例中,為降低主動元件基板100的電阻電容負載(RC loading)以適於在高畫面更新率(frame rate)下驅動,掃描線SL之不具預設開口116的其餘部分可具有一致的線寬W。In the present embodiment, in the vertical projection direction z, the vertical projection of the preset opening 116 may be outside the vertical projection area of the preset pattern 120, wherein the vertical projection direction z is perpendicular to the first direction x and the second direction y. For example, in this embodiment, the vertical projection of the preset opening 116 may be between the vertical projection of the thin film transistor T and the vertical projection of the preset pattern 120, but the invention is not limited thereto. In addition, in the embodiment, in order to reduce the RC loading of the active device substrate 100 to be suitable for driving at a high frame rate, the remaining portion of the scan line SL having no preset opening 116 may be Has a consistent line width W.

薄膜電晶體T與掃描線SL及資料線DL電性連接。詳言之,薄膜電晶體T包括閘極G(標示於圖2)、半導體層CH(標示於圖2)以及分別與半導體層CH之不同兩區電性連接的源極S與汲極D。掃描線SL與薄膜電晶體T的閘極G電性連接。舉例而言,在本實施例中,閘極G可以是掃描線SL的一部分。更進一步地說,閘極G可以是掃描線SL之具有一致的線寬W之所述其餘部分的一部分。資料線DL與薄膜電晶體T的源極S電性連接。舉例而言,在本實施例中,資料線DL具有與第二方向y平行的主幹部,而源極S可以是由資料線DL之主幹部向外延伸且與半導體層CH重疊的一分支圖案。The thin film transistor T is electrically connected to the scan line SL and the data line DL. In detail, the thin film transistor T includes a gate G (shown in FIG. 2), a semiconductor layer CH (shown in FIG. 2), and a source S and a drain D electrically connected to different regions of the semiconductor layer CH, respectively. The scan line SL is electrically connected to the gate G of the thin film transistor T. For example, in the present embodiment, the gate G may be a part of the scan line SL. Further, the gate G may be a part of the remaining portion of the scan line SL having a uniform line width W. The data line DL is electrically connected to the source S of the thin film transistor T. For example, in the embodiment, the data line DL has a trunk portion parallel to the second direction y, and the source S may be a branch pattern extending outward from the main portion of the data line DL and overlapping the semiconductor layer CH. .

舉例而言,在本實施例中,閘極G可以位在半導體層CH的下方,而薄膜電晶體T可以是底部閘極型(bottom gate)的薄膜電晶體。半導體層CH、源極S與汲極D可以位於掃描線SL上方。另外,在本實施例中,閘極G與掃描線SL可以同屬於一第一導電層,資料線DL、源極S與汲極D可同屬於一第二導電層,但本發明不以此為限。For example, in the present embodiment, the gate G may be positioned below the semiconductor layer CH, and the thin film transistor T may be a bottom gate thin film transistor. The semiconductor layer CH, the source S and the drain D may be located above the scan line SL. In addition, in this embodiment, the gate G and the scan line SL may belong to a first conductive layer, and the data line DL, the source S and the drain D may belong to a second conductive layer, but the present invention does not Limited.

畫素電極112與薄膜電晶體T電性連接。詳言之,畫素電極112是與薄膜電晶體T的汲極D電性連接。舉例而言,在本實施例中,畫素單元110還包括由汲極D延伸至掃描線SL的面積以外的導電元件118,畫素電極112的下緣可直接覆蓋導電元件118而與導電元件118電性連接;藉此,畫素電極112可透過導電元件118與汲極D電性連接,但本發明不以此為限,在其它實施例中,畫素電極112也可利用其它方式與薄膜電晶體T電性連接。在本實施例中,畫素電極112可以是透明導電層,其包括金屬氧化物,例如:銦錫氧化物、銦鋅氧化物、鋁錫氧化物、鋁鋅氧化物、銦鍺鋅氧化物、或其它合適的氧化物、或者是上述至少二者之堆疊層,但本發明不以此為限。The pixel electrode 112 is electrically connected to the thin film transistor T. In detail, the pixel electrode 112 is electrically connected to the drain D of the thin film transistor T. For example, in the embodiment, the pixel unit 110 further includes a conductive element 118 extending from the drain D to the area of the scan line SL, and the lower edge of the pixel electrode 112 directly covers the conductive element 118 and the conductive element. 118, the pixel electrode 112 can be electrically connected to the drain D through the conductive element 118, but the invention is not limited thereto. In other embodiments, the pixel electrode 112 can also be used in other manners. The thin film transistor T is electrically connected. In this embodiment, the pixel electrode 112 may be a transparent conductive layer including a metal oxide such as indium tin oxide, indium zinc oxide, aluminum tin oxide, aluminum zinc oxide, indium antimony zinc oxide, Or other suitable oxide, or a stacked layer of at least two of the above, but the invention is not limited thereto.

共用電極114與畫素電極112重疊。在本實施例中,主動元件基板100可包括共用電極線CL。多個畫素單元110的多個共用電極114可透過共用電極線CL以接地;但本發明不限於此,在其它實施例中,共用電極114也可電性連接至固定電位或可調(adjustable)電位。在本實施例中,共用電極114與畫素電極112設置於同一基底上,共用電極114與畫素電極112的其中一者(例如:共用電極114)具有多個開口114a,開口114a的邊緣與共用電極114與畫素電極112的另一者(例如:畫素電極112)用以驅動顯示介質(例如:液晶)。換言之,在本實施例中,包括主動元件基板100的顯示面板(未繪示)例如是邊緣場切換(Fringe-Field Switching,FFS)模式的顯示面板。然而,本發明不限於此,在其它實施例中,包括主動元件基板100的顯示面板也可以是共面切換(In-Plane Switching,IPS)等模式或其他適當模式的顯示面板。在本實施例中,共用電極114可以是透明導電層,其包括金屬氧化物,例如:銦錫氧化物、銦鋅氧化物、鋁錫氧化物、鋁鋅氧化物、銦鍺鋅氧化物、或其它合適的氧化物、或者是上述至少二者之堆疊層,但本發明不以此為限。The common electrode 114 overlaps the pixel electrode 112. In the present embodiment, the active device substrate 100 may include a common electrode line CL. The plurality of common electrodes 114 of the plurality of pixel units 110 can be grounded through the common electrode line CL. However, the present invention is not limited thereto. In other embodiments, the common electrode 114 can also be electrically connected to a fixed potential or adjustable (adjustable). ) potential. In this embodiment, the common electrode 114 and the pixel electrode 112 are disposed on the same substrate, and one of the common electrode 114 and the pixel electrode 112 (for example, the common electrode 114) has a plurality of openings 114a, and the edge of the opening 114a is The other of the common electrode 114 and the pixel electrode 112 (for example, the pixel electrode 112) is used to drive a display medium (for example, liquid crystal). In other words, in the present embodiment, the display panel (not shown) including the active device substrate 100 is, for example, a display panel of a Fringe-Field Switching (FFS) mode. However, the present invention is not limited thereto. In other embodiments, the display panel including the active device substrate 100 may also be a display panel of an In-Plane Switching (IPS) mode or other suitable mode. In this embodiment, the common electrode 114 may be a transparent conductive layer including a metal oxide such as indium tin oxide, indium zinc oxide, aluminum tin oxide, aluminum zinc oxide, indium antimony zinc oxide, or Other suitable oxides or stacked layers of at least two of the above, but the invention is not limited thereto.

預設圖案120與共用電極114屬於同一膜層。預設圖案120設置於畫素單元110的掃描線SL上。舉例而言,在本實施例中,預設圖案120包括第一部122及第二部124,第一部122具有相對的多個側邊122a(標示於圖2)且與掃描線SL垂直,第二部124具有相對的多個側邊124a且與掃描線SL平行。在垂直投影方向z上,第一部122的側邊122a及第二部124的側邊124a可皆位於掃描線SL的面積內。簡言之,在本實施例中,第一部122可以是跨越掃描線SL的長方形圖案,第二部124可以是與第一部122連接且由第一部122向薄膜電晶體T延伸的矩形圖案。然而,本發明不限於此,在其它實施例中,第一部122及第二部124也可以是其它形狀的圖案;此外,第一部122與第二部124也不一定要相連接,第一部122與第二部124也可以彼此分離,以下將於後續段落配合其它圖示舉例說明之。The preset pattern 120 and the common electrode 114 belong to the same film layer. The preset pattern 120 is disposed on the scan line SL of the pixel unit 110. For example, in the embodiment, the preset pattern 120 includes a first portion 122 and a second portion 124. The first portion 122 has a plurality of opposite sides 122a (shown in FIG. 2) and is perpendicular to the scan line SL. The second portion 124 has a plurality of opposing sides 124a and is parallel to the scan line SL. In the vertical projection direction z, the side 122a of the first portion 122 and the side 124a of the second portion 124 may both be located within the area of the scan line SL. In short, in the present embodiment, the first portion 122 may be a rectangular pattern spanning the scan line SL, and the second portion 124 may be a rectangle connected to the first portion 122 and extending from the first portion 122 toward the thin film transistor T. pattern. However, the present invention is not limited thereto. In other embodiments, the first portion 122 and the second portion 124 may also be patterns of other shapes; in addition, the first portion 122 and the second portion 124 are not necessarily connected, One portion 122 and the second portion 124 can also be separated from each other, as will be exemplified in the following paragraphs in conjunction with other figures.

請參照圖1,畫素單元110-1與畫素單元110-2相鄰。在本實施例中,預設圖案120可由畫素單元110-1的共用電極114向外延伸且跨越畫素單元110-1的掃描線SL,以電性連接於畫素單元110-1的共用電極114-1與畫素單元110-2的共用電極114-2之間。換言之,在本實施例中,可利用電性連接於相鄰兩畫素單元110-1、110-2之共用電極114之間的橋接部做為預設圖案120。然而,本發明不限於此,在其他實施例中,預設圖案120也可與共用電極114屬於同一膜層,但不與共用電極114電性連接。Referring to FIG. 1, the pixel unit 110-1 is adjacent to the pixel unit 110-2. In this embodiment, the preset pattern 120 may extend outward from the common electrode 114 of the pixel unit 110-1 and across the scan line SL of the pixel unit 110-1 to be electrically connected to the common unit of the pixel unit 110-1. The electrode 114-1 is between the electrode 114-1 and the common electrode 114-2 of the pixel unit 110-2. In other words, in this embodiment, a bridge portion electrically connected between the common electrodes 114 of the adjacent two pixel units 110-1, 110-2 can be used as the preset pattern 120. However, the present invention is not limited thereto. In other embodiments, the preset pattern 120 may also belong to the same film layer as the common electrode 114, but is not electrically connected to the common electrode 114.

利用預設圖案120及掃描線SL的預設開口116可判斷共用電極114所屬膜層與掃描線SL所屬膜層的對位狀況。值得一提的是,由於預設圖案120及預設開口116皆設置於顯示區,因此,相較於設置於周邊區且用以量測對位情況的預設圖案(未繪示),利用預設圖案120及預設開口116更能準確地量測與判斷共用電極114所屬膜層與掃描線SL所屬膜層在顯示區內的對位情況。舉例而言,在本實施例中,量測系統的取像單元(例如:相機)可擷取預設圖案120之相對兩側邊122a的影像,量測系統的處理單元(例如:電腦)可根據相對兩側邊122a的影像可計算出兩側邊122a在第一方向x上的第一中央座標;類似地,處理單元可根據預設圖案120之相對兩側邊124a的影像計算出兩側邊124a在第二方向y上的第二中央座標;處理單元可根據預設開口116之相對兩側邊116a的影像計算出兩側邊116a在第一方向x上的第三中央座標;處理單元可根據預設開口116之側邊116b及掃描線SL之邊緣116c的影像計算出側邊116a及邊緣116c在第二方向y上的第四中央座標。藉由比較第一中央座標與第三中央座標以及比較第二中央座標與第四中央座標,可判斷共用電極114所屬膜層與掃描線SL所屬膜層在顯示區內的對位狀況。The alignment pattern 120 and the predetermined opening 116 of the scan line SL can be used to determine the alignment of the film layer to which the common electrode 114 belongs and the film layer to which the scan line SL belongs. It is worth mentioning that, since the preset pattern 120 and the preset opening 116 are both disposed in the display area, the preset pattern (not shown) for measuring the alignment condition is used in comparison with the preset area (not shown). The preset pattern 120 and the preset opening 116 can more accurately measure and determine the alignment of the film layer to which the common electrode 114 belongs and the film layer to which the scan line SL belongs in the display region. For example, in the embodiment, the image capturing unit (for example, a camera) of the measurement system can capture images of the opposite sides 122a of the preset pattern 120, and the processing unit (eg, a computer) of the measurement system can be The first central coordinate of the two sides 122a in the first direction x can be calculated according to the image of the opposite side edges 122a; similarly, the processing unit can calculate the two sides according to the images of the opposite side edges 124a of the preset pattern 120. a second central coordinate of the side 124a in the second direction y; the processing unit may calculate a third central coordinate of the two sides 116a in the first direction x according to the image of the opposite sides 116a of the preset opening 116; The fourth central coordinate of the side 116a and the edge 116c in the second direction y can be calculated from the image of the side 116b of the predetermined opening 116 and the edge 116c of the scanning line SL. By comparing the first central coordinate with the third central coordinate and comparing the second central coordinate with the fourth central coordinate, the alignment of the film layer to which the common electrode 114 belongs and the film layer to which the scanning line SL belongs can be determined in the display region.

值得一提的是,由於用以在第一方向x上量測對位之預設圖案120的兩側邊122a及用以在第二方向y上量測對位之預設圖案120的兩側邊124a皆位於掃描線SL的面積內,因此量測系統的取像單元易取得側邊122a及側邊124a的影像,而不易誤取其它圖案的邊緣、造成誤判的情況。此外,由於預設圖案120位於掃描線SL上方,預設開口116為掃描線SL的開口,因此預設圖案120及預設開口116的設置不會限制畫素單元110的佈局(layout)、也不會對主動元件基板100的開口率造成不良影響。在本實施例之垂直投影方向z的垂直投影中,預設開口116之邊緣116a與預設圖案120之邊緣122a的最短距離為L(標示於圖2),3μm≦L≦30μm;較佳地是,5μm≦L≦10μm,但本發明不以此為限。It is worth mentioning that both sides 122a of the preset pattern 120 for measuring the alignment in the first direction x and two sides of the preset pattern 120 for measuring the alignment in the second direction y are The sides 124a are all located in the area of the scanning line SL. Therefore, the image capturing unit of the measuring system can easily obtain the images of the side edges 122a and the side edges 124a, and it is not easy to misjudge the edges of other patterns and cause misjudgment. In addition, since the preset pattern 120 is located above the scan line SL, the preset opening 116 is an opening of the scan line SL, so the arrangement of the preset pattern 120 and the preset opening 116 does not limit the layout of the pixel unit 110, There is no adverse effect on the aperture ratio of the active device substrate 100. In the vertical projection of the vertical projection direction z of the present embodiment, the shortest distance between the edge 116a of the predetermined opening 116 and the edge 122a of the preset pattern 120 is L (indicated in FIG. 2), 3 μm ≦L ≦ 30 μm; preferably Yes, 5 μm ≦ L ≦ 10 μm, but the invention is not limited thereto.

圖3為本發明另一實施例之主動元件基板100-1之局部R1的放大示意圖。本實施例之主動元件基板100-1與前述之主動元件基板100類似,因此相同或相似的元件以相同或相似的標號標示。在此僅說明主動元件基板100-1與主動元件基板100的差異,未說明的部分請對應地參照前述的說明。請參照圖3,在本實施例中,主動元件基板100-1之掃描線SL的預設開口116-1可以是封閉(closed)開口。預設開口116-1具有與第一方向x垂直的相對兩側邊116a以及與第一方向x平行的相對兩側邊116b。舉例而言,在本實施例中,預設開口116-1可呈正方形。然而,本發明不限於此,在其它實施例中,預設開口116-1也可呈其它形狀:例如:長方形、六邊形、八邊形或其它適當形狀)。此外,在本實施例中,預設開口116-1與預設圖案120的第二部124在第一方向x上可選擇性地對齊,但本發明不以此為限。FIG. 3 is an enlarged schematic view showing a portion R1 of the active device substrate 100-1 according to another embodiment of the present invention. The active device substrate 100-1 of the present embodiment is similar to the active device substrate 100 described above, and thus the same or similar elements are designated by the same or similar reference numerals. Only the difference between the active device substrate 100-1 and the active device substrate 100 will be described here, and the undescribed portions should be referred to the above description. Referring to FIG. 3, in the embodiment, the predetermined opening 116-1 of the scan line SL of the active device substrate 100-1 may be a closed opening. The predetermined opening 116-1 has opposite side edges 116a perpendicular to the first direction x and opposite side edges 116b parallel to the first direction x. For example, in the embodiment, the preset opening 116-1 may be a square. However, the present invention is not limited thereto, and in other embodiments, the predetermined opening 116-1 may have other shapes: for example, a rectangle, a hexagon, an octagon, or other suitable shape. In addition, in the embodiment, the preset opening 116-1 and the second portion 124 of the preset pattern 120 are selectively aligned in the first direction x, but the invention is not limited thereto.

類似地,量測系統的取像單元可擷取預設圖案120之相對兩側邊122a的影像,量測系統的處理單元可根據相對兩側邊122a的影像可計算出兩側邊122a在第一方向x上的第一中央座標;處理單元可根據預設圖案120之相對兩側邊124a的影像計算出兩側邊124a在第二方向y上的第二中央座標;處理單元可根據預設開口116-1之相對兩側邊116a的影像計算出兩側邊116a在第一方向x上的第三中央座標;處理單元可根據預設開口116-1之相對兩側邊116b的影像計算出兩側邊116b在第二方向y上的第四中央座標。藉由比較第一中央座標與第三中央座標以及比較第二中央座標與第四中央座標,可判斷共用電極114所屬膜層與掃描線SL所屬膜層在顯示區內的對位狀況。主動元件基板100-1具有與前述主動元件基板100類似的功效及優點,於此便不再重述。Similarly, the image capturing unit of the measuring system can capture the images of the opposite sides 122a of the preset pattern 120. The processing unit of the measuring system can calculate the two sides 122a according to the images of the opposite sides 122a. a first central coordinate in a direction x; the processing unit may calculate a second central coordinate of the two sides 124a in the second direction y according to the image of the opposite side edges 124a of the preset pattern 120; the processing unit may be preset according to the preset The image of the opposite side edges 116a of the opening 116-1 calculates the third central coordinate of the two sides 116a in the first direction x; the processing unit can calculate according to the image of the opposite side edges 116b of the preset opening 116-1 The fourth central coordinate of the side edges 116b in the second direction y. By comparing the first central coordinate with the third central coordinate and comparing the second central coordinate with the fourth central coordinate, the alignment of the film layer to which the common electrode 114 belongs and the film layer to which the scanning line SL belongs can be determined in the display region. The active device substrate 100-1 has similar functions and advantages as the aforementioned active device substrate 100, and will not be repeated here.

圖4為本發明又一實施例之主動元件基板100-2之局部R2的放大示意圖。本實施例之主動元件基板100-2與前述之主動元件基板100-1類似,因此相同或相似的元件以相同或相似的標號標示。在此僅說明主動元件基板100-2與主動元件基板100-1的差異,未說明的部分請對應地參照前述說明。請參照圖4,在本實施例中,於垂直投影方向z上,預設開口116-2的垂直投影與預設圖案120的垂直投影可重疊。更進一步地說,預設開口116-2的垂直投影可位於預設圖案120之第一部122的垂直投影面積之內。主動元件基板100-2具有與前述主動元件基板100類似的功效及優點,於此便不再重述。FIG. 4 is an enlarged schematic view showing a portion R2 of the active device substrate 100-2 according to still another embodiment of the present invention. The active device substrate 100-2 of the present embodiment is similar to the aforementioned active device substrate 100-1, and therefore the same or similar elements are designated by the same or similar reference numerals. Only the difference between the active device substrate 100-2 and the active device substrate 100-1 will be described here, and the undescribed portions should be referred to the above description. Referring to FIG. 4, in the embodiment, in the vertical projection direction z, the vertical projection of the preset opening 116-2 and the vertical projection of the preset pattern 120 may overlap. More specifically, the vertical projection of the predetermined opening 116-2 may be within the vertical projected area of the first portion 122 of the preset pattern 120. The active device substrate 100-2 has similar functions and advantages as the aforementioned active device substrate 100, and will not be repeated here.

圖5為本發明再一實施例之主動元件基板100-3之局部R3的放大示意圖。本實施例之主動元件基板100-3與前述之主動元件基板100-1類似,因此相同或相似的元件以相同或相似的標號標示。在此僅說明主動元件基板100-3與主動元件基板100-1的差異,未說明的部分請對應地參照前述說明。請參照圖5,在本實施例中,預設開口116-3可選擇性地呈長方形。主動元件基板100-3具有與前述主動元件基板100類似的功效及優點,於此不便再重述。FIG. 5 is an enlarged schematic view showing a portion R3 of the active device substrate 100-3 according to still another embodiment of the present invention. The active device substrate 100-3 of the present embodiment is similar to the aforementioned active device substrate 100-1, and therefore the same or similar elements are designated by the same or similar reference numerals. Only the difference between the active device substrate 100-3 and the active device substrate 100-1 will be described here, and the undescribed portions should be referred to the above description. Referring to FIG. 5, in the embodiment, the predetermined opening 116-3 may be selectively rectangular. The active device substrate 100-3 has similar functions and advantages as the active device substrate 100 described above, and will not be repeated here.

圖6為本發明一實施例之主動元件基板100-4之局部R4的放大示意圖。本實施例之主動元件基板100-4與前述之主動元件基板100-3類似,因此相同或相似的元件以相同或相似的標號標示。在此僅說明主動元件基板100-4與主動元件基板100-3的差異,未說明的部分請對應地參照前述說明。請參照圖6,在本實施例中,於第一方向x上,預設開口116-4可不與預設圖案120的第二部124對齊。預設開口116-4的垂直投影可位於第一部122的垂直投影與薄膜電晶體T的垂直投影之間。主動元件基板100-4具有與前述主動元件基板100類似的功效及優點,於此不便再重述。FIG. 6 is an enlarged schematic view showing a portion R4 of the active device substrate 100-4 according to an embodiment of the present invention. The active device substrate 100-4 of the present embodiment is similar to the aforementioned active device substrate 100-3, and therefore the same or similar elements are designated by the same or similar reference numerals. Only the difference between the active device substrate 100-4 and the active device substrate 100-3 will be described here, and the undescribed portions should be referred to the above description. Referring to FIG. 6 , in the first embodiment, the preset opening 116 - 4 may not be aligned with the second portion 124 of the preset pattern 120 . The vertical projection of the predetermined opening 116-4 can be between the vertical projection of the first portion 122 and the vertical projection of the thin film transistor T. The active device substrate 100-4 has similar functions and advantages as the active device substrate 100 described above, and will not be repeated here.

圖7為本發明另一實施例之主動元件基板100-5之局部R5的放大示意圖。本實施例之主動元件基板100-5與前述之主動元件基板100-2類似,因此相同或相似的元件以相同或相似的標號標示。於此僅說明主動元件基板100-5與主動元件基板100-2的差異,未說明的部分請對應參照前述說明。請參照圖7,在本實施例中,於垂直投影方向z上,預設開口116-5的垂直投影與預設圖案120的垂直投影可重疊。更進一步地說,預設開口116-5的垂直投影可位於預設圖案120的垂直投影面積內。主動元件基板100-5具有與前述主動元件基板100類似的功效及優點,於此不再重述。FIG. 7 is an enlarged schematic view showing a portion R5 of the active device substrate 100-5 according to another embodiment of the present invention. The active device substrate 100-5 of the present embodiment is similar to the aforementioned active device substrate 100-2, and therefore the same or similar elements are designated by the same or similar reference numerals. Only the differences between the active device substrate 100-5 and the active device substrate 100-2 will be described here, and the portions that are not described will be referred to the above description. Referring to FIG. 7, in the embodiment, in the vertical projection direction z, the vertical projection of the preset opening 116-5 and the vertical projection of the preset pattern 120 may overlap. Furthermore, the vertical projection of the preset opening 116-5 may be located within the vertical projected area of the preset pattern 120. The active device substrate 100-5 has similar functions and advantages as the active device substrate 100 described above, and will not be repeated here.

圖8為本發明又一實施例之主動元件基板100-6之局部R6的放大示意圖。本實施例之主動元件基板100-6與前述之主動元件基板100類似,因此相同或相似的元件以相同或相似的標號標示。於此僅說明主動元件基板100-6與主動元件基板100的差異,未說明的部分請對應參照前述說明。請參照圖8,在本實施例中,預設圖案120-6的第一部122與第二部124-6可分離。主動元件基板100-6具有與前述主動元件基板100類似的功效及優點,於此便不再重述。FIG. 8 is an enlarged schematic view showing a portion R6 of the active device substrate 100-6 according to still another embodiment of the present invention. The active device substrate 100-6 of the present embodiment is similar to the active device substrate 100 described above, and thus the same or similar elements are designated by the same or similar reference numerals. Only the difference between the active device substrate 100-6 and the active device substrate 100 will be described here, and the undescribed portions should be referred to the above description. Referring to FIG. 8, in the embodiment, the first portion 122 of the preset pattern 120-6 and the second portion 124-6 are separable. The active device substrate 100-6 has similar functions and advantages as the aforementioned active device substrate 100, and will not be repeated here.

綜上所述,本發明一實施例的主動元件基板包括多個畫素單元以及預設圖案。每一畫素單元包括沿著第一方向延伸的掃描線、與掃描線交錯的資料線、與掃描線及資料線電性連接的薄膜電晶體、與薄膜電晶體電性連接的畫素電極以及與畫素電極重疊的共用電極。至少一畫素單元的掃描線具有預設開口。預設圖案與共用電極屬於同一膜層且電性連接。預設圖案設置於至少一畫素單元的掃描線上。預設圖案具有相對的多個第一側邊及相對的多個第二側邊。第一側邊及第二側邊位於掃描線上方或掃描線的垂直投影面積內,第一側邊與第一方向垂直,而第二側邊與第一方向平行。In summary, the active device substrate according to an embodiment of the present invention includes a plurality of pixel units and a preset pattern. Each pixel unit includes a scan line extending along a first direction, a data line interlaced with the scan line, a thin film transistor electrically connected to the scan line and the data line, and a pixel electrode electrically connected to the thin film transistor; A common electrode that overlaps the pixel electrode. The scan line of at least one pixel unit has a predetermined opening. The preset pattern and the common electrode belong to the same film layer and are electrically connected. The preset pattern is set on a scan line of at least one pixel unit. The preset pattern has a plurality of opposing first sides and a plurality of opposing second sides. The first side and the second side are located above the scan line or within the vertical projected area of the scan line, the first side being perpendicular to the first direction and the second side being parallel to the first direction.

利用預設圖案及預設開口能判斷共用電極所屬膜層與掃描線所屬膜層的對位狀況。由於預設圖案的第一側邊及第二側邊皆位於掃描線的投影面積內,因此量測系統的取像單元易取得第一側邊及第二側邊,而不易誤取其它圖案的邊緣、造成誤判的情況。此外,由於預設圖案位於掃描線上,預設開口為掃描線的開口,因此預設圖案及預設開口的設置不會限制畫素單元的佈局、也不會對主動元件基板的開口率造成不良影響。The alignment pattern and the preset opening can be used to determine the alignment of the film layer to which the common electrode belongs and the film layer to which the scan line belongs. Since the first side and the second side of the preset pattern are all located in the projected area of the scan line, the image capturing unit of the measurement system can easily obtain the first side and the second side, and is not easy to misuse other patterns. Edge, causing misjudgment. In addition, since the preset pattern is located on the scan line, the preset opening is an opening of the scan line, so the setting of the preset pattern and the preset opening does not limit the layout of the pixel unit, nor does it cause a defect in the aperture ratio of the active device substrate. influences.

雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明的精神和範圍內,當可作些許的更動與潤飾,故本發明的保護範圍當視後附的申請專利範圍所界定者為準。Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any one of ordinary skill in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope of the invention is defined by the scope of the appended claims.

100、100-1~100-6‧‧‧主動元件基板
110、110-1、110-2‧‧‧畫素單元
112‧‧‧畫素電極
114、114-1、114-2‧‧‧共用電極
114a‧‧‧開口
116、116-1~116-5‧‧‧預設開口
116a、116b、122a、124a‧‧‧側邊
116c‧‧‧邊緣
118‧‧‧導電元件
120、120-6‧‧‧預設圖案
122‧‧‧第一部
124、124-6‧‧‧第二部
CH‧‧‧半導體層
CL‧‧‧共用電極線
D‧‧‧汲極
DL‧‧‧資料線
G‧‧‧閘極
L‧‧‧距離
R、R1~R6‧‧‧局部
SL‧‧‧掃描線
S‧‧‧源極
T‧‧‧薄膜電晶體
W‧‧‧線寬
x、y、z‧‧‧方向
100, 100-1 ~ 100-6‧‧‧ active element substrate
110, 110-1, 110-2‧‧‧ pixel units
112‧‧‧ pixel electrodes
114, 114-1, 114-2‧‧‧share electrode
114a‧‧‧ openings
116, 116-1 ~ 116-5‧‧‧ Preset openings
116a, 116b, 122a, 124a‧‧‧ side
116c‧‧‧ edge
118‧‧‧Conductive components
120, 120-6‧‧‧Preset pattern
122‧‧‧ first
124, 124-6‧‧‧ second
CH‧‧‧Semiconductor layer
CL‧‧‧Common electrode line
D‧‧‧汲
DL‧‧‧ data line
G‧‧‧ gate
L‧‧‧ distance
R, R1 ~ R6‧‧‧ local
SL‧‧‧ scan line
S‧‧‧ source
T‧‧‧film transistor
W‧‧‧Line width
x, y, z‧‧ direction

圖1為本發明一實施例之主動元件基板的上視示意圖。 圖2為圖1之主動元件基板100之局部R的放大示意圖。 圖3為本發明另一實施例之主動元件基板100-1之局部R1的放大示意圖。 圖4為本發明又一實施例之主動元件基板100-2之局部R2的放大示意圖。 圖5為本發明再一實施例之主動元件基板100-3之局部R3的放大示意圖。 圖6為本發明一實施例之主動元件基板100-4之局部R4的放大示意圖。 圖7為本發明另一實施例之主動元件基板100-5之局部R5的放大示意圖。 圖8為本發明又一實施例之主動元件基板100-6之局部R6的放大示意圖。1 is a top plan view of an active device substrate in accordance with an embodiment of the present invention. FIG. 2 is an enlarged schematic view showing a portion R of the active device substrate 100 of FIG. 1. FIG. 3 is an enlarged schematic view showing a portion R1 of the active device substrate 100-1 according to another embodiment of the present invention. FIG. 4 is an enlarged schematic view showing a portion R2 of the active device substrate 100-2 according to still another embodiment of the present invention. FIG. 5 is an enlarged schematic view showing a portion R3 of the active device substrate 100-3 according to still another embodiment of the present invention. FIG. 6 is an enlarged schematic view showing a portion R4 of the active device substrate 100-4 according to an embodiment of the present invention. FIG. 7 is an enlarged schematic view showing a portion R5 of the active device substrate 100-5 according to another embodiment of the present invention. FIG. 8 is an enlarged schematic view showing a portion R6 of the active device substrate 100-6 according to still another embodiment of the present invention.

Claims (17)

一種主動元件基板,包括: 多個畫素單元,其中每一畫素單元包括: 一掃描線,沿著一第一方向延伸; 一資料線,與該掃描線交錯; 一薄膜電晶體,與該掃描線及該資料線電性連接; 一畫素電極,與該薄膜電晶體電性連接;以及 一共用電極,與該畫素電極重疊,其中至少一畫素單元的一掃描線具有一預設開口;以及 一預設圖案,與該共用電極屬於同一膜層,其中該預設圖案設置於該至少一畫素單元的該掃描線上,該預設圖案具有相對的多個第一側邊以及相對的多個第二側邊;於一垂直投影方向上,該些第一側邊位於該掃描線的面積內且與該第一方向垂直,該些第二側邊位於該掃描線的面積內且與該第一方向平行。An active device substrate, comprising: a plurality of pixel units, wherein each pixel unit comprises: a scan line extending along a first direction; a data line interlaced with the scan line; a thin film transistor; The scan line and the data line are electrically connected; a pixel electrode is electrically connected to the thin film transistor; and a common electrode is overlapped with the pixel electrode, wherein a scan line of at least one pixel unit has a preset And a predetermined pattern that belongs to the same film layer as the common electrode, wherein the predetermined pattern is disposed on the scan line of the at least one pixel unit, the preset pattern has a plurality of first side edges and a relative a plurality of second sides; in a vertical projection direction, the first sides are located in an area of the scan line and perpendicular to the first direction, and the second sides are located within an area of the scan line Parallel to the first direction. 如申請專利範圍第1項所述的主動元件基板,其中該預設圖案包括: 一第一部,具有該些第一側邊且與該掃描線垂直;及 一第二部,具有該些第二側邊且與該掃描線平行。The active device substrate of claim 1, wherein the predetermined pattern comprises: a first portion having the first side edges and perpendicular to the scan line; and a second portion having the first portion The two sides are parallel to the scan line. 如申請專利範圍第2項所述的主動元件基板,其中該第一部電性連接於相鄰之兩個畫素單元的兩個共用電極之間。The active device substrate according to claim 2, wherein the first portion is electrically connected between two common electrodes of two adjacent pixel units. 如申請專利範圍第2項所述的主動元件基板,其中該第一部與該第二部連接。The active device substrate according to claim 2, wherein the first portion is connected to the second portion. 如申請專利範圍第2項所述的主動元件基板,其中該第一部與該第二部分離。The active device substrate of claim 2, wherein the first portion is separated from the second portion. 如申請專利範圍第1項所述的主動元件基板,其中於該垂直投影方向上,該預設開口的垂直投影位於該預設圖案的垂直投影面積之外。The active device substrate of claim 1, wherein the vertical projection of the predetermined opening is outside the vertical projected area of the predetermined pattern in the vertical projection direction. 如申請專利範圍第6項所述的主動元件基板,其中該預設開口的垂直投影位於該至少一畫素單元之一薄膜電晶體的垂直投影與該預設圖案的垂直投影之間。The active device substrate of claim 6, wherein the vertical projection of the predetermined opening is between a vertical projection of a thin film transistor of one of the at least one pixel units and a vertical projection of the predetermined pattern. 如申請專利範圍第1項所述的主動元件基板,其中於該垂直投影方向上,該預設開口的垂直投影與該預設圖案的垂直投影重疊。The active device substrate of claim 1, wherein a vertical projection of the predetermined opening overlaps with a vertical projection of the predetermined pattern in the vertical projection direction. 如申請專利範圍第8項所述的主動元件基板,其中該預設開口的垂直投影位於該預設圖案的垂直投影面積之內。The active device substrate of claim 8, wherein the vertical projection of the predetermined opening is located within a vertical projected area of the predetermined pattern. 如申請專利範圍第1項所述的主動元件基板,其中該預設開口為一封閉開口。The active device substrate according to claim 1, wherein the predetermined opening is a closed opening. 如申請專利範圍第10項所述的主動元件基板,其中該封閉開口具有相對的多個第三側邊及相對的多個第四側邊,該些第三側邊與該第一方向垂直,該些第四側邊與該第一方向平行。The active device substrate according to claim 10, wherein the closed opening has a plurality of opposite third sides and an opposite plurality of fourth sides, the third sides being perpendicular to the first direction, The fourth sides are parallel to the first direction. 如申請專利範圍第1項所述的主動元件基板,其中該預設開口為一開放開口。The active device substrate according to claim 1, wherein the predetermined opening is an open opening. 如申請專利範圍第12項所述的主動元件基板,其中該開放開口具有相對的多個第五側邊及連接於該些第五側邊之間的一第六側邊,該些第五側邊與該第一方向垂直,該第六側邊與該第一方向平行。The active device substrate according to claim 12, wherein the open opening has a plurality of opposite fifth sides and a sixth side connected between the fifth sides, the fifth sides The side is perpendicular to the first direction, and the sixth side is parallel to the first direction. 如申請專利範圍第6項所述的主動元件基板,其中該預設開口之該垂直投影與該預設圖案之該垂直投影的最短距離為L,3μm≦L≦30μm。The active device substrate according to claim 6, wherein a shortest distance between the vertical projection of the predetermined opening and the vertical projection of the predetermined pattern is L, 3 μm ≦ L ≦ 30 μm. 如申請專利範圍第1項所述的主動元件基板,其中該掃描線之不具該預設開口的其餘部分的線寬一致。The active device substrate according to claim 1, wherein a line width of the scan line that does not have the rest of the predetermined opening is uniform. 如申請專利範圍第1項所述的主動元件基板,其中該薄膜電晶體包括一閘極、一半導體層以及與該半導體層電性連接的一源極與一汲極,而該半導體層、該源極與該汲極位於該掃描線的上方。The active device substrate according to claim 1, wherein the thin film transistor comprises a gate, a semiconductor layer, and a source and a drain electrically connected to the semiconductor layer, and the semiconductor layer The source and the drain are located above the scan line. 如申請專利範圍第1項所述的主動元件基板,其中該閘極為該掃描線的一部分。The active device substrate of claim 1, wherein the gate is a part of the scan line.
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