TWI625993B - Manufacturing method of circuit board structure - Google Patents

Abstract

A method of manufacturing a circuit board structure, the steps of which are as follows. A glass film is provided on the electrostatic chuck. A cutting process is performed to form at least one crack in the glass film. A plurality of first via holes are formed in the glass film. A first wiring layer is formed on the glass film. A polymer layer is formed on the first wiring layer. The polymer layer covers the surface of the first wiring layer and the surface of the glass film. A plurality of second via holes are formed in the polymer layer. A second wiring layer is formed on the polymer layer to form a first wiring board structure. A singulation process is performed to separate the first circuit board structure into a plurality of second circuit board structures.

Description

Circuit board structure manufacturing method

The present invention relates to a method of fabricating a semiconductor structure, and more particularly to a method of fabricating a circuit board structure.

As consumer electronics demand for portability and multi-function increases, semiconductor components are moving toward smaller size, higher performance, and lower cost. Under this trend, semiconductor components require more input/output (I/O) pads to be added to the board over a smaller area. In other words, as the degree of integration of semiconductor components is increasing, the demand for reliability and yield of semiconductor packaging technology is increasing.

In general, after completing the packaging process of the reconfigured circuit layer, the entire board surface needs to be cut into a plurality of smaller board faces. Most of the current cutting methods use laser cutting to reduce stress residual problems. However, laser cutting is slower, which is not conducive to productivity and manufacturing costs.

The present invention provides a method of manufacturing a wiring board structure including secondary cutting, which can reduce the residual stress of the cutting while improving the productivity.

The present invention provides a method of manufacturing a wiring board structure, the steps of which are as follows. A glass film having upper and lower surfaces is provided, and the lower surface of the glass film is placed on the electrostatic chuck. A cutting process is performed to form at least one slit in the upper surface of the glass film. A plurality of first via holes are formed in the upper surface of the glass film. Forming a first circuit layer on the upper surface of the glass film such that the first circuit layer is electrically connected to the first via hole. A polymer layer is formed on the first wiring layer. The polymer layer covers the surface of the first wiring layer and the surface of the glass film. A plurality of second via holes are formed in the polymer layer. The second via hole is electrically connected to the first circuit layer. Forming a second circuit layer on the polymer layer such that the second circuit layer is electrically connected to the second via hole to form a first circuit board structure. A singulation process is performed to separate the first circuit board structure into a plurality of second circuit board structures.

In an embodiment of the invention, the crack does not expose the surface of the electrostatic chuck.

In an embodiment of the invention, the depth of the crack is at least two-thirds greater than the thickness of the glass film.

In an embodiment of the invention, the angle between the side wall of the crack and the bottom surface of the glass film is 30 to 60 degrees.

In an embodiment of the invention, the number of the cracks is plural. The crack includes a plurality of first dicing streets parallel to the first direction and parallel to the second direction Multiple second cutting lanes. The first direction intersects the second direction.

In an embodiment of the invention, when the polymer layer is formed on the first wiring layer, the polymer layer is filled in the crack.

In an embodiment of the invention, the step of the cutting process includes cutting the glass film by a diamond cutter.

In an embodiment of the invention, prior to performing the singulation process, it further includes aligning the diamond cutter with the alignment mark by aligning the mark.

In an embodiment of the invention, after performing the above singulation process, the electrostatic chuck is further removed.

Based on the above, the present invention provides a stress concentration point at the above crack by forming a crack in the glass film. Next, a reconfiguration wiring layer structure is formed on the glass film. Thereafter, a secondary cut is made by the diamond cutter along the direction of the crack so that stress is released from the crack. Therefore, the present invention can prevent the cutting stress from remaining on the edge of the reconfigured wiring layer structure, thereby causing irregular cracking of the glass film. In other words, the present invention makes the edge of the cut wiring board structure relatively flat by the secondary cutting process. In addition, the present invention not only reduces the residual stress of the cutting but also increases the productivity at the same time as the conventional laser cutting.

The above described features and advantages of the invention will be apparent from the following description.

1‧‧‧First circuit board structure

2‧‧‧Second circuit board structure

10‧‧‧First through hole

20‧‧‧Second through hole

100‧‧‧Electrostatic suction cup

101a‧‧‧ upper surface

101b‧‧‧ lower surface

102‧‧‧ glass film

102a‧‧‧Modified area

102b‧‧‧Non-modified areas

103, 203‧‧‧Diamond knives

104‧‧‧ seed layer

105‧‧‧ crack

106‧‧‧Conductor structure

106a‧‧‧First via

106b‧‧‧First line layer

108‧‧‧ polymer layer

110‧‧‧Conductor structure

110a‧‧‧Second via

110b‧‧‧second circuit layer

112‧‧‧ edge

D‧‧‧Deep

Part P‧‧‧

Θ‧‧‧ angle

1A through 1J are schematic cross-sectional views showing a manufacturing process of a circuit board structure in accordance with an embodiment of the present invention.

Fig. 2 is an enlarged schematic cross-sectional view showing a portion of Fig. 1B.

The invention will be more fully described with reference to the drawings of the embodiments. However, the invention may be embodied in a variety of different forms and should not be limited to the embodiments described herein. The thickness of layers and regions in the drawings will be exaggerated for clarity. The same or similar reference numerals indicate the same or similar elements, and the following paragraphs will not be repeated.

1A through 1J are schematic cross-sectional views showing a manufacturing process of a circuit board structure in accordance with an embodiment of the present invention. Fig. 2 is an enlarged schematic cross-sectional view showing a portion of Fig. 1B.

Referring to FIGS. 1A and 1B, a glass film 102 is provided on an electrostatic chuck 100, wherein the glass film 102 has opposing upper and lower surfaces 101a, 101b. Specifically, the electrostatic chuck 100 can adsorb the lower surface 101b of the glass film 102 by electrostatic force so that the glass film 102 is held on the electrostatic chuck 100 without warping. In one embodiment, the thickness of the glass film 102 can be, for example, between 5 micrometers and 100 micrometers. Preferably, the thickness of the glass film can be, for example, 10 micrometers, 20 micrometers, 30 micrometers, 50 micrometers, or 80 micrometers; The size of the glass film 102 can be adjusted according to user needs.

Then, the cutting process is performed on the glass film 102 by the diamond cutter 103, A crack 105 is formed in the glass film 102 (as shown in FIG. 1B). In detail, as shown in an enlarged view of the portion P of FIG. 1B, the slit 105 has an inverted triangular shape which does not expose the surface of the electrostatic chuck 100. The depth D of the crack 105 is at least two-thirds greater than the thickness of the glass film 102, but the crack 105 does not penetrate the glass film 102. In an embodiment, the depth D of the crack 105 can be between 4 microns and 67 microns. The angle Θ between the side wall of the crack 105 and the bottom surface of the glass film 102 may be between 30 degrees and 60 degrees.

On the other hand, the number of cracks 105 may be, for example, a plurality from a top view. Specifically, the crack 105 includes a plurality of first dicing streets parallel to the first direction and a plurality of second dicing streets parallel to the second direction. The first direction intersects the second direction. That is, the cutting process of the present embodiment can pre-dicing a full-face glass film 102 into a plurality of small-plate glass films (that is, the glass films on both sides of the crack 105 in FIG. 1B). In order to facilitate the subsequent singulation process. In an embodiment, the first direction and the second direction are substantially perpendicular to each other.

Referring to FIG. 1C, the glass film 102 is irradiated with laser light to form a plurality of modified regions 102a in the glass film 102, and a region other than the modified region 102a is a non-modified region 102b. In an embodiment, the laser light may be, for example, a carbon dioxide (CO ₂ ) laser; the laser light may have a wavelength between 9 μm and 11 μm; and the energy of the laser light may be between 200 mW and 10 mW. Preferably, the preferred laser energy is, for example, 150 mW, 100 mW, 70 mW, 50 mW, 30 mW or 20 mW. The irradiation time of the laser light may be between 50 minutes and 10 minutes, and the preferred laser processing time may be, for example, 40 minutes, 30 minutes or 20 minutes.

Referring to FIG. 1C and FIG. 1D, an etching process is performed to remove the glass film 102 of the modified region 102a, and a plurality of first via holes 10 are formed in the glass film 102. The first through holes 10 penetrate the glass film 102. Surface 101a and lower surface 101b. As shown in FIG. 1D, the first through holes 10 do not intersect the cracks 105 and do not overlap. Specifically, since the etching rate of the modified region 102a is greater than the etching rate of the non-modified region 102b, the glass film 102 of the modified region 102a can be completely removed to expose the electrostatic chuck 100. surface. However, the present invention is not limited thereto. In other embodiments, a plurality of blind holes (not shown) may be formed in the glass film 102 without exposing the surface of the electrostatic chuck 100. In an embodiment, the etching process includes a wet etching process. The etching solution used in the wet etching process may be, for example, hydrofluoric acid (HF), diluted hydrofluoric acid (DHF) or buffered etchant (BOE). In an embodiment, the etching selectivity ratio of the modified region 102a to the non-modified region 102b may be between 20:1 and 100:1, but the invention is not limited thereto.

Referring to FIGS. 1D and 1E, a seed layer 104 is formed on a portion of the upper surface 101a of the glass film 102 and on the surface of the first via 10. In detail, a seed material layer (not shown) is formed on the glass film 102, and the seed material layer conformally covers the upper surface 101a of the glass film 102 and the surface of the first via hole 10. Next, a lithography process and an etching process are performed to remove a portion of the seed material layer to form a seed layer 104. In an embodiment, the material of the seed layer 104 comprises a metal material, a metal nitride, a metal halide, or a combination thereof. The metal material may be, for example, titanium, copper, nickel, palladium, gold, silver or alloys thereof. The method of forming the seed layer 104 includes physical vapor deposition, chemical vapor deposition, electroplating, or electroless plating. For the process, the physical vapor deposition method may be, for example, a sputtering method or an evaporation method.

Referring to FIG. 1E and FIG. 1F, an electroplating process or an electroless plating process is performed to form a conductor structure 106 on the surface of the seed layer 104. In detail, the conductor structure 106 includes a first via hole 106a filled in the first via hole 10 and a first wiring layer 106b disposed on the upper surface 101a of the glass film 102. The first via hole 106a is electrically connected to the first circuit layer 106b. In an embodiment, the material of the conductor structure 106 comprises a metallic material. The metal material may be, for example, titanium, copper, nickel, palladium, gold, silver or alloys thereof. Incidentally, the seed layer 104 can be considered as part of the conductor structure 106. Therefore, the seed layer 104 is not shown in FIG. 1F.

Referring to FIG. 1G, a polymer layer 108 is formed on the first wiring layer 106b. The polymer layer 108 covers not only the surface of the first wiring layer 106b but also the upper surface 101a of the glass film 102, and is also filled in the crack 105. In an embodiment, the material of the polymer layer 108 comprises a photosensitive material, which may be, for example, a chemically amplified photosensitive material. In one embodiment, the chemical amplification type photosensitive material may have a coefficient of thermal expansion (CTE) of from 45 ppm/° C. to 55 ppm/° C. The thickness of the polymer layer 108 can be between 5 microns and 20 microns, which can be formed by spray coating.

Referring to FIG. 1G and FIG. 1H, a patterned mask layer (not shown) is formed on the polymer layer 108. Thereafter, a lithography process is performed with the patterned mask layer as a mask to form a plurality of second via holes 20 in the polymer layer 108. The second through hole 20 exposes a portion of the surface of the first wiring layer 106b. It should be noted that since the chemical amplification type photosensitive material is used as the polymer layer 108 in this embodiment, the lithography process is performed. When the lithography process has an exposure energy of less than 250 mJ, the exposure time can also be shortened. In this way, the embodiment can reduce the process time to improve the yield.

Referring to FIG. 1H and FIG. 1I, a seed layer (not shown) is formed on the surface of the polymer layer 108 and the surface of the second via hole 20, and an electroplating process or an electroless plating process is performed to be in the seed layer ( The conductor structure 110 is formed on the surface not shown. The material and formation method of the conductor structure 110 is similar to the material and formation method of the conductor structure 106 in FIG. 1F, and will not be described herein. Similarly, the conductor structure 110 includes a second via hole 110a filled in the second via hole 20 and a second wiring layer 110b disposed on the polymer layer 108. The second circuit layer 110b can be electrically connected to the conductor structure 106 through the second via hole 110a. At this time, the glass film 102, the conductor structures 106, 110, and the polymer layer 108 can be regarded as the first wiring board structure 1.

Referring to FIG. 1I and FIG. 1J, the diamond cutter 203 is aligned with the crack 105 by a positioning mark (not shown) on the glass film 102. Next, the first circuit board structure 1 is subjected to a singulation process. In detail, the diamond cutter 203 can be cut along the direction of the crack 105 such that the first wiring board structure 1 is separated into a plurality of second wiring board structures 2. Thereafter, the electrostatic chuck 100 is removed to expose the lower surface 101b of the glass film 102 and the surface of the first via 106a. However, the present invention is not limited thereto. In other embodiments, the first circuit board structure 1 may be subjected to a singulation process after the electrostatic chuck 100 is removed.

It is worth noting that since the crack 105 has an inverted triangle shape, the region of the lower sharp corner near the electrostatic chuck 100 is a stress concentration region. Therefore, when the diamond cutter 203 is cut along the crack 105, the cutting stress will be from the crack. 105 Released thereby separating the glass film 102 such that the edge 112 of the second circuit board structure 2 is relatively flat without damaging the second circuit board structure 2.

In addition, the present embodiment adsorbs and holds the thin glass film 102 on the electrostatic chuck 100 so that the conductor structure 106, the polymer layer 108, and the conductor structure 110 are subsequently formed on the glass film 102 without bending. )problem. Thereafter, the step of removing the electrostatic chuck 100 does not cause the warpage caused by the stress problem of the prior art. Therefore, the manufacturing method of the circuit board structure of the present embodiment can avoid the problem of deflection and warpage, thereby improving the reliability and yield of the product. Further, this embodiment uses a polymer material as a dielectric layer of a wiring board, and the polymer material has a lower coefficient of thermal expansion and a smaller amount of out gas. Therefore, the circuit board of the embodiment has better dimensional stability and is less susceptible to environmental temperature, thereby improving reliability.

Although the second circuit board structure 2 in FIG. 1J only shows the via holes 106a, 110a, one polymer layer 108, and two circuit layers 106b, 110b, the invention is not limited thereto. In other embodiments, the number of vias, polymer layers and circuit layers, and the manner in which they are connected can be adjusted according to the needs of the designer.

In summary, the present invention provides a stress concentration point at the crack by forming a crack in the glass film. Next, a reconfiguration wiring layer structure is formed on the glass film. Thereafter, a secondary cut is made by the diamond cutter along the direction of the crack so that stress is released from the crack. Therefore, the present invention can prevent the cutting stress from remaining on the edge of the reconfigured wiring layer structure, thereby causing irregular cracking of the glass film. In other words, the present invention makes the edge of the cut wiring board structure relatively flat by the secondary cutting process. another In addition, the present invention not only reduces the residual stress of the cutting but also increases the productivity at the same time as the conventional laser cutting.

In addition, the present invention can adsorb and hold a thin glass film on the electrostatic chuck so that the conductor structure and the polymer layer are subsequently formed on the glass film without causing a problem of deflection. Thereafter, the step of removing the electrostatic chuck does not cause warping caused by stress problems of the prior art. Therefore, the present invention can avoid the warpage problem caused by stress caused by peeling of the reconfigured wiring layer structure, thereby improving the reliability and yield of the product.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any one of ordinary skill in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope of the invention is defined by the scope of the appended claims.

Claims (9)

A method for manufacturing a circuit board structure, comprising: providing a glass film having upper and lower surfaces, wherein a lower surface of the glass film is placed on an electrostatic chuck; performing a cutting process to form at least an upper surface of the glass film a plurality of first via holes are formed in the upper surface of the glass film; a first circuit layer is formed on the upper surface of the glass film, such that the first circuit layer is electrically connected to the first via holes Forming a polymer layer on the first circuit layer, the polymer layer covering a surface of the first circuit layer and a surface of the glass film; forming a plurality of second via holes in the polymer layer, wherein the The second via hole is electrically connected to the first circuit layer; a second circuit layer is formed on the polymer layer, the second circuit layer is disposed on the polymer layer, and the second circuit layer and the second layer The two via holes are electrically connected to form a first circuit board structure; and a singulation process is performed to separate the first circuit board structure into a plurality of second circuit board structures. The method of manufacturing a wiring board structure according to claim 1, wherein the crack does not expose a surface of the electrostatic chuck. The method of manufacturing a wiring board structure according to claim 1, wherein the crack has a depth at least two thirds greater than a thickness of the glass film. The method of manufacturing a wiring board structure according to claim 1, wherein an angle between a side wall of the crack and a bottom surface of the glass film is 30 to 60 degrees. The method for manufacturing a circuit board structure according to claim 1, wherein the number of the cracks is plural, the cracks include a plurality of first cutting lanes parallel to a first direction and parallel to a second direction a plurality of second cutting lanes, the first direction intersecting the second direction. The method of manufacturing a wiring board structure according to claim 1, wherein the polymer layer is filled in the crack when the polymer layer is formed on the first wiring layer. The method of manufacturing a circuit board structure according to claim 1, wherein the step of the cutting process comprises cutting the glass film by a diamond cutter. The method for manufacturing a circuit board structure according to claim 1, wherein before the singulation process, a positioning tool is used to align a diamond cutter with the crack. The method for manufacturing a circuit board structure according to claim 1, wherein after the singulation process is performed, the electrostatic chuck is further removed.