TWI609446B - 用於電子總成之加強件帶 - Google Patents
用於電子總成之加強件帶 Download PDFInfo
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- TWI609446B TWI609446B TW104134227A TW104134227A TWI609446B TW I609446 B TWI609446 B TW I609446B TW 104134227 A TW104134227 A TW 104134227A TW 104134227 A TW104134227 A TW 104134227A TW I609446 B TWI609446 B TW I609446B
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- 239000003351 stiffener Substances 0.000 title claims description 85
- 235000012431 wafers Nutrition 0.000 claims description 108
- 230000002787 reinforcement Effects 0.000 claims description 48
- 238000000034 method Methods 0.000 claims description 40
- 229910052751 metal Inorganic materials 0.000 claims description 22
- 239000002184 metal Substances 0.000 claims description 22
- 238000005520 cutting process Methods 0.000 claims description 7
- 239000011230 binding agent Substances 0.000 claims description 6
- 239000011888 foil Substances 0.000 claims description 5
- 229910052715 tantalum Inorganic materials 0.000 claims description 3
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 claims description 3
- 230000003014 reinforcing effect Effects 0.000 claims 5
- 239000002245 particle Substances 0.000 claims 1
- 239000000463 material Substances 0.000 description 11
- 238000004519 manufacturing process Methods 0.000 description 10
- 239000000758 substrate Substances 0.000 description 9
- -1 polypropylene Polymers 0.000 description 6
- 230000000712 assembly Effects 0.000 description 5
- 238000000429 assembly Methods 0.000 description 5
- 229910001220 stainless steel Inorganic materials 0.000 description 5
- 239000010935 stainless steel Substances 0.000 description 5
- 239000005020 polyethylene terephthalate Substances 0.000 description 4
- 229920000139 polyethylene terephthalate Polymers 0.000 description 4
- 238000004891 communication Methods 0.000 description 3
- 229910052732 germanium Inorganic materials 0.000 description 3
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 3
- 229920006254 polymer film Polymers 0.000 description 3
- NIXOWILDQLNWCW-UHFFFAOYSA-N 2-Propenoic acid Natural products OC(=O)C=C NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 2
- 229920000106 Liquid crystal polymer Polymers 0.000 description 2
- 239000004977 Liquid-crystal polymers (LCPs) Substances 0.000 description 2
- 239000004698 Polyethylene Substances 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 2
- 239000004743 Polypropylene Substances 0.000 description 2
- 239000004793 Polystyrene Substances 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 239000003431 cross linking reagent Substances 0.000 description 2
- DIOQZVSQGTUSAI-UHFFFAOYSA-N decane Chemical compound CCCCCCCCCC DIOQZVSQGTUSAI-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000009434 installation Methods 0.000 description 2
- 229920000573 polyethylene Polymers 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 229920000098 polyolefin Polymers 0.000 description 2
- 229920001155 polypropylene Polymers 0.000 description 2
- 229920002223 polystyrene Polymers 0.000 description 2
- 229920002635 polyurethane Polymers 0.000 description 2
- 239000004814 polyurethane Substances 0.000 description 2
- 239000004800 polyvinyl chloride Substances 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- SMZOUWXMTYCWNB-UHFFFAOYSA-N 2-(2-methoxy-5-methylphenyl)ethanamine Chemical compound COC1=CC=C(C)C=C1CCN SMZOUWXMTYCWNB-UHFFFAOYSA-N 0.000 description 1
- VGGSQFUCUMXWEO-UHFFFAOYSA-N Ethene Chemical compound C=C VGGSQFUCUMXWEO-UHFFFAOYSA-N 0.000 description 1
- 239000005977 Ethylene Substances 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000009472 formulation Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 239000004615 ingredient Substances 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229920002098 polyfluorene Polymers 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 238000004381 surface treatment Methods 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
- 239000012745 toughening agent Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
- H01L2221/68331—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding of passive members, e.g. die mounting substrate
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- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/6834—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
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- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68377—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support with parts of the auxiliary support remaining in the finished device
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/562—Protection against mechanical damage
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- H01—ELECTRIC ELEMENTS
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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- Condensed Matter Physics & Semiconductors (AREA)
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- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Dicing (AREA)
Description
本文所描述之實施例大體而言係關於加強件帶,且更具體而言,係關於用於電子總成之加強件帶。
包括安裝至基板上的超薄矽晶粒之習知電子總成的缺點之一係翹曲。此翹曲歸因於超薄矽晶粒與基板之間的熱膨脹係數(CTE)之差異。
目前不存在針對超薄晶粒(<100um)翹曲控制之低成本且可製造的解決方案。因此,針對包括安裝至基板上的超薄矽晶粒之電子總成存在如下需要:該電子總成(i)在室溫及回流溫度下由CTE失配引起之翹曲有所減少;以及(ii)不需要任何專用製造設備來製造該電子總成。
依據本發明之一實施例,係特地提出一種用於一晶圓之加強件帶,該加強件帶包含:一安裝帶;一加強件,其可移除地附接至該安裝帶;以及一晶粒附接膜,其附接至該加強件。
2‧‧‧線
10‧‧‧加強件帶
11‧‧‧安裝帶
12‧‧‧加強件
13‧‧‧晶粒附接膜
14‧‧‧卷
20、1210‧‧‧電子總成
21‧‧‧晶圓/薄化的晶圓
30‧‧‧背面研磨帶
31A、31B‧‧‧切割刀片
1100‧‧‧方法
1200‧‧‧電子裝置
1202‧‧‧系統匯流排
1212‧‧‧處理器
1214‧‧‧通訊電路
1216‧‧‧顯示設備
1218‧‧‧揚聲器
1220‧‧‧外部記憶體
1222‧‧‧主記憶體
1224‧‧‧硬驅動器
1226‧‧‧可移除媒體
1230‧‧‧鍵盤及/或控制器
圖1例示出用於晶圓之示例性示例性加強件帶,其中該加強件帶部分地展開。
圖2例示出沿線2-2獲得之圖1的加強件帶。
圖3例示出示例性晶圓之側視圖。
圖4例示出圖3中所展示之晶圓的頂部視圖。
圖5例示出已將研磨帶安裝至晶圓且已藉由研磨來薄化晶圓之後的圖3之示例性晶圓。
圖6為圖5中所展示之示例性晶圓的頂部視圖。
圖7例示出已移除研磨帶且已將圖1之加強件帶應用於晶圓之後的圖5之示例性晶圓。
圖8為圖7中所展示之示例性晶圓及加強件帶的頂部視圖。
圖9例示出使用兩個切割刀片切割之圖7中所展示的示例性晶圓及加強件帶之側視圖。
圖10為圖9中所展示之示例性晶圓及加強件帶的頂部視圖。
圖11為例示出製造加強件帶及包括該加強件帶之電子總成的示例性方法之流程圖。
圖12為電子裝置之方塊圖,該電子裝置包括加強件帶及/或包括本文所描述之加強件帶的電子總成。
以下描述及圖式充分地例示出特定實施例,以使
熟習此項技術者能夠實踐該等實施例。其他實施例可併入結構變化、邏輯變化、電氣變化、製程變化及其他變化。一些實施例之部分及特徵可包括於其他實施例之部分及特徵中,或者代替其他實施例之部分及特徵。在申請專利範圍中闡述之實施例涵蓋彼等請求項之所有可利用的等效物。
如本申請案中所使用,諸如「水平」之定向術語係相對於平行於晶圓或基板之習知平面或表面之平面來定義,而與晶圓或基板之定向無關。「垂直」一詞指代垂直於如以上所定義之水平的方向。諸如「上」、「側」(如在「側壁」中)、「較高」、「較低」、「上方」及「下方」之介詞係相對於習知平面或表面處於晶圓或基板之頂部表面上來定義,而與電氣互連或電子封裝之定向無關。
一些示例性形式係關於用於晶圓級加強件應用之加強件帶。該加強件帶藉由在晶粒製備製程中在晶圓級整合加強件,在室溫及回流溫度兩者下提供針對超薄晶粒(<100um)翹曲控制之低成本且可製造的解決方案。另外,使用加強件帶可在製造包括超薄晶粒之電子總成時,減少對任何專用設備之需要。
在一些形式中,可在晶圓級使用熱固性黏合劑將薄金屬/聚合物膜(例如,具有黏合劑之不銹鋼)附接至晶粒。加強件之高強度以及金屬薄金屬/聚合物膜之CTE抵消晶粒與基板之間的CTE失配,晶粒最終安裝在該基板上。
另外,可使用現存的層壓製程在晶圓級附接加強
件帶。亦可使用習知晶粒切單製程(例如,藉由鋸切)來最終將示例性晶圓切單。
與習知技術(例如,使用單一單元級加強件的技術)相比,本文所描述之加強件帶、方法及電子總成可藉由在晶圓級應用剛性不銹鋼層來提供可製造的低成本解決方案。在晶圓級應用剛性不銹鋼層可提供對晶粒之優良幾何控制及置放準確度。另外,本文所描述之加強件帶、方法及電子總成可(i)提供自切割帶之改良的薄晶圓拾取;以及(ii)減少在包括超薄晶圓之電子總成的製造期間損壞超薄晶圓之風險。
以下為加強件帶之一些示例性材料性質:
在一些形式中,加強件帶可為約10-100um的高強度金屬/聚合物膜。另外,當利用表面處理時(例如,矽烷),可在金屬/黏合劑界面處達成增加的黏合性。
圖1例示出用於晶圓之示例性加強件帶10,其中加強件帶10部分地展開。圖2例示出沿線2-2獲得之圖1的加強件帶10。加強件帶10包括安裝帶11及可移除地附接至安裝帶11之加強件12。加強件帶10進一步包括附接至加強件12之晶粒附接膜13。作為實例,安裝帶可為大約380-420mm,且晶粒附接膜可為大約300-330mm。另外,加強件可為大約300-330mm。
在一些示例性形式中,安裝帶11為聚合物膜,但想到現在已知或將來發現之其他材料。在一個形式中,安裝帶11包括聚烯烴,諸如聚丙烯、聚乙烯、聚氯乙烯(PVC)、聚對苯二甲酸乙二醇酯(PET)、聚苯乙烯、聚氨基甲酸酯。亦可利用多個此類聚合物之複合膜。在另一形式中,安裝帶11形成為由不同材料(例如,各種聚烯烴,諸如聚丙烯、聚乙烯、聚氯乙烯(PVC)、聚對苯二甲酸乙二醇酯(PET)、聚苯乙烯、聚氨基甲酸酯)層製成的層疊物。
在一些示例性形式中,晶粒附接膜13為黏合劑,但想到現在已知或將來發現之其他材料。在一個形式中,晶粒附接膜13包括環氧樹脂。在另一形式中,晶粒附接膜13包括丙烯酸。在另一形式中,晶粒附接膜13包括聚醯亞胺。在另一形式中,晶粒附接膜13包括基於交聯劑及韌化
劑之聚矽氧。在另一形式中,加強件12形成為由不同材料(例如,環氧樹脂、丙烯酸、聚醯亞胺或基於交聯劑及韌化劑之聚矽氧)層製成的層疊物。
在一些示例性形式中,加強件12為金屬箔,但想到現在已知或將來發現之其他材料。在一個形式中,加強件12包括不銹鋼材料。在另一形式中,加強件12包括銅材料。在另一形式中,加強件12包括鋁材料。在另一形式中,加強件12包括至少一個液晶聚合物。在另一形式中,加強件12形成為由不同材料(例如,不銹鋼、銅、鋁或液晶聚合物)層製成的層疊物。
另外,加強件12之尺寸可匹配加強件帶10最終所附接之晶圓的尺寸,以便對晶圓及可包括晶圓及加強件帶10之任何電子總成提供機械支撐及熱支撐。加強件12之尺寸將部分取決於電子總成之總體設計,以及與將加強件帶10附接至晶圓相關聯的製造考慮因素(以及其他因素)。
如圖1所示,安裝帶11、晶粒附接膜13及多個加強件12形成為卷14,該卷可展開來曝露各個加強件12。可將各個加強件12、安裝帶11及晶粒附接膜13自卷14移除,以便後續附接至晶圓。應注意,加強件12、安裝帶11及晶粒附接膜13可呈除卷14之外的其他形式。
圖7展示出示例性電子總成20,該電子總成包括與關於圖1及圖2所描述之加強件帶10類似的示例性加強件帶10。所例示的示例性電子總成20中之加強件帶10附接至晶圓21。想到其他形式,其中晶圓21為基板、板或某一其
他類型之基座。
加強件帶10包括安裝至晶圓21之晶粒附接膜13。加強件帶10安裝至晶圓21之方式將部分取決於用於晶圓21及晶粒附接膜13之材料的類型(以及其他因素)。
作為實例,晶圓21可由矽層及金屬層形成。電子總成20中所包括之晶圓21的類型將部分取決於將要使用電子總成20之應用(以及其他因素)。另外,晶圓21可為相對薄的晶圓21(例如,小於100微米),且加強件帶10可尤其可用於對薄晶圓21提供熱支撐及/或機械支撐。
圖11為例示出製造加強件帶10及包括加強件帶10之電子總成20的示例性方法[1100]之流程圖。方法[1100]包括[1110]形成加強件帶10,該加強件帶包括安裝帶11、可移除地附接至安裝帶11之加強件12,以及附接至加強件12之晶粒附接膜13(例如,參見圖2)。
在一些形式中,方法[1100]進一步包括[1120]將加強件帶10附接至晶圓21(例如,參見圖7及圖8)。應注意,雖然晶粒附接膜13展示為用來將加強件帶10附接至晶圓21,但想到加強件帶10與晶圓21之間的其他形式之附接。作為實例,習知線內薄化工具(inline thinning tool)可用來將加強件帶10附接至晶圓21。
圖3例示出示例性晶圓21之側視圖。圖4例示出圖3中所示之晶圓21的頂部視圖。
方法[1100]可進一步包括:[1115]在[1120]將加強件帶10附接至晶圓10之前,將背面研磨帶30附接至晶圓
21;以及[1116]在將背面研磨帶30附接至晶圓之後,薄化晶圓21(例如,參見圖5及圖6)。在一些形式中,[1120]將加強件帶10附接至晶圓21可包括將加強件帶10附接至薄化的晶圓21。
方法[1100]可進一步包括[1117]自薄化的晶圓21移除背面研磨帶30(例如,參見圖5及圖6)。可藉由現在已知或將來發現之任何方式自薄化的晶圓21移除背面研磨帶30。
在一些形式中,方法[1100]可進一步包括[1130]將薄化的晶圓21切單(例如,參見圖9及圖10)。可藉由現在已知或將來發現之任何方式將薄化的晶圓21切單。作為實例,圖9例示出使用兩個切割刀片31A、31B切割之圖7中所展示之薄化的晶圓21及加強件帶10之側視圖。
本文所描述之加強件帶10、方法[1100]及電子總成20可在室溫以及更高溫度兩者下提供改良之翹曲控制。此改良之翹曲控制可增強用於諸如智慧型電話、平板電腦及隨身裝置之行動產品之薄電子總成的產量。
圖12為電子裝置1200之方塊圖,該電子裝置併入本文所描述之至少一個加強件帶10、方法[1100]及電子總成20。電子裝置1200僅為電子裝置之一個實例,在此電子裝置中可使用本文所描述之加強件帶10、方法[1100]及電子總成20的形式。
電子裝置1200之實例包括但不限於個人電腦、平板電腦、行動電話、遊戲設備、MP3或其他數位音樂播放
機等等。在此實例中,電子裝置1200包含資料處理系統,該資料處理系統包括用以耦接電子裝置1200之各種組件的系統匯流排1202。系統匯流排1202在電子裝置1200之各種組件之間提供通訊鏈路,且可實行為單一匯流排、匯流排之組合,或以任何其他合適的方式來實行。
包括如本文所描述之加強件帶10、方法[1100]及電子總成20中之任一者的電子總成1210可耦接至系統匯流排1202。電子總成1210可包括任何電路或電路之組合。在一個實施例中,電子總成1210包括可為任何類型之處理器1212。如本文所使用,「處理器」意謂任何類型之計算電路,諸如但不限於微處理器、微控制器、複雜指令集計算(CISC)微處理器、精簡指令集計算(RISC)微處理器、極長指令字(VLIW)微處理器、圖形處理器、數位信號處理器(DSP)、多核心處理器,或任何其他類型之處理器或處理電路。
電子總成1210中可包括之其他類型之電路為定製電路、特殊應用積體電路(ASIC),或類似物,諸如,例如,用於在無線設備中使用之一或多個電路(諸如通訊電路1214),無線設備例如為行動電話、平板電腦、膝上型電腦、雙向無線電設備及類似的電子系統。IC可執行任何其他類型之功能。
電子裝置1200亦可包括外部記憶體1220,該外部記憶體又可包括適合於特定應用之一或多個記憶體元件,諸如呈隨機存取記憶體(RAM)形式之主記憶體1222、一或多個硬碟機1224,及/或處置諸如光碟片(CD)、快閃記憶
卡、數位視訊碟片(DVD)等可移除媒體1226的一或多個碟機。
電子裝置1200亦可包括顯示設備1216、一或多個揚聲器1218,以及鍵盤及/或控制器1230,該鍵盤及/或控制器可包括滑鼠、軌跡球、觸控螢幕、語音識別設備,或准許系統使用者將資訊輸入至電子裝置1200中且自電子裝置1200接收資訊之任何其他設備。
為了更好地例示出本文所揭示之方法及裝置,本文提供實施例之非限制性清單。
實例1包括用於晶圓之加強件帶。該加強件帶包括安裝帶及可移除地附接至該安裝帶之加強件。該加強件帶進一步包括附接至該加強件之晶粒附接膜。
實例2包括實例1之加強件帶,其中安裝帶為聚合物膜。
實例3包括實例1至2中任一項之加強件帶,其中晶粒附接膜為黏合劑。
實例4包括實例1至3中任一項之加強件帶,其中加強件為金屬箔。
實例5包括實例1至4中任一項之加強件帶,其中加強件之尺寸大於晶圓之尺寸。
實例6包括實例1至5中任一項之加強件帶,其中安裝帶、晶粒附接膜及加強件形成為卷。
實例7包括電子總成。該電子總成包括晶圓及附接至該晶圓之加強件帶。該加強件帶包括安裝至該晶圓之
晶粒附接膜。該加強件帶進一步包括附接至該晶粒附接膜之加強件及可移除地附接至該加強件之安裝帶。
實例8包括實例7之電子總成,其中安裝帶為聚合物膜。
實例9包括實例7至8中任一項之電子總成,其中晶圓由矽層及金屬層形成。
實例10包括實例7至9中任一項之電子總成,其中加強件為金屬箔。
實例11包括實例7至10中任一項之電子總成,其中加強件之尺寸大於晶圓之尺寸。
實例12包括實例7至11中任一項之電子總成,其中晶粒附接膜為黏合劑。
實例13包括方法,該方法包括形成加強件帶,該加強件帶包括安裝帶。加強件可移除地附接至該安裝帶,且晶粒附接膜附接至該加強件。
實例14包括實例13之方法,且進一步包括將加強件帶附接至晶圓。
實例15包括實例13至14中任一項之方法,且進一步包括:在將加強件帶附接至晶圓之前,將背面研磨帶附接至該晶圓。
實例16包括實例13至15中任一項之方法,且進一步包括:在將背面研磨帶附接至晶圓之後,薄化該晶圓。
實例17包括實例13至16中任一項之方法,其中將加強件帶附接至晶圓包括將加強件帶附接至薄化的晶圓。
實例18包括實例13至17中任一項之方法,且進一步包括自薄化的晶圓移除背面研磨帶。
實例19包括實例13至18中任一項之方法,且進一步包括將晶圓切單。
實例20包括實例13至19中任一項之方法,其中將晶圓切單包括使用兩個切割刀片切割晶圓。
此概述意欲提供本發明主題之非限制性實例。此概述不意欲提供排他性的或詳盡的說明。包括詳細描述來提供關於方法之另外的資訊。
以上詳細描述包括對隨附圖式之參考,該等隨附圖式形成詳細描述之一部分。圖式藉由例示展示出特定實施例,本發明可在該等特定實施例中實踐。此等實施例在本文中亦被稱為「實例」。此類實例可包括除所展示或所描述之元件之外的元件。然而,本發明者亦想到提供所展示或所描述之元件的實例。此外,本發明者亦想到關於特定實例(或其一或多個態樣),或關於本文所展示或所描述之其他實例(或其一或多個態樣),使用所展示或所描述之元件(或其一或多個態樣)之任何組合或排列的實例。
在此文獻中,使用「一」或「一種」等詞(如專利文獻中常見的)以包括一個或一個以上,與「至少一個」或「一或多個」之任何其他實例或用法無關。在此文獻中,「或」一詞用以代表非排他性或,使得「A或B」包括「A而非B」、「B而非A」及「A及B」,除非另有指示。在此文獻中,「包括」及「其中」等詞被用作個別「包含」及「在
其中」等詞之簡明英語等效物。此外,在以下申請專利範圍中,「包括」及「包含」等詞係開放式的,亦即,包括除在請求項中於此術語之後列出之元件之外的元件之系統、設備、物件、成分、調配物或製程仍被視為落入該請求項之範疇內。此外,在以下申請專利範圍中,「第一」、「第二」及「第三」等詞僅用作標記,且並非意欲將數值要求強加於其物件。
以上描述意欲為例示性的,而非限制性的。例如,以上所描述之實例(或其一或多個態樣)可彼此組合地使用。另外,本文所描述之方法的順序可按准許製造電氣互連及/或包括電氣互連之封裝的任何順序。其他實施例可諸如由一般熟習此項技術者在回顧以上描述後使用。
提供摘要以遵守37 C.F.R.§1.72(b),以允許讀者快速確定技術揭示內容之本質。在理解摘要將不用來解釋或限制申請專利範圍之範疇或意義的情況下提交摘要。
此外,在以上詳細描述中,各種特徵可被集合在一起以使本揭示案合理化。不應將此解釋為意欲使未主張之揭示特徵對任何請求項為必不可少的。相反,發明主題可位於少於特定揭示實施例之所有特徵中。因此,以下申請專利範圍因此併入詳細描述中,其中每一請求項獨立地作為單獨的實施例,且設想此等實施例可在各種組合或排列中彼此組合。本發明之範疇以及等效物之全部範疇應參閱隨附申請專利範圍來確定,此等請求項授予該等等效物權利。
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10‧‧‧加強件帶
11‧‧‧安裝帶
12‧‧‧加強件
13‧‧‧晶粒附接膜
14‧‧‧卷
Claims (22)
- 一種用於一晶圓之加強件帶,該加強件帶包含:一安裝帶;一金屬加強件,其可移除地附接至該安裝帶;以及一晶粒附接膜,其附接至該金屬加強件,其中該安裝帶、該晶粒附接膜以及該金屬加強件被形成為一卷。
- 如請求項1之加強件帶,其中該安裝帶為一聚合物膜。
- 如請求項1之加強件帶,其中該晶粒附接膜為一黏合劑。
- 如請求項1之加強件帶,其中該金屬加強件為一金屬箔。
- 如請求項1之加強件帶,其中該金屬加強件之一尺寸大於該晶圓之一尺寸。
- 如一種電子總成,其包含:一晶圓;一加強件帶,其附接至該晶圓,其中該加強件帶包括安裝至該晶圓之一晶粒附接膜、附接至該晶粒附接膜之一加強件以及可移除地附接至該加強件之一安裝帶。
- 如請求項6之電氣總成,其中該安裝帶為一聚合物膜。
- 如請求項6之電氣總成,其中該晶圓由矽層及金屬層形成。
- 如請求項6之電氣總成,其中該加強件為一金屬箔。
- 如請求項6之電氣總成,其中該加強件之一尺寸大於該晶圓之一尺寸。
- 如請求項6之電氣總成,其中該晶粒附接膜為一黏合劑。
- 一種用以形成用於一晶圓之一加強件帶的方法,其包含將一加強件帶形成為一卷,其中該加強件帶包括一安裝帶、可移除地附接至該安裝帶之一金屬加強件以及附接至該金屬加強件之一晶粒附接膜。
- 如請求項12之方法,其進一步包含:展開該加強件帶之該卷;以及將該加強件帶附接至該晶圓。
- 如請求項13之方法,其進一步包含:在將該加強件帶附接至該晶圓之前,將一背面研磨帶附接至該晶圓。
- 如請求項14之方法,其進一步包含:在將該背面研磨帶附接至該晶圓之後,薄化該晶圓。
- 如請求項15之方法,其中將該加強件帶附接至該晶圓包括將該加強件帶附接至該薄化的晶圓。
- 如請求項16之方法,其進一步包含自該薄化的晶圓移除該背面研磨帶。
- 如請求項13之方法,其進一步包含將該晶圓切單(singulating)。
- 如請求項18之方法,其中將該晶圓切單包括使用兩個切割刀片切割該晶圓。
- 一種用以形成用於一晶圓之一加強件帶的方法,其包含:形成一加強件帶,其包括一安裝帶、可移除地附接至該安裝帶之一金屬加強件以及附接至該金屬加強件之一晶粒附接膜;以及 將該加強件帶附接至該晶圓。
- 如請求項20之方法,其進一步包含:在將該加強件帶附接至該晶圓之前,將一背面研磨帶附接至該晶圓。
- 如請求項20之方法,其進一步包含:在將該背面研磨帶附接至該晶圓之後,薄化該晶圓;自該薄化的晶圓移除該背面研磨帶;以及將該晶圓切單。
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TW201206813A (en) * | 2010-08-11 | 2012-02-16 | Furukawa Electric Co Ltd | Wafer processing tape |
US20130249079A1 (en) * | 2012-03-21 | 2013-09-26 | Stats Chippac, Ltd. | Semiconductor Device and Method of Singulating Semiconductor Wafer along Modified Region within Non-Active Region Formed by Irradiating Energy through Mounting Tape |
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US9607965B2 (en) * | 2013-09-25 | 2017-03-28 | STATS ChipPAC Pte. Ltd. | Semiconductor device and method of controlling warpage in reconstituted wafer |
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20010051395A1 (en) * | 2000-02-24 | 2001-12-13 | Grigg Ford B. | Tape stiffener, semiconductor device assemblies including same, and stereolithographic methods for fabricating same |
US20110189835A1 (en) * | 2010-02-01 | 2011-08-04 | Yuki Sugo | Film for manufacturing semiconductor device and method of manufacturing semiconductor device |
TW201206813A (en) * | 2010-08-11 | 2012-02-16 | Furukawa Electric Co Ltd | Wafer processing tape |
US20130249079A1 (en) * | 2012-03-21 | 2013-09-26 | Stats Chippac, Ltd. | Semiconductor Device and Method of Singulating Semiconductor Wafer along Modified Region within Non-Active Region Formed by Irradiating Energy through Mounting Tape |
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US9793151B2 (en) | 2017-10-17 |
TW201622043A (zh) | 2016-06-16 |
US20160172229A1 (en) | 2016-06-16 |
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