TWI604638B - Thyristor,thyristor manufacation method and print head - Google Patents

Description

Brake fluid, thyristor manufacturing method and print head thereof

The present invention relates to a thyristor, and more particularly to an illuminable thyristor, a method of manufacturing a thyristor, and a printhead and printing apparatus including the same.

In general, the principle of the photocopier is to first add a charge to the surface of the drum. Then, the image data of the file to be printed processed by the processor is irradiated onto the photosensitive drum, and the unexposed area maintains the original potential, but the charge of the exposed area is different due to the exposure. Then, when the rotating photosensitive drum passes through the toner cartridge, since the toner has the same electric charge as that of the photosensitive drum, the exposed area absorbs the charged toner, thereby producing an image.

The print head of the current common photocopier has a plurality of thyristors. Generally, light emitted from these thyristors is irradiated onto the photosensitive drum to cause the photosensitive drum to produce an exposed area and an unexposed area. In general, the structure of a conventional thyristor has four layers of semiconductor layers and has an emission wavelength of about 780 nm. However, when the light emitted by the conventional thyristor enters the outside world (for example, air), it tends to have a large interfacial reflection due to the high refractive index of the III-V semiconductor, resulting in only a part of the thyristor. Can enter the air, making the luminous efficiency low.

An embodiment of the invention provides a thyristor comprising a substrate, a transparent conductive layer, and a light guiding layer. The substrate includes a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, and a fourth semiconductor layer, wherein a top surface of the fourth semiconductor layer includes a light exit surface. The transparent conductive layer is disposed on the top surface of the fourth semiconductor layer, and the transparent conductive layer covers the light surface. The light guiding layer is on the transparent conductive layer. Wherein, the refractive index of the transparent conductive layer is smaller than the refractive index of the fourth semiconductor layer, and the refractive index of the light guiding layer is less than or equal to the refractive index of the transparent conductive layer.

The invention provides a method for manufacturing a thyristor, comprising: forming a transparent conductive layer on a substrate; depositing a light guiding layer on the transparent conductive layer; wherein a refractive index of the transparent conductive layer is smaller than a fourth semiconductor layer, and a refractive index of the light guiding layer Less than or equal to the refractive index of the transparent conductive layer.

In summary, the embodiment of the present invention provides a thyristor, including a substrate, a transparent conductive layer, and a light guiding layer, wherein the transparent conductive layer is disposed on the fourth semiconductor layer of the substrate, and the light guiding layer is located above the transparent conductive layer. . The refractive index of the transparent conductive layer is smaller than the fourth semiconductor layer of the substrate, and the refractive index of the light guiding layer is less than or equal to the refractive index of the transparent conductive layer. Therefore, compared with the conventional sluice fluid, the fourth semiconductor layer, the transparent conductive layer and the light guiding layer are sequentially stacked according to the refractive index, so that the interface reflection is reduced, which is beneficial to the thyristor. Light can effectively enter the outside world, thereby increasing the light extraction rate of the thyristor.

In addition, since the illuminating wavelength of the thyristor is about 780 nm, preferably, the light guiding layer may be a zinc oxide nanorod or a nanometer cone, and the diameter is between 100 micrometers (μm) and 200 micrometers (μm). The height is between 400 micrometers (μm) and 1000 micrometers (μm) so that the emitted light energy is not lost.

A method of manufacturing a thyristor according to a first embodiment of the present invention includes forming a front transparent conductive layer on a substrate. A layer of ruthenium dioxide is deposited to cover at least a portion of the substrate. An opening is formed on the upper surface of the ceria layer, and the position of the opening corresponds to the position of the pre-transparent conductive layer to expose a portion of the pre-transparent transparent conductive layer. Then, a rear transparent conductive layer is formed through the opening to contact the front transparent conductive layer to form a transparent conductive layer. The light guiding layer is deposited on the transparent conductive layer. However, in order to enable the light guiding layer to be preferably disposed on the transparent conductive body, a seed layer may be formed on the transparent conductive layer before depositing the light guiding layer.

Embodiments of the present invention provide a printing apparatus, wherein the printing apparatus includes a printing head. The print head includes an array structure of a plurality of wafers containing the aforementioned thyristor.

1 is a schematic view showing the structure of a thyristor according to an embodiment of the present invention. Referring to FIG. 1 , the thyristor 100 includes a substrate 110 , a transparent conductive layer 120 , and a light guiding layer 130 . The transparent conductive layer 120 is on the substrate 110, and the light guiding layer 130 is on the transparent conductive layer 120. The light guide layer 130 is provided with a cathode electrode C1, a gate G1 is provided on the top surface of the substrate 110, and an anode electrode A1 is provided on the back surface of the substrate 110.

The substrate 110 includes a first semiconductor layer 111, a second semiconductor layer 112, a third semiconductor layer 113, and a fourth semiconductor layer 114. In the present embodiment, the first semiconductor layer 111 is used as a substrate, and the second semiconductor layer 112, the third semiconductor layer 113, and the fourth semiconductor layer 114 are sequentially stacked thereon, wherein the top surface of the fourth semiconductor layer 114 The 114S includes a glazing surface.

It should be noted that the first semiconductor layer 111 and the third semiconductor layer 113 have the same conductivity type, and are all of the first conductivity type. The second semiconductor layer 112 and the fourth semiconductor layer 114 have the same conductivity type, and both are of the second conductivity type, and the first conductivity type and the second conductivity type have opposite conductivity. It should be noted that the first conductivity type is mainly a p-type semiconductor doped with a second group element, and the second conductivity type is mainly an n-type semiconductor doped with a fourth group element. However, in other embodiments, the first conductivity type may also be an n-type semiconductor, and the second conductivity type may also be a p-type semiconductor. Therefore, a P-N junction can be formed between each of the semiconductor layers (the first to fourth semiconductor layers 111, 112, 113, 114).

For example, the first semiconductor layer 111 is a p-type GaAs substrate, the second semiconductor layer 112 is an n-type AlGaAs layer, the third semiconductor layer 113 is a p-type AlGaAs layer, and the fourth semiconductor layer 114 is an n-type GaAs layer. However, the present invention does not limit the conductivity type and material of each of the semiconductor layers (first to fourth semiconductor layers 111, 112, 113, 114).

The transparent conductive layer 120 is disposed on the top surface 114S of the fourth semiconductor layer 114 and covers the light surface. The light guiding layer 130 is located on the transparent conductive layer 120. It should be noted that the refractive index of the transparent conductive layer 120 is smaller than the refractive index of the fourth semiconductor layer 114, and the refractive index of the light guiding layer 130 is less than or equal to the refractive index of the transparent conductive layer 120. In practice, the material of the transparent conductive layer 120 is selected from the group consisting of indium tin oxide (ITO), zinc oxide (ZnO), gallium oxide (GaO), zinc gallium oxide (GZO), indium zinc gallium oxide (IGZO), and tin oxide (SnO). ₂ ) One of a group consisting of indium oxide (In ₂ O ₃ ). Further, the light guiding layer 130 may be a nanometer made of one selected from the group consisting of zinc oxide (ZnO), zinc gallium oxide (GZO), and indium zinc gallium oxide (IGZO). Rod or nano cone. It should be noted that the material of the transparent conductive layer 120 may be the same as or different from the material of the light guiding layer 130. The invention is not limited thereto.

If the material of the transparent conductive layer 120 is different from the material of the light guiding layer, the thyristor 100 may further include the seed layer 140 so that the light guiding layer 130 can be preferably disposed on the transparent conductive body 120. The seed layer 140 is disposed between the transparent conductive layer 120 and the light guiding layer 130 to serve as a buffer layer to reduce lattice defects such as misalignment caused by lattice mismatch between the transparent conductive layer 120 and the light guiding layer 130.

Specifically, the transparent conductive layer 120 includes a front transparent conductive layer 121 and a rear transparent conductive layer 122. The front transparent conductive layer 121 and the rear transparent conductive layer 122 are formed through different process steps. The thickness of the front transparent conductive layer 121 and the rear transparent conductive layer 122 is between 100 micrometers (μm) and 400 micrometers (μm). Since the illuminating wavelength of the thyristor 100 is about 780 nm, the light guiding layer 130 may preferably be a zinc oxide nanorod and have a diameter between 100 micrometers (μm) and 200 micrometers (μm), and the height is between Between 400 micrometers (μm) and 1000 micrometers (μm) so that the emitted light energy is not lost. In addition, the material of the seed layer 140 includes zinc. In the present embodiment, the material of the seed layer 140 is aluminum zinc oxide (AZO), and the thickness thereof is between 10 micrometers (μm) and 100 micrometers (μm).

In the present embodiment, the material of the fourth semiconductor layer 114 is an n-type GaAs layer having a refractive index of about 3.5. The material of the transparent conductive layer 120 is indium tin oxide having a refractive index of about 2.06. The material of the second transparent conductor 130 is zinc oxide, and its refractive index is about 1.9. Therefore, compared with the conventional sluice fluid, since the fourth semiconductor layer 114, the transparent conductive layer 120, and the light guiding layer 130 are sequentially stacked according to the refractive index, the interface reflection is reduced, which facilitates the gate. The light generated by the fluid 100 can effectively enter the outside (for example, air), thereby increasing the light extraction efficiency of the thyristor.

2A to 2H are respectively schematic views of a method of manufacturing a thyristor according to an embodiment of the present invention. Please refer to FIG. 2A to 2H in order.

First, referring to FIG. 2A, a front transparent conductive layer 121 is formed on the substrate 110. In practice, the indium tin oxide layer is formed entirely on the top surface 114S of the fourth semiconductor layer 114 by Electron Beam Evaporation (EBE). Next, the position of the transparent conductive layer 120 is defined by a photomask (not shown), and the pre-transparent conductive layer 121 is first formed on the indium tin oxide layer by etching. It should be noted that the substrate 110 includes a first semiconductor layer 111, a second semiconductor layer 112, a third semiconductor layer 113, and a fourth semiconductor layer 114, wherein the top surface 114S of the fourth semiconductor layer 114 includes a light exit surface. In the present embodiment, the first semiconductor layer 111 is a p-type GaAs substrate, the second semiconductor layer 112 is an n-type AlGaAs layer, the third semiconductor layer 113 is a p-type AlGaAs layer, and the fourth semiconductor layer 114 is an n-type GaAs. Floor. However, the present invention does not limit the conductivity type and material of each of the semiconductor layers (first to fourth semiconductor layers 111, 112, 113, 114).

Referring to FIG. 2B, the position of the gate G1 is defined in advance by a mask (not shown), and a portion of the fourth semiconductor layer 114 is correspondingly removed by etching.

Referring to FIG. 2C, in order to make a better ohmic contact between the metal and the semiconductor interface, an ohmic contact layer F1 can be formed at the pre-defined gate G1 position. Therefore, the method of manufacturing the thyristor 100 may further include forming the ohmic contact layer F1. In the present embodiment, the material of the ohmic contact layer F1 is AuBe, and can be fabricated by a lift off process. However, the present invention does not limit the material and process of the ohmic contact layer F1. In detail, the photoresist is coated first, and the AuBe material is formed on the photoresist by electron beam evaporation. Next, exposure and development are performed using a photomask (not shown). Thereafter, the remaining photoresist is removed to form an AuBe layer. After annealing (annealing), the ohmic contact layer F1 is formed.

Referring to FIG. 2D, a layer of germanium dioxide S1 is deposited. The ruthenium dioxide layer S1 covers at least the second to fourth semiconductor layers (112, 113, 114), a portion of the first semiconductor layer 111, the ohmic contact layer F1, and the pre-transparent conductive layer 121.

Referring to FIG. 2E, an opening H1 and an opening H2 are formed on the upper surface of the ceria layer S1. The position of the opening H1 corresponds to the position of the pre-transparent conductive layer 121 to expose a portion of the pre-transparent transparent conductive layer 121, and the position of the opening H2 corresponds to the position of the ohmic contact layer F1 to expose a portion of the ohmic contact layer F1.

Referring to FIG. 2F, a rear transparent conductive layer 122 is formed. Specifically, the indium tin oxide layer is entirely formed on the ceria layer S1 by electron beam evaporation, and the pre-transparent conductive layer 121 is covered through the opening H1. Next, the position of the rear transparent conductive layer 122 is defined by a photomask (not shown), and the rear transparent conductive layer 122 is formed on the indium tin oxide layer by etching. The rear transparent conductive layer 122 is in contact with the front transparent conductive layer 121 through the opening H1 to form the transparent conductive layer 120.

Referring to FIG. 2G, in order to enable the light guiding layer 130 to be disposed on the transparent conductive layer 120, the seed layer 140 may be formed on the transparent conductive layer 120 before depositing the light guiding layer 130 to reduce the transparent conductive layer 120 and the conductive layer. Lattice defects such as misalignment caused by lattice mismatch between the layers of the optical layer 130. Specifically, the seed layer 140 may deposit a zinc-containing material on the transparent conductive layer 120 through an Atomic Layer Deposition (ALD) process. In the present embodiment, the material of the seed layer 140 is aluminum silicate (AZO) having a thickness of between 10 micrometers (μm) and 100 micrometers (μm).

Next, referring to FIG. 2H, a light guiding layer 130 is deposited on the transparent conductive layer 120. In detail, the light guiding layer 130 may be formed on the seed layer 140 by chemical vapor deposition or hydrothermal method. In the present embodiment, the light guiding layer 130 is a zinc oxide nano rod or a nano cone, and is produced by a hydrothermal method. Specifically, a precursor solution was prepared by mixing hexamethylenetetramine (HMTA) with Zinc acetate (0.08 mol). Next, a portion of the precursor solution is dropped through the dropper to the surface of the seed layer 140, or is inverted, so that the seed layer 140 contacts the precursor solution. The processing temperature is between greater than 70 degrees Celsius and less than 100 degrees Celsius, and the processing time is between 30 minutes and 90 minutes. However, the present invention does not limit the conditions under hydrothermal treatment. Accordingly, a zinc oxide nanorod or a nanometer cone is formed on the seed layer 140, and the diameter of the zinc oxide nanorod or the nanometer cone is between 100 micrometers (μm) and 200 micrometers (μm), and the height is between Between 400 micrometers (μm) and 1000 micrometers (μm).

It should be noted that the refractive index of the transparent conductive layer 120 is smaller than that of the fourth semiconductor layer 114, and the refractive index of the light guiding layer 130 is less than or equal to the refractive index of the transparent conductive layer 120. Therefore, compared with the conventional sluice fluid, since the fourth semiconductor layer 114, the transparent conductive layer 120, and the light guiding layer 130 are sequentially stacked according to the refractive index, the interface reflection is reduced, which facilitates the gate. The light generated by the fluid 100 can effectively enter the outside, thereby increasing the light extraction rate of the thyristor.

Referring again to FIG. 1, a cathode electrode C1 is disposed on the light guiding layer 130, a gate G1 is provided on the top surface of the substrate 110, and an anode electrode A1 is disposed on the back surface of the substrate 110. Specifically, the material of the cathode electrode C1 and the gate electrode G1 is aluminum, and can be fabricated by a lift-off process. In detail, the photoresist is coated first, and the aluminum material is formed on the photoresist by electron beam evaporation. Next, exposure and development are performed using a photomask (not shown). Then, the remaining photoresist is removed to form the cathode electrode C1 and the gate G1. The cathode electrode C1 may be in contact with the transparent conductive layer 120 or may further cover a portion of the light guiding layer 130. The gate G1 can be in contact with and electrically connected to the ohmic contact layer F1 through the opening H2. The material of the anode electrode is chromium gold (CrAu), and a chromium gold material is formed on the back surface of the substrate 110 by electron beam evaporation to form an anode electrode A1. However, the present invention does not limit the materials and processes of the cathode electrode C1, the anode electrode A1, and the gate G1.

It should be specially stated that, in practice, part of the ceria layer S1 may be retained or removed according to the requirements of the back end product. Therefore, for convenience of explanation and illustration, the ceria layer S1 is not shown in FIG. However, in practice, the thyristor 100 may also include a layer of cerium oxide S1. The present invention does not limit the ruthenium dioxide layer S1.

3A is a schematic view showing the structure of a print head according to an embodiment of the present invention. 3B is a top plan view of a wafer in accordance with an embodiment of the present invention. The print head 1 includes an array structure of a plurality of wafers 10 containing a thyristor 100, wherein the wafers 10 can be aligned along an axis L1. Specifically, each wafer 10 includes hundreds of linearly arranged thyristors 100. The first semiconductor layers 111 of the plurality of thyristors 100 may be the same. That is, a larger first semiconductor layer 111 can be used as a substrate, and the second semiconductor layer 112, the third semiconductor layer 113, and the fourth semiconductor layer 114 are sequentially stacked thereon to form a PNPN structure.

3C is a circuit diagram of a wafer in accordance with an embodiment of the present invention. As shown in FIG. 3C, the wafer 10 includes a shift circuit CT1 and a light-emitting circuit CT2. The shift circuit CT1 includes a plurality of shift thyristors TS (TS1, TS2, TS3, and TS4, etc., collectively referred to as TS), a plurality of diodes D (D1, D2, D3, and D4, etc., collectively referred to as D) and a plurality of shifts Signal line (here, two shift signal lines φ1, φ2 are taken as an example). The light-emitting circuit CT2 includes a plurality of thyristors 100 and a light-emission control line φI1.

It is worth noting that the plurality of shift thyristors TS can be divided into a plurality of groups by interval regions. In the present embodiment, an odd number of shift thyristors (TS1, TS3, etc.) are grouped (hereinafter referred to as "odd array"), and an even number of shift thyristors TS (TS2, TS4, etc.) are grouped (hereinafter referred to as a group). "even array"). Each of the diodes D is electrically connected between two adjacent displacement thyristors TS, respectively. Each of the shift signal lines is electrically connected to the shift thyristor TS belonging to one of the groups. For example, the shift signal line φ1 is electrically connected to each of the shift gate fluids (TS1, TS3, etc.) of the odd array; the shift signal line φ2 is electrically connected to each of the shift gate fluids of the even array (TS1, TS3, etc.) .

Each of the shifting thyristors TS includes a first anode end 31, a first cathode end 32, and a first gate end 33; each thyristor 100 includes a second anode end 34, a second cathode end 35, and a second gate end 36. The shift thyristor TS and the thyristor 100 electrically connected to each other are electrically connected to the first gate terminal 33 and the second gate terminal 36, respectively. The two ends of each of the diodes D are electrically connected to the first gate terminals 33 of the two adjacent displacement thyristors TS, respectively.

Specifically, the anode end of the diode D1 is electrically connected to the first gate terminal 33 of the displacement thyristor TS1, and the cathode end thereof is electrically connected to the first gate terminal 33 of the other thyristor TS2. Each of the shifting thyristors TS is electrically connected to the corresponding shift signal line with its first cathode end 32, and the first anode end 31 of each of the shift thyristors TS is grounded. Similarly, the second cathode end 35 of each thyristor 100 is electrically coupled to the illuminating control line φI1 and the second anode end 34 of each thyristor 100 is grounded.

The shift circuit CT1 further includes a pull-down signal line V _GA , a start signal line φS, and a plurality of load resistors (R1, R2, R3, and R4, etc., collectively referred to as R). The first gate terminal 33 of each of the shift thyristors TS is electrically connected to the load resistor R (for example, the first gate terminal 33 of the shift thyristor T1 is electrically connected to the load resistor R1). One end of the load resistor R is electrically connected to the first gate terminal 33, and the other end is electrically connected to the pull signal line V _GA . The pull-down signal line V _GA provides a pull-down low voltage level (here, a negative potential) to the load resistor R, and is provided between the first gate terminal 33 and the first anode terminal 31 of the shifting thyristor TS that is being actuated. Forward bias. The start signal line φS is electrically connected to the first gate terminal 33 of the first shift thyristor TS1 to feed a single pulse that triggers the shift circuit CT1 to sequentially shift.

FIG. 3D is a schematic diagram of a signal of a wafer according to an embodiment of the present invention, showing a signal timing relationship fed by the signal line or the control line. Please refer to Figure 3D. After the start signal line φS feeds a single pulse, the two shift signal lines φ1, φ2 respectively feed pulse signals having substantially the same pulse width and phase differences of about 90 to 180 degrees. Thereby, with the shift circuit CT1, the first cathode end 32 of the shift thyristor TS can be sequentially changed to a low voltage level along the forward conduction direction of the diode D. Since the second gate terminal 36 of the thyristor 100 is connected to the first gate terminal 33 of the sluice gate fluid TS, the second gate terminal 36 of the thyristor 100 can also follow the sluice gate fluid TS in sequence. And when the first cathode end 32 of the next shift thyristor TS (or the second cathode end 35 of the luminescent thyristor L) becomes a low voltage level for a period of time, the first cathode end of the previous shift thyristor TS 32 (or the second cathode end 35 of the thyristor 100) returns to a high voltage level. Here, the high voltage level described herein is the ground level (ie, 0 volts), and the low voltage level is the negative voltage level (eg, -5 volts).

Each thyristor 100 is electrically connected to each of the sluice gate fluids TS. The thyristor 100 is configured to emit light and is electrically connected to the illuminating control line φI1 to be controlled by the signal on the illuminating control line φI1.

4A is a schematic structural view of a printing apparatus according to an embodiment of the invention. 4B is a schematic view showing the photosensitive device of the printing apparatus according to an embodiment of the present invention. Please refer to FIG. 4A and FIG. 4B. The printing device M1 includes a printing head 1, a photosensitive drum 2, and a lens 3. The lens 3 is located between the printing head 1 and the photosensitive drum 2 for focusing the light emitted from the printing head 1 on the photosensitive drum 2 for performing an exposure process. It should be noted that the number of the print head 1, the photosensitive drum 2, and the lens 3 may each be one for black and white printing. However, the number of the print head 1, the photosensitive drum 2, and the lens 3 may be four, respectively, for color printing applications corresponding to black, magenta, cyan, and yellow, respectively. The printing device can be a printer, a photocopier, a multifunction printer, or the like. However, the invention is not limited thereto.

In summary, the embodiments of the present invention provide a thyristor including a substrate, a transparent conductive layer, and a light guiding layer. Wherein, the transparent conductive layer is disposed on the fourth semiconductor layer of the substrate, and the light guiding layer is located above the transparent conductive layer. The refractive index of the transparent conductive layer is smaller than the fourth semiconductor layer of the substrate, and the refractive index of the light guiding layer is less than or equal to the refractive index of the transparent conductive layer. Therefore, compared with the conventional sluice fluid, the fourth semiconductor layer, the transparent conductive layer and the second transparent conductor are sequentially stacked according to the magnitude of the refractive index, so that the interface reflection is reduced, which facilitates the thyristor. The generated light can effectively enter the outside world, thereby increasing the light extraction rate of the thyristor.

In addition, since the illuminating wavelength of the thyristor is about 780 nm, preferably, the light guiding layer may be a zinc oxide nanorod or a nanometer cone, and the diameter is between 100 micrometers (μm) and 200 micrometers (μm). The height is between 400 micrometers (μm) and 1000 micrometers (μm) so that the emitted light energy is not lost.

A method of manufacturing a thyristor according to a first embodiment of the present invention includes forming a front transparent conductive layer on a substrate. The ruthenium dioxide layer S1 is deposited to cover at least a portion of the substrate. An opening is formed on the upper surface of the ceria layer S1, and the position of the opening corresponds to the position of the pre-transparent conductive layer to expose a portion of the pre-transparent transparent conductive layer. Then, a rear transparent conductive layer is formed through the opening to contact the front transparent conductive layer to form a transparent conductive layer. The light guiding layer is deposited on the transparent conductive layer. However, in order to enable the light guiding layer to be preferably disposed on the transparent conductive body, a seed layer may be formed on the transparent conductive layer before depositing the light guiding layer.

Embodiments of the present invention provide a printing apparatus, wherein the printing apparatus includes a printing head. The print head includes an array structure of a plurality of wafers containing the aforementioned thyristor.

Although the technical content of the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the present invention, and any modifications and refinements made by those skilled in the art without departing from the spirit of the present invention are encompassed by the present invention. The scope of protection of the present invention is therefore defined by the scope of the appended claims.

1‧‧‧Print head

2‧‧‧Photosensitive drum

3‧‧‧ lens

10‧‧‧ wafer

31‧‧‧First anode end

32‧‧‧First cathode end

33‧‧‧The first gate extreme

34‧‧‧Second anode end

35‧‧‧second cathode end

36‧‧‧second gate extreme

100‧‧‧ thyristor

110‧‧‧Substrate

111‧‧‧First semiconductor layer

112‧‧‧Second semiconductor layer

113‧‧‧ third semiconductor layer

114‧‧‧fourth semiconductor layer

114S‧‧‧ top surface

120‧‧‧ Transparent conductive layer

121‧‧‧front transparent conductive layer

122‧‧‧After transparent conductive layer

130‧‧‧Light guide layer

140‧‧‧ seed layer

A1‧‧‧Anode electrode

C1‧‧‧Cathode electrode

CT1‧‧‧ Shift circuit

CT2‧‧‧Lighting circuit

D, D1, D2, D3, D4‧‧‧ diodes

F1‧‧‧ Ohmic contact layer

G1‧‧‧ gate

H1‧‧‧ openings

H2‧‧‧ opening

M1‧‧‧Printing device

TS1, TS2, TS3, TS4, TS‧‧‧ Displacement brake fluid

R, R1, R2, R3, R4‧‧‧ load resistors

S1‧‧‧ cerium oxide layer

φI1‧‧‧Lighting control line

Φ1, φ2 shift signal line

Φs‧‧‧ starting signal line

V _GA ‧‧‧ pulldown signal line

1 is a schematic view showing the structure of a thyristor according to an embodiment of the present invention. 2A to 2H are respectively schematic views of a method of manufacturing a thyristor according to an embodiment of the present invention. 3A is a schematic view showing the structure of a print head according to an embodiment of the present invention. 3B is a top plan view of a wafer in accordance with an embodiment of the present invention. 3C is a circuit diagram of a wafer in accordance with an embodiment of the present invention. FIG. 3D is a schematic diagram of signals of a wafer according to an embodiment of the invention. 4A is a schematic structural view of a printing apparatus according to an embodiment of the invention. 4B is a schematic view showing the photosensitive device of the printing apparatus according to an embodiment of the present invention.

100‧‧‧ thyristor

110‧‧‧Substrate

111‧‧‧First semiconductor layer

112‧‧‧Second semiconductor layer

113‧‧‧ third semiconductor layer

114‧‧‧fourth semiconductor layer

120‧‧‧Transparent conductive layer

121‧‧‧front transparent conductive layer

122‧‧‧After transparent conductive layer

130‧‧‧Light guide layer

140‧‧‧ seed layer

A1‧‧‧Anode electrode

C1‧‧‧Cathode electrode

F1‧‧‧ Ohmic contact layer

G1‧‧‧ gate

Claims (12)

A thyristor comprising: a substrate comprising a first semiconductor layer, a second semiconductor layer, a third semiconductor layer and a fourth semiconductor layer, wherein a top surface of the fourth semiconductor layer comprises a light emitting surface a transparent conductive layer disposed on the top surface of the fourth semiconductor layer, wherein the transparent conductive layer covers the light exiting surface, wherein the transparent conductive layer has a refractive index smaller than a refractive index of the fourth semiconductor layer; a layer on the transparent conductive layer, the light guide layer having a refractive index less than or equal to a refractive index of the transparent conductive layer; and a sub-layer between the transparent conductive layer and the light guiding layer. The thyristor according to claim 1, wherein the material of the light guiding layer is selected from the group consisting of zinc oxide (ZnO), zinc gallium oxide (GZO), and indium zinc gallium oxide (IGZO). material. The thyristor of claim 2, wherein the light guiding layer is a nanorod or a nanometer cone. The thyristor of claim 1, wherein the material of the seed layer comprises an oxide containing zinc. The thyristor of claim 1, wherein the first semiconductor layer and the third semiconductor layer are of a first conductivity type, the second semiconductor layer and the fourth semiconductor layer are of a second conductivity type, and the first conductivity type It is opposite to the conductivity of the second conductivity type. The thyristor according to claim 1, wherein the material of the transparent conductive layer is selected from the group consisting of indium tin oxide (ITO), zinc oxide (ZnO), gallium oxide (GaO), zinc gallium oxide (GZO), indium zinc gallium oxide. One of a group consisting of (IGZO), tin oxide (SnO ₂ ), and indium oxide (In ₂ O ₃ ). A method of manufacturing a thyristor, comprising: providing a substrate, wherein the substrate comprises a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, and a fourth semiconductor layer; forming a substrate a transparent conductive layer, wherein a top surface of the fourth semiconductor layer includes a light emitting surface, and the transparent conductive layer is located on the fourth semiconductor and covers the light emitting surface; and a light guiding layer is deposited on the transparent conductive layer, wherein The transparent conductive layer has a refractive index smaller than the fourth semiconductor layer, and the refractive index of the light guiding layer is less than or equal to a refractive index of the transparent conductive layer; and a sub-layer is formed on the transparent conductive layer before depositing the light guiding layer On the layer, the seed layer is between the transparent conductive layer and the light guiding layer. . The method of manufacturing a thyristor according to claim 7, wherein the seed layer is formed by an atomic layer deposition process (ALD). The method of manufacturing a thyristor according to claim 7, wherein the light guiding layer is formed by chemical vapor deposition or hydrothermal method. The method for manufacturing a thyristor according to claim 7, wherein the step of forming the transparent conductive layer comprises: forming a pre-transparent transparent conductive layer on the substrate; depositing a cerium oxide layer covering at least a portion of the substrate and the a pre-transparent conductive layer; forming an opening at a position corresponding to the pre-transparent conductive layer of the ceria layer, the opening exposing a portion of the pre-transparent conductive layer; Forming a rear transparent conductive layer, at least covering the front transparent conductive layer through the opening to form the transparent conductive layer. A print head comprising: an array structure comprising a plurality of wafers comprising a plurality of thyristors, wherein the thyristors comprise: a substrate comprising a first semiconductor layer, a second semiconductor layer, and a third semiconductor And a fourth semiconductor layer, wherein a top surface of the fourth semiconductor layer includes a light emitting surface; a transparent conductive layer disposed on the top surface of the fourth semiconductor layer, and the transparent conductive layer covers the light emitting layer a refractive index of the transparent conductive layer is smaller than a refractive index of the fourth semiconductor layer; a light guiding layer is disposed on the transparent conductive layer, and a refractive index of the light guiding layer is less than or equal to a refractive index of the transparent conductive layer; And a sublayer between the transparent conductive layer and the light guiding layer. The print head of claim 11, wherein the thyristor further comprises a light guiding layer, wherein the light guiding layer is located on the transparent conductive layer, and the refractive index of the light guiding layer is less than or equal to the refractive index of the transparent conductive layer rate.