TWI603661B - Porefilling method for circuit board and circuit board made there from - Google Patents

Description

Circuit board filling method and circuit board made thereof

The present invention relates to a circuit board, and more particularly to a method of filling a circuit board and a circuit board produced thereby.

At present, common electronic products, such as mobile phones and notebook computers, are becoming more and more dense in the overall packaging module density under the trend of miniaturization. As a result, electronic products are becoming more and more functional, and the power consumed is also increasing, so that electronic products generate a lot of heat during operation, thereby increasing the temperature of electronic products. Accordingly, in order to reduce the reliability of the electronic product due to the excessive temperature, the copper column (or thick circuit) is usually designed as a heat dissipation path of the electronic component in the circuit board.

For example, please refer to FIG. 1, which is a conventional circuit board 100a, which comprises a board 1a and an electroplated body 2a. The plate 1a has a uniform hole 11a, and the plated body 2a is formed in the through hole 11a to provide heat dissipation. However, when plating is performed in the through hole 11a of the plate 1a to fill the through hole 11a, the plating body 2a is often formed with the void 200a, and the highly corrosive plating solution 300a remains in the gap 200a. At this time, after the circuit board 100a is used for a long time or repeatedly subjected to thermal expansion and contraction, the plating body 2a often fails to cover the plating solution 300a in the gap 200a, thereby causing the plating solution 300a to flow out and damaging the wiring on the circuit board 100a. Electronic component. Wherein, the circuit board 100a forms the gap 200a during plating, especially when the aperture of the through hole 11a is large (for example, greater than 0.15 mm) or the depth of the hole is deep (for example, greater than 0.25 mm). produce.

Therefore, the present inventors have felt that the above-mentioned deficiencies can be improved, and they have devoted themselves to research and cooperated with the application of the theory, and finally proposed a present invention which is reasonable in design and effective in improving the above-mentioned defects.

The embodiment of the invention provides a method for filling holes of a circuit board and a circuit board thereof, thereby effectively improving a situation in which a through hole of a conventional circuit board forms a gap during plating.

The embodiment of the invention provides a method for filling a circuit board, comprising: providing a board, wherein the board comprises a first substrate, a second substrate, and a plating between the first substrate and the second substrate a layer of a uniform hole penetrating through the first substrate, the plating layer, and the second substrate, and a plating layer is disposed on the sidewall of the through hole, wherein the conductive layer is electrically connected to the layer a portion of the first substrate and the second substrate that are opposite to each other are processed by non-chemical etching, so that the first substrate and the second substrate are respectively formed with a exposed portion of the plating layer. a first opening and a second opening, wherein the surface of the plating layer exposed in the first opening and the second opening is defined as a first plating surface and a second plating surface, respectively; Electroplating is performed in the first opening and the second opening, and plating is performed from the first plating surface and the second plating surface substantially opposite to each other until the first opening and the second opening are plated Full to form a solid and run through A heat conducting column material.

The embodiment of the present invention further provides a circuit board formed by the hole filling method of the above circuit board, comprising: a board comprising a first substrate, a second substrate, and the first substrate and the second a first plating hole and a second opening hole respectively forming a portion of the plating layer; wherein the first substrate and the second substrate are respectively formed with a first opening and a second opening; wherein the first opening and the first opening are The surface of the plating layer of the second opening is defined as a first plating surface and a second plating surface respectively; a first conductive body is plated on the first plating surface and fills the first opening of the first substrate And a second conductive body plated on the second plating surface and filling the second opening of the second substrate, And the first conductive body, the second conductive body, and the portion of the plating layer between the first conductive body and the second conductive body are collectively defined as a heat conducting column.

In summary, the method for filling a circuit board and the circuit board formed by the embodiment of the present invention are provided with a plating layer to divide a conventional through hole into a first opening and a second opening. And plating is performed in a direction in which the first and second plating faces of the circuit layer are substantially opposite to each other, so that the first and second openings can be filled without voids, thereby effectively improving the conventional circuit board. The through hole forms a void during plating.

The detailed description of the present invention and the accompanying drawings are to be understood by the claims The scope is subject to any restrictions.

[Prior technology]

100a‧‧‧ boards

1a‧‧‧ plates

11a‧‧‧Tongkong

2a‧‧‧Electroplating

200a‧‧‧ gap

300a‧‧‧ plating solution

[Embodiment of the Invention]

1‧‧‧ plates

11‧‧‧First substrate

111‧‧‧First opening

112‧‧‧First reserved area

12‧‧‧second substrate

121‧‧‧Second opening

122‧‧‧Second reserved area

13‧‧‧Electroplating

131‧‧‧First plating surface

132‧‧‧Second plating surface

14‧‧‧First metal layer

141‧‧‧First conductive layer

1411‧‧‧ first opening

1412‧‧‧First plating site

15‧‧‧Second metal layer

151‧‧‧Second conductive layer

1511‧‧‧second opening

1512‧‧‧Second plating part

16‧‧‧through holes

2‧‧‧Electric layer

3‧‧‧First mask layer

31‧‧‧ first through hole

4‧‧‧Second mask layer

41‧‧‧Second through hole

5‧‧‧First conductor

6‧‧‧Second conductor

P‧‧‧thermal column

Figure 1 is a schematic diagram of a conventional circuit board.

2 is a schematic diagram of step S101 of the first embodiment of the method for filling holes of the circuit board of the present invention (also shown as a schematic diagram of step S201 of the second embodiment).

FIG. 3 is a schematic diagram of step S102 of the first embodiment of the method for filling holes of the circuit board of the present invention (also shown as a schematic diagram of step S202 of the second embodiment).

4 is a schematic diagram of step S103 of the first embodiment of the method for filling holes of the circuit board of the present invention.

FIG. 5 is a schematic diagram of step S104 of the first embodiment of the method for filling holes of the circuit board of the present invention.

FIG. 6 is a schematic diagram of step S105 of the first embodiment of the hole filling method of the circuit board of the present invention.

FIG. 7 is a schematic diagram of step S203 of the second embodiment of the hole filling method of the circuit board of the present invention.

FIG. 8 is a schematic diagram of step S204 of the second embodiment of the method for filling holes of the circuit board of the present invention.

FIG. 9 is a schematic diagram of step S205 of the second embodiment of the hole filling method of the circuit board of the present invention.

FIG. 10 is a schematic diagram of step S302 of the third embodiment of the hole filling method of the circuit board of the present invention.

FIG. 11 is a schematic diagram of step S303 of the third embodiment of the hole filling method of the circuit board of the present invention.

FIG. 12 is a schematic diagram of step S304 of the third embodiment of the hole filling method of the circuit board of the present invention.

[First Embodiment]

Please refer to FIG. 2 to FIG. 6 , which are the first embodiment of the present invention. It should be noted that the related quantities and appearances mentioned in the embodiment are only used to specifically describe the implementation of the present invention. The manner in which the content is understood is not to be construed as limiting the scope of the invention.

This embodiment provides a hole filling method for a circuit board. For ease of understanding, this embodiment takes a unit area of the circuit board as an example, and a cross-sectional view of each step is used for explanation. In addition, when referring to the drawings corresponding to each step, please refer to the drawings of other steps as needed. The steps of the hole filling method for the circuit board of this embodiment are roughly as follows:

Step S101: As shown in FIG. 2, a plate 1 is provided, wherein the plate 1 includes a first substrate 11, a second substrate 12, and a plating layer 13 between the first substrate 11 and the second substrate 12. a first metal layer 14 disposed on an outer surface of the first substrate 11 (such as a top surface of the first substrate 11 in FIG. 2) and an outer surface of the second substrate 12 (such as the second substrate 12 in FIG. 2) a second metal layer 15 of the bottom surface). The thickness of the plating layer 13 is smaller than the thickness of the first substrate 11 and smaller than the thickness of the second substrate 12.

In more detail, the first substrate 11 and the second substrate 12 are generally formed of a preimpregnated material, and the prepreg layer may be a glass fiber prepreg (Glass fiber) according to different reinforcing materials. Prepreg), carbon fiber prepreg, epoxy resin (Epoxy resin) and other materials. However, the first substrate 11 and the second substrate 12 may also be formed of a soft plate material, that is, the first substrate 11 and the second substrate 12 are mostly made of a polyester material (Polyester, PET) or a polyfluorene. The imine resin (Polyimide, PI) is composed of no glass fiber, carbon fiber or the like. Furthermore, the first metal layer 14, the second metal layer 15, and the plating layer 13 are formed of a metal foil, and the metal foil is, for example, a copper foil (copper). Foil). The above is the description of the board selected for the embodiment, but in practical applications, the type of the board is not limited to the conditions of the embodiment.

Step S102: As shown in FIG. 3, a uniform hole 16 penetrating through the first metal layer 14, the first substrate 11, the plating layer 13, the second substrate 12, and the second metal layer 15 is formed on the plate material 1 and plated. A power conducting layer 2 is disposed on the hole wall of the through hole 16 , and the power conducting layer 2 is electrically connected to the plating layer 13 .

The first metal layer 14 and the second metal layer 15 on the outer surface of the first substrate 11 and the second substrate 12 are respectively patterned to form a first conductive layer 141 and a second conductive layer 151, in other words, first The conductive layer 141 and the second conductive layer 151 may be circuit patterns required by the designer, but are not limited thereto. The first conductive layer 141 and the second conductive layer 151 are respectively formed with a first opening 1411 and a second opening 1511, and the first opening 1411 and the second opening 1511 are respectively exposed to a portion of the outer surface of the first substrate 11 and The outer surface of the second substrate 12.

Then, the outer surface of the first substrate 11 and the outer surface of the second substrate 12 are exposed by the first opening 1411 and the second opening 1511 and are opposite to each other, and are processed by non-chemical etching, respectively. A first opening 111 and a second opening 121 are formed in a substrate 11 and a second substrate 12 respectively. In other words, the first opening 111 and the second opening 121 are completely separated by the plating layer 13 and cannot communicate with each other. The surface of the plating layer 13 exposed on the first opening 111 and the second opening 121 is defined as a first plating surface 131 and a second plating surface 132, respectively.

Furthermore, the apertures of the first opening 111 and the second opening 121 are smaller than the apertures of the first opening 1411 and the second opening 1511, respectively, and accordingly, the outer surfaces of the first substrate 11 and the second substrate 12 are respectively left. A first reserved area 112 and a second reserved area 122 are exposed through the first opening 1411 and the second opening 1511. The first reserved area 112 is located between the sidewall of the first opening 1411 and the sidewall of the first opening 111, and the second reserved area 122 is equivalent to the second reserved area 122. The sidewall of the opening 1511 is between the sidewall of the second opening 121 and the sidewall of the second opening 121.

In more detail, the thickness of the sheet material 1 in the embodiment is greater than 0.3 mm, and the apertures of the first opening 111 and the second opening 121 are each formed to be greater than 0.2 mm, but not limited thereto. That is to say, the method of the present embodiment is applicable to sheets of various thicknesses and openings of various sizes. The apertures of the first opening 111 and the second opening 121 are the same in this embodiment, but the apertures of the first opening 111 and the second opening 121 can also be adjusted according to the needs of the designer. Different from each other.

Step S103: As shown in FIG. 4, a first mask layer 3 and a second mask layer 4 are formed to cover a portion of the first conductive layer 141 and a portion of the second conductive layer 151, respectively, to expose the adjacent first opening 111. The first conductive layer 141 portion and the second conductive layer 151 portion adjacent to the second opening 121 are exposed. That is, the first mask layer 3 and the second mask layer 4 do not cover the first conductive layer 141 portion adjacent to the first reserved region 112 and the second conductive layer adjacent to the second reserved region 122. 151 parts. The first conductive layer 141 adjacent to the first opening 111 (or the first reserved area 112) is defined as a first plating portion 1412, and the adjacent second opening 121 (or the second reserved area 122) The second conductive layer 151 portion is defined as a second plating portion 1512.

Specifically, the first mask layer 3 is formed with a first through hole 31 that communicates with the first opening 1411 and the first opening 111, and the second mask layer 4 is formed with the second opening 1511 and the second opening. A second through hole 41 of the hole 121, and the apertures of the first through hole 31 and the second through hole 41 are larger than the apertures of the first opening 1411 and the second opening 1511, respectively. Thereby, the first reserved area 112 and the first plated portion 1412 can be communicated to the outside through the first through hole 31 without being shielded by the first mask layer 3; likewise, the second reserved area 122 and The second plating portion 1512 can communicate with the outside through the second through hole 41 without being shielded by the second mask layer 4.

The first mask layer 3 and the second mask layer 4 may be an anti-etching dry film, a photo resist, or other insulating material. Moreover, neither the first mask layer 3 nor the second mask layer 4 covers the surface of the plating layer 13 exposed by the first opening 111 and the second opening 121 (ie, the first plating surface 131 and the first 2 plating surface 132).

Step S104: As shown in FIG. 5, an electric current is applied to the electrified layer 2 and shielded by the first mask layer 3 and the second mask layer 4 to perform electroplating in the first opening 111 and the second opening 121. And plating from the first plating surface 131 and the second plating surface 132 in substantially opposite directions to each other until the first opening 111 and the second opening 121 are plated, and then plating on the first conductive layer 141 a plating portion 1412 and a second plating portion 1512 of the second conductive layer 151, thereby forming a first conductive body 5 connected to the first conductive layer 141 and the plating layer 13, and forming a second conductive layer 151 and a plating layer 13 a second conductor 6.

In more detail, the copper metal is plated with the first opening 111, the first opening 1411, and the first through hole 31 by electroplating, thereby forming a solid first conductor 5; similarly, the copper metal is plated. The second opening 121, the second opening 1511, and the second through hole 41 are formed to form a solid second conductor 6. In this embodiment, after the first conductive body 5 and the second conductive body 6 are formed in this step S104, the first mask layer 3 and the second mask layer 4 are slightly protruded respectively. That is, the first conductor 5 and the second conductor 6 can completely cover the first reserved area 112 and the second reserved area 122, respectively, so that the first conductor 5 and the second conductor 6 are The first plating portion 1412 of the first conductive layer 141 and the second plating portion 1512 of the second conductive layer 151 are respectively connected without a gap.

Furthermore, the materials of the first conductor 5, the second conductor 6, and the plating layer 13 are the same in the present embodiment (for example, copper), and therefore, the first conductor 5, the second conductor 6, And the portion of the plating layer 13 between the first conductor 5 and the second conductor 6 can be collectively defined as a heat conducting column P, and the heat conducting column P is solid and penetrates the sheet 1.

Step S105: removing the first mask layer 3 and the second mask layer 4 as shown in FIG. 6, since the first mask layer 3 and the second mask layer 4 may be anti-etching dry film (anti-etching) Dry film) or photo resist, so it can be removed through an aqueous solution containing sodium hydroxide. Next, the first conductor 5 and the second conductor 6 are ground to be substantially coplanar with the first conductive layer 141 and the second conductive layer 151, respectively. Specifically, the tips of the first conductor 5 and the second conductor 6 may be ground by a belt grinder to form the first conductor 5 and the second conductor 6 whose top surface is flat. Further, the tips of the first conductor 5 and the second conductor 6 are ground to be substantially coplanar with the outer surfaces of the first conductive layer 141 and the second conductive layer 151.

It should be noted that, in the respective steps described in this embodiment, the order of the steps can be adjusted under reasonable circumstances. In other words, the present embodiment is not limited to the above-described sequence of steps.

In addition, the present embodiment provides a circuit board 100 (FIG. 6) formed through the above steps. The following description will be made on the circuit board 100 shown in FIG. Among them, since many configurations have been mentioned in the above manufacturing method, some of the similarities will not be repeated.

The circuit board 100 includes a board 1, a first conductor 5, and a second conductor 6. a first substrate 11 and a second substrate 12, a plating layer 13 between the first substrate 11 and the second substrate 12, a first conductive layer 141 disposed on the outer surface of the first substrate 11, and A second conductive layer 151 is disposed on the outer surface of the second substrate 12. The first substrate 11 and the second substrate 12 are respectively formed with a first opening 111 and a second opening 121 of the portion of the plating layer 13 and are exposed to the first opening 111 and the second opening 121. The surface of the plating layer 13 is defined as a first plating surface 131 and a second plating surface 132, respectively.

The first conductive body 5 is plated with the first plating surface 131 and fills the first opening 111 of the first substrate 11 , and the second conductive body 6 is plated with the second plating surface 132 and fills the second surface. The second opening 121 of the substrate 12. Wherein, the first conductor 5, the second conductor 6, and the portion of the plating layer 13 between the first conductor 5 and the second conductor 6 are collectively defined as a heat conducting column P, and the opposite two of the heat conducting columns P The outer surface is coplanar with the first conductive layer 141 and the second conductive layer 151, respectively.

[Second embodiment]

Please refer to FIG. 7 to FIG. 9 , which are the second embodiment of the present invention. It should be noted that the related numbers and appearances mentioned in the embodiments are only used to specifically describe the implementation of the present invention. The manner in which the content is understood is not to be construed as limiting the scope of the invention.

The embodiment also provides a hole filling method for the circuit board. The same as the first embodiment, the details are not described herein again. For example, the steps S201 and S202 of the embodiment are the same as the steps S101 and the steps of the first embodiment. S102, thus not described below). The steps related to the hole filling method of the circuit board of this embodiment are different from the related steps of the first embodiment.

Step S203: forming a first mask layer 3 and a second mask layer 4 completely covering the first conductive layer 141 and the second conductive layer 151, respectively, and exposing the first opening 111 and The second opening 121. The first mask layer 3 and the second mask layer 4 respectively cover the first reserved area 112 and the second reserved area 122. Specifically, the first mask layer 3 is formed with a first through hole 31 that communicates with the first opening 111, and the second mask layer 4 is formed with a second through hole 41 that communicates with the second opening 121. The apertures of the first through hole 31 and the second through hole 41 are substantially equal to the apertures of the first opening 111 and the second opening 121, respectively.

Step S204: As shown in FIG. 8, an electric current is applied to the electrified layer 2 and shielded by the first mask layer 3 and the second mask layer 4 to perform electroplating in the first opening 111 and the second opening 121. And from the first plating surface 131 and the second plating surface 132 substantially toward the other side The opposite direction is electroplated until plating exceeds the first mask layer 3 and the second mask layer 4, thereby forming a first conductor 5 and a second conductor 6.

In more detail, the copper metal is plated with the first opening 111 and the first through hole 31 by electroplating to form a solid first conductor 5; likewise, the copper metal is plated with the second opening 121. And the second through hole 41, according to which a solid second conductor 6 is formed. In this embodiment, after the first conductive body 5 and the second conductive body 6 are formed in this step S204, the first mask layer 3 and the second mask layer 4 are slightly protruded respectively. That is, the first conductive body 5 and the second conductive body 6 are respectively transmitted through the first mask layer 3 and the second mask layer 4 to form a space between the first conductive layer 141 and the second conductive layer 151. Settings.

Furthermore, the materials of the first conductor 5, the second conductor 6, and the plating layer 13 are the same in the present embodiment (for example, copper), and therefore, the first conductor 5, the second conductor 6, And the portion of the plating layer 13 between the first conductor 5 and the second conductor 6 can be collectively defined as a heat conducting column P, and the heat conducting column P is solid and penetrates the sheet 1.

Step S205: removing the first mask layer 3 and the second mask layer 4 as shown in FIG. 9, since the first mask layer 3 and the second mask layer 4 may be anti-etching dry film (anti-etching) Dry film) or photo resist, so it can be removed through an aqueous solution containing sodium hydroxide. Next, the first conductor 5 and the second conductor 6 are ground to be substantially coplanar with the first conductive layer 141 and the second conductive layer 151, respectively. Specifically, the tips of the first conductor 5 and the second conductor 6 may be ground by a belt grinder to form the first conductor 5 and the second conductor 6 whose top surface is flat. Further, the tips of the first conductor 5 and the second conductor 6 are ground to be substantially coplanar with the outer surfaces of the first conductive layer 141 and the second conductive layer 151.

In addition, in each step described in the embodiment, the order of the steps can be adjusted under reasonable circumstances. In other words, the embodiment does not take the above steps. The sequence is limited.

In addition, the embodiment provides a circuit board 100 (FIG. 9) manufactured through the above steps, and the circuit board 100 shown in FIG. 9 is compared with the circuit shown in FIG. 6 in the first embodiment. The board 100, the difference between the two is described as a structural technical feature. Here, since many configurations have been mentioned in the above manufacturing method or the first embodiment, some of the same points will not be described again. Specifically, the difference between the circuit board 100 of the present embodiment and the first embodiment is mainly that the first conductive body 5 of the embodiment is not connected to the first conductive layer 141, and the second conductive body 6 is not It is connected to the second conductive layer 151.

[Third embodiment]

Please refer to FIG. 10 to FIG. 12 , which are the third embodiment of the present invention. It should be noted that the related embodiments refer to the related quantities and appearances of the drawings, and only specifically describe the implementation of the present invention. The manner in which the content is understood is not to be construed as limiting the scope of the invention.

The embodiment also provides a hole filling method for the circuit board, and the same as the first and second embodiments are not described again (for example, step S301 of the embodiment is the same as step S101 of the first embodiment, and thus Not stated in the following). The steps related to the hole filling method of the circuit board of this embodiment are different from the related steps of the first embodiment.

Step S302: as shown in FIG. 10, a uniform hole 16 penetrating through the first metal layer 14, the first substrate 11, the plating layer 13, the second substrate 12, and the second metal layer 15 is formed on the plate material 1 and plated. A power conducting layer 2 is disposed on the hole wall of the through hole 16 , and the power conducting layer 2 is electrically connected to the plating layer 13 .

Then, the portions of the outer surface of the first substrate 11 and the outer surface of the second substrate 12 are respectively processed by non-chemical etching to form a first substrate. A first opening 111 and a second opening 121 are formed in the first substrate 12 and the second substrate 12 respectively. In other words, the first opening 111 and the second opening 121 are completely separated by the plating layer 13 and cannot communicate with each other. The surface of the plating layer 13 exposed on the first opening 111 and the second opening 121 is defined as a first plating surface 131 and a second plating surface 132, respectively.

Step S303: As shown in FIG. 11, a first mask layer 3 and a second mask layer 4 are formed to cover the first metal layer 14 and the second metal layer 15, respectively, and the first opening 111 and the second opening are exposed. Opening 121. Specifically, the first mask layer 3 is formed with a first through hole 31 that communicates with the first opening 111, and the second mask layer 4 is formed with a second through hole 41 that communicates with the second opening 121. The apertures of the first through hole 31 and the second through hole 41 are respectively substantially equal to the apertures of the first opening 111 and the second opening 121.

The first mask layer 3 and the second mask layer 4 may be an anti-etching dry film, a photoresist, or other insulating material. Moreover, neither the first mask layer 3 nor the second mask layer 4 covers the surface of the plating layer 13 exposed by the first opening 111 and the second opening 121 (ie, the first plating surface 131 and the first 2 plating surface 132).

Step S304: As shown in FIG. 12, a current is applied to the conductive layer 2 and shielded by the first mask layer 3 and the second mask layer 4 to perform electroplating in the first opening 111 and the second opening 121. And plating from the first plating surface 131 and the second plating surface 132 substantially opposite to each other until the first opening 111 and the second opening 121 are plated to form a first conductor 5 and a second, respectively. Conductor 6.

In more detail, the copper metal is plated with the first opening 111 and the first through hole 31 by electroplating to form a solid first conductor 5; likewise, the copper metal is plated with the second opening 121. And the second through hole 41, according to which a solid second conductor 6 is formed. In this embodiment, after the first conductive body 5 and the second conductive body 6 are formed in this step S304, the first mask layer 3 and the second mask layer 4 are slightly protruded respectively.

Furthermore, the first conductor 5, the second conductor 6, and the material of the plating layer 13 The quality is the same in the embodiment (for example, copper), and therefore, the first conductor 5, the second conductor 6, and the portion of the plating layer 13 between the first conductor 5 and the second conductor 6 can be common. It is defined as a heat conducting column P, and the above heat conducting column P is solid and penetrates the sheet 1.

The product completed after the implementation of the above steps can be applied according to the designer's needs. For example, (not shown): after step S304, the first mask layer 3 and the second mask layer 4 are removed. The first conductor 5 and the second conductor 6 are ground to be substantially coplanar with the first metal layer 14 and the second metal layer 15, respectively. Thereafter, the first metal layer 14 and the second metal layer 15 on the outer surfaces of the first substrate 11 and the second substrate 12 are respectively patterned to form a first conductive layer 141 and a second conductive layer 151, in other words, The first conductive layer 141 and the second conductive layer 151 may be circuit patterns required by the designer, but are not limited thereto.

[Possible effects of the embodiments of the present invention]

In summary, the method for filling a circuit board and the circuit board formed by the embodiment of the present invention are provided with a plating layer to divide a conventional through hole into a first opening and a second opening. And plating is performed in a direction in which the first and second plating faces of the circuit layer are substantially opposite to each other, so that the first and second openings can be filled without voids, thereby effectively improving the conventional circuit board. The through hole forms a void during plating.

It should be noted that the hole filling method of the circuit board provided in this embodiment can be applied not only to plating through holes of various sizes, but also does not generate voids as in the prior art, especially in the case of a large size. In the case of holes, the plating effect of the hole filling method of the circuit board of the present embodiment is superior to the conventional hole plating.

The above are only the preferred embodiments of the present invention, and are not intended to limit the scope of the invention, and the equivalent variations and modifications of the scope of the invention are intended to be within the scope of the invention.

1‧‧‧ plates

11‧‧‧First substrate

111‧‧‧First opening

112‧‧‧First reserved area

12‧‧‧second substrate

121‧‧‧Second opening

122‧‧‧Second reserved area

13‧‧‧Electroplating

131‧‧‧First plating surface

132‧‧‧Second plating surface

141‧‧‧First conductive layer

1411‧‧‧ first opening

1412‧‧‧First plating site

151‧‧‧Second conductive layer

1511‧‧‧second opening

1512‧‧‧Second plating part

16‧‧‧through holes

2‧‧‧Electric layer

5‧‧‧First conductor

6‧‧‧Second conductor

P‧‧‧thermal column

Claims (9)

A method for filling a circuit board, comprising: providing a board, wherein the board comprises a first substrate, a second substrate, and a plating layer between the first substrate and the second substrate; Forming a continuous hole penetrating through the first substrate, the plating layer, and the second substrate, and plating a power-on layer on the sidewall of the through-hole, wherein the conductive layer is electrically connected to the plating layer; A portion of the first substrate outer surface and the second substrate outer surface opposite to each other is processed by a non-chemical etching method, so that the first substrate and the second substrate respectively form a first portion of the exposed portion of the plating layer. a hole and a second opening, wherein the surface of the plating layer exposed in the first opening and the second opening is defined as a first plating surface and a second plating surface, respectively; and applying a current to the power layer And plating in the first opening and the second opening, and plating from the first plating surface and the second plating surface substantially opposite to each other until the first opening and the second opening The opening is plated to form a solid a heat conducting column of the plate; wherein, before forming the first opening and the second opening, a first conductive layer and a first conductive layer are respectively disposed on an outer surface of the first substrate and an outer surface of the second substrate a second conductive layer; after forming the first opening and the second opening, forming a first mask layer covering a portion of the first conductive layer to expose the first conductive adjacent to the first opening a layer portion, wherein the first conductive layer portion adjacent to the first opening is defined as a first plating portion; and after the first opening is plated, the first plated on the first conductive layer is continued And plating a portion to form a first conductor connected to the first conductive layer and the plating layer. The method for filling a circuit board according to claim 1, wherein the thickness of the plate is greater than 0.3 mm; and in the step of forming the first opening and the second opening, the first opening and the The apertures of the second openings are each formed to be larger than 0.2 mm. The hole filling method of the circuit board of claim 2, wherein after forming the first opening and the second opening, forming a second mask layer covering a portion of the second conductive layer to expose the adjacent a portion of the second conductive layer of the second opening, wherein the second conductive layer portion adjacent to the second opening is defined as a second plating portion; and after the second opening is plated, the plating is continued And a second conductive portion disposed on the second conductive layer to form a second conductive body connected to the second conductive layer and the plating layer. The method for filling a circuit board according to claim 3, wherein after forming the first conductive body and the second conductive body, removing the first mask layer and the second mask layer, and grinding the The first conductor and the second conductor are substantially coplanar with the first conductive layer and the second conductive layer, respectively. The method for filling a circuit board according to claim 3, wherein the first conductor, the second conductor, and the plating layer are made of the same material. A method for filling a circuit board, comprising: providing a board, wherein the board comprises a first substrate, a second substrate, and a plating layer between the first substrate and the second substrate; Forming a continuous hole penetrating through the first substrate, the plating layer, and the second substrate, and plating a power-on layer on the sidewall of the through-hole, wherein the conductive layer is electrically connected to the plating layer; A portion of the first substrate outer surface and the second substrate outer surface opposite to each other is processed by a non-chemical etching method, so that the first substrate and the second substrate respectively form a first portion of the exposed portion of the plating layer. a hole and a second opening, wherein the surface of the plating layer exposed in the first opening and the second opening is defined as a first plating surface and a second plating surface, respectively; and applying a current to the power layer And plating in the first opening and the second opening, and plating from the first plating surface and the second plating surface substantially opposite to each other until the first opening and the second opening The opening is plated to form a solid The column through a heat conducting plate; The first metal layer and the second metal layer are respectively disposed on the outer surfaces of the first substrate and the second substrate before forming the first opening and the second opening; After the hole and the second opening, a first mask layer is formed to cover the first metal layer, and the first opening is exposed; when plating is performed in the first opening, until the plating exceeds the first cover a cap layer to form a first conductor; removing the first mask layer and grinding the first conductor to be substantially coplanar with the first conductive layer. The method of filling a circuit board according to claim 6, wherein the thickness of the plate is greater than 0.3 mm; and in the step of forming the first opening and the second opening, the first opening and the The apertures of the second openings are each formed to be larger than 0.2 mm. A circuit board made by the hole filling method of the circuit board of claim 6, comprising: a board comprising a first substrate, a second substrate, and the first substrate and the second substrate a first plating layer and a second opening hole respectively formed in the first substrate and the second substrate; wherein the first opening and the second opening are exposed; wherein the first opening and the second opening are exposed The surface of the plating layer of the opening is defined as a first plating surface and a second plating surface; a first conductive body is plated on the first plating surface and fills the first opening of the first substrate; And a second conductive body plated on the second plating surface and filling the second opening of the second substrate, and the first conductive body, the second conductive body, and the first conductive body are located The portion of the plating layer between the second conductors is defined as a heat conducting column, wherein the board has a first conductive layer and a second conductive layer, and the first conductive layer and the second conductive layer are respectively formed. On the outer surface of the first substrate and the second substrate, the opposite two of the heat conducting columns The outer surface is coplanar with the first conductive layer and the second conductive layer, respectively. The circuit board of claim 8, wherein the apertures of the first opening and the second opening are each greater than 0.2 mm, and the thickness of the plate is greater than 0.3 mm.