TWI585766B - Method for manufacturing electrode and resistive random access memory - Google Patents

Method for manufacturing electrode and resistive random access memory Download PDF

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TWI585766B
TWI585766B TW105106429A TW105106429A TWI585766B TW I585766 B TWI585766 B TW I585766B TW 105106429 A TW105106429 A TW 105106429A TW 105106429 A TW105106429 A TW 105106429A TW I585766 B TWI585766 B TW I585766B
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layer
vapor deposition
physical vapor
electrode
metal compound
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TW201732809A (en
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陳義中
彭徵安
張碩哲
溫松穎
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華邦電子股份有限公司
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電極的製造方法及電阻式隨機存取記憶體Electrode manufacturing method and resistive random access memory

本發明是有關於一種導電構件的製造方法與記憶體,且特別是有關於一種具有平整表面的電極的製造方法及以此方法製作下電極的電阻式隨機存取記憶體。The present invention relates to a method and a memory for manufacturing a conductive member, and more particularly to a method for fabricating an electrode having a flat surface and a resistive random access memory for fabricating a lower electrode in this manner.

近幾年來,伴隨著科技的進步與發達,越來越多的電子產品上市,其中記憶體扮演著不可或缺的重要角色。除了儲存使用者的資料,記憶體也負責存放中央處理器所執行的程式碼,以及運算過程中需暫時保存的訊息。於新一代非揮發性記憶體中,電阻式記憶體(RRAM)由於具備較簡單的結構、低功率消耗、高操作速度以及高密度整合等優點,為最受到關注的技術之一。電阻式記憶體包括金屬-絕緣體-金屬(MIM)結構,其可因施加電壓而可切換於高阻態(HRS)與低阻態(LRS)。In recent years, with the advancement and development of science and technology, more and more electronic products have been listed, and memory plays an indispensable role. In addition to storing the user's data, the memory is also responsible for storing the code executed by the central processing unit and the information that needs to be temporarily saved during the operation. Among the new generation of non-volatile memory, resistive memory (RRAM) is one of the most concerned technologies due to its simple structure, low power consumption, high operating speed and high-density integration. The resistive memory includes a metal-insulator-metal (MIM) structure that can be switched between a high resistance state (HRS) and a low resistance state (LRS) due to application of a voltage.

近年來針對電阻式記憶體的研究甚多,例如:介電層材料特性研究、熱退火特性研究以及電極材料特性研究等。常見被用來當作非揮發性記憶體的電極之材料有鉑(Pt)、鋁(Al)、銅(Au)等。其中,以一般物理氣相沉積法所形成的電極的粒界(grain boundary)相當明顯,因而在進行清洗製程的過程中,容易在電極中形成針孔(pin hole),而使得電極的表面粗糙,進而降低元件的電性表現。此外,以一般物理氣相沉積製程所形成的電極的含氧量較高,會導致元件的電性表現不佳。In recent years, there have been many researches on resistive memory, such as dielectric material material properties, thermal annealing properties, and electrode material properties. Commonly used as electrodes for non-volatile memory are platinum (Pt), aluminum (Al), copper (Au), and the like. Among them, the grain boundary of the electrode formed by the general physical vapor deposition method is quite obvious, so that a pin hole is easily formed in the electrode during the cleaning process, and the surface of the electrode is rough. , thereby reducing the electrical performance of the component. In addition, the electrode formed by the general physical vapor deposition process has a high oxygen content, which may result in poor electrical performance of the device.

此外,於電阻式記憶體中,對下電極的表面平整度要求較高,而一般採用化學機械研磨製程提升下電極的表面平整度。然而採用化學機械研磨製程將降低下電極的厚度,而影響元件的電性表現。In addition, in the resistive memory, the surface flatness of the lower electrode is required to be high, and the surface smoothness of the lower electrode is generally raised by a chemical mechanical polishing process. However, the use of a chemical mechanical polishing process will reduce the thickness of the lower electrode and affect the electrical performance of the component.

本發明提供一種電極的製造方法,其可形成表面平坦、細緻且具有足夠厚度的電極。The present invention provides a method of producing an electrode which can form an electrode having a flat surface, fineness, and a sufficient thickness.

本發明提供一種電阻式隨機存取記憶體,其下電極具有導電層與射頻物理氣相沉積過渡金屬化合物層,而使下電極表面平坦、細緻且具有足夠厚度,因而可具有較佳的電性表現。The invention provides a resistive random access memory, wherein a lower electrode has a conductive layer and a radio frequency physical vapor deposition transition metal compound layer, and the lower electrode surface is flat, fine and has a sufficient thickness, so that the electrode can have better electrical properties. which performed.

本發明提出一種電極的製造方法,包括下列步驟。在基材上形成導體層。使用射頻物理氣相沉積法在導體層上形成射頻物理氣相沉積過渡金屬化合物層。在射頻物理氣相沉積過渡金屬化合物層上形成犧牲層。進行平坦化製程,以移除犧牲層與部分射頻物理氣相沉積過渡金屬化合物層。The present invention provides a method of manufacturing an electrode comprising the following steps. A conductor layer is formed on the substrate. A radio frequency physical vapor deposition transition metal compound layer is formed on the conductor layer by radio frequency physical vapor deposition. A sacrificial layer is formed on the layer of the radio frequency physical vapor deposition transition metal compound. A planarization process is performed to remove the sacrificial layer and a portion of the RF physical vapor deposition transition metal compound layer.

依照本發明的一實施例所述,在上述之電極的製造方法中,導體層與犧牲層的材料例如是氮化鈦(TiN)、鈦(Ti)、氮化鉭(TaN)或其組合。According to an embodiment of the present invention, in the method of manufacturing the electrode, the material of the conductor layer and the sacrificial layer is, for example, titanium nitride (TiN), titanium (Ti), tantalum nitride (TaN), or a combination thereof.

依照本發明的一實施例所述,在上述之電極的製造方法中,導體層與犧牲層的形成方法例如是物理氣相沉積法或化學氣相沉積法。According to an embodiment of the present invention, in the method of manufacturing an electrode, the method of forming the conductor layer and the sacrificial layer is, for example, a physical vapor deposition method or a chemical vapor deposition method.

依照本發明的一實施例所述,在上述之電極的製造方法中,更包括在形成導體層之前,在基材上形成黏著層,黏著層的材料例如是鈦、鉭、氧化銦錫或其組合。According to an embodiment of the present invention, in the method for manufacturing an electrode, the method further includes forming an adhesive layer on the substrate before forming the conductive layer, and the material of the adhesive layer is, for example, titanium, tantalum, indium tin oxide or combination.

依照本發明的一實施例所述,在上述之電極的製造方法中,黏著層的形成方法例如是物理氣相沉積法或化學氣相沉積法。According to an embodiment of the present invention, in the method of manufacturing an electrode described above, the method of forming the adhesive layer is, for example, a physical vapor deposition method or a chemical vapor deposition method.

依照本發明的一實施例所述,上述之電極的製造方法可用於製作電阻式隨機存取記憶體(RRAM)的下電極。According to an embodiment of the invention, the method for fabricating the above electrode can be used to fabricate a lower electrode of a resistive random access memory (RRAM).

本發明提出一種電阻式隨機存取記憶體,包括基材、下電極、可變電阻層與上電極。下電極包括導體層與射頻物理氣相沉積過渡金屬化合物層。導體層設置於基材上。射頻物理氣相沉積過渡金屬化合物層設置於導體層上。可變電阻層設置於射頻物理氣相沉積過渡金屬化合物層上。上電極設置於可變電阻層上。The invention provides a resistive random access memory comprising a substrate, a lower electrode, a variable resistance layer and an upper electrode. The lower electrode includes a conductor layer and a radio frequency physical vapor deposition transition metal compound layer. The conductor layer is disposed on the substrate. The RF physical vapor deposition transition metal compound layer is disposed on the conductor layer. The variable resistance layer is disposed on the layer of the radio frequency physical vapor deposition transition metal compound. The upper electrode is disposed on the variable resistance layer.

依照本發明的一實施例所述,在上述之電阻式隨機存取記憶體中,下電極更包括黏著層。黏著層設置於基材與導體層之間。黏著層的材料例如是鈦、鉭、氧化銦錫或其組合。According to an embodiment of the invention, in the above resistive random access memory, the lower electrode further includes an adhesive layer. The adhesive layer is disposed between the substrate and the conductor layer. The material of the adhesive layer is, for example, titanium, tantalum, indium tin oxide or a combination thereof.

依照本發明的一實施例所述,在上述之電阻式隨機存取記憶體中,導體層的材料例如是氮化鈦、鈦、氮化鉭或其組合。According to an embodiment of the invention, in the resistive random access memory, the material of the conductor layer is, for example, titanium nitride, titanium, tantalum nitride or a combination thereof.

依照本發明的一實施例所述,在上述之電阻式隨機存取記憶體中,射頻物理氣相沉積過渡金屬化合物層的厚度可介於10奈米至20奈米之間。According to an embodiment of the invention, in the resistive random access memory, the thickness of the radio frequency physical vapor deposition transition metal compound layer may be between 10 nm and 20 nm.

基於上述,在本發明所提出的電極的製造方法中,由於可藉由犧牲層來提供平坦化製程所需的移除量,因此在利用平坦化製程移除犧牲層與部分射頻物理氣相沉積過渡金屬化合物層之後,可形成表面平坦、細緻且具有足夠厚度的射頻物理氣相沉積過渡金屬化合物層,進而可提升元件的電性表現。Based on the above, in the method for fabricating the electrode proposed by the present invention, since the sacrificial layer can be used to provide the removal amount required for the planarization process, the sacrificial layer and part of the radio frequency physical vapor deposition are removed by the planarization process. After the transition metal compound layer, a radio frequency physical vapor deposition transition metal compound layer having a flat surface, fineness and sufficient thickness can be formed, thereby improving the electrical performance of the element.

此外,在本發明所提出的電阻式隨機存取記憶體中,由於下電極為具有導體層與射頻物理氣相沉積過渡金屬化合物層的多層結構,因此電阻式隨機存取記憶體可具有較佳的電性表現。In addition, in the resistive random access memory of the present invention, since the lower electrode is a multilayer structure having a conductor layer and a radio frequency physical vapor deposition transition metal compound layer, the resistive random access memory can be preferably provided. Electrical performance.

為讓本發明的上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。The above described features and advantages of the invention will be apparent from the following description.

圖1A至1B圖為本發明一實施例的電極製造流程剖面圖。1A to 1B are cross-sectional views showing a manufacturing process of an electrode according to an embodiment of the present invention.

請參照圖1A,可選擇性地在基材100上形成黏著層102。基材100可用以承載電極。基材100可為介電層、導體層或是具有上述膜層的基底,所屬技術領域具有通常知識者可依照產品設計需求來選擇基材100的態樣。Referring to FIG. 1A, an adhesive layer 102 can be selectively formed on the substrate 100. Substrate 100 can be used to carry an electrode. The substrate 100 can be a dielectric layer, a conductor layer, or a substrate having the above-described film layer. Those skilled in the art can select the aspect of the substrate 100 according to product design requirements.

黏著層102係選自與基材100附著性佳且與後續沉積的導體層104附著性佳的材料。黏著層102的材料例如是鈦、鉭、氧化銦錫或其組合。黏著層102的形成方法例如是物理氣相沉積法或化學氣相沉積法。The adhesive layer 102 is selected from materials having good adhesion to the substrate 100 and good adhesion to the subsequently deposited conductor layer 104. The material of the adhesive layer 102 is, for example, titanium, tantalum, indium tin oxide or a combination thereof. The method of forming the adhesive layer 102 is, for example, a physical vapor deposition method or a chemical vapor deposition method.

在黏著層102上形成導體層104。導體層104可用以降低電極阻抗。導體層104可為單層結構或多層結構。導體層104的材料例如是氮化鈦、鈦、氮化鉭或其組合。導體層104的形成方法例如是物理氣相沉積法或化學氣相沉積法。需注意的是,黏著層102亦可省略,而將導體層104直接地形成在基材100上。A conductor layer 104 is formed on the adhesive layer 102. Conductor layer 104 can be used to reduce electrode impedance. The conductor layer 104 may be a single layer structure or a multilayer structure. The material of the conductor layer 104 is, for example, titanium nitride, titanium, tantalum nitride or a combination thereof. The method of forming the conductor layer 104 is, for example, a physical vapor deposition method or a chemical vapor deposition method. It should be noted that the adhesive layer 102 may also be omitted, and the conductor layer 104 is directly formed on the substrate 100.

使用射頻物理氣相沉積法(radio frequency physical vapor deposition,RF PVD)在導體層104上形成射頻物理氣相沉積過渡金屬化合物層106。相對於物理氣相沉積過渡金屬化合物層與化學氣相沉積過渡金屬化合物層,射頻物理氣相沉積過渡金屬化合物層106具有較緻密的結構與較少的含氧量,因此具有較佳的電性。射頻物理氣相沉積過渡金屬化合物層106較不會因後續的清洗製程而在其中形成針孔,因而具有較平整的表面。過渡金屬化合物例如是氮化鈦。A radio frequency physical vapor deposition transition metal compound layer 106 is formed on the conductor layer 104 using radio frequency physical vapor deposition (RF PVD). The radio frequency physical vapor deposition transition metal compound layer 106 has a denser structure and less oxygen content than the physical vapor deposition transition metal compound layer and the chemical vapor deposition transition metal compound layer, and thus has better electrical properties. . The RF physical vapor deposition transition metal compound layer 106 is less likely to form pinholes therein due to subsequent cleaning processes and thus has a flatter surface. The transition metal compound is, for example, titanium nitride.

此外,當導體層104是使用物理氣相沉積法形成時,導體層104與射頻物理氣相沉積過渡金屬化合物層106可在同一物理氣相沉積機台的不同腔室中形成,因此無需更換機台即可形成導體層104與射頻物理氣相沉積過渡金屬化合物層106,而可有效地縮短製程時間。In addition, when the conductor layer 104 is formed by physical vapor deposition, the conductor layer 104 and the radio frequency physical vapor deposition transition metal compound layer 106 can be formed in different chambers of the same physical vapor deposition machine, so there is no need to change the machine. The conductor layer 104 and the radio frequency physical vapor deposition transition metal compound layer 106 can be formed in the stage, and the process time can be effectively shortened.

在射頻物理氣相沉積過渡金屬化合物層106上形成犧牲層108。犧牲層108可用以提供平坦化製程所需的移除量。犧牲層108可為單層結構或多層結構。犧牲層108的材料可以為導電材料,例如是氮化鈦、鈦、氮化鉭或其組合。犧牲層108的形成方法例如是物理氣相沉積法或化學氣相沉積法。A sacrificial layer 108 is formed on the radio frequency physical vapor deposition transition metal compound layer 106. The sacrificial layer 108 can be used to provide the amount of removal required for the planarization process. The sacrificial layer 108 may be a single layer structure or a multilayer structure. The material of the sacrificial layer 108 may be a conductive material such as titanium nitride, titanium, tantalum nitride or a combination thereof. The formation method of the sacrificial layer 108 is, for example, a physical vapor deposition method or a chemical vapor deposition method.

此外,當犧牲層108是使用物理氣相沉積法形成時,犧牲層108與射頻物理氣相沉積過渡金屬化合物層106可在同一物理氣相沉積機台的不同腔室中形成,因此無需更換機台即可形成犧牲層108與射頻物理氣相沉積過渡金屬化合物層106,而可有效地縮短製程時間。In addition, when the sacrificial layer 108 is formed using physical vapor deposition, the sacrificial layer 108 and the radio frequency physical vapor deposition transition metal compound layer 106 can be formed in different chambers of the same physical vapor deposition machine, so there is no need to change the machine. The sacrificial layer 108 and the radio frequency physical vapor deposition transition metal compound layer 106 can be formed, which can effectively shorten the process time.

請參照圖1B,進行平坦化製程,以移除犧牲層108與部分的射頻物理氣相沉積過渡金屬化合物層106,而形成表面平坦、結構細緻的射頻物理氣相沉積過渡金屬化合物層106a。此外,在進行平坦化製程的過程中,由於犧牲層108可提供平坦化製程所需的移除量,因此可使得所形成的射頻物理氣相沉積過渡金屬化合物層106a具有足夠的厚度,而能夠有效地展現其優異的電性。平坦化製程例如是化學機械研磨製程。舉例來說,射頻物理氣相沉積過渡金屬化合物層106a的厚度可大於10奈米,較佳地,可介於10至20奈米之間。Referring to FIG. 1B, a planarization process is performed to remove the sacrificial layer 108 and a portion of the RF physical vapor deposition transition metal compound layer 106 to form a planar, finely structured RF physical vapor deposition transition metal compound layer 106a. In addition, during the planarization process, since the sacrificial layer 108 can provide the removal amount required for the planarization process, the formed radio frequency physical vapor deposition transition metal compound layer 106a can have a sufficient thickness to enable Effectively exhibits its excellent electrical properties. The planarization process is, for example, a chemical mechanical polishing process. For example, the RF physical vapor deposition transition metal compound layer 106a may have a thickness greater than 10 nanometers, preferably between 10 and 20 nanometers.

此時,所形成的電極110包括依序堆疊設置的黏著層102、導體層104與經平坦化處理的射頻物理氣相沉積過渡金屬化合物層106a。電極110可用以作為各種半導體元件的電極。舉例來說,電極110可用以作為電阻式隨機存取記憶體的電極,如下電極。At this time, the formed electrode 110 includes the adhesive layer 102, the conductor layer 104 and the planarized radio frequency physical vapor deposition transition metal compound layer 106a which are sequentially stacked. The electrode 110 can be used as an electrode of various semiconductor elements. For example, the electrode 110 can be used as an electrode of a resistive random access memory, such as an electrode.

基於上述實施例可知,由於可藉由犧牲層108來提供平坦化製程所需的移除量,因此在利用平坦化製程移除犧牲層108與部分射頻物理氣相沉積過渡金屬化合物層106之後,可形成表面平坦、結構細緻且具有足夠厚度的射頻物理氣相沉積過渡金屬化合物層106a,進而可提升電極110的電性表現。Based on the above embodiments, since the removal amount required for the planarization process can be provided by the sacrificial layer 108, after the sacrificial layer 108 and the portion of the radio frequency physical vapor deposition transition metal compound layer 106 are removed by the planarization process, The radio frequency physical vapor deposition transition metal compound layer 106a having a flat surface, a fine structure, and a sufficient thickness can be formed, thereby improving the electrical performance of the electrode 110.

圖2為本發明一實施例的電阻式隨機存取記憶體的剖面圖。2 is a cross-sectional view showing a resistive random access memory according to an embodiment of the present invention.

請參照圖2,電阻式隨機存取記憶體10包括基材100、電極110、可變電阻層112與上電極114。Referring to FIG. 2, the resistive random access memory 10 includes a substrate 100, an electrode 110, a variable resistance layer 112, and an upper electrode 114.

圖2中的基材100的結構僅為舉例說明,但本發明並不以此為限,所屬技術領域具有通常知識者可依照產品設計需求來選擇基材100的態樣。在此實施例中,基材100可包括基底116、介電結構118、導體層120、插塞122與阻障層124。基底116例如是半導體基底,如矽基底。The structure of the substrate 100 in FIG. 2 is merely illustrative, but the invention is not limited thereto, and those skilled in the art can select the aspect of the substrate 100 according to product design requirements. In this embodiment, the substrate 100 can include a substrate 116, a dielectric structure 118, a conductor layer 120, a plug 122, and a barrier layer 124. Substrate 116 is, for example, a semiconductor substrate such as a germanium substrate.

介電結構118包括依序設置於基底116上的介電層118a~118c。介電層118a~118c的材料例如是氧化矽、氮化矽或氮氧化矽。介電層118a~118c的形成方法例如是熱氧化法或化學氣相沉積法。在此實施例中,介電結構118雖然是以三層為例來進行說明,但本發明並不以此為限。所述技術領域具有通常知識者可依照產品與製程需求來調整介電結構118的層數。Dielectric structure 118 includes dielectric layers 118a-118c that are sequentially disposed on substrate 116. The material of the dielectric layers 118a to 118c is, for example, hafnium oxide, tantalum nitride or hafnium oxynitride. The formation method of the dielectric layers 118a to 118c is, for example, a thermal oxidation method or a chemical vapor deposition method. In this embodiment, the dielectric structure 118 is described by taking three layers as an example, but the invention is not limited thereto. Those skilled in the art will be able to adjust the number of layers of dielectric structure 118 in accordance with product and process requirements.

導體層120設置於介電層118a上且位於介電層118b的開口119中。導體層120的材料例如是鋁或銅等金屬。導體層120的形成方法例如是金屬鑲嵌法。The conductor layer 120 is disposed on the dielectric layer 118a and in the opening 119 of the dielectric layer 118b. The material of the conductor layer 120 is, for example, a metal such as aluminum or copper. The method of forming the conductor layer 120 is, for example, a damascene method.

插塞122設置於導體層120上且位於介電層118c的開口121中。插塞122的材料例如是鎢或銅等金屬。插塞122的形成方法例如是金屬鑲嵌法。The plug 122 is disposed on the conductor layer 120 and in the opening 121 of the dielectric layer 118c. The material of the plug 122 is, for example, a metal such as tungsten or copper. The method of forming the plug 122 is, for example, a damascene method.

阻障層124設置於插塞122與介電層118c之間以及插塞122與導體層120之間。阻障層124的材料例如是氮化鈦、鈦或其組合。阻障層124的形成方法例如是物理氣相沉積法或化學氣相沉積法。The barrier layer 124 is disposed between the plug 122 and the dielectric layer 118c and between the plug 122 and the conductor layer 120. The material of the barrier layer 124 is, for example, titanium nitride, titanium, or a combination thereof. The formation method of the barrier layer 124 is, for example, a physical vapor deposition method or a chemical vapor deposition method.

電極110包括導體層104與射頻物理氣相沉積過渡金屬化合物層106a。電極110由上述電極的製造方法所製成。在此實施例中,電極110作為電阻式隨機存取記憶體10的下電極。導體層104設置於基材100上。射頻物理氣相沉積過渡金屬化合物層106a設置於導體層104上。此外,電極110更可包括黏著層102。黏著層102設置於基材100與導體層104之間。電極110中的黏著層102、導體層104與射頻物理氣相沉積過渡金屬化合物層106a的材料、形成方法與功效已於圖1的實施例中說明,故於此不再贅述。The electrode 110 includes a conductor layer 104 and a radio frequency physical vapor deposition transition metal compound layer 106a. The electrode 110 is made of the above-described method of manufacturing the electrode. In this embodiment, the electrode 110 serves as the lower electrode of the resistive random access memory 10. The conductor layer 104 is disposed on the substrate 100. The radio frequency physical vapor deposition transition metal compound layer 106a is disposed on the conductor layer 104. In addition, the electrode 110 may further include an adhesive layer 102. The adhesive layer 102 is disposed between the substrate 100 and the conductor layer 104. The materials, formation methods and effects of the adhesive layer 102, the conductor layer 104 and the radio frequency physical vapor deposition transition metal compound layer 106a in the electrode 110 have been described in the embodiment of FIG. 1, and thus will not be described again.

可變電阻層112設置於射頻物理氣相沉積過渡金屬化合物層106a上。可變電阻層112的材料例如是過渡金屬氧化物等可變電阻材料。過渡金屬氧化物例如是氧化鉿、氧化鈦、氧化鋯、氧化鋅或其他適當的金屬氧化物。可變電阻層112的形成方法例如是物理氣相沉積法、化學氣相沉積法或原子層沉積法。The variable resistance layer 112 is disposed on the radio frequency physical vapor deposition transition metal compound layer 106a. The material of the variable resistance layer 112 is, for example, a variable resistance material such as a transition metal oxide. The transition metal oxide is, for example, cerium oxide, titanium oxide, zirconium oxide, zinc oxide or other suitable metal oxide. The method of forming the variable resistance layer 112 is, for example, a physical vapor deposition method, a chemical vapor deposition method, or an atomic layer deposition method.

上電極114設置於可變電阻層112上,上電極114可為單層結構或多層結構。上電極114的材料例如是氮化鈦、氮化鉭、鈦或鉭。上電極114的形成方法例如是物理氣相沉積法或化學氣相沉積法。The upper electrode 114 is disposed on the variable resistance layer 112, and the upper electrode 114 may be a single layer structure or a multilayer structure. The material of the upper electrode 114 is, for example, titanium nitride, tantalum nitride, titanium or tantalum. The formation method of the upper electrode 114 is, for example, a physical vapor deposition method or a chemical vapor deposition method.

基於上述實施例可知,由於電極110為具有導體層104與射頻物理氣相沉積過渡金屬化合物層106a的多層結構,因此電阻式隨機存取記憶體10可具有較佳的電性表現。Based on the above embodiment, since the electrode 110 is a multi-layered structure having the conductor layer 104 and the radio frequency physical vapor deposition transition metal compound layer 106a, the resistive random access memory 10 can have better electrical performance.

綜上所述,上述實施例的電極的製造方法可形成表面平坦、結構細緻且具有足夠厚度的射頻物理氣相沉積過渡金屬化合物層,因此可有效地提升元件的電性表現。此外,上述實施例的電阻式隨機存取記憶體具有由上述多層結構所形成的下電極,因此可具有較佳的電性表現。In summary, the method for manufacturing the electrode of the above embodiment can form a radio frequency physical vapor deposition transition metal compound layer having a flat surface, a fine structure, and a sufficient thickness, thereby effectively improving the electrical performance of the device. Further, the resistive random access memory of the above embodiment has the lower electrode formed of the above-described multilayer structure, and thus can have a better electrical performance.

雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明的精神和範圍內,當可作些許的更動與潤飾,故本發明的保護範圍當視後附的申請專利範圍所界定者為準。Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any one of ordinary skill in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope of the invention is defined by the scope of the appended claims.

10‧‧‧電阻式隨機存取記憶體10‧‧‧Resistive random access memory

100‧‧‧基材100‧‧‧Substrate

102‧‧‧黏著層102‧‧‧Adhesive layer

104、120‧‧‧導體層104, 120‧‧‧ conductor layer

106、106a‧‧‧射頻物理氣相沉積過渡金屬化合物層106, 106a‧‧‧RF physical vapor deposition transition metal compound layer

108‧‧‧犧牲層108‧‧‧ Sacrifice layer

110‧‧‧電極110‧‧‧Electrode

112‧‧‧可變電阻層112‧‧‧Variable Resistance Layer

114‧‧‧上電極114‧‧‧Upper electrode

116‧‧‧基底116‧‧‧Base

118‧‧‧介電結構118‧‧‧Dielectric structure

118a~118c‧‧‧介電層118a~118c‧‧‧ dielectric layer

119、121‧‧‧開口119, 121‧‧‧ openings

122‧‧‧插塞122‧‧‧ Plug

124‧‧‧阻障層124‧‧‧Barrier layer

圖1A至1B圖為本發明一實施例的電極製造流程剖面圖。 圖2為本發明一實施例的電阻式隨機存取記憶體的剖面圖。1A to 1B are cross-sectional views showing a manufacturing process of an electrode according to an embodiment of the present invention. 2 is a cross-sectional view showing a resistive random access memory according to an embodiment of the present invention.

100‧‧‧基材 100‧‧‧Substrate

102‧‧‧黏著層 102‧‧‧Adhesive layer

104‧‧‧導體層 104‧‧‧Conductor layer

106a‧‧‧射頻物理氣相沉積過渡金屬化合物層 106a‧‧‧RF physical vapor deposition transition metal compound layer

110‧‧‧電極 110‧‧‧Electrode

Claims (10)

一種電極的製造方法,包括:在一基材上形成一導體層;使用射頻物理氣相沉積法在該導體層上形成一射頻物理氣相沉積過渡金屬化合物層;在該射頻物理氣相沉積過渡金屬化合物層上形成一犧牲層;以及進行一平坦化製程,以移除該犧牲層與部分該射頻物理氣相沉積過渡金屬化合物層。 An electrode manufacturing method comprising: forming a conductor layer on a substrate; forming a radio frequency physical vapor deposition transition metal compound layer on the conductor layer by radio frequency physical vapor deposition; and converting the radio frequency physical vapor deposition layer Forming a sacrificial layer on the metal compound layer; and performing a planarization process to remove the sacrificial layer and a portion of the radio frequency physical vapor deposition transition metal compound layer. 如申請專利範圍第1項所述的電極的製造方法,其中該導體層與該犧牲層的材料包括氮化鈦、鈦、氮化鉭或其組合。 The method of manufacturing an electrode according to claim 1, wherein the material of the conductor layer and the sacrificial layer comprises titanium nitride, titanium, tantalum nitride or a combination thereof. 如申請專利範圍第1項所述的電極的製造方法,其中該導體層與該犧牲層的形成方法包括物理氣相沉積法或化學氣相沉積法。 The method for producing an electrode according to claim 1, wherein the method of forming the conductor layer and the sacrificial layer comprises physical vapor deposition or chemical vapor deposition. 如申請專利範圍第1項所述的電極的製造方法,更包括在形成該導體層之前,在該基材上形成一黏著層,該黏著層的材料包括鈦、鉭、氧化銦錫或其組合。 The method for manufacturing an electrode according to claim 1, further comprising forming an adhesive layer on the substrate before forming the conductive layer, the material of the adhesive layer comprising titanium, tantalum, indium tin oxide or a combination thereof . 如申請專利範圍第4項所述的電極的製造方法,其中該黏著層的形成方法包括物理氣相沉積法或化學氣相沉積法。 The method for producing an electrode according to claim 4, wherein the method of forming the adhesive layer comprises physical vapor deposition or chemical vapor deposition. 如申請專利範圍第1項所述的電極的製造方法,其用於製作電阻式隨機存取記憶體的下電極。 The method for producing an electrode according to the first aspect of the invention, which is used for producing a lower electrode of a resistive random access memory. 一種電阻式隨機存取記憶體,包括: 一基材;一下電極,包括:一導體層,設置於該基材上;以及一射頻物理氣相沉積過渡金屬化合物層,設置於該導體層上;一可變電阻層,設置於該射頻物理氣相沉積過渡金屬化合物層上;以及一上電極,設置於該可變電阻層上,其中該導體層設置於該基材與該射頻物理氣相沉積過渡金屬化合物層之間。 A resistive random access memory comprising: a substrate; a lower electrode comprising: a conductor layer disposed on the substrate; and a radio frequency physical vapor deposition transition metal compound layer disposed on the conductor layer; a variable resistance layer disposed on the radio frequency physics And vapor-depositing the transition metal compound layer; and an upper electrode disposed on the variable resistance layer, wherein the conductor layer is disposed between the substrate and the radio frequency physical vapor deposition transition metal compound layer. 如申請專利範圍第7項所述的電阻式隨機存取記憶體,其中該下電極更包括一黏著層,該黏著層設置於該基材與該導體層之間,且該黏著層的材料包括鈦、鉭、氧化銦錫或其組合。 The resistive random access memory of claim 7, wherein the lower electrode further comprises an adhesive layer disposed between the substrate and the conductor layer, and the material of the adhesive layer comprises Titanium, tantalum, indium tin oxide or a combination thereof. 如申請專利範圍第7項所述的電阻式隨機存取記憶體,其中該導體層的材料包括氮化鈦、鈦、氮化鉭或其組合。 The resistive random access memory of claim 7, wherein the material of the conductor layer comprises titanium nitride, titanium, tantalum nitride or a combination thereof. 如申請專利範圍第7項所述的電阻式隨機存取記憶體,其中該射頻物理氣相沉積過渡金屬化合物層的厚度介於10奈米至20奈米之間。 The resistive random access memory according to claim 7, wherein the RF physical vapor deposition transition metal compound layer has a thickness of between 10 nm and 20 nm.
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