TWI581688B - Embedded component package structure and manufacturing method thereof - Google Patents

Description

Buried component packaging structure and manufacturing method thereof

The present invention relates to a package structure and a method of fabricating the same, and more particularly to a buried component package structure and a method of fabricating the same.

In recent years, in order to increase the application of printed circuit boards, many techniques have been used to fabricate printed circuit boards into a multi-layer circuit structure to increase the space of their internal wiring layout. The multi-layered wiring structure is formed by a layered structure composed of a copper foil and a prepreg, which are stacked and laminated on a core board to increase the internal wiring of the multilayer wiring structure. Layout space, and using a plating process to fill the blind holes in each build-up structure with a conductive material to conduct the layers. In addition, many different types of active or passive components can be placed in the line structure as needed to increase the use of the line structure.

Taking the active component in the circuit structure as an example, since the active component generates thermal energy during operation, the heat dissipating component is usually disposed on the outer surface of the circuit structure, and the heat sink and the active component are connected through the heat conduction path to make the active element The generated thermal energy can escape to the outside through conduction through the heat conduction path and the heat sink. Although the above heat dissipation method can derive the thermal energy generated by the active component from the inside of the circuit structure, directly disposing the heat dissipation component on the outer surface of the circuit structure causes an increase in the overall thickness of the circuit structure, which is inconsistent with the thin design requirements of the line structure. .

The invention provides a buried component packaging structure, has good heat dissipation efficiency, and meets the requirements of thin design.

The invention provides a manufacturing method of a buried component packaging structure, which can improve the manufacturing yield and reduce the overall thickness of the embedded component packaging structure.

The invention provides a buried component package structure, comprising a circuit substrate and a first package module. The circuit substrate includes a core dielectric layer and a first circuit layer. The core dielectric layer has a first surface, a second surface opposite to the first surface, a first through slot extending through the first surface and the second surface, and a first card slot on the first surface, wherein the first card slot is connected The first slot. The first circuit layer is on the first surface. The first package module is embedded in the first through slot and includes a carrier, a first component, and a heat dissipating component. The carrier board is engaged with the first card slot. The first component is placed on the carrier. The heat dissipating component is coupled to the first component, wherein the first component is between the carrier and the heat dissipating component.

In an embodiment of the invention, the heat dissipating component is exposed to the second surface. The core dielectric layer further has at least one second through-channel extending through the first surface and the second surface, the embedded package structure further comprising at least one second package module embedded in the at least one second through slot, wherein the at least the foregoing a second package module includes two stacked on each other The second component.

In an embodiment of the invention, the upper surface of the heat dissipating component is flush with the second surface.

In an embodiment of the invention, the first component has an active component surface, a back surface opposite the active component surface, and a side surface connecting the active component surface and the back surface. The heat dissipating component connects the back and side surfaces.

In an embodiment of the invention, the carrier has a plurality of first through holes, at least one second through holes, and a plurality of intermediate bodies filled in the first through holes. The first component is electrically connected to the intermediate body by the active component surface, and the heat dissipation component has at least one latching portion. The at least one latching portion is engaged with the at least one second through hole.

In an embodiment of the invention, the buried component package structure further includes a first build-up line structure and a second build-up line structure. The first build-up line structure includes a first build-up dielectric layer, a first build-up circuit layer, and a plurality of first conductive blind vias. The first build-up dielectric layer covers the second surface and fills the at least one second through slot to fix the at least one second package module. The first build-up wiring layer is on the first build-up dielectric layer. The first conductive vias are electrically connected to the first build-up layer and the at least one second package through the first build-up dielectric layer. The second build-up line structure includes a second build-up dielectric layer, a second build-up circuit layer, and a plurality of second conductive blind vias. A second build-up dielectric layer overlies the first surface. The second build-up wiring layer is on the second build-up dielectric layer. The second conductive via holes pass through the second build-up dielectric layer to electrically connect the second build-up circuit layer and the first circuit layer, electrically connect the second build-up circuit layer to the interposers, and electrically connect the second The layered circuit layer and the at least one second package Module.

In an embodiment of the invention, the embedded component package further includes at least one via hole extending through the first build-up dielectric layer, the core dielectric layer, and the second build-up dielectric layer to electrically connect The first build-up circuit layer and the second build-up circuit layer.

In an embodiment of the invention, the core dielectric layer further has a second card slot on the second surface. The heat dissipating component is engaged with the second card slot.

In an embodiment of the invention, the first element has a surface of the active element and a back surface opposite the surface of the active element. The heat sink is connected to the back.

In an embodiment of the invention, the carrier has a plurality of through holes and a plurality of interposers filled in the through holes. The first component is electrically connected to the interposers by the surface of the active component.

In an embodiment of the invention, the circuit substrate further includes a second circuit layer on the second surface.

In an embodiment of the invention, the buried component package structure further includes a build-up material layer and a build-up line structure. The layer of build-up material covers the first surface and the second surface, and fills the at least one second through slot to fix the at least one second package module, wherein the layer of build-up material exposes the first circuit layer and the second layer Line layer. The build-up line structure includes a build-up dielectric layer, a build-up circuit layer, and a plurality of conductive blind vias. The build-up dielectric layer covers the layer of build-up material on the first surface. The build-up circuit layer is on the build-up dielectric layer and is electrically connected to the first circuit layer. The conductive vias pass through the build-up dielectric layer to electrically connect the build-up wiring layer to the interposers and to electrically connect the build-up wiring layer to the at least one second package module.

The invention provides a method for fabricating a buried component package structure, comprising the following steps. A circuit substrate is provided. The circuit substrate includes a core dielectric layer and a first circuit layer, wherein the core dielectric layer has a first surface, a second surface relative to the first surface, a first through slot extending through the first surface and the second surface, and is located at the first a first card slot of the surface, the first card slot is connected to the first slot, and the first circuit layer is located on the first surface. A first package module is provided, including a carrier board, a first component, and a heat dissipating component, wherein the first component is disposed on the carrier, the heat dissipating component is coupled to the first component, and the first component is disposed between the carrier and the heat dissipating component. The carrier board is engaged with the first card slot to embed the first package module in the first slot.

In an embodiment of the invention, the method for fabricating the first package module includes the following steps. A carrier is provided, and a plurality of first through holes and at least one second through holes are formed on the carrier. A plurality of interposers are formed in the first through holes. The first component is electrically connected to the interposers by the active component surface. The heat dissipating component is covered on the first component, and is engaged with the at least one second through hole through the at least one latching portion to be fixed to the carrier.

In an embodiment of the invention, the method for fabricating the above circuit substrate includes the following steps. Provide the core board. The core board includes a core dielectric layer and a first metal layer on the first surface. The first metal layer is patterned to form a first wiring layer. Forming a first through slot, at least one second through slot, and a first card slot in the core dielectric layer, wherein the at least one second through slot passes through the first surface and the second surface.

In an embodiment of the invention, the method for fabricating the embedded component package structure includes the following steps. A glue layer is formed on the first surface. Provide at least one second The package module includes two second components stacked on each other, and the at least one second package module is embedded in the at least one second through slot. Forming a first build-up dielectric layer on the second surface and filling the at least one second via, and forming a first build-up metal layer on the first build-up dielectric layer. Remove the glue layer. Forming a second build-up dielectric layer on the first surface and forming a second build-up metal layer on the second build-up dielectric layer. Patterning the first build-up metal layer to form a first build-up circuit layer, and forming a plurality of first conductive vias on the first build-up dielectric layer to electrically connect the first build-up circuit layer with the at least one Two package modules. Patterning the second build-up metal layer to form a second build-up circuit layer, and forming a plurality of second conductive via holes in the second build-up dielectric layer to electrically connect the second build-up circuit layer and the first circuit layer And electrically connecting the second build-up circuit layer and the interposers and electrically connecting the second build-up circuit layer and the at least one second package module.

In an embodiment of the invention, the method for fabricating the embedded component package structure further includes the following steps. Forming at least one via hole penetrating the first build-up dielectric layer, the core dielectric layer and the second build-up dielectric layer to electrically connect the first build-up wiring layer and the second build-up wiring layer.

In an embodiment of the invention, the method for fabricating the first package module includes the following steps. A carrier plate is provided and a plurality of through holes are formed in the carrier. A plurality of interposers are formed in the through holes.

In an embodiment of the invention, the circuit substrate further includes a second circuit layer and a second card slot on the two surfaces, wherein the manufacturing method of the circuit substrate includes the following steps. Provide the core board. The core board includes a core dielectric layer, a first metal layer on the first surface, and a second metal layer on the second surface. Patterning a metal layer and a second metal layer to form a first circuit layer and a second circuit layer, respectively. Forming a first through slot, at least one second through slot extending through the first surface and the second surface, the first card slot, and the second card slot in the core dielectric layer.

In an embodiment of the invention, the method for fabricating the embedded component package structure further includes the following steps. The heat dissipating component is engaged with the second card slot and connected to the first component. A glue layer is formed on the first surface. Providing at least one second package module includes two second components stacked on each other, and the at least one second package module is embedded in the at least one second through slot.

In an embodiment of the invention, the method for fabricating the embedded component package structure further includes the following steps. After embedding the at least one second package module in the at least one second through slot, forming a layer of build-up material on the first surface and the second surface, and filling the at least one second through slot to fix the at least one The second package module, wherein the layer of build-up material exposes the first circuit layer and the second circuit layer. Remove the glue layer. Forming a build-up dielectric layer on the build-up material layer on the first surface and forming a build-up metal layer on the build-up dielectric layer. Patterning a metallization layer to form a build-up wiring layer, and forming a plurality of first conductive blind vias in the build-up dielectric layer to electrically connect the build-up wiring layer with the interposers and to electrically connect the build-up wiring layers The at least one second package module. Forming a plurality of second conductive blind vias in the layer of build-up material, wherein the second conductive vias are electrically connected to the at least one second package module.

In an embodiment of the invention, the method for fabricating the embedded component package structure further includes the following steps. A plurality of solder balls electrically connected to the second circuit layer and the second conductive blind vias are formed.

In an embodiment of the invention, the method for fabricating the second package module includes the following steps. a. forming a plurality of through holes in a dielectric layer. b. forming a glue layer on one of the surfaces of the dielectric layer to cover the through holes. c. A plurality of second elements are respectively disposed in the through holes and fixed by the glue layer. d. Fill dielectric material into the through holes to secure the second components. The above steps a to d are repeated to form the first package and the second package, respectively. A plurality of the second package modules are formed by using the first package and the second package.

In an embodiment of the invention, the method for fabricating a plurality of second package modules by using the first package and the second package includes the following steps. The first package is singulated to form a plurality of first package units. The second package is singulated to form a plurality of second package units. The second package units are turned over such that the glue layers of the respective second loading units face the glue layer of the corresponding first package unit. The glue layers connecting the second package units are removed, and the first package units are stacked on the corresponding second package unit, wherein the glue layers of the respective first package units are connected to the corresponding second package units.

Based on the above, the embedded component package structure of the present invention can be fabricated by first embedding the first package module in the first through slot of the core dielectric layer of the circuit substrate. Aligning the first slot that is connected to the first slot, and then moving the first package module toward the first slot, until the carrier is engaged with the first slot, the first package module can be buried in the first Card slot. In other words, in the case where the core dielectric layer is provided with the first card slot connecting the first through slots, the accuracy of embedding the first package module in the first through slot can be improved, and the carrier can be engaged. After the first card slot, the first package module is firmly embedded in the core dielectric layer. At this point, the heat sink component will be exposed The second surface of the core dielectric layer is in contact with the outside, so that the thermal energy generated by the operation of the first component can be dissipated to the outside by conduction of the heat dissipating component. On the other hand, compared with the prior art arrangement in which the heat dissipating component is disposed outside the wiring structure, since the heat dissipating component of the present invention is embedded in the core dielectric layer, the overall structure of the embedded component packaging structure can be effectively reduced. Thickness to meet the needs of thin design.

The above described features and advantages of the invention will be apparent from the following description.

1, 1A, 1', 1A'‧‧‧ first package module

2‧‧‧First package

2a‧‧‧First package unit

2'‧‧‧Second package

2a’‧‧‧Second package unit

3‧‧‧Second package module

4, 4'‧‧‧ circuit substrate

5, 5A, 5', 5A'‧‧‧ buried component package structure

10, 10’‧‧‧ Carrier Board

10a, 10a’‧‧‧ card joint

11‧‧‧ first through hole

11’‧‧‧through hole

12‧‧‧Second through hole

13, 13’ ‧ ‧ Intermediary

20‧‧‧ first component

21‧‧‧Active component surface

22‧‧‧ Back

23‧‧‧ side surface

30, 30a, 30', 30a'‧‧‧ Heat Dissipation Components

31‧‧‧Card Department

32, 32a, 32', 32a'‧‧‧ upper surface

40‧‧‧ dielectric layer

41‧‧‧through holes

42, 42'‧‧‧ glue layer

43, 44‧‧‧ surface

50, 50'‧‧‧ second component

60‧‧‧ dielectric materials

70, 70’‧‧‧ core board

71‧‧‧ core dielectric layer

71a‧‧‧ first surface

71b‧‧‧second surface

72‧‧‧First metal layer

72a‧‧‧First circuit layer

73‧‧‧First slot

74‧‧‧Second trough

75‧‧‧First card slot

76‧‧‧Second metal layer

76a‧‧‧Second circuit layer

77‧‧‧Second card slot

80‧‧‧ glue layer

81‧‧‧First build-up dielectric layer

81'‧‧‧Additional material layer

82‧‧‧First build-up metal layer

82a‧‧‧First build-up line

83‧‧‧Second layered dielectric layer

83'‧‧‧Additional dielectric layer

84‧‧‧Second layer of metal

84’‧‧‧Additional metal layer

84a‧‧‧Second layered circuit layer

84a’‧‧‧Additional circuit layer

85, 85'‧‧‧ first conductive blind hole

86‧‧‧First build-up line structure

86’‧‧‧Additional line structure

87, 87'‧‧‧Second conductive blind hole

88‧‧‧Second layered line structure

89‧‧‧Through hole

90‧‧‧ solder balls

1A to FIG. 1E are schematic diagrams showing a manufacturing process of a first package module according to an embodiment of the invention.

2A to 2D are schematic diagrams showing a manufacturing process of a second package module according to an embodiment of the invention.

3A to 3B are schematic diagrams showing a manufacturing process of a circuit substrate according to an embodiment of the present invention.

3C and 3D are partial bottom views of region A of the core dielectric layer of FIG. 3B, respectively.

4A to FIG. 4D are schematic diagrams showing a manufacturing process of embedding the first package module of FIG. 1E and the second package module of FIG. 2D in the circuit substrate of FIG. 3B to form a buried component package structure according to an embodiment of the present invention.

4E is a schematic diagram of a buried component package structure according to another embodiment of the present invention.

5A to 5D are schematic diagrams showing a manufacturing process of a first package module according to another embodiment of the present invention.

6A-6B are schematic diagrams showing a manufacturing process of a circuit substrate according to another embodiment of the present invention.

FIG. 7A to FIG. 7G are schematic diagrams showing the fabrication process of the embedded component package structure in which the first package module of FIG. 5D and the second package module of FIG. 2D are embedded in the circuit substrate of FIG. 6B to form another embodiment of the present invention. .

7H is a schematic diagram of a buried component package structure according to still another embodiment of the present invention.

1A to FIG. 1E are schematic diagrams showing a manufacturing process of a first package module according to an embodiment of the invention. First, referring to FIG. 1A, a carrier 10 is provided, wherein the carrier 10 may be made of epoxy resin, glass fiber or glass epoxy. Next, referring to FIG. 1B, a plurality of first through holes 11 and at least one second through holes 12 (two are schematically shown in the drawing) are formed on the carrier board, for example, by laser drilling or mechanical drilling. 10, wherein the first through holes 11 are located between the two second through holes 12, for example. Next, referring to FIG. 1C, an interposer 13 is formed in each of the first through holes 11 by electroplating, and the material may be copper or other suitable conductive metal or alloy or conductive paste. Here, the two ends of the interposer 13 may slightly protrude from the carrier 10 to facilitate the subsequent process. Next, referring to FIG. 1D, the first component 20 is electrically connected to the interposers 13. In particular, the first component 20 can be an active component (eg, a wafer) having an active component surface 21, a backside 22 relative to the active component surface 21, and The active component surface 21 and the side surface 23 of the back surface 22 are connected, wherein the first component 20 is electrically connected to the intermediate body 13 by, for example, soldering or surface adhesion (SMT).

Thereafter, referring to FIG. 1E, the heat dissipating component 30 is covered on the first component 20, wherein the heat dissipating component 30 can have at least one latching portion 31 (two are schematically shown in the drawing) to be in each of the latching portions. 31 is engaged with the corresponding second through hole 12 and fixed to the carrier 10 . After the heat dissipating component 30 covers the first component 20 and is fixed to the carrier 10 through the latching portion 30, the heat dissipating component 30 connects the back surface 22 and the side surface 23 of the first component 20, respectively. So far, the fabrication of the first package module 1 has been substantially completed. Generally, the heat dissipating component 30 may be made of aluminum nitride, boron nitride, graphite or other highly thermally conductive material, and the heat dissipating component 30 may be in surface contact with the back surface 22 of the first component 20 and the side surface 23 . Therefore, the thermal energy generated by the operation of the first component 20 can be transmitted to the outside through the heat dissipating component 30 to prevent thermal energy from accumulating in the first package module 1 and causing the first component 20 to malfunction or be damaged, thereby contributing to improvement. The operational performance of the first component 20 and its extended operating life.

2A to 2D are schematic diagrams showing a manufacturing process of a second package module according to an embodiment of the invention. First, referring to FIG. 2A, a plurality of through holes 41 are formed on the dielectric layer 40 by, for example, laser drilling or mechanical drilling, and a glue layer 42 is formed on the surface 43 of the dielectric layer 40 to cover the through holes. The holes 41, and the openings of the through holes 41 on the other surface 44 of the dielectric layer are still exposed to facilitate the subsequent process. Generally, the material of the dielectric layer 40 may be epoxy resin, glass fiber or glass epoxy resin, and the adhesive layer 42 may be a polyimide tape (or a film), a vinyl tape (or a film) or glass Paper tape (or film), but the invention is not limited thereto. Next, a plurality of second elements 50 (eg, passive elements) are placed in the corresponding through holes 41 from the openings of the corresponding through holes 41 in the surface 44. At this time, each of the second members 50 can be bonded to the adhesive layer 42 and adhered to the corresponding through holes 41 through the adhesive layer 42 to prevent the second member 50 from being displaced in the subsequent process.

Referring to FIG. 2B , after the second components 50 are initially fixed in the corresponding through holes 41 , the dielectric material 60 is filled in the through holes 41 to firmly embed the second components 50 in the dielectric layer 40 . Generally, the material of the dielectric material 60 may be a polyimide, a polydimethyl siloxane or an ABF film. Thus, the fabrication of the first package 2 has been substantially completed, and similarly, the above-described fabrication process is repeated to complete the fabrication of the second package 2'. Thereafter, the first package 2 and the second package 2' are utilized to form a plurality of stacked component modules 3, the fabrication steps of which are illustrated in Figures 2C-2D. First, the first package 2 is singulated to form a plurality of first package units 2a, and the second package 2' is singulated to form a plurality of second package units 2a'.

Since the glue layer 42 is not broken when the first package 2 is singulated, the respective first package units 2a can still be connected to each other through the glue layer 42. Similarly, since the glue layer 42' is not broken when the first package 2' is singulated, the respective first package units 2a' can still be connected to each other through the glue layer 42'. Next, the first package units 2a' are turned over so that the glue layers 42 and 42' face each other. After that, the adhesive layer 42' is removed and the first package units 2a are stacked on the corresponding second package unit 2a', so that the first package unit 2a is glued to the corresponding second package unit 2a' through the adhesive layer 42. fixed. Moreover, the glue layer 42 connecting the first package units 2a is applied The force can be separated into a plurality of segments and bonded between the first package unit 2a and the corresponding second package unit 2a'. To this end, the plurality of second package modules 3 (one of which is schematically illustrated in Fig. 2D) including the second elements 50 and 50' stacked on each other has been substantially completed.

3A to 3B are schematic diagrams showing a manufacturing process of a circuit substrate according to an embodiment of the present invention. 3C and 3D are partial bottom views of region A of the core dielectric layer of FIG. 3B, respectively. First, referring to FIG. 3A, a core board 70 is provided. The core board 70 includes a core dielectric layer 71 and a first metal layer 72, wherein the core dielectric layer 71 has a first surface 71a and a second surface 71b opposite to the first surface 71a, and the first metal layer 72 is, for example, located at On a surface 71a. Generally, the core dielectric layer 71 may be made of epoxy, fiberglass or glass epoxy, and the first metal layer 72 may be composed of a conductive metal or alloy.

Thereafter, referring to FIG. 3B, the first metal layer 72 is patterned, for example, by lithography to form the first wiring layer 72a, and is formed through the first surface 71a and the first, for example, by laser drilling or mechanical drilling. The first through groove 73 of the two surfaces 71b and the at least one second through groove 74 (two are schematically shown in the drawing). The first card slot 75 located on the first surface 71a and connected to the first through slot 73 is formed before, after or at the same time as the first through slot 73 is formed, for example, by laser drilling or mechanical drilling. So far, the fabrication of the circuit substrate 4 has been substantially completed. It should be noted that, as shown in FIG. 3C, the first card slot 75 may be composed of a single continuous annular card slot surrounding the first slot 73. Moreover, as shown in FIG. 3D, the first card slot 75 may also be composed of a plurality of rectangular card slots surrounding the first slot 73, but the invention is not limited thereto.

4A to 4D are the first package module of FIG. 1E and the second package of FIG. 2D. The packaging module is embedded in the circuit substrate of FIG. 3B to form a schematic diagram of a manufacturing process of the embedded component packaging structure according to an embodiment of the present invention. First, referring to FIG. 4A and FIG. 4B , the first package module 1 is embedded in the first through slot 73 . Specifically, the first package module 1 is first aligned with the first card slot 75 through the latching portion 10a of the periphery of the carrier 10, and then the first package module 1 is moved toward the first slot 73 until the card is attached. After the portion 10a is engaged with the first card slot 75, the first package module 1 can be embedded in the first card slot 75. In other words, in the case where the core dielectric layer 71 is provided with the first card slot 75 connecting the first through slots 73 , the accuracy of embedding the first package module 1 in the first through slots 73 can be improved. After the latching portion 10a of the carrier 10 is engaged with the first card slot 75, the first package module 1 is firmly embedded in the core dielectric layer 71. At this time, the heat dissipating component 30 is exposed to the second surface 71b to be in contact with the outside, so that the thermal energy generated when the first component 20 operates can be dissipated to the outside by conduction of the heat dissipating component 30.

Then, the adhesive layer 80 is formed on the first surface 71a to cover the opening of the first package module 1 and the second through slot 74 on the first surface 71a, and then the second package modules 3 are respectively connected to the corresponding second through slots 74. The openings of the second surface 71b are buried in the corresponding second through slots 74, and the respective second package modules 3 are bonded to the glue layer 80. Thereby, each of the second package modules 3 can be adhered and fixed in the corresponding second through slots 74 through the adhesive layer 80, thereby preventing offset in subsequent processes. Next, referring to FIG. 4C , the first build-up dielectric layer 81 is formed on the second surface 71 b and filled into the second via 74 to firmly embed the second package module 3 in the core dielectric layer 71 . Next, a first build-up metal layer 82 is formed on the first build-up dielectric layer 81, and after removing the adhesive layer 80, a second build-up dielectric layer 83 is formed on the first surface 71a, and a second build-up layer is formed. Metal layer 84 is increased in the second Layer dielectric layer 83. Generally, the material of the first build-up dielectric layer 81 and the second build-up dielectric layer 83 may be a polyimide, a polydimethyl siloxane or an ABF film, and the first build-up metal layer 82 and The second build-up metal layer 84 can be a conductive metal or alloy.

It should be noted that, before forming the first build-up dielectric layer 81 on the second surface 71b, the relative arrangement relationship between the heat dissipating component 30 and the first build-up dielectric layer 81 may be first applied to the first build-up layer. The dielectric layer 81 defines an opening to expose the upper surface 32 of the heat dissipating component 30 to the opening when the first build-up dielectric layer 81 is pressed against the second surface 71b. Alternatively, in the case where the first build-up dielectric layer 81 is not provided with the opening, the first build-up dielectric layer 81 is first fully pressed onto the second surface 71b, and then transmitted through a laser or a chemical. The liquid etching manner removes a portion of the first build-up dielectric layer 81 at a location corresponding to the upper surface 32 of the heat dissipating component 30 to expose the upper surface 32 of the heat dissipating component 30. Although the upper surface 32 of the heat dissipating component 30 is covered by the first build-up metal layer 82 after forming the first build-up metal layer 82 on the first build-up dielectric layer 81, the first pattern is increased by subsequent patterning. After the layer metal layer 82 is formed to form the first build-up wiring layer 82a, the upper surface 32 of the heat dissipating component 30 can be exposed again.

Thereafter, referring to FIG. 4D, the first build-up metal layer 82 is patterned to form the first build-up wiring layer 82a, and a plurality of first conductive vias 85 are formed on the first build-up dielectric layer 81. Here, the first conductive via hole 85 passing through the first build-up dielectric layer 81 can electrically connect the first build-up wiring layer 82a and the second package module 3, and the first build-up trace structure 86 is, for example, The first build-up dielectric layer 81, the first conductive vias 85, and the first build-up wiring layer 82a are formed.

The second build-up metal layer 84 is patterned to form a second build-up wiring layer 84a, and a plurality of second conductive blind vias 87 are formed in the second build-up dielectric layer 83. Here, the second conductive via hole 87 passing through the second build-up dielectric layer 83 is electrically connected to the second build-up wiring layer 84a and the first wiring layer 72a, and electrically connected to the second build-up wiring layer 84a. The interposer 13 is electrically connected to the second build-up layer 84a and the second package module 3, wherein the second build-up line structure 88 is, for example, a second build-up dielectric layer 83, a second conductive via 87, and The second build-up circuit layer 84a is formed, and the second build-up circuit layer 84a is electrically connected to the first component 20 through the interposer 13 . Finally, at least one via hole 89 (two schematically shown in FIG. 4D) penetrating through the first build-up dielectric layer 81, the core dielectric layer 71 and the second build-up dielectric layer 83 is formed to electrically connect the first The wiring layer 82a and the second build-up wiring layer 84a are layered. So far, the fabrication of the embedded component package structure 5 has been substantially completed. On the other hand, the heat dissipating component 30 of the present embodiment is embedded in the core dielectric layer 71 and the exposed surface is in contact with the outside, as compared with the prior art. Therefore, not only the thermal energy generated by the operation of the first component 20 can be effectively transmitted to the outside, but also the overall thickness of the embedded component package 5 can be reduced to meet the thin design requirements.

4E is a schematic diagram of a buried component package structure according to another embodiment of the present invention. Referring to FIG. 4E, the buried component package structure 5A of the present embodiment can also be obtained by the same or similar fabrication process as described above, and the main difference between the embedded component package structure 5A and the embedded component package structure 5 of FIG. 4D is that: The upper surface 32a of the heat dissipating component 30a of the first package module 1A of the buried component package structure 5A is, for example, flush with the second surface 71b of the core dielectric layer 71.

Other embodiments are listed below for illustration. It is to be noted that the following embodiments use the same reference numerals and parts of the above-mentioned embodiments, and the same reference numerals are used to refer to the same or similar elements, and the description of the same technical content is omitted. For the description of the omitted portions, reference may be made to the foregoing embodiments, and the following embodiments are not repeated.

5A to 5D are schematic diagrams showing a manufacturing process of a first package module according to another embodiment of the present invention. First, referring to Figures 5A to 5D, a carrier 10' is provided. Next, a plurality of through holes 11' are formed on the carrier 10'. Next, an interposer 13' is formed in each of the through holes 11'. Thereafter, the first component 20 is electrically connected to the interposers 13'. So far, the fabrication of the first package module 1' has been substantially completed, but the heat dissipating component 30' (shown in 7C to 7G) is disposed on the back surface 22 of the first component 20, for example, in a subsequent fabrication process.

6A-6B are schematic diagrams showing a manufacturing process of a circuit substrate according to another embodiment of the present invention. First, referring to Fig. 6A, a core board 70' is provided. The core board 70' includes a core dielectric layer 71, a first metal layer 72, and a second metal layer 76, wherein the first metal layer 72 is, for example, located on the first surface 71a, and the second metal layer 76 is, for example, located on the second surface. On 71b. Thereafter, referring to FIG. 6B, the first metal layer 72 and the second metal layer 76 are patterned to form a first wiring layer 72a and a second wiring layer 76a, respectively. On the other hand, the first through groove 73 and the second through groove 74 are formed, wherein before, after or at the same time as forming the first through groove 73, the first card slot 75 is formed on the first surface 71a and connected to the first through groove 73. And forming a second card slot 77 located on the first surface 71b and connected to the first through slot 73. So far, the fabrication of the circuit substrate 4' has been substantially completed.

FIG. 7A to FIG. 7G are schematic diagrams showing the fabrication process of the embedded component package structure in which the first package module of FIG. 5D and the second package module of FIG. 2D are embedded in the circuit substrate of FIG. 6B to form another embodiment of the present invention. . First, referring to FIG. 7A and FIG. 7B, the first package module 1' is buried in the first through slot 73. Specifically, the first package module 1 ′ is first aligned with the first card slot 75 through the latching portion 10 a ′ of the periphery of the carrier 10 ′, and then moves the first package module 1 ′ toward the first slot 73 . The first package module 1 can be embedded in the first card slot 75 until the latching portion 10a' is engaged with the first card slot 75. In other words, in the case where the core dielectric layer 71 is provided with the first card slot 75 connecting the first through slots 73, the accuracy of embedding the first package module 1 ′ in the first through slots 73 can be improved. After the latching portion 10a' of the carrier 10' is engaged with the first card slot 75, the first package module 1' can be firmly embedded in the core dielectric layer 71. Then, the adhesive layer 80 is formed on the first surface 71a to cover the opening of the first package module 1' and the second through slot 74 on the first surface 71a, so as to facilitate the subsequent process.

Next, referring to FIG. 7C, each of the second package modules 3 is embedded in the corresponding second through slot 74 via the opening of the second surface 71b via the second through slot 74, and the second package modules 3 are joined. To the glue layer 80. Thereby, each of the second package modules 3 can be adhered and fixed in the corresponding second through slots 74 through the adhesive layer 80, thereby preventing offset in subsequent processes. On the other hand, the heat dissipating member 30' is engaged with the second card slot 77 and connected to the back surface 22 of the first member 20. At this time, the heat dissipating member 30' is exposed to the second surface 71b to be in contact with the outside, so that the heat generated by the operation of the first member 20 can be dissipated to the outside by conduction of the heat dissipating member 30.

Next, referring to FIG. 7D, a layer of build-up material 81' is formed on the first surface. The second surface 71b and the second surface 71b are filled with the second through grooves 74 to firmly embed the second package module 3 in the core dielectric layer 71. At this time, a portion of the layer of buildup material 81' is located between the first surface 71a and the glue layer 80. On the other hand, the build-up material layer 81' exposes the first wiring layer 72a and the second wiring layer 76a. Next, referring to FIG. 7E and FIG. 7F, the adhesive layer 80 is first removed, and the build-up dielectric layer 83' is formed on the build-up material layer 81' on the first surface 71a, and the build-up metal layer 84' is formed. The dielectric layer 83 is layered. The patterned metal layer 84' is patterned to form the build-up wiring layer 84a', and a plurality of first conductive vias 85' are formed in the build-up dielectric layer 83'. Here, the first conductive via hole 85' passing through the build-up dielectric layer 83' can electrically connect the build-up wiring layer 84a' with the intermediate body 13' and the electrical connection build-up wiring layer 84a' and the second package mold. Group 3, and the build-up line structure 86' is comprised of, for example, a build-up dielectric layer 83', a first conductive blind via 85', and a build-up wiring layer 84a'.

It should be noted that before the formation of the layer of the build-up material 81' on the first surface 71a and the second surface 71b and filling the second through-hole 74, the heat dissipating component 30' and the build-up material layer 81' may be first The opposite arrangement relationship is such that when the build-up material layer 81' is opened to expose the build-up material layer 81' to the second surface 71b, the upper surface 32' of the heat dissipation element 30' is exposed to the opening. . Alternatively, in the case where the build-up material layer 81' is not provided with the opening, the build-up material layer 81' is first fully pressed against the second surface 71b, and then etched by laser or chemical liquid. The portion removes a portion of the build-up material layer 81' corresponding to the upper surface 32' of the heat dissipating component 30' to expose the upper surface 32' of the heat dissipating component 30'.

Thereafter, referring to FIG. 7G, a plurality of layers passing through the layer of build-up material 81' are formed first. The second conductive vias 87' are electrically connected to the second package module 3, and are electrically connected to the second circuit layer 76a and the plurality of second conductive blind holes 87'. The solder ball 90 is used as an electronic component (not shown) or a line (not shown) connected to the outside. So far, the fabrication of the embedded component package structure 5 ′ has been substantially completed, and the heat dissipation component 30 ′ of the present embodiment is embedded in the core interface in comparison with the prior art arrangement in which the heat dissipation component is disposed outside the circuit structure. The electrical layer 71 exposes a portion of the surface to be in contact with the outside, so that not only the heat generated by the operation of the first component 20 can be effectively transmitted to the outside, but also the overall thickness of the embedded component package 5' can be reduced. Thin design requirements.

7H is a schematic diagram of a buried component package structure according to still another embodiment of the present invention. Referring to FIG. 7H, the embedded component package structure 5A' of the present embodiment can also be obtained by the same or similar fabrication process as described above, and the main difference between the embedded component package structure 5A' and the embedded component package structure 5' of FIG. 7G is that The upper surface 32a' of the heat dissipating component 30a' of the first package module 1A' of the embedded component package structure 5A' is, for example, flush with the second surface 71b of the core dielectric layer 71.

In summary, the embedded component package structure of the present invention can be fabricated by first embedding the first package module in the first via of the core dielectric layer of the circuit substrate. The carrier board is aligned with the first slot of the first slot, and then the first package module is moved toward the first slot. After the carrier is engaged with the first slot, the first package module can be buried. The first card slot. In other words, in the case where the core dielectric layer is provided with the first card slot connecting the first through slots, the accuracy of embedding the first package module in the first through slot can be improved, and the carrier can be engaged. After the first card slot, make The first package module is firmly embedded in the core dielectric layer. At this time, the heat dissipating component is exposed to the second surface of the core dielectric layer to be in contact with the outside, so that the thermal energy generated when the first component operates can be dissipated to the outside by conduction of the heat dissipating component. On the other hand, compared with the prior art arrangement in which the heat dissipating component is disposed outside the wiring structure, since the heat dissipating component of the present invention is embedded in the core dielectric layer, the overall structure of the embedded component packaging structure can be effectively reduced. Thickness to meet the needs of thin design.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any one of ordinary skill in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope of the invention is defined by the scope of the appended claims.

1‧‧‧First package module

3‧‧‧Second package module

4‧‧‧Line substrate

5‧‧‧Internal component package structure

10‧‧‧ Carrier Board

13‧‧‧Intermediary

20‧‧‧ first component

30‧‧‧Heat components

32‧‧‧ upper surface

71‧‧‧ core dielectric layer

71a‧‧‧ first surface

71b‧‧‧second surface

72a‧‧‧First circuit layer

81‧‧‧First Layered Dielectric

82a‧‧‧First build-up circuit layer

83‧‧‧Second layered dielectric layer

84a‧‧‧Second layered circuit layer

85‧‧‧First conductive blind hole

86‧‧‧First build-up line structure

87‧‧‧Second conductive blind hole

88‧‧‧Second layered line structure

89‧‧‧Through hole

Claims (24)

A buried component package structure includes: a circuit substrate comprising: a core dielectric layer having a first surface, a second surface opposite to the first surface, and the first surface and the second surface a first through slot and a first slot on the first surface, wherein the first slot connects the first slot; and a first circuit layer on the first surface; and a first The first package module includes: a carrier plate that is engaged with the first card slot; a first component that is disposed on the carrier; and a heat dissipating component that is connected The first component, wherein the first component is between the carrier and the heat dissipating component. The embedded component package structure of claim 1, wherein the heat dissipation component is exposed to the second surface, the core dielectric layer further having at least a second portion extending through the first surface and the second surface The through-package structure further includes at least one second package module embedded in the at least one second through slot, wherein the at least one second package module includes two second components stacked on each other. The embedded component package structure of claim 2, wherein an upper surface of the heat dissipating component is flush with the second surface. The embedded component package structure of claim 2, wherein the first component has an active component surface and a back surface relative to the active component surface And a side surface connecting the surface of the active component and the back surface, the heat dissipating component connecting the back surface and the side surface. The embedded component package structure of claim 4, wherein the carrier has a plurality of first through holes, at least one second through hole, and a plurality of interposers filled in the first through holes, The first component is electrically connected to the intermediate body by the surface of the active component, and the heat dissipation component has at least one latching portion, and the at least one latching portion is engaged with the at least one second through hole. The embedded component package structure of claim 5, further comprising: a first build-up line structure, comprising: a first build-up dielectric layer covering the second surface and filling in The at least one second through slot is configured to fix the at least one second package module; a first build-up circuit layer is disposed on the first build-up dielectric layer; and a plurality of first conductive blind holes pass through the first An additional dielectric layer is electrically connected to the first build-up circuit layer and the at least one second package module; and a second build-up line structure includes: a second build-up dielectric layer covering the a second build-up circuit layer on the second build-up dielectric layer; and a plurality of second conductive vias through the second build-up dielectric layer to electrically connect the second The build-up circuit layer and the first circuit layer are electrically connected to the second build-up circuit layer and the interposers, and electrically connected to the second build-up circuit layer and the at least one second package module. The embedded component package structure of claim 6, further comprising: at least one via hole extending through the first build-up dielectric layer, the core dielectric layer, and the second build-up dielectric layer, The first build-up layer and the second build-up layer are electrically connected. The embedded component package structure of claim 2, wherein the core dielectric layer further has a second card slot on the second surface, the heat dissipating component being engaged with the second card slot. The embedded component package structure of claim 8, wherein the first component has an active component surface and a back surface opposite to the active component surface, the heat dissipation component being coupled to the back surface. The embedded component package structure of claim 9, wherein the carrier has a plurality of through holes and a plurality of interposers filled in the through holes, the first component having a surface electrical property of the active component Connected to the intermediaries. The embedded component package structure of claim 10, wherein the circuit substrate further comprises a second circuit layer on the second surface. The embedded component package structure of claim 11, further comprising: a layer of build-up material covering the first surface and the second surface and filling the at least one second through slot Fixing the at least one second package module, wherein the layer of build-up material exposes the first circuit layer and the second circuit layer; and a build-up line structure includes: a build-up dielectric layer covering the build-up material layer on the first surface; a build-up circuit layer on the build-up dielectric layer and electrically connecting the first circuit layer; and a plurality of conductive blinds And a via hole passing through the build-up dielectric layer to electrically connect the build-up circuit layer and the interposer and electrically connecting the build-up circuit layer and the at least one second package module. A method of fabricating a buried component package includes: providing a circuit substrate comprising a core dielectric layer and a first circuit layer, wherein the core dielectric layer has a first surface opposite to the first surface a first surface, a first through slot extending through the first surface and the second surface, and a first slot on the first surface, the first card slot connecting the first slot, and the first a circuit layer is disposed on the first surface; a first package module is disposed, including a carrier, a first component, and a heat dissipating component, wherein the first component is disposed on the carrier, and the heat dissipating component is coupled to the first component And the first component is located between the carrier and the heat dissipating component; and the carrier is engaged with the first card slot to embed the first package module in the first through slot. The manufacturing method of the embedded component package structure according to claim 13 , wherein the manufacturing method of the first package module comprises: providing the carrier plate, and forming a plurality of first through holes and at least one second a through hole is formed on the carrier; a plurality of intermediate bodies are formed in the first through holes; The first component is electrically connected to the interposer by an active component surface; and the heat dissipating component is covered on the first component, and the at least one latching portion is engaged with the at least one second through hole Fixed to the carrier. The method of fabricating a buried component package structure according to claim 14, wherein the method of fabricating the circuit substrate comprises: providing a core board including the core dielectric layer and a first layer on the first surface a metal layer; patterning the first metal layer to form the first wiring layer; and forming the first through trench, the at least one second via, and the first latching layer in the core dielectric layer, wherein the at least one The second through slot extends through the first surface and the second surface. The method of fabricating the embedded component package structure of claim 15, further comprising: forming a glue layer on the first surface; providing at least one second package module, including two second components stacked on each other And embedding the at least one second package module in the at least one second through slot; forming a first build-up dielectric layer on the second surface and filling the at least one second through slot, and forming a first a build-up metal layer on the first build-up dielectric layer; removing the glue layer; forming a second build-up dielectric layer on the first surface, and forming a second build-up metal layer in the second increase a dielectric layer; patterning the first build-up metal layer to form a first build-up layer and forming a plurality of first conductive vias are electrically connected to the first build-up wiring layer and the at least one second package module; and the second build-up metal layer is patterned to form a second build-up circuit layer, and a plurality of second conductive vias are formed on the second build-up dielectric layer to electrically connect the second build-up circuit layer and the first circuit layer, and electrically connect the first The second build-up circuit layer and the interposers are electrically connected to the second build-up circuit layer and the at least one second package module. The method of fabricating the embedded component package structure of claim 16, further comprising: forming at least the first build-up dielectric layer, the core dielectric layer, and the second build-up dielectric layer a via hole electrically connecting the first build-up circuit layer and the second build-up circuit layer. The method for fabricating a buried component package structure according to claim 13 , wherein the method of fabricating the first package module comprises: providing the carrier plate and forming a plurality of through holes on the carrier plate; A plurality of interposers are formed in the through holes. The method for fabricating a buried component package structure according to claim 18, wherein the circuit substrate further comprises a second circuit layer on the two surfaces and a second card slot, the circuit substrate manufacturing method The method includes: providing a core board, including the core dielectric layer, a first metal layer on the first surface, and a second metal layer on the second surface; patterning the first metal layer and the first a second metal layer to form the first circuit layer and the second circuit layer, respectively; Forming the first through slot, the at least one second through slot extending through the first surface and the at least one second through slot of the second surface, the first card slot and the second card slot in the core dielectric layer. The method for fabricating a buried component package structure according to claim 19, further comprising: engaging the heat dissipating component in the second card slot and connecting with the first component; forming a glue layer on And the at least one second package module includes two second components stacked on each other, and the at least one second package module is embedded in the at least one second through slot. The method for fabricating a buried component package structure according to claim 20, further comprising: forming a build-up material layer after the at least one second package module is embedded in the at least one second via The first surface and the second surface are filled in the at least one second through slot to fix the at least one second package module, wherein the layer of build-up material exposes the first circuit layer and the second circuit layer Removing the adhesive layer; forming a build-up dielectric layer on the build-up material layer on the first surface, and forming a build-up metal layer on the build-up dielectric layer; patterning the build-up metal layer Forming a build-up circuit layer, and forming a plurality of first conductive vias in the build-up dielectric layer to electrically connect the build-up circuit layer and the interposers and electrically connecting the build-up circuit layer and the At least one second package module; and forming a plurality of second conductive blind holes in the layer of build-up material, wherein the second conductive blinds The hole is electrically connected to the at least one second package module. The method for fabricating a buried component package structure according to claim 21, further comprising: forming a plurality of solder balls electrically connected to the second circuit layer and the second conductive via holes. The manufacturing method of the embedded component package structure according to claim 16, wherein the manufacturing method of the second package module comprises: a. forming a plurality of through holes in a dielectric layer; b. forming a glue Layered on one surface of the dielectric layer to cover the through holes; c. a plurality of second elements are respectively disposed in the through holes and fixed by the adhesive layer; d. filling a dielectric Materials are disposed in the through holes to fix the second components; repeating the steps a to d to form a first package and a second package, respectively; and forming the first package and the second package a plurality of the second package modules. The method for fabricating a buried component package structure according to claim 23, wherein the method for fabricating the plurality of the second package modules by using the first package and the second package comprises: The first package body is formed to form a plurality of first package units; the second package body is singulated to form a plurality of second package units; and the second package units are turned over to make the glue of each of the second package units Layer facing The glue layer of the first package unit is removed; and the glue layer connecting each of the second package units is removed, and each of the first package units is stacked on the corresponding second package unit, wherein each The glue layer of the first package unit is connected to the corresponding second package unit.