TWI575545B - Method of fabricating capacitor - Google Patents

Description

Capacitor manufacturing method

The present invention relates to a method of fabricating a semiconductor device, and more particularly to a method of fabricating a capacitor.

A typical personal computer, such as a notebook (NB) computer, often uses a multilayer ceramic capacitor (Multi-Layer Ceramic Capacitor, MLCC) in the capacitance (for example, input capacitance) of a central processing unit (CPU) power supply circuit. ) or a supercapacitor (SC), in which a supercapacitor is also called an electrical double layer capacitor (EDLC) to reduce cost and reduce component area. However, general multilayer ceramic capacitors or supercapacitors are bulky and the temperature range used is also limited, and cannot be low temperature (eg, below -40 ° C) or high temperature (eg, higher than 70 ° C). The scope of use).

The present invention provides a method of manufacturing a capacitor which has the characteristics of being light and thin and fast charging, and has a large temperature range of use.

The method of manufacturing the capacitor provided in the present application includes the following steps. Provide a base And a layer of first conductive material, wherein the first layer of conductive material is on the substrate. Removing a portion of the first conductive material layer to expose a portion of the substrate to form a plurality of first internal electrodes, wherein the first internal electrodes are arranged along a first direction, and between the adjacent first internal electrodes A gap. Performing an atomic layer deposition step along a second direction to form a dielectric layer, wherein the first direction is perpendicular to the second direction such that the dielectric layer covers the first inner electrodes and the exposed portions of the substrate And the dielectric layer does not fill these gaps. A second layer of conductive material is formed, filled in the gaps that are not filled by the dielectric layer to form a plurality of second internal electrodes.

Based on the above, the capacitor manufacturing method of the embodiment of the present invention can form a dielectric layer by atomic layer deposition, thereby forming a dielectric layer having a uniform thickness and a thin thickness, and can have characteristics of lightness and lightness and rapid charging. In addition, since the capacitor is formed of a material of nitride or metal to form the first inner electrode and the second inner electrode, and the material is formed by stacking materials of barium titanate, barium titanate or barium titanate, and adopting The metal material is used to form the first outer electrode and the second outer electrode. Therefore, the capacitor of the present embodiment can have a large temperature use range, and thus can overcome relatively severe temperature conditions.

The above described features and advantages of the invention will be apparent from the following description.

100‧‧‧ capacitor

110‧‧‧Substrate

120‧‧‧First internal electrode

120a‧‧‧First conductive material layer

130‧‧‧Dielectric layer

140‧‧‧Second internal electrode

140a‧‧‧Second conductive material layer

150‧‧‧Second external electrode

D1‧‧‧ first direction

D2‧‧‧ second direction

S‧‧‧ gap

1 to 5 are schematic cross-sectional views showing a manufacturing process of a capacitor according to an embodiment of the present invention.

1 to 5 are schematic cross-sectional views showing a manufacturing process of a capacitor according to an embodiment of the present invention. Referring to FIG. 1, first, a substrate 110 and a first conductive material layer 120a are provided, wherein the first conductive material layer 120a is located on the substrate 110. For example, in the present embodiment, the material of the substrate 110 includes a metal (for example, copper, silver or aluminum), and thus the substrate 110 can be used as the first external electrode. In addition, the material of the first conductive material layer 120a includes a nitride (for example, titanium nitride (TiN), tantalum nitride (TaN) or copper nitride (CuN)), and metal (for example, copper, platinum, silver, Ruthenium (Ru) or nickel) or other suitable materials, but the invention is not limited thereto.

Referring to FIG. 2, a portion of the first conductive material layer 120a is removed to expose a portion of the substrate 110 to form a plurality of first internal electrodes 120, wherein the first internal electrodes 120 are aligned along a first direction D1, and There is a gap S between the adjacent first inner electrodes 120. In an embodiment, when the first conductive material layer 120a is made of a nitride (for example, titanium nitride), it may be etched by using an inductively coupled plasma of carbon tetrafluoride (CF ₄ ) and argon (Ar), wherein Carbon tetrafluoride (CF ₄ ) accounts for about 20% of the ratio. The process conditions are 700 watts of power, -150 volts, and the process temperature is about 40 degrees Celsius and the pressure is about 15 milliTorr. In one embodiment, the first conductive material layer 120a is a metal (for example, copper), which can be etched by using a hydrocarbon (for example, methane gas) plasma, wherein the gas flow rate of the methane gas is about 65 sccm, and the process temperature is about The temperature is about 10 degrees Celsius and the pressure is about 20 milliTorr. It should be noted that the method of removing a portion of the first conductive material layer in the present step as described above is an actual condition adjustment, and is not limited thereto.

Next, referring to FIG. 3, an atomic layer deposition step is performed along a second direction D2 to form a dielectric layer 130. That is, in the present embodiment, the dielectric layer 130 is formed by atomic layer deposition, and the second direction D2 is the flow direction of the precursor for forming the dielectric layer 130. In more detail, in the present embodiment, the first direction D1 is perpendicular to the second direction D2. In this way, the desired dielectric layer 130 can be formed in only one atomic layer deposition step, without repeatedly performing multiple atomic layer deposition steps, thereby reducing process difficulty and saving process steps and costs. .

Specifically, as shown in FIG. 3, the dielectric layer 130 is filled between the gaps S and covers the first inner electrode 120 and the portion of the substrate 110 exposed without filling the gaps S. For example, in the embodiment, the material of the dielectric layer 130 includes barium titanate (BTO, BaTiO 3 ), barium titanate (STO, SrTiO 3 ) or barium titanate (BST), and the dielectric layer 130 is stacked. The manner is formed, and the thickness of the dielectric layer 130 ranges between 5 nm and 50 nm. For example, the above-described atomic layer deposition step is performed under a process condition of a pressure of 1 Torr and a process temperature of about 200 degrees Celsius to 400 degrees Celsius. It should be noted that the numerical ranges herein are for illustrative purposes only and are not intended to limit the invention.

Thereafter, a remote oxygen plasma annealing process or an ion implantation annealing process can be performed. In one embodiment, the remote oxygen plasma annealing process is performed, for example, in an environment having a pressure of 200 mTorr and a temperature of 250 to 500 °C. The ion implantation annealing process may be performed by using zirconium (Zr), lanthanum (La), cerium (Ce), cobalt (Co), or manganese (Mn). When a metal such as cobalt or manganese is used for the ion implantation annealing process, the process conditions are as follows. Is ion implantation at 250 仟 electron volts and at 350 ° C. Annealing was carried out in an environment at a temperature of 700 °C. It should be noted that the numerical ranges herein are for illustrative purposes only and are not intended to limit the invention.

Next, referring to FIG. 4, a second conductive material layer 140a is formed to fill the gaps S which are not filled by the dielectric layer 130 to form a plurality of second internal electrodes 140. For example, in the embodiment, the method of forming the second conductive material layer 140a is also an atomic layer deposition method, and the material of the second conductive material layer 140a includes a nitride (for example, titanium nitride (TiN), nitrogen. Tantalum (TaN) or copper nitride (CuN), metal (for example, copper, platinum, silver, ruthenium (Ru) or nickel) or other suitable materials, but the case is not limited thereto. For example, when the material of the second conductive material layer 140a is nitride, the process conditions for atomic layer deposition are about 0.01 mTorr to 0.1 mTorr at a pressure of about 10 degrees Celsius, and the process temperature is about 300 degrees Celsius. It is carried out in an environment of a range of 450 degrees Celsius. When the material of the second conductive material layer 140a is made of metal, the process conditions for atomic layer deposition are performed under an environment of a pressure of about 8 Torr and a process temperature of about 375 degrees Celsius to 475 degrees Celsius. It should be noted that the numerical ranges herein are for illustrative purposes only and are not intended to limit the invention.

Specifically, as shown in FIG. 4 , the first inner electrodes 120 are staggered with the second inner electrodes 140 , and the dielectric layer 130 is located between the first inner electrodes 120 and the second inner electrodes 140 and covered. These first inner electrodes 120 and the surfaces of these second inner electrodes 140.

Referring to FIG. 5, a second outer electrode 150 is formed on the second inner electrodes 140, and the second outer electrode 150 also covers a portion of the dielectric layer 130 between the second inner electrodes 140. The capacitor 100 can be formed. For example, in this embodiment, the method of forming the second outer electrode 150 is a physical vapor deposition method, and the material of the second outer electrode 150 includes a metal (for example, copper or silver) or other suitable materials, but The invention is not limited to this. When the material of the second outer electrode 150 is made of copper, the process conditions are about to be sputtered in an environment with a base pressure of about 3.1*10 ^-6 atm and an operating pressure of about 3.3*10 ^-2 atm, and the process temperature is about It is carried out in an environment ranging from 300 degrees Celsius to 400 degrees Celsius. It should be noted that the numerical ranges herein are for illustrative purposes only and are not intended to limit the invention.

Thus, since the capacitor 100 is formed on the first internal electrode 120 by the atomic layer deposition method, the dielectric layer 130 can be formed to have a uniform thickness and a thin thickness. For example, if the capacitor 100 is 30 millimeters (mm) long, 30 millimeters wide, and 5 millimeters high, in the present embodiment, the dielectric layer 130 can reach a thickness of 50 nanometers (nm) and an inner electrode thickness of 5 nanometers. Further, when the material used for the dielectric layer 130 is barium carbonate (BaTiO ₃ ) and the dielectric value is 1500, the capacitor 100 may have a capacitance of 43.4 Faraday (F). Therefore, the capacitor 100 will be able to exhibit an energy density of more than 10 times as compared with the conventional supercapacitor. If the dielectric layer 130 of the capacitor 100 is further reduced by about 5 nm, the capacitance can be increased by about 100 times, and the characteristics of thinness and fast charging can be achieved. It should be noted that the numerical ranges herein are for illustrative purposes only and are not intended to limit the invention.

On the other hand, since the capacitor 100 is made of a material of nitride or metal to form the first inner electrode 120 and the second inner electrode 140, and is formed by stacking materials such as barium titanate, barium titanate or barium titanate. The dielectric layer 130 is made of a metal material to form the first outer electrode and the second outer electrode 150. Therefore, the capacitor of this embodiment 100 may have a larger temperature use range. For example, the temperature range of the capacitor 100 falls between -55 ° C and 125 ° C, and the capacitance changes within this interval does not exceed 10%, so it can be overcome More stringent temperature conditions.

In addition, since the capacitance of the capacitor 100 of the present embodiment has been well represented, it is not necessary to perform a heat treatment process to increase the dielectric constant, thereby achieving the requirement of increasing the capacitance of the capacitor 100. Thus, the capacitor 100 also has flexibility without a heat treatment process, and has a wide range of applications. On the other hand, the capacitor 100 of the present embodiment does not require a conventional stacking process, but can complete the precision stacked multilayer ceramic capacitor at one time, and since the capacitance is large enough to be used as a battery, the capacitor 100 of the embodiment is also It can be called a Multi-Layer Ceramic Battery (MLCB).

As described above, since the capacitor manufacturing method of the embodiment of the present invention can form a dielectric layer by atomic layer deposition, it is possible to form a dielectric layer having a uniform thickness and a thin thickness, and can have characteristics of lightness and lightness and rapid charging. . In addition, since the capacitor is formed of a material of nitride or metal to form the first inner electrode and the second inner electrode, and the material is formed by stacking materials of barium titanate, barium titanate or barium titanate, and adopting The metal material is used to form the first outer electrode and the second outer electrode. Therefore, the capacitor of the present embodiment can have a large temperature use range, and thus can overcome relatively severe temperature conditions.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and those skilled in the art can make some modifications and refinements without departing from the spirit and scope of the present invention. Scope of protection of the invention The scope defined in the attached patent application shall prevail.

100‧‧‧ capacitor

110‧‧‧Substrate

120‧‧‧First internal electrode

130‧‧‧Dielectric layer

140‧‧‧Second internal electrode

150‧‧‧Second external electrode

Claims (9)

A method of manufacturing a capacitor, comprising: providing a substrate and a first conductive material layer, wherein the first conductive material layer is on the substrate; removing a portion of the first conductive material layer to expose the substrate Forming a plurality of first internal electrodes, wherein the first internal electrodes are arranged along a first direction, and a gap is formed between the adjacent first internal electrodes; and an atomic layer is performed along a second direction And a deposition step of forming a dielectric layer, wherein the first direction is perpendicular to the second direction, such that the dielectric layer covers the first internal electrodes and the exposed portion of the substrate, and the dielectric layer The electrical layer does not fill the gaps; and a second layer of conductive material is formed to fill the gaps that are not filled by the dielectric layer to form a plurality of second internal electrodes. The method of manufacturing a capacitor according to claim 1, wherein the substrate is a first external electrode. The method of manufacturing a capacitor according to claim 1, wherein the method of forming the second conductive material layer is an atomic layer deposition method. The method for manufacturing a capacitor according to claim 1, wherein the material of the first conductive material layer and the second conductive material layer comprises a nitride or a metal. The method for manufacturing a capacitor according to claim 1, wherein the material of the dielectric layer comprises barium titanate, barium titanate or barium titanate. The method for manufacturing a capacitor according to claim 1, further comprising: A second outer electrode is formed on the second inner electrodes. The method of manufacturing a capacitor according to claim 6, wherein the method of forming the second external electrode is a physical vapor deposition method. The method of manufacturing a capacitor according to claim 6, wherein the material of the second outer electrode comprises a metal. The method of manufacturing a capacitor according to claim 1, wherein the thickness of the dielectric layer ranges between 5 nm and 50 nm.