TWI563389B - Bidirectional lane routing - Google Patents

Bidirectional lane routing

Info

Publication number
TWI563389B
TWI563389B TW105102286A TW105102286A TWI563389B TW I563389 B TWI563389 B TW I563389B TW 105102286 A TW105102286 A TW 105102286A TW 105102286 A TW105102286 A TW 105102286A TW I563389 B TWI563389 B TW I563389B
Authority
TW
Taiwan
Prior art keywords
bidirectional lane
lane routing
routing
bidirectional
lane
Prior art date
Application number
TW105102286A
Other languages
English (en)
Other versions
TW201635156A (zh
Inventor
Roger A Pearson
Shane Ward
Raphael Gay
Original Assignee
Hewlett Packard Development Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Development Co filed Critical Hewlett Packard Development Co
Publication of TW201635156A publication Critical patent/TW201635156A/zh
Application granted granted Critical
Publication of TWI563389B publication Critical patent/TWI563389B/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/409—Mechanical coupling
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Information Transfer Systems (AREA)
TW105102286A 2015-01-28 2016-01-26 Bidirectional lane routing TWI563389B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US2015/013246 WO2016122480A1 (en) 2015-01-28 2015-01-28 Bidirectional lane routing

Publications (2)

Publication Number Publication Date
TW201635156A TW201635156A (zh) 2016-10-01
TWI563389B true TWI563389B (en) 2016-12-21

Family

ID=56543908

Family Applications (1)

Application Number Title Priority Date Filing Date
TW105102286A TWI563389B (en) 2015-01-28 2016-01-26 Bidirectional lane routing

Country Status (3)

Country Link
US (1) US10248605B2 (zh)
TW (1) TWI563389B (zh)
WO (1) WO2016122480A1 (zh)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6538593B2 (ja) * 2016-03-11 2019-07-03 東芝メモリ株式会社 ホスト装置
WO2018140045A1 (en) * 2017-01-28 2018-08-02 Hewlett-Packard Development Company, L.P. Adaptable connector with external i/o port
TW202005485A (zh) * 2018-06-01 2020-01-16 緯穎科技服務股份有限公司 擴充快捷外設互聯標準兼容性的電路
US11436020B2 (en) * 2020-07-21 2022-09-06 Dell Products L.P. Systems and methods to bifurcate at least one peripheral component interconnect express (PCIE) port in accordance with a user-selectable PCIE bifurcation setting
CN113010462B (zh) * 2021-03-12 2023-02-17 英业达科技有限公司 自动调整PCIe信道配置的电路结构与方法
US20230238725A1 (en) * 2023-04-01 2023-07-27 Philip Theodoseau Pass-through connector

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200723033A (en) * 2005-12-08 2007-06-16 Inventec Corp Data processing method and system
TW200801954A (en) * 2006-03-13 2008-01-01 Intel Corp Input/output agent having multiple secondary ports
US8700764B2 (en) * 2009-09-28 2014-04-15 International Business Machines Corporation Routing incoming messages at a blade chassis
US8848727B2 (en) * 2004-02-13 2014-09-30 Oracle International Corporation Hierarchical transport protocol stack for data transfer between enterprise servers

Family Cites Families (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5659781A (en) * 1994-06-29 1997-08-19 Larson; Noble G. Bidirectional systolic ring network
US5572688A (en) * 1994-09-30 1996-11-05 Tyan Computer Corporation Primary bus processing element with multifunction interconnection to secondary bus
US5911049A (en) * 1995-07-21 1999-06-08 Ricoh Company, Ltd. PCI connection system for a printer controller board
US6004139A (en) * 1997-06-24 1999-12-21 International Business Machines Corporation Memory module interface card adapter
JP3895071B2 (ja) * 1999-03-12 2007-03-22 インターナショナル・ビジネス・マシーンズ・コーポレーション バス・ブリッジ回路、情報処理システム、及びカードバス・コントローラ
JP2001177208A (ja) * 1999-12-15 2001-06-29 Hitachi Ltd 基板集合体
DE10032339A1 (de) * 2000-07-04 2002-01-24 Hartmann Elektronik Gmbh Vorrichtung und Brückenkarte für einen Computer
US6356966B1 (en) * 2000-09-12 2002-03-12 Apw Ltd. System and method for bridging bus segments on a backplane and coupling single board computers to a backplane
US7099969B2 (en) 2003-11-06 2006-08-29 Dell Products L.P. Dynamic reconfiguration of PCI Express links
US7246190B2 (en) * 2004-04-21 2007-07-17 Hewlett-Packard Development Company, L.P. Method and apparatus for bringing bus lanes in a computer system using a jumper board
US6985152B2 (en) * 2004-04-23 2006-01-10 Nvidia Corporation Point-to-point bus bridging without a bridge controller
US7005877B2 (en) * 2004-07-13 2006-02-28 Inventec Corporation Burn-in adapter
US7640383B2 (en) * 2004-11-05 2009-12-29 Via Technologies Inc. Method and related apparatus for configuring lanes to access ports
US7077679B1 (en) * 2004-12-08 2006-07-18 Nvidia Corporation Retention clip for conductive bridge joined to PC board
US7793029B1 (en) * 2005-05-17 2010-09-07 Nvidia Corporation Translation device apparatus for configuring printed circuit board connectors
US7539801B2 (en) * 2005-05-27 2009-05-26 Ati Technologies Ulc Computing device with flexibly configurable expansion slots, and method of operation
US7477257B2 (en) 2005-12-15 2009-01-13 Nvidia Corporation Apparatus, system, and method for graphics memory hub
US7325086B2 (en) * 2005-12-15 2008-01-29 Via Technologies, Inc. Method and system for multiple GPU support
US7496742B2 (en) 2006-02-07 2009-02-24 Dell Products L.P. Method and system of supporting multi-plugging in X8 and X16 PCI express slots
US7447825B2 (en) * 2006-03-10 2008-11-04 Inventec Corporation PCI-E automatic allocation system
US7353316B2 (en) * 2006-03-24 2008-04-01 Micron Technology, Inc. System and method for re-routing signals between memory system components
US8103993B2 (en) * 2006-05-24 2012-01-24 International Business Machines Corporation Structure for dynamically allocating lanes to a plurality of PCI express connectors
US7562174B2 (en) * 2006-06-15 2009-07-14 Nvidia Corporation Motherboard having hard-wired private bus between graphics cards
KR101419292B1 (ko) * 2008-02-20 2014-07-14 휴렛-팩커드 디벨롭먼트 컴퍼니, 엘.피. 2개의 기준 클럭을 구비한 리드라이버 및 그의 동작 방법
US8271715B2 (en) 2008-03-31 2012-09-18 Intel Corporation Modular scalable PCI-Express implementation
TWI391058B (zh) * 2009-08-18 2013-03-21 Pegatron Corp 主機板及應用其的可攜式電子裝置
US8949509B2 (en) * 2010-12-06 2015-02-03 OCZ Storage Solutions Inc. Mass storage systems and methods using solid-state storage media and ancillary interfaces for direct communication between memory cards
US20120260015A1 (en) 2011-04-07 2012-10-11 Raphael Gay Pci express port bifurcation systems and methods
CN102890665A (zh) * 2011-07-22 2013-01-23 鸿富锦精密工业（深圳）有限公司 连接器组合及其附属卡
CN102931546A (zh) * 2011-08-10 2013-02-13 鸿富锦精密工业（深圳）有限公司 连接器组合
CN102929333A (zh) * 2011-08-10 2013-02-13 鸿富锦精密工业（深圳）有限公司 连接器组合

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8848727B2 (en) * 2004-02-13 2014-09-30 Oracle International Corporation Hierarchical transport protocol stack for data transfer between enterprise servers
TW200723033A (en) * 2005-12-08 2007-06-16 Inventec Corp Data processing method and system
TW200801954A (en) * 2006-03-13 2008-01-01 Intel Corp Input/output agent having multiple secondary ports
US8700764B2 (en) * 2009-09-28 2014-04-15 International Business Machines Corporation Routing incoming messages at a blade chassis

Also Published As

Publication number Publication date
US20170371823A1 (en) 2017-12-28
US10248605B2 (en) 2019-04-02
TW201635156A (zh) 2016-10-01
WO2016122480A1 (en) 2016-08-04

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees