TWI553804B - Substrate structure and method of manufacture thereof - Google Patents

Substrate structure and method of manufacture thereof Download PDF

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Publication number
TWI553804B
TWI553804B TW103119676A TW103119676A TWI553804B TW I553804 B TWI553804 B TW I553804B TW 103119676 A TW103119676 A TW 103119676A TW 103119676 A TW103119676 A TW 103119676A TW I553804 B TWI553804 B TW I553804B
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Taiwan
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conductive
line
metal layer
holes
width
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TW103119676A
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Chinese (zh)
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TW201546981A (en
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林俊賢
邱士超
白裕呈
沈子傑
黃富堂
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矽品精密工業股份有限公司
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Priority to TW103119676A priority Critical patent/TWI553804B/en
Priority to CN201410287466.4A priority patent/CN105246246B/en
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基板結構之製法 Method of manufacturing substrate structure

本發明係關於一種基板結構及其製法,特別是指一種形成線路於導電孔之端部上之基板結構及其製法。 The present invention relates to a substrate structure and a method of fabricating the same, and more particularly to a substrate structure for forming a line on an end portion of a conductive hole and a method of fabricating the same.

由於電子產品朝向輕薄短小之趨勢且其功能不斷地增加,使得基板結構上之線路亦隨之趨向密集化,因而該些線路之間距日益縮小、配置數量愈來愈多、佈線密度亦愈來愈高。 As electronic products tend to be light and thin, and their functions continue to increase, the lines on the substrate structure tend to become denser. Therefore, the distance between the lines is shrinking, the number of configurations is increasing, and the wiring density is getting more and more. high.

第1A圖與第1B圖係分別繪示習知技術之一基板結構1之剖視示意圖及部分俯視示意圖。如圖所示,基板結構1係包括一基板本體10、一第一增層結構11、一第二增層結構12、二導電盲孔13、二第一線路14以及至少一第二線路15。 1A and 1B are respectively a cross-sectional view and a partial plan view showing a substrate structure 1 of a conventional technique. As shown, the substrate structure 1 includes a substrate body 10, a first build-up structure 11, a second build-up structure 12, two conductive blind vias 13, two first traces 14, and at least one second trace 15.

該基板本體10係具有相對之第一表面10a與第二表面10b,該第一增層結構11與該第二增層結構12係分別形成於該基板本體10之第一表面10a與第二表面10b上,該二導電盲孔13係形成於該第一增層結構11中以電性連接該基板本體10。 The substrate body 10 has an opposite first surface 10a and a second surface 10b. The first build-up structure 11 and the second build-up structure 12 are respectively formed on the first surface 10a and the second surface of the substrate body 10. The two conductive blind vias 13 are formed in the first build-up structure 11 to electrically connect the substrate body 10 .

該二第一線路14係形成於該第一增層結構11上以分別通過該二導電盲孔13之端部,該第二線路15係形成於該第一增層結構11上以通過該二導電盲孔13之間。該二第一線路14係具有形成於該二導電盲孔13之端部上之二銲墊141,且該銲墊141之寬度A1係大於該導電盲孔13之端部之寬度A2,藉以避免進行蝕刻作業時流入蝕刻液至該導電盲孔13內。 The two first lines 14 are formed on the first build-up structure 11 to pass through the ends of the two conductive blind holes 13, respectively, and the second line 15 is formed on the first build-up structure 11 to pass the two Between the conductive blind holes 13. The two first lines 14 have two pads 141 formed on the ends of the two conductive vias 13 , and the width A1 of the pads 141 is greater than the width A2 of the ends of the conductive vias 13 to avoid The etching liquid flows into the conductive blind via 13 during the etching operation.

上述第1A圖與第1B圖之基板結構1之缺點,在於該銲墊141之寬度A1係大於該導電盲孔13之端部之寬度A2,所以當該些第一線路14與第二線路15之密度提高時,該些銲墊141會佔據該第一增層結構11之表面上之部分面積,因而減少該些銲墊141之間可通過之第二線路15之數量,導致降低該些第一線路14與第二線路15之配置數量及佈線密度。 The disadvantage of the substrate structure 1 of FIG. 1A and FIG. 1B is that the width A1 of the pad 141 is greater than the width A2 of the end of the conductive via 13 , so when the first line 14 and the second line 15 are When the density is increased, the pads 141 occupy a portion of the surface of the first build-up structure 11, thereby reducing the number of second lines 15 that can pass between the pads 141, resulting in a reduction in the number of pads. The number of arrangements and the wiring density of a line 14 and a second line 15.

為解決前述問題,遂發展出如第2A圖與第2B圖所示之基板結構1'。 In order to solve the aforementioned problems, the substrate structure 1' as shown in Figs. 2A and 2B has been developed.

第2A圖與第2B圖係分別繪示習知技術之另一基板結構1'之剖視示意圖及部分俯視示意圖。第2A圖與第2B圖之基板結構1'與上述第1A圖與第1B之基板結構1大致相同,其主要差異在於:第2A圖與第2B圖之基板結構1'係縮小該銲墊141之寬度A1,以使該銲墊141之寬度A1等於該第一增層結構11上之第一線路14之寬度A3,並小於該導電盲孔13之端部之寬度A2。 2A and 2B are respectively a cross-sectional view and a partial top view of another substrate structure 1' of the prior art. The substrate structure 1' of FIGS. 2A and 2B is substantially the same as the substrate structure 1 of the first FIG. 1A and the first BB, and the main difference is that the substrate structure 1' of FIGS. 2A and 2B reduces the pad 141. The width A1 is such that the width A1 of the pad 141 is equal to the width A3 of the first line 14 on the first build-up structure 11 and smaller than the width A2 of the end of the conductive blind hole 13.

惟,上述第2A圖與第2B之基板結構1'之缺點,在於 該基板結構1'雖可提高該些第一線路14與第二線路15之配置數量及佈線密度,但因該基板結構1'需額外製作第一增層結構11(或加上第二增層結構12),才能形成該些導電盲孔13、第一線路14與第二線路15於該第一增層結構11上,導致該基板結構1'之製程較為複雜且成本較高。 However, the disadvantages of the substrate structure 1' of the above 2A and 2B are that The substrate structure 1 ′ can increase the number of the first lines 14 and the second lines 15 and the wiring density, but the substrate structure 1 ′ needs to additionally fabricate the first build-up structure 11 (or add a second build-up layer) The structure 12) can form the conductive vias 13, the first lines 14 and the second lines 15 on the first build-up structure 11, resulting in a complicated process and high cost of the substrate structure 1'.

因此,如何克服上述習知技術的問題,實已成目前亟欲解決的課題。 Therefore, how to overcome the problems of the above-mentioned prior art has become a problem that is currently being solved.

本發明係提供一種基板結構,其包括:一基板本體,係具有相對之第一表面與第二表面、及貫穿該第一表面與該第二表面之至少二導電孔;至少二第一線路,係形成於該基板本體上以分別延伸至該至少二導電孔之端部上,且該第一線路於該導電孔之端部上之寬度係小於該導電孔之端部之寬度;以及至少一第二線路,係形成於該基板本體上以通過該至少二導電孔之端部上之該至少二第一線路之間。 The present invention provides a substrate structure, comprising: a substrate body having opposite first and second surfaces, and at least two conductive holes extending through the first surface and the second surface; at least two first lines, Forming on the substrate body to extend to the ends of the at least two conductive holes, respectively, and the width of the first line on the end of the conductive hole is smaller than the width of the end of the conductive hole; and at least one The second line is formed on the substrate body to pass between the at least two first lines on the end of the at least two conductive holes.

上述基板結構可包括金屬層,係形成於該基板本體之第一表面與第二表面其中一者或二者上。該基板結構亦可包括一第二銲墊,係形成於該導電孔之另一端部上以經由該導電孔電性連接該第一線路,且該第二銲墊之寬度係大於該導電孔之寬度。 The substrate structure may include a metal layer formed on one or both of the first surface and the second surface of the substrate body. The substrate structure may further include a second pad formed on the other end of the conductive via to electrically connect the first line via the conductive via, and the width of the second pad is greater than the conductive via width.

本發明復提供一種基板結構之製法,其包括:提供一基板本體且其具有相對之第一表面與第二表面、及貫穿該第一表面與該第二表面之至少二導電孔;於該基板本體上 形成至少二分別延伸至該二導電孔之端部上的第一線路,且該第一線路於該導電孔之端部上之寬度係小於該導電孔之端部之寬度;以及於該基板本體上形成至少一通過該至少二導電孔之端部上之該至少二第一線路之間的第二線路。 The present invention provides a method of fabricating a substrate structure, comprising: providing a substrate body having opposite first and second surfaces, and at least two conductive holes extending through the first surface and the second surface; Ontology Forming at least two first lines respectively extending to the ends of the two conductive holes, and the width of the first line on the end of the conductive hole is smaller than the width of the end of the conductive hole; and the substrate body Forming at least one second line between the at least two first lines on the end of the at least two conductive holes.

上述基板結構之製法可包括形成金屬層於該基板本體之第一表面與第二表面其中一者或二者上。 The above substrate structure can be formed by forming a metal layer on one or both of the first surface and the second surface of the substrate body.

上述形成該至少二導電孔、至少二第一線路與第一線路之製程可包括:形成至少二貫穿孔以貫穿該金屬層、該基板本體之第一表面與第二表面;形成第一阻層於該金屬層上,該第一阻層係具有自該金屬層上分別延伸至該至少二貫穿孔上之至少二第一溝槽與介於該至少二第一溝槽間之至少一第二溝槽,且該第一溝槽之寬度係小於該貫穿孔之寬度;以及填充導電材料於該至少二貫穿孔內以形成該至少二導電孔,並形成該導電材料於該至少二第一溝槽內與該至少二導電孔之端部上以形成該至少二第一線路,且形成該導電材料於該第二溝槽內以形成該第二線路。 The forming the at least two conductive holes, the at least two first lines and the first line may include: forming at least two through holes to penetrate the metal layer, the first surface and the second surface of the substrate body; forming a first resist layer The first resistive layer has at least two first trenches extending from the metal layer to the at least two through holes and at least one second between the at least two first trenches a trench, wherein the width of the first trench is smaller than a width of the through hole; and filling a conductive material in the at least two through holes to form the at least two conductive holes, and forming the conductive material in the at least two first trenches Forming the at least two first lines in the groove and the end of the at least two conductive holes, and forming the conductive material in the second groove to form the second line.

上述基板結構之製法可包括移除該第一阻層以外露出部分該金屬層;形成第二阻層於該第一線路與該第二線路上;依據該第二阻層對該金屬層進行蝕刻作業以移除部分該金屬層;以及移除該第二阻層以外露出部分該基板本體。 The method of fabricating the substrate structure may include removing a portion of the metal layer except the first resist layer; forming a second resist layer on the first line and the second line; etching the metal layer according to the second resist layer Working to remove a portion of the metal layer; and removing the portion of the substrate body other than the second resist layer.

上述形成該至少二導電孔、至少二第一線路與第一線路之製程可包括:形成至少二貫穿孔以貫穿該金屬層、該 基板本體之第一表面與第二表面;填充導電材料於該至少二貫穿孔內,並形成該導電材料於該金屬層上;形成第一阻層於該金屬層之導電材料上,該第一阻層係具有分別對應於該至少二貫穿孔之至少二第一阻隔部與介於該二第一阻隔部間之至少一第二阻隔部,且該第一阻隔部之寬度係小於該貫穿孔之寬度;以及依據該第一阻層對該金屬層與該導電材料進行蝕刻作業,以依據該至少二貫穿孔、至少二第一阻隔部與第二阻隔部分別形成該至少二導電孔、至少二第一線路及第二線路。 The forming the at least two conductive holes, the at least two first lines and the first line may include: forming at least two through holes to penetrate the metal layer, a first surface and a second surface of the substrate body; filling a conductive material in the at least two through holes, and forming the conductive material on the metal layer; forming a first resist layer on the conductive material of the metal layer, the first The barrier layer has at least two first blocking portions respectively corresponding to the at least two through holes and at least one second blocking portion interposed between the two first blocking portions, and the width of the first blocking portion is smaller than the through hole The width of the metal layer and the conductive material are etched according to the first resist layer, and the at least two conductive holes are formed according to the at least two through holes, the at least two first blocking portions and the second blocking portion, respectively. Two first lines and second lines.

上述基板結構之製法可包括移除該第一阻層,以外露出部分該基板本體、部分該至少二導電孔之端部、該至少二第一線路與該第二線路。 The substrate structure may be formed by removing the first resist layer and exposing a portion of the substrate body, a portion of the at least two conductive via ends, the at least two first lines and the second line.

上述基板結構及其製法中,該第一線路可形成於該金屬層與該導電孔之端部上,亦可再穿越過該導電孔之端部外,且該第二線路可形成於該金屬層上。該導電孔之端部上之第一線路可作為第一銲墊。 In the above substrate structure and the method of manufacturing the same, the first line may be formed on the end of the metal layer and the conductive hole, or may pass through the end of the conductive hole, and the second line may be formed on the metal On the floor. The first line on the end of the conductive hole can serve as the first pad.

上述基板結構之製法可包括形成一第二銲墊於該導電孔之另一端部上以經由該導電孔電性連接該第一線路,該第二銲墊之寬度可大於該導電孔之寬度。 The substrate structure may be formed by forming a second pad on the other end of the conductive via to electrically connect the first line via the conductive via, and the second pad may have a width greater than a width of the conductive via.

上述基板結構及其製法中,該基板本體之材質可為FR-4樹脂、FR-5樹脂、環氧樹脂、聚酯纖維、聚亞醯胺樹脂、BT樹脂或玻璃纖維等。 In the above substrate structure and the method of manufacturing the same, the material of the substrate body may be FR-4 resin, FR-5 resin, epoxy resin, polyester fiber, polyamidamine resin, BT resin or glass fiber.

由上可知,本發明之基板結構及其製法中,主要係於基板本體中形成至少二導電孔以貫穿該基板本體之相對兩 表面,並於該基板本體之表面上形成至少二第一線路以分別延伸至該至少二導電孔之端部上,且該第一線路之寬度可小於該導電孔之端部之寬度,以利至少一第二線路通過該二導電孔之端部上之二第一線路之間。藉此,本發明除可提高該些第一線路與第二線路之配置數量及佈線密度外,亦能簡化該基板結構之製程,並降低該基板結構之成本。 As can be seen from the above, in the substrate structure of the present invention and the method of manufacturing the same, the method further comprises forming at least two conductive holes in the substrate body to penetrate the opposite sides of the substrate body. And forming at least two first lines on the surface of the substrate body to extend to the ends of the at least two conductive holes respectively, and the width of the first line may be smaller than the width of the end of the conductive holes, so as to benefit At least one second line passes between the two first lines on the ends of the two conductive holes. Therefore, in addition to improving the number of the first line and the second line and the wiring density, the present invention can also simplify the manufacturing process of the substrate structure and reduce the cost of the substrate structure.

1、1'、2‧‧‧基板結構 1,1', 2‧‧‧ substrate structure

10、20‧‧‧基板本體 10, 20‧‧‧ substrate body

10a、20a‧‧‧第一表面 10a, 20a‧‧‧ first surface

10b、20b‧‧‧第二表面 10b, 20b‧‧‧ second surface

11‧‧‧第一增層結構 11‧‧‧First buildup structure

12‧‧‧第二增層結構 12‧‧‧Second layered structure

13‧‧‧導電盲孔 13‧‧‧ Conductive blind holes

14、24‧‧‧第一線路 14, 24‧‧‧ first line

141‧‧‧銲墊 141‧‧‧ solder pads

15、25‧‧‧第二線路 15, 25‧‧‧ second line

21‧‧‧金屬層 21‧‧‧metal layer

22‧‧‧貫穿孔 22‧‧‧through holes

221‧‧‧導電材料 221‧‧‧Electrical materials

222‧‧‧導電孔 222‧‧‧Electrical hole

223‧‧‧端部 223‧‧‧End

23‧‧‧第一阻層 23‧‧‧First resistance layer

231‧‧‧第一溝槽 231‧‧‧First trench

232‧‧‧第二溝槽 232‧‧‧Second trench

233‧‧‧第一阻隔部 233‧‧‧First barrier

234‧‧‧第二阻隔部 234‧‧‧Second obstruction

241‧‧‧第一銲墊 241‧‧‧First pad

242‧‧‧第二銲墊 242‧‧‧Second pad

26‧‧‧第二阻層 26‧‧‧second barrier layer

A1、A2、A3、B1、B2、B3‧‧‧寬度 A1, A2, A3, B1, B2, B3‧‧‧ width

第1A圖與第1B圖係分別繪示習知技術之一基板結構之剖視示意圖及部分俯視示意圖;第2A圖與第2B圖係分別繪示習知技術之另一基板結構之剖視示意圖及部分俯視示意圖;第3A圖至第3F"圖係繪示本發明之基板結構及其製法之一實施例之剖視示意圖,其中,第3F'圖為第3F圖之另一態樣,第3F"圖為第3F圖或第3F'圖之部分俯視示意圖;以及第4A圖至第4E"圖係繪示本發明之基板結構及其製法之另一實施例之剖視示意圖,其中,第4E'圖為第4E圖之另一態樣,第4E"圖為第4E圖或第4E'圖之部分俯視示意圖。 1A and 1B are respectively a cross-sectional view and a partial top view of a substrate structure of the prior art; FIGS. 2A and 2B are respectively schematic cross-sectional views showing another substrate structure of the prior art; 3A to 3F" are schematic cross-sectional views showing an embodiment of a substrate structure and a method of fabricating the same according to an embodiment of the present invention, wherein the 3F' is a third aspect of the 3F, 3F" is a partial plan view of the 3F or 3F' figure; and 4A to 4E" are schematic cross-sectional views showing another embodiment of the substrate structure of the present invention and a method of manufacturing the same, wherein 4E' is another aspect of FIG. 4E, and FIG. 4E" is a partial plan view of FIG. 4E or 4E'.

以下藉由特定的具體實施例說明本發明之實施方式,熟悉此技藝之人士可由本說明書所揭示之內容輕易地瞭解本發明之其他優點及功效。 The other embodiments of the present invention will be readily understood by those skilled in the art from this disclosure.

須知,本說明書所附圖式所繪示之結構、比例、大小等,均僅用以配合說明書所揭示之內容,以供熟悉此技藝之人士之瞭解與閱讀,並非用以限定本發明可實施之限定條件,故不具技術上之實質意義,任何結構之修飾、比例關係之改變或大小之調整,在不影響本發明所能產生之功效及所能達成之目的下,均應仍落在本發明所揭示之技術內容得能涵蓋之範圍內。 It is to be understood that the structure, the proportions, the size, and the like of the present invention are intended to be used in conjunction with the disclosure of the specification, and are not intended to limit the invention. The conditions are limited, so it is not technically meaningful. Any modification of the structure, change of the proportional relationship or adjustment of the size should remain in this book without affecting the effects and the objectives that can be achieved by the present invention. The technical content disclosed in the invention can be covered.

同時,本說明書中所引用之如「上」、「一」、「第一」、「第二」、「表面」或「端部」等用語,亦僅為便於敘述之明瞭,而非用以限定本發明可實施之範圍,其相對關係之改變或調整,在無實質變更技術內容下,當亦視為本發明可實施之範疇。 At the same time, terms such as "upper", "one", "first", "second", "surface" or "end" as quoted in this manual are for convenience only, and not for The scope of the invention can be implemented, and the relative changes or adjustments of the invention are considered to be within the scope of the invention.

第3A圖至第3F"圖係繪示本發明之基板結構2及其製法之一實施例之剖視示意圖,其中,第3F'圖為第3F圖之另一態樣,第3F"圖為第3F圖或第3F'圖之部分俯視示意圖。 3A to 3F" are schematic cross-sectional views showing an embodiment of the substrate structure 2 of the present invention and a method of manufacturing the same, wherein the 3F' is a view of another 3F, and the 3F" is A partial top view of the 3F or 3F' diagram.

如第3A圖所示,先提供一基板本體20且其具有相對之第一表面20a與第二表面20b。該基板本體20可為核心(core)基板或核心層等,且其材質可例如為FR-4樹脂、FR-5樹脂、環氧樹脂(epoxy)、聚酯纖維(polyester)、聚亞醯胺(polyimide)樹脂、BT樹脂(聚雙醯胺疊氮樹脂)或玻璃纖維等絕緣材料。 As shown in FIG. 3A, a substrate body 20 is provided first and has opposite first and second surfaces 20a, 20b. The substrate body 20 can be a core substrate or a core layer or the like, and the material thereof can be, for example, FR-4 resin, FR-5 resin, epoxy, polyester, polytheneamine. (polyimide) resin, BT resin (polybiguanamine azide resin) or insulating material such as glass fiber.

在本實施例中,可先形成一或二金屬層21於該基板本體20之第一表面20a與第二表面20b其中一者或二者上, 再形成至少二具有寬度B1之貫穿孔22以貫穿該金屬層21、基板本體20之第一表面20a與第二表面20b。 In this embodiment, one or two metal layers 21 may be formed on one or both of the first surface 20a and the second surface 20b of the substrate body 20. Further, at least two through holes 22 having a width B1 are formed to penetrate the metal layer 21 and the first surface 20a and the second surface 20b of the substrate body 20.

但在其他實施例中,亦可不必形成該金屬層21於該基板本體20之第一表面20a或第二表面20b上,從而直接形成該至少二貫穿孔22於該基板本體20中以貫穿該第一表面20a與該第二表面20b。 In other embodiments, the metal layer 21 is not necessarily formed on the first surface 20a or the second surface 20b of the substrate body 20, so that the at least two through holes 22 are directly formed in the substrate body 20 to penetrate the The first surface 20a and the second surface 20b.

如第3B圖所示,可依據該金屬層21是形成於該基板本體20之第一表面20a與第二表面20b其中一者或二者上,以形成一或二第一阻層23於該金屬層21上。 As shown in FIG. 3B, the metal layer 21 may be formed on one or both of the first surface 20a and the second surface 20b of the substrate body 20 to form one or two first resist layers 23 thereon. On the metal layer 21.

該第一阻層23可具有至少二第一溝槽231與至少一(如二個)第二溝槽232,該至少二第一溝槽231可自該金屬層21上延伸至該貫穿孔22上,亦可再穿越過該貫穿孔22外,且該第一溝槽231之寬度B2係小於該貫穿孔22之寬度B1,該第二溝槽232係介於該二第一溝槽231之間。 The first resist layer 23 may have at least two first trenches 231 and at least one (eg, two) second trenches 232 extending from the metal layer 21 to the through holes 22 . The width of the first trench 231 is smaller than the width B1 of the through hole 22, and the second trench 232 is interposed between the two first trenches 231. between.

如第3C圖所示,填充導電材料221於該至少二貫穿孔22內以形成至少二導電孔222,並形成該導電材料221於該至少二第一溝槽231內與該至少二導電孔222之端部223上以形成至少二第一線路24,且形成該導電材料221於該第二溝槽232內以形成第二線路25。 As shown in FIG. 3C , a conductive material 221 is filled in the at least two through holes 22 to form at least two conductive holes 222 , and the conductive material 221 is formed in the at least two first trenches 231 and the at least two conductive vias 222 . The end portion 223 is formed to form at least two first lines 24, and the conductive material 221 is formed in the second trench 232 to form a second line 25.

該第一線路24可形成於該金屬層21及該導電孔222之端部223上,亦可再穿越過該導電孔222之端部223外,該第二線路25可形成於該金屬層21上。該導電孔222之端部223上之第一線路24可作為第一銲墊241以供電性連接外部元件(如銲球或銲線),且該第一銲墊241之寬度B2 係等於或大約等於該金屬層21上之第一線路24之寬度B2。 The first line 24 can be formed on the metal layer 21 and the end portion 223 of the conductive hole 222, and can also pass through the end portion 223 of the conductive hole 222. The second line 25 can be formed on the metal layer 21. on. The first line 24 on the end portion 223 of the conductive hole 222 can serve as a first pad 241 to electrically connect an external component (such as a solder ball or a bonding wire), and the width B2 of the first pad 241 It is equal to or approximately equal to the width B2 of the first line 24 on the metal layer 21.

在本實施例中,該至少二導電孔222、至少二第一線路24與第二線路25係為同時形成、一體成形或相同材質。但在其他實施例中,該至少二導電孔222、至少二第一線路24與第二線路25亦可為非同時形成(先後形成)、非一體成形(分別成形)或不同材質。 In this embodiment, the at least two conductive holes 222, the at least two first lines 24 and the second line 25 are simultaneously formed, integrally formed or of the same material. However, in other embodiments, the at least two conductive holes 222, the at least two first lines 24 and the second line 25 may be formed at the same time (formed sequentially), non-integrally formed (formed separately) or different materials.

如第3D圖所示,移除該第一阻層23以外露出部分該金屬層21。 As shown in FIG. 3D, a portion of the metal layer 21 is exposed except for the first resist layer 23.

如第3E圖所示,可依據該第一線路24與該第二線路25是形成於該一或二金屬層21上,以形成一或二第二阻層26於該第一線路24與該第二線路25上。 As shown in FIG. 3E, the first line 24 and the second line 25 may be formed on the one or two metal layers 21 to form one or two second resist layers 26 on the first line 24 and the On the second line 25.

如第3F圖與3F"圖所示,可依據該第二阻層26對該金屬層21進行蝕刻作業以移除部分該金屬層21。接著,可移除該第二阻層26以外露出部分該基板本體20之第一表面20a與第二表面20b,藉此形成該基板結構2。 As shown in FIG. 3F and FIG. 3F, the metal layer 21 may be etched according to the second resist layer 26 to remove a portion of the metal layer 21. Then, the exposed portion of the second resist layer 26 may be removed. The first surface 20a and the second surface 20b of the substrate body 20 thereby form the substrate structure 2.

此外,如第3F'圖與3F"圖所示,第3F'圖為上述第3F圖之另一態樣。第3F'圖與第3F圖之主要差異在於:第3F'圖係形成一第二銲墊242於該二導電孔222其中一者之另一端部(如下端部)223上以經由該導電孔222電性連接該第一線路24,且該第二銲墊242之寬度B3可大於該導電孔222之寬度B1以供電性連接外部元件(如銲球或銲線)。 In addition, as shown in the 3F' and 3F" figures, the 3F' is another aspect of the above 3F. The main difference between the 3F' and the 3F is that the 3F' is formed. The second pad 242 is electrically connected to the first line 24 via the conductive hole 222 at the other end (the end) 223 of the two conductive holes 222, and the width B3 of the second pad 242 is A width B1 larger than the conductive hole 222 is used to electrically connect an external component such as a solder ball or a bonding wire.

第4A圖至第4E"圖係繪示本發明之基板結構2及其製法之另一實施例之剖視示意圖,其中,第4E'圖為第4E圖 之另一態樣,第4E"圖為第4E圖或第4E'圖之部分俯視示意圖。 4A to 4E" are schematic cross-sectional views showing another embodiment of the substrate structure 2 of the present invention and a method of manufacturing the same, wherein the 4E' is a 4E In another aspect, the 4E" figure is a partial top view of the 4E or 4E'.

如第4A圖所示,先提供一基板本體20且其具有相對之第一表面20a與第二表面20b,該基板本體20可為核心基板或核心層等。 As shown in FIG. 4A, a substrate body 20 is provided and has an opposite first surface 20a and a second surface 20b. The substrate body 20 can be a core substrate or a core layer or the like.

在本實施例中,可先形成一或二金屬層21於該基板本體20之第一表面20a與第二表面20b其中一者或二者上,再形成至少二具有寬度B1之貫穿孔22以貫穿該金屬層21、基板本體20之第一表面20a與第二表面20b。 In this embodiment, one or two metal layers 21 may be formed on one or both of the first surface 20a and the second surface 20b of the substrate body 20 to form at least two through holes 22 having a width B1. The first surface 20a and the second surface 20b of the substrate body 20 are penetrated through the metal layer 21.

但在其他實施例中,亦可不必形成該金屬層21於該基板本體20之第一表面20a或第二表面20b上,從而直接形成該至少二貫穿孔於該基板本體20中以貫穿該第一表面20a與該第二表面20b。 In other embodiments, the metal layer 21 is not necessarily formed on the first surface 20a or the second surface 20b of the substrate body 20, so that the at least two through holes are directly formed in the substrate body 20 to penetrate the first surface. A surface 20a and the second surface 20b.

如第4B圖所示,填充導電材料221於該至少二貫穿孔22內,並依據該金屬層21是形成於該基板本體20之第一表面20a與第二表面20b其中一者或二者上,以形成該導電材料221於該一或二金屬層21上。 As shown in FIG. 4B, the conductive material 221 is filled in the at least two through holes 22, and the metal layer 21 is formed on one or both of the first surface 20a and the second surface 20b of the substrate body 20. To form the conductive material 221 on the one or two metal layers 21.

如第4C圖所示,可依據該該導電材料221是形成於該一或二金屬層21上,以形成一或二第一阻層23於該金屬層21上。 As shown in FIG. 4C, the conductive material 221 may be formed on the one or two metal layers 21 to form one or two first resist layers 23 on the metal layer 21.

該第一阻層23可具有分別對應於該至少二貫穿孔22之至少二第一阻隔部233與介於該二第一阻隔部233間之至少一(如二個)第二阻隔部234,且該第一阻隔部233之寬度B2係小於該貫穿孔22之寬度B1。 The first resistive layer 23 may have at least two first blocking portions 233 corresponding to the at least two through holes 22 and at least one (eg, two) second blocking portions 234 interposed between the two first blocking portions 233, The width B2 of the first blocking portion 233 is smaller than the width B1 of the through hole 22.

如第4D圖所示,依據該第一阻層23對該金屬層21與該導電材料221進行蝕刻作業,以依據該至少二貫穿孔22、至少二第一阻隔部233與第二阻隔部234分別形成該至少二導電孔222、至少二第一線路24及第二線路25。 As shown in FIG. 4D, the metal layer 21 and the conductive material 221 are etched according to the first resist layer 23, according to the at least two through holes 22, the at least two first blocking portions 233 and the second blocking portion 234. The at least two conductive holes 222, the at least two first lines 24, and the second line 25 are formed respectively.

該第一線路24可形成於該金屬層21及該導電孔222之端部223上,亦可再穿越過該導電孔222之端部223外,該第二線路25可形成於該金屬層21上。該導電孔222之端部223上之第一線路24可作為第一銲墊241以供電性連接外部元件(如銲球或銲線),且該第一銲墊241之寬度B2係等於或大約等於該金屬層21上之第一線路24之寬度B2。 The first line 24 can be formed on the metal layer 21 and the end portion 223 of the conductive hole 222, and can also pass through the end portion 223 of the conductive hole 222. The second line 25 can be formed on the metal layer 21. on. The first line 24 on the end portion 223 of the conductive hole 222 can serve as a first pad 241 to electrically connect an external component (such as a solder ball or a bonding wire), and the width B2 of the first pad 241 is equal to or approximately It is equal to the width B2 of the first line 24 on the metal layer 21.

在本實施例中,該至少二導電孔222、至少二第一線路24與第二線路25係為同時形成、一體成形或相同材質。但在其他實施例中,該至少二導電孔222、至少二第一線路24與第二線路25亦可為非同時形成(先後形成)、非一體成形(分別成形)或不同材質。 In this embodiment, the at least two conductive holes 222, the at least two first lines 24 and the second line 25 are simultaneously formed, integrally formed or of the same material. However, in other embodiments, the at least two conductive holes 222, the at least two first lines 24 and the second line 25 may be formed at the same time (formed sequentially), non-integrally formed (formed separately) or different materials.

如第4E圖與第4E'圖所示,移除該第一阻層23,以外露出部分該基板本體20、部分該至少二導電孔222之端部223、該至少二第一線路24及該第二線路25,藉此形成該基板結構2。 As shown in FIG. 4E and FIG. 4E′, the first resist layer 23 is removed, and the substrate body 20, a portion of the at least two conductive holes 222, the at least two first lines 24, and the portion are exposed. The second line 25, thereby forming the substrate structure 2.

此外,如第4E'圖與4E"圖所示,第4E'圖為上述第4E圖之另一態樣。第4E'圖與第4E圖之主要差異在於:第4E'圖係形成一第二銲墊242於該至少二導電孔222其中一者之另一端部(如下端部)223上以經由該導電孔222電性連接 該第一線路24,且該第二銲墊242之寬度B3可大於該導電孔222之寬度B1以供電性連接外部元件(如銲球或銲線)。 In addition, as shown in FIGS. 4E' and 4E", FIG. 4E' is another aspect of the above-mentioned 4E. The main difference between the 4E' and 4E is that the 4E' figure forms a first The second pad 242 is electrically connected to the other end of the at least two conductive holes 222 (the end portion 223 ) via the conductive hole 222 . The first line 24, and the width B3 of the second pad 242 may be greater than the width B1 of the conductive via 222 to electrically connect external components (such as solder balls or bonding wires).

本發明復提供一種基板結構2,如第3F圖與第3F'圖(或第4E圖與第4E'圖)所示。該基板結構2主要包括一基板本體20、至少二第一線路24以及至少一第二線路25。 The present invention provides a substrate structure 2 as shown in Figures 3F and 3F' (or Figures 4E and 4E'). The substrate structure 2 mainly includes a substrate body 20, at least two first lines 24, and at least one second line 25.

該基板本體20係具有相對之第一表面20a與第二表面20b、及貫穿該第一表面20a與該第二表面20b之至少二導電孔222。該基板本體20可為核心基板或核心層等,且其材質可例如為FR-4樹脂、FR-5樹脂、環氧樹脂、聚酯纖維、聚亞醯胺樹脂、BT樹脂或玻璃纖維等絕緣材料。 The substrate body 20 has a first surface 20a and a second surface 20b opposite to each other, and at least two conductive holes 222 extending through the first surface 20a and the second surface 20b. The substrate body 20 may be a core substrate or a core layer or the like, and the material thereof may be, for example, FR-4 resin, FR-5 resin, epoxy resin, polyester fiber, polyamido resin, BT resin or glass fiber. material.

該二第一線路24可形成於該基板本體20之第一表面20a或第二表面20b上,以分別延伸至該二導電孔222之端部223上或再穿越過該導電孔222之端部223外,且該第一線路24於該導電孔222之端部223上之寬度B2係小於該導電孔222之端部223之寬度B1。該導電孔222之端部223上之第一線路24可作為第一銲墊241以供電性連接外部元件(如銲球或銲線),且該第一銲墊241之寬度B2係等於或大約等於該金屬層21上之第一線路24之寬度B2。 The first line 24 may be formed on the first surface 20a or the second surface 20b of the substrate body 20 to extend to the end 223 of the two conductive holes 222 or to the end of the conductive hole 222. The width B2 of the first line 24 on the end portion 223 of the conductive hole 222 is smaller than the width B1 of the end portion 223 of the conductive hole 222. The first line 24 on the end portion 223 of the conductive hole 222 can serve as a first pad 241 to electrically connect an external component (such as a solder ball or a bonding wire), and the width B2 of the first pad 241 is equal to or approximately It is equal to the width B2 of the first line 24 on the metal layer 21.

該第二線路26係形成於該基板本體20上以通過該至少二導電孔222之端部223上之該至少二第一線路24之間。 The second line 26 is formed on the substrate body 20 to pass between the at least two first lines 24 on the end 223 of the at least two conductive holes 222.

該基板結構2可包括一或二金屬層21,係形成於該基板本體20之第一表面20a與第二表面20b其中一者或二者 上,以使該第一線路24形成於該金屬層21與該導電孔222之端部223上或再穿越過該導電孔222之端部223外,並使該第二線路25形成於該金屬層21上。 The substrate structure 2 may include one or two metal layers 21 formed on one or both of the first surface 20a and the second surface 20b of the substrate body 20. The first line 24 is formed on the end portion 223 of the metal layer 21 and the conductive hole 222 or passes over the end portion 223 of the conductive hole 222, and the second line 25 is formed on the metal. On layer 21.

此外,如第3F'圖與3F"圖所示,第3F'圖為上述第3F圖之另一態樣。第3F'圖與第3F圖之差異在於,第3F'圖之基板結構2可包括一第二銲墊242,係形成於該二導電孔222其中一者之另一端部(如下端部)223上以經由該導電孔222電性連接該第一線路24,且該第二銲墊242之寬度B3可大於該導電孔222之寬度B1以供電性連接外部元件(如銲球或銲線)。 In addition, as shown in FIGS. 3F' and 3F", the 3F' is another aspect of the above 3F. The difference between the 3F' and the 3F is that the substrate structure 2 of the 3F' is A second pad 242 is formed on the other end of the two conductive vias 222 (the end) 223 to electrically connect the first line 24 via the conductive via 222, and the second solder The width B3 of the pad 242 may be greater than the width B1 of the conductive via 222 to electrically connect external components such as solder balls or bonding wires.

由上可知,本發明之基板結構及其製法中,主要係於基板本體中形成至少二導電孔以貫穿該基板本體之相對兩表面,並於該基板本體之表面上形成至少二第一線路以分別延伸至該至少二導電孔之端部上,且該第一線路之寬度可小於該導電孔之端部之寬度,以利至少一第二線路通過該二導電孔之端部上之二第一線路之間。藉此,本發明除可提高該些第一線路與第二線路之配置數量及佈線密度外,亦能簡化該基板結構之製程,並降低該基板結構之成本。 As can be seen from the above, the substrate structure of the present invention and the method for fabricating the same are mainly for forming at least two conductive holes in the substrate body to penetrate opposite surfaces of the substrate body, and forming at least two first lines on the surface of the substrate body. And extending to the end of the at least two conductive holes, and the width of the first line may be smaller than the width of the end of the conductive hole, so that at least one second line passes through the end of the two conductive holes Between one line. Therefore, in addition to improving the number of the first line and the second line and the wiring density, the present invention can also simplify the manufacturing process of the substrate structure and reduce the cost of the substrate structure.

上述實施例係用以例示性說明本發明之原理及其功效,而非用於限制本發明。任何熟習此項技藝之人士均可在不違背本發明之精神及範疇下,對上述實施例進行修改。因此本發明之權利保護範圍,應如申請專利範圍所列。 The above embodiments are intended to illustrate the principles of the invention and its effects, and are not intended to limit the invention. Any of the above-described embodiments may be modified by those skilled in the art without departing from the spirit and scope of the invention. Therefore, the scope of protection of the present invention should be as set forth in the scope of the patent application.

2‧‧‧基板結構 2‧‧‧Substrate structure

20‧‧‧基板本體 20‧‧‧Substrate body

20a‧‧‧第一表面 20a‧‧‧ first surface

20b‧‧‧第二表面 20b‧‧‧second surface

21‧‧‧金屬層 21‧‧‧metal layer

222‧‧‧導電孔 222‧‧‧Electrical hole

223‧‧‧端部 223‧‧‧End

24‧‧‧第一線路 24‧‧‧First line

241‧‧‧第一銲墊 241‧‧‧First pad

25‧‧‧第二線路 25‧‧‧second line

B1、B2‧‧‧寬度 B1, B2‧‧‧ width

Claims (8)

一種基板結構之製法,其包括:提供一基板本體且其具有相對之第一表面與第二表面,該基板本體之第一表面與第二表面其中一者或二者上形成有金屬層,該金屬層、該基板本體之第一表面與第二表面貫穿有至少二導電孔;於該金屬層上形成至少二分別延伸至該二導電孔之端部上的第一線路,且該第一線路於該導電孔之端部上之寬度係小於該導電孔之端部之寬度;以及於該金屬層上形成至少一通過該至少二導電孔之端部上之該至少二第一線路之間的第二線路;其中,形成該至少二導電孔、至少二第一線路與第二線路之製程係包括:形成至少二貫穿孔以貫穿該金屬層、該基板本體之第一表面與第二表面;形成第一阻層於該金屬層上,該第一阻層係具有自該金屬層上分別延伸至該至少二貫穿孔上之至少二第一溝槽與介於該至少二第一溝槽間之至少一第二溝槽,且該第一溝槽之寬度係小於該貫穿孔之寬度;以及填充導電材料於該至少二貫穿孔內以形成該至少二導電孔,並形成該導電材料於該至少二第一溝槽內與該至少二導電孔之端部上以形成該至少二第一線路,且形成該導電材料於該第二溝槽內以形成該第二 線路。 A method of fabricating a substrate structure, comprising: providing a substrate body having opposite first and second surfaces, and forming a metal layer on one or both of the first surface and the second surface of the substrate body, a metal layer, a first surface and a second surface of the substrate body having at least two conductive holes formed therein; and at least two first lines extending to the ends of the two conductive holes respectively formed on the metal layer, and the first line The width of the end of the conductive hole is smaller than the width of the end of the conductive hole; and the at least one of the at least two first lines on the end of the metal layer formed on the end of the at least two conductive holes a second line; wherein the process of forming the at least two conductive holes, the at least two first lines and the second line comprises: forming at least two through holes to penetrate the metal layer, the first surface and the second surface of the substrate body; Forming a first resist layer on the metal layer, the first resistive layer having at least two first trenches extending from the metal layer to the at least two through holes and interposed between the at least two first trenches At least one a trench, wherein the width of the first trench is smaller than a width of the through hole; and filling a conductive material in the at least two through holes to form the at least two conductive holes, and forming the conductive material in the at least two first trenches Forming the at least two first lines in the end of the slot and the at least two conductive holes, and forming the conductive material in the second trench to form the second line. 如申請專利範圍第1項所述之基板結構之製法,復包括:移除該第一阻層以外露出部分該金屬層;形成第二阻層於該第一線路與該第二線路上;依據該第二阻層對該金屬層進行蝕刻作業以移除部分該金屬層;以及移除該第二阻層以外露出該第一線路與該第二線路。 The method for manufacturing a substrate structure according to claim 1, further comprising: removing the portion of the metal layer except the first resist layer; forming a second resist layer on the first line and the second line; The second resist layer etches the metal layer to remove a portion of the metal layer; and removes the second resist layer to expose the first line and the second line. 一種基板結構之製法,其包括:提供一基板本體且其具有相對之第一表面與第二表面,該基板本體之第一表面與第二表面其中一者或二者上形成有金屬層,該金屬層、該基板本體之第一表面與第二表面貫穿有至少二導電孔;於該金屬層上形成至少二分別延伸至該二導電孔之端部上的第一線路,且該第一線路於該導電孔之端部上之寬度係小於該導電孔之端部之寬度;以及於該金屬層上形成至少一通過該至少二導電孔之端部上之該至少二第一線路之間的第二線路;其中,形成該至少二導電孔、至少二第一線路與第二線路之製程係包括:形成至少二貫穿孔以貫穿該金屬層、該基板本體之第一表面與第二表面;填充導電材料於該至少二貫穿孔內,並形成該導 電材料於該金屬層上;形成第一阻層於該金屬層之導電材料上,該第一阻層係具有分別對應於該至少二貫穿孔之至少二第一阻隔部與介於該二第一阻隔部間之至少一第二阻隔部,且該第一阻隔部之寬度係小於該貫穿孔之寬度;以及依據該第一阻層對該金屬層與該導電材料進行蝕刻作業,以依據該至少二貫穿孔、至少二第一阻隔部與第二阻隔部分別形成該至少二導電孔、至少二第一線路及第二線路。 A method of fabricating a substrate structure, comprising: providing a substrate body having opposite first and second surfaces, and forming a metal layer on one or both of the first surface and the second surface of the substrate body, a metal layer, a first surface and a second surface of the substrate body having at least two conductive holes formed therein; and at least two first lines extending to the ends of the two conductive holes respectively formed on the metal layer, and the first line The width of the end of the conductive hole is smaller than the width of the end of the conductive hole; and the at least one of the at least two first lines on the end of the metal layer formed on the end of the at least two conductive holes a second line; wherein the process of forming the at least two conductive holes, the at least two first lines and the second line comprises: forming at least two through holes to penetrate the metal layer, the first surface and the second surface of the substrate body; Filling a conductive material in the at least two through holes and forming the guide And electrically forming a first resist layer on the conductive material of the metal layer, wherein the first resist layer has at least two first blocking portions respectively corresponding to the at least two through holes and the second At least one second blocking portion between the barrier portions, and the width of the first blocking portion is smaller than the width of the through hole; and etching the metal layer and the conductive material according to the first resist layer, according to the The at least two through holes, the at least two first blocking portions and the second blocking portion respectively form the at least two conductive holes, the at least two first lines and the second line. 如申請專利範圍第3項所述之基板結構之製法,復包括移除該第一阻層,以外露出該至少二第一線路與該第二線路。 The method for fabricating a substrate structure according to claim 3, further comprising removing the first resist layer and exposing the at least two first lines and the second line. 如申請專利範圍第1項或第3項所述之基板結構之製法,其中,該第一線路係形成於該金屬層與該導電孔之端部上或再穿越過該導電孔之端部外,且該第二線路係形成於該金屬層上。 The method of fabricating a substrate structure according to claim 1 or 3, wherein the first circuit is formed on the end of the metal layer and the conductive hole or passes through the end of the conductive hole. And the second circuit is formed on the metal layer. 如申請專利範圍第1項或第3項所述之基板結構之製法,其中,各該導電孔之端部上之第一線路係作為第一銲墊。 The method of fabricating a substrate structure according to claim 1 or 3, wherein the first line on the end of each of the conductive holes serves as a first pad. 如申請專利範圍第1項或第3項所述之基板結構之製法,復包括形成一第二銲墊於該導電孔之另一端部上以經由該導電孔電性連接該第一線路,該第二銲墊之寬度並係大於該導電孔之寬度。 The method of fabricating the substrate structure according to the first or third aspect of the invention, further comprising forming a second solder pad on the other end of the conductive via to electrically connect the first line via the conductive via, The width of the second pad is greater than the width of the conductive via. 如申請專利範圍第1項或第3項所述之基板結構之製法,其中,該基板本體之材質係為FR-4樹脂、FR-5樹脂、環氧樹脂、聚酯纖維、聚亞醯胺樹脂、BT樹脂或玻璃纖維。 The method for manufacturing a substrate structure according to the first or third aspect of the invention, wherein the substrate body is made of FR-4 resin, FR-5 resin, epoxy resin, polyester fiber, polyamidoamine. Resin, BT resin or fiberglass.
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