TWI547441B - 氧化物燒結體、濺鍍用靶、及使用其而獲得之氧化物半導體薄膜 - Google Patents

氧化物燒結體、濺鍍用靶、及使用其而獲得之氧化物半導體薄膜 Download PDF

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TWI547441B
TWI547441B TW104112197A TW104112197A TWI547441B TW I547441 B TWI547441 B TW I547441B TW 104112197 A TW104112197 A TW 104112197A TW 104112197 A TW104112197 A TW 104112197A TW I547441 B TWI547441 B TW I547441B
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phase
oxide
sintered body
less
sputtering
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TW104112197A
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TW201542464A (zh
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Tokuyuki Nakayama
Eiichiro Nishimura
Fumihiko Matsumura
Masashi Iwara
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Sumitomo Metal Mining Co
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Description

氧化物燒結體、濺鍍用靶、及使用其而獲得之氧化物半導體薄膜
本發明係關於一種氧化物燒結體、靶、及使用其而獲得之氧化物半導體薄膜，更詳細而言係關於一種藉由含有銅而可降低結晶質氧化物半導體薄膜之載子濃度之濺鍍用靶、最適於獲得其之含有銅之氧化物燒結體、以及使用其而獲得之顯示出低載子濃度與高載子遷移率的結晶質之含有銅之氧化物半導體薄膜。
薄膜電晶體(Thin Film Transistor，TFT)係場效電晶體(Field Effect Transistor，以下稱為FET)之1種。TFT係具備閘極端子、源極端子及汲極端子作為基本構成之三端子元件，係具有如下功能之主動元件：使用成膜於基板上之半導體薄膜作為電子或電洞移動之通道層，對閘極端子施加電壓，控制流至通道層之電流，而切換源極端子與汲極端子間之電流。TFT係目前最多地被實用化之電子器件(device)，作為其代表性用途有液晶驅動用元件。
作為TFT，目前最廣泛使用的是以多晶矽膜或非晶矽膜作為通道層材料之金屬-絕緣體-半導體-FET(Metal-Insulator-Semiconductor -FET，MIS-FET)。使用矽之MIS-FET由於對於可見光為不透明，故無 法構成透明電路。因此，於應用MIS-FET作為液晶顯示器之液晶驅動用切換元件之情形時，該器件使顯示器像素之開口率變小。
又，最近，隨著要求液晶之高精細化，逐漸亦對液晶驅動用 切換元件要求高速驅動。為了實現高速驅動，必須將電子或電洞之遷移率至少高於非晶矽之電子或電洞之遷移率的半導體薄膜用於通道層。
針對此種狀況，專利文獻1中提出有一種透明半絕緣性非晶 質氧化物薄膜，以及特徵在於將該透明半絕緣性非晶質氧化物薄膜作為通道層之薄膜電晶體，上述透明半絕緣性非晶質氧化物薄膜藉由氣相成膜法而成膜，係由In、Ga、Zn及O元素構成之透明非晶質氧化物薄膜，其特徵在於：關於該氧化物之組成，結晶化時之組成為InGaO3(ZnO)m(m為未達6之自然數)，於未添加雜質離子之情況下，為載子遷移率(亦稱為載子電子遷移率)超過1cm2V-1sec-1，且載子濃度(亦稱為載子電子濃度)為1016cm-3以下之半絕緣性。
然而，業界指出專利文獻1中提出之藉由濺鍍法、脈衝雷射 蒸鍍法之任一氣相成膜法所成膜，由In、Ga、Zn及O元素構成之透明非晶質氧化物薄膜(a-IGZO膜)雖然顯示約1~10cm2V-1sec-1之範圍之相對較高的電子載子遷移率，但非晶質氧化物薄膜原本就容易產生氧缺失，且對於熱等外部因素，電子載子之行為未必穩定，該等情況會造成不良影響，而於形成TFT等器件之情形時，不穩定性經常成為問題。
作為解決此種問題之材料，於專利文獻2中提出一種薄膜電 晶體，其特徵在於使用如下氧化物薄膜：鎵固溶於氧化銦，原子數比Ga/(Ga+In)為0.001~0.12，銦與鎵相對於全部金屬原子之含有率為80原子% 以上，具有In2O3之方鐵錳礦結構；作為其原料，提出有一種氧化物燒結體，其特徵在於：鎵固溶於氧化銦，原子比Ga/(Ga+In)為0.001~0.12，銦與鎵相對於全部金屬原子之含有率為80原子%以上，具有In2O3之方鐵錳礦結構。
然而，專利文獻2之實施例1~8中記載之載子濃度為1018cm-3左右，對應用於TFT之氧化物半導體薄膜而言過高，是待解決之課題。
又，於專利文獻3中，揭示有銦、鎵及銅中之鎵之含量比、銅之含量比以原子數比計超過0.001且未達0.09之燒結體。
然而，專利文獻3之燒結體實質上為方鐵錳礦型結構之In2O3相、或方鐵錳礦型結構之In2O3相與六方晶結構之In2Ga2CuO7相及/或菱面體晶結構之InGaCuO4相，但由於燒結溫度為1000℃~1100℃，故而燒結體密度低，又，除生成In2O3相以外亦生成電阻相對較高之相，因此於輸入高功率密度之濺鍍成膜之量產步驟中具有容易產生瘤塊(nodule)之問題。
[專利文獻1]日本特開2010-219538號公報
[專利文獻2]WO2010/032422號公報
[專利文獻3]日本特開2012-012659號公報
[專利文獻4]WO2003/014409號公報
[專利文獻5]日本特開2012-253372號公報
本發明之目的在於提供一種可降低結晶質氧化物半導體薄 膜之載子濃度之濺鍍用靶、最適於獲得其之氧化物燒結體、以及使用其而獲得之顯示出低載子濃度與高載子遷移率的氧化物半導體薄膜。
本發明人等新發現尤其藉由使銦與鎵之Ga/(In+Ga)比 為0.08以上且未達0.20且含有鎵作為氧化物之氧化物燒結體含有少量銅具體而言為含有Cu/(In+Ga+Cu)之比為0.001以上且未達0.03之銅，從而經燒結之氧化物燒結體實質上由方鐵錳礦型結構之In2O3相、與作為In2O3相以外之生成相之β-Ga2O3型結構之GaInO3相或β-Ga2O3型結構之GaInO3相及(Ga,In)2O3相構成，使用該氧化物燒結體所製作之氧化物半導體薄膜之載子遷移率為10cm2V-1sec-1以上。
即，第一發明係一種氧化物燒結體，其特徵在於：含有銦、 鎵及銅作為氧化物，上述鎵之含量以Ga/(In+Ga)原子數比計為0.08以上且未達0.20，上述銅之含量以Cu/(In+Ga+Cu)原子數比計為0.001以上且未達0.03，由方鐵錳礦型結構之In2O3相、與作為In2O3相以外之生成相之β-Ga2O3型結構之GaInO3相或β-Ga2O3型結構之GaInO3相及(Ga,In)2O3相構成。
第二發明係如第一發明之氧化物燒結體，其中上述銅之含量以Cu/(In+Ga+Cu)原子數比計為0.001以上且0.015以下。
第三發明係如第一或第二發明之氧化物燒結體，其中上述鎵之含量以Ga/(In+Ga)原子數比計為0.08以上且0.15以下。
第四發明係如第一或第二發明之氧化物燒結體，其實質上不含有銅以外之正二價元素、及銦與鎵以外之正三價至正六價元素。
第五發明係如第一或第二發明之氧化物燒結體，其中下述式 1所定義之β-Ga2O3型結構之GaInO3相之X射線繞射波峰強度比為2%以上且77%以下之範圍，100×I[GaInO3相(111)]/{I[In2O3相(400)]+I[GaInO3相(111)]}[%]……式1。
第六發明係一種濺鍍用靶，其係對第一或第二發明之氧化物燒結體進行加工而獲得。
第七發明係一種結晶質氧化物半導體薄膜，其係使用第六發明之濺鍍用靶藉由濺鍍法形成於基板上後，藉由氧化性環境中之熱處理使之結晶化。
第八發明係如第七發明之氧化物半導體薄膜，其載子遷移率為10cm2V-1sec-1以上。
第九發明係如第七或第八發明之氧化物半導體薄膜，其載子濃度為1.0×1018cm-3以下。
本發明之含有銦及鎵作為氧化物，且含有以Cu/(In+Ga+Cu)之原子數比計為0.001以上且未達0.03之銅之氧化物燒結體，例如於用作濺鍍用靶之情形時，可獲得藉由濺鍍成膜而形成且其後藉由熱處理而獲得之本發明之結晶質氧化物半導體薄膜。上述結晶質氧化物半導體薄膜具有方鐵錳礦結構，含有特定量之銅，藉此可獲得抑制載子濃度之效果。因此，於將本發明之結晶質氧化物半導體薄膜應用於TFT之情形時，可提高TFT之接通/斷開(on/off)。於本發明中，不僅可抑制載子濃度，且藉由氧化物燒結體實質上由方鐵錳礦型結構之In2O3相、與作為In2O3相以外之生成相之β-Ga2O3型結構之GaInO3相或β-Ga2O3型結構之GaInO3相及 (Ga,In)2O3相構成，可穩定地藉由濺鍍成膜而獲得載子遷移率為10cm2V-1sec-1以上之優異之氧化物半導體膜。因此，本發明之氧化物燒結體、靶、及使用其而獲得之氧化物半導體薄膜於工業方面極有用。
以下，對本發明之氧化物燒結體、濺鍍用靶、及使用其而獲得之氧化物薄膜詳細地進行說明。
本發明之氧化物燒結體之特徵在於：含有銦、鎵及銅作為氧化物，且含有以Ga/(In+Ga)原子數比計為0.08以上且未達0.20之鎵、以Cu/(In+Ga+Cu)原子數比計為0.001以上且未達0.03之銅。
鎵之含量以Ga/(In+Ga)原子數比計為0.08以上且未達0.20，更佳為0.08以上且0.15以下。鎵與氧之結合力強，有降低本發明之結晶質氧化物半導體薄膜的氧缺陷量之效果。於鎵之含量以Ga/(In+Ga)原子數比計未達0.08之情形時，無法充分地獲得該效果。另一方面，於超過0.20之情形時，由於結晶化溫度變得過高，故而於在半導體製程中被視為較佳之溫度範圍無法提高結晶性，無法獲得作為氧化物半導體薄膜之充分高之載子遷移率。
本發明之氧化物燒結體除含有如上述般規定之組成範圍之銦與鎵以外，亦含有銅。銅濃度以Cu/(In+Ga+Cu)之原子數比計為0.001 以上且未達0.03，較佳為0.001以上且0.015以下。
本發明之氧化物燒結體藉由添加上述範圍內之Cu，可利用 將主要因氧缺陷而產生之電子中和之作用而抑制載子濃度，於將本發明之結晶質氧化物半導體薄膜應用於TFT之情形時，可提高TFT之接通/斷開。
再者，較佳於本發明之氧化物燒結體中，實質上不含有銅以 外之正二價元素、及銦與鎵以外之正三價至正六價元素即元素M。此處，所謂實質上不含有，係分別單獨之M以M/(In+Ga+M)之原子數比計為500ppm以下，較佳為200ppm以下，更佳為100ppm以下。作為具體之M之例示，正二價元素可例示Mg、Ni、Co、Zn、Ca、Sr、Pb，正三價元素可例示Al、Y、Sc、B、鑭，正四價元素可例示Sn、Ge、Ti、Si、Zr、Hf、C、Ce，正五價元素可例示Nb、Ta，正六價元素可例示W、Mo。
1.氧化物燒結體組織
較佳為本發明之氧化物燒結體由方鐵錳礦型結構之In2O3相、與作為In2O3相以外之生成相之β-Ga2O3型結構之GaInO3相或β-Ga2O3型結構之GaInO3相及(Ga,In)2O3相構成。若氧化物燒結體僅由In2O3相構成，則與含有Cu無關，而例如與專利文獻4(WO2003/014409號公報)之比較例11同樣地產生瘤塊。另一方面，In2Ga2CuO7相及/或InGaCuO4相由於電阻較In2O3相或GaInO3相高，故而於濺鍍成膜中容易挖剩而容易產生瘤塊。又，使用生成該等相之氧化物燒結體濺鍍成膜之氧化物半導體薄膜有In2O3相之結晶性低、載子遷移率降低之傾向。
鎵及銅固溶於In2O3相。又，鎵構成GaInO3相或(Ga,In)2O3相。於固溶於In2O3相之情形時，鎵與銅取代至作為正三價離子之銦之晶格位 置。因未進行燒結等原因，鎵未固溶於In2O3相而形成β-Ga2O3型結構之Ga2O3相之情況欠佳。由於Ga2O3相缺乏導電性，故而會導致異常放電。
本發明之氧化物燒結體除含有方鐵錳礦型結構之In2O3相以 外，亦可在下述式1所定義之X射線繞射波峰強度比為2%以上且77%以下之範圍僅含有β-Ga2O3型結構之GaInO3相，或含有β-Ga2O3型結構之GaInO3相及(Ga,In)2O3相。
100×I[GaInO3相(111)]/{I[In2O3相(400)]+I〔GaInO3相(111)]}[%]……式1
(式中，I[In2O3相(400)]為方鐵錳礦型結構之In2O3相之(400)波峰強度，I[GaInO3相(111)]表示β-Ga2O3型結構之複合氧化物β-GaInO3相(111)波峰強度)
2.氧化物燒結體之製造方法
本發明之氧化物燒結體係以由氧化銦粉末與氧化鎵粉末構成之氧化物粉末、及氧化銅(II)粉末作為原料粉末。
於本發明之氧化物燒結體之製造步驟中，於將該等原料粉末混合後進行成形，藉由常壓燒結法對成形物進行燒結。本發明之氧化物燒結體組織之生成相強烈地取決於氧化物燒結體之各步驟之製造條件，例如原料粉末之粒徑、混合條件及燒結條件。
本發明之氧化物燒結體之組織較佳由方鐵錳礦型結構之In2O3相、與作為In2O3相以外之生成相之β-Ga2O3型結構之GaInO3相或β-Ga2O3型結構之GaInO3相及(Ga,In)2O3相以所欲之比率構成，因此，較佳將上述各原料粉末之平均粒徑設為3μm以下，更佳設為1.5μm以下。如上 所述，由於除含有In2O3相以外亦含有β-Ga2O3型結構之GaInO3相或β-Ga2O3型結構之GaInO3相與(Ga,In)2O3相，故而為了抑制該等相過剩生成，較佳將各原料粉末之平均粒徑設為1.5μm以下。
氧化銦粉末為ITO(銦-錫氧化物)之原料，燒結性優異之 微細氧化銦粉末的開發隨著ITO之改良而一併得到發展。氧化銦粉末由於大量持續地被使用作為ITO用原料，故最近可獲得平均粒徑0.8μm以下之原料粉末。
然而，於氧化鎵粉末或氧化銅(II)粉末之情形時，由於與 氧化銦粉末相比使用量依然較少，故難以獲得平均粒徑1.5μm以下之原料粉末。因此，於只能獲得粗大之氧化鎵粉末的情形時，必須將其粉碎至平均粒徑1.5μm以下。
於本發明之氧化物燒結體之燒結步驟中，較佳為應用常壓燒 結法。常壓燒結法為簡便且於工業上較有利之方法，就低成本之觀點而言亦為較佳之方法。
於使用常壓燒結法之情形時，如上所述，首先製作成形體。 將原料粉末裝入樹脂製罐，與黏合劑(例如PVA)等一起利用濕式球磨機等進行混合。於本發明之氧化物燒結體之製作中，為了除In2O3相以外抑制β-Ga2O3型結構之GaInO3相、或β-Ga2O3型結構之GaInO3相及(Ga,In)2O3相過剩生成、或不生成β-Ga2O3型結構之Ga2O3相，較佳為進行上述球磨機混合18小時以上。此時，作為混合用球，使用硬質ZrO2球即可。混合後，將漿料取出，並進行過濾、乾燥、造粒。其後，藉由冷均壓加壓而施加9.8MPa(0.1ton/cm2)~294MPa(3ton/cm2)左右之壓力使所獲得之造粒物 成形，而製成成形體。
於常壓燒結法之燒結步驟中，較佳設為存在氧之環境，更佳 為環境中之氧體積分率超過20%。尤其藉由使氧體積分率超過20%，氧化物燒結體會進一步高密度化。藉由環境中之過剩之氧，而於燒結初期先進行成形體表面之燒結。繼而，進行成形體內部之還原狀態下之燒結，最終可獲得高密度之氧化物燒結體。
於不存在氧之環境中，由於未先進行成形體表面之燒結，故 而結果燒結體之高密度化不會進行。若不存在氧，則尤其於900~1000℃左右氧化銦會分解而產生金屬銦，因此難以獲得目標之氧化物燒結體。
常壓燒結之溫度範圍較佳設為1200℃以上且1550℃以下， 更佳於在燒結爐內之大氣中導入氧氣之環境中於1350℃以上且1450℃以下進行燒結。燒結時間較佳為10~30小時，更佳為15~25小時。
藉由將燒結溫度設為上述範圍，且使用由上述平均粒徑已調 整為1.5μm以下之氧化銦粉末與氧化鎵粉末構成之氧化物粉末、及氧化銅(II)粉末作為原料粉末，可獲得由方鐵錳礦型結構之In2O3相、與作為In2O3相以外之生成相之β-Ga2O3型結構之GaInO3相或β-Ga2O3型結構之GaInO3相及(Ga,In)2O3相構成之氧化物燒結體。
於燒結溫度未達1200℃之情形時，燒結反應未充分進行， 而發生氧化物燒結體之密度未達6.4g/cm3之不良情況。另一方面，若燒結溫度超過1550℃，則(Ga,In)2O3相之形成變得顯著。(Ga,In)2O3相之電阻高於GaInO3相，因此導致成膜速度降低。若燒結溫度為1550℃以下，即為少量之(Ga,In)2O3相，則不會成為問題。就此種觀點而言，較佳將燒結溫度設為 1200℃以上且1550℃以下，更佳設為1350℃以上且1450℃以下。
關於至燒結溫度之升溫速度，為了防止燒結體之破裂，進行 脫黏合劑，較佳使升溫速度為0.2~5℃/分鐘之範圍。若為該範圍，則亦可視需要組合不同之升溫速度而升溫至燒結溫度。於升溫過程中，為了進行脫黏合劑或燒結，亦可於特定溫度保持一定時間。尤其為了促進銅固溶於In2O3相，於1100℃以下之溫度保持一定時間是有效的。保持時間並無特別限制，較佳為1小時以上且10小時以下。較佳於燒結後進行冷卻時，停止導入氧氣，以0.2~5℃/分鐘，尤其是0.2℃/分鐘以上未達1℃/分鐘之範圍的降溫速度降溫至1000℃。
3.靶
本發明之靶可將上述氧化物燒結體切斷為特定之大小，對表面進行研磨加工，並接著於襯板而獲得。靶形狀較佳為平板形，但亦可為圓筒形。於使用圓筒形靶之情形時，較佳為抑制因靶旋轉所引起之微粒產生。
為了用作濺鍍用靶，本發明之氧化物燒結體之密度較佳為6.4g/cm3以上，於鎵之含量以Ga/(In+Ga)原子數比計為0.08以上且未達0.20之情形時，較佳為6.8g/cm3以上。於密度未達6.4g/cm3之情形時，會導致量產使用時產生瘤塊，故而欠佳。
4.氧化物半導體薄膜與其成膜方法
本發明之結晶質氧化物半導體薄膜可藉由使用上述濺鍍用靶，利用濺鍍法於基板上暫時形成非晶質之薄膜，繼而實施熱處理而獲得。
上述濺鍍用靶係由氧化物燒結體而獲得，重要的是其氧化物燒結體組織即由方鐵錳礦型結構之In2O3相及β-Ga2O3型結構之GaInO3相 基本構成之組織。為了獲得本發明之結晶質氧化物半導體薄膜，重要的是暫時形成之非晶質氧化物薄膜之結晶化溫度充分高，而其與氧化物燒結體組織相關。即，於如本發明中所使用之氧化物燒結體般不僅含有方鐵錳礦型結構之In2O3相，進而含有β-Ga2O3型結構之GaInO3相之情形時，由此獲得之成膜後之氧化物薄膜顯示出高結晶化溫度，即較佳為250℃以上，更佳為300℃以上，進而較佳為350℃以上之結晶化溫度，成為穩定之非晶質。 相對於此，於例如專利文獻2(WO2010/032422號公報)中所揭示般氧化物燒結體僅由方鐵錳礦型結構之In2O3相構成之情形時，成膜後之氧化物薄膜有時其結晶化溫度會低至190~230℃左右，未成為完全之非晶質。於該情形時，於成膜後已生成微晶，因產生殘渣而難以進行利用濕式蝕刻之圖案加工。
於非晶質之薄膜形成步驟中，可使用通常之濺鍍法，尤其若 為直流(DC)濺鍍法，則成膜時之熱影響少，可進行高速成膜，故而於工業上有利。於藉由直流濺鍍法形成本發明之氧化物半導體薄膜時，較佳使用由非活性氣體與氧氣尤其是氬氣與氧氣構成之混合氣體作為濺鍍氣體。 又，較佳將濺鍍裝置之腔室內設為0.1~1Pa，尤其是0.2~0.8Pa之壓力進行濺鍍。
關於基板，玻璃基板具有代表性，較佳為無鹼玻璃，樹脂板 或樹脂膜之中只要為可耐上述製程之溫度者便可使用。
上述非晶質之薄膜形成步驟例如可於真空排氣至1×10-4Pa 以下後，導入由氬氣與氧氣構成之混合氣體，將氣壓設為0.2~0.5Pa，以使相對於靶面積之直流功率，即直流功率密度成為1~7W/cm2左右之範圍之 方式施加直流功率而產生直流電漿，並實施預濺鍍。較佳於進行該預濺鍍5~30分鐘後，視需要對基板位置進行修正，然後進行濺鍍成膜。於濺鍍成膜中，為了提高成膜速度，於所容許之範圍提高所輸入之直流功率。
本發明之結晶質氧化物半導體薄膜可藉由在上述非晶質之 薄膜形成後，對其進行熱處理使之結晶化而獲得。熱處理條件於氧化性環境中為結晶化溫度以上之溫度。作為氧化性環境，較佳為含有氧、臭氧、水蒸氣、或氮氧化物等之環境。熱處理溫度較佳為250~600℃，更佳為300~550℃，進而較佳為350~500℃。關於熱處理時間，保持在熱處理溫度之時間較佳為1~120分鐘，更佳為5~60分鐘。作為進行結晶化前之方法，例如有如下方法：以室溫附近等低溫或100~300℃之基板溫度暫時形成非晶質膜，其後，於結晶化溫度以上進行熱處理而使氧化物薄膜結晶化，或將基板加熱至氧化物薄膜之結晶化溫度以上，藉此使結晶質之氧化物薄膜成膜。該等2個方法中之加熱溫度為大致600℃以下即可，例如與專利文獻5(日本特開2012-253372號公報)中所記載之公知之半導體製程相比，處理溫度並無太大差異。
上述非晶質薄膜及結晶質氧化物半導體薄膜之銦、鎵、及銅 的組成與本發明之氧化物燒結體之組成大致相同。即，為含有銦及鎵作為氧化物且含有銅之結晶質氧化物半導體薄膜。鎵之含量以Ga/(In+Ga)原子數比計為0.08以上且未達0.20，上述銅之含量以Cu/(In+Ga+Cu)原子數比計為0.001以上且未達0.03。鎵之含量以Ga/(In+Ga)原子數比計更佳為0.08以上且0.15以下。又，上述銅之含量以Cu/(In+Ga+Cu)原子數比計更佳為0.001以上且0.015以下。
本發明之結晶質氧化物半導體薄膜較佳僅由方鐵錳礦結構 之In2O3相構成。於In2O3相中，與氧化物燒結體同樣地，於正三價離子之銦之晶格位置取代固溶有鎵，且取代固溶有銅。本發明之結晶質氧化物半導體薄膜藉由利用添加銅將主要因氧缺陷而產生之載子電子中和之作用，而使載子濃度降低至1.0×1018cm-3以下，更佳為可獲得8.0×1017cm-3以下。已知含有大量銦之氧化物半導體薄膜於載子濃度為4.0×1018cm-3以上呈退化狀態，將其應用於通道層之TFT變得不顯示正常斷開。因此，本發明之結晶質氧化物半導體薄膜可將載子濃度控制在上述TFT顯示正常斷開之上述範圍，故而較佳。又，藉此，載子遷移率顯示10cm2V-1sec-1以上，更佳為17cm2V-1sec-1以上，進而較佳為20cm2V-1sec-1以上。
本發明之結晶質氧化物半導體薄膜藉由濕式蝕刻或乾式蝕 刻，視TFT等用途被實施所欲之微細加工。於在低溫下暫時形成非晶質膜，其後，於結晶化溫度以上進行熱處理而使氧化物薄膜結晶化之情形時，可於非晶質膜形成後利用使用弱酸之濕式蝕刻實施微細加工。只要為弱酸，則基本上可使用，較佳為以草酸作為主成分之弱酸。例如可使用關東化學製造之ITO-06N等。於藉由將基板加熱至氧化物薄膜之結晶化溫度以上而使結晶質氧化物薄膜成膜之情形時，例如可應用利用如三氯化鐵水溶液之強酸進行之濕式蝕刻或乾式蝕刻，但若考慮對TFT周邊之損害，則較佳為乾式蝕刻。
本發明之結晶質氧化物半導體薄膜之膜厚並無限定，為10 ~500nm，較佳為20~300nm，進而較佳為30~100nm。若未達10nm，則無法獲得充分之結晶性，結果未實現高載子遷移率。另一方面，若超過500 nm，則產生生產性之問題，故而欠佳。
[實施例]
以下，使用本發明之實施例而更詳細地進行說明，但本發明並不受該等實施例之限定。
<氧化物燒結體之評價>
藉由ICP發光分光法調查所獲得之氧化物燒結體之金屬元素之組成。使用所獲得之氧化物燒結體之殘材，使用X射線繞射裝置(飛利浦(PHILIPS)製造)利用粉末法進行生成相之鑑定。
<氧化物薄膜之基本特性評價>
藉由ICP發光分光法調查所獲得之氧化物薄膜之組成。氧化物薄膜之膜厚係利用表面粗糙度計(Tencor公司製造)進行測定。成膜速度係根據膜厚與成膜時間而算出。氧化物薄膜之載子濃度及載子遷移率係藉由霍耳效應(Hall effect)測定裝置(東陽技術製造)求出。膜之生成相係藉由X射線繞射測定而進行鑑定。
(燒結體之製作及評價)
以使平均粒徑成為1.5μm以下之方式調整氧化銦粉末與氧化鎵粉末、以及氧化銅(II)粉末而製成原料粉末。以成為如表1及表2之實施例及比較例之Ga/(In+Ga)原子數比、Cu/(In+Ga+Cu)原子數比之方式調製該等原料粉末，與水一起裝入樹脂製罐，利用濕式球磨機進行混合。此時，使用硬質ZrO2球，將混合時間設為18小時。混合後，將漿料取出，並進行過濾、乾燥、造粒。藉由冷均壓加壓而施加3ton/cm2之壓力使造粒物成形。
其次，以如下之方式對成形體進行燒結。於以爐內容積每 0.1m3為5公升/分鐘之比率向燒結爐內之大氣導入氧之環境，於1000~1550℃之燒結溫度進行20小時燒結。此時，以1℃/min進行升溫，於燒結後之冷卻時停止導入氧，並以10℃/min降溫至1000℃。
藉由ICP發光分光法進行所獲得之氧化物燒結體之組成分 析，結果關於金屬元素，於任一實施例中均確認到與原料粉末之調配時之添加組成大致相同。
其次，利用X射線繞射測定進行氧化物燒結體之相鑑定， 結果如表1及表2，僅確認到由方鐵錳礦型結構之In2O3相所產生之繞射波峰，或僅確認到方鐵錳礦型結構之In2O3相、β-Ga2O3型結構之GaInO3相、及(Ga,In)2O3相之繞射波峰。
再者，於含有β-Ga2O3型結構之GaInO3相之情形時，將下述式1所定義之β-Ga2O3型結構之GaInO3相之X射線繞射波峰強度比示於表1及表2。
100×I[GaInO3相(111)]/{I[In2O3相(400)]+I[GaInO3相(111)]}[%]……式1
將氧化物燒結體加工為直徑152mm、厚度5mm之大小， 利用杯形磨石以使最大高度Rz成為3.0μm以下之方式對濺鍍面進行研磨。使用金屬銦將所加工之氧化物燒結體接合於無氧銅製之襯板，而製成濺鍍用靶。
(濺鍍成膜評價)
使用實施例及比較例之濺鍍用靶及無鹼之玻璃基板(康寧製造之EagleXG)，不加熱基板而於室溫利用直流濺鍍進行成膜。於裝備無電弧抑制功能之直流電源之直流磁控濺鍍裝置(突起(Tokki)製造)之陰極，安裝上述濺鍍靶。此時，將靶-基板(保持器)間距離固定為60mm。於真空排氣至1×10-4Pa以下後，根據各靶之鎵量以成為適當之氧之比率之方式導入氬氣與氧氣之混合氣體，將氣壓調整為0.6Pa。施加直流功率300W(1.64W/cm2)而產生直流電漿。於10分鐘之預濺鍍後，於濺鍍靶之正上方即靜止對向位置配置基板，而形成膜厚50nm之氧化物薄膜。確認到所獲得之氧化物薄膜之組成與靶大致相同。又，進行測定X射線繞射，結果確認為非晶質。對所獲得之非晶質之氧化物薄膜，使用RTA(Rapid Thermal Annealing，快速熱退火)裝置，於大氣中在300~600℃實施30分鐘以內之熱處理。對熱處理後之氧化物薄膜進行X射線繞射測定，結果對比較例9以外之氧化物薄膜確認到已結晶化，且以In2O3(111)作為主波峰。另一方面，比較例9之氧化物薄膜為非晶質。進行所獲得之結晶質或非晶質之氧化物半導體薄膜之霍耳效應測定，求出載子濃度及載子遷移率。將所獲得之評價結果匯總記載於表3及表4。
(瘤塊產生評價)
對實施例2及比較例1、2、5、8之濺鍍用靶，實施模擬量產之濺鍍成膜所引起之瘤塊產生之評價。濺鍍裝置使用裝備無電弧抑制功能之直流電源之裝載互鎖式通過型磁控濺鍍裝置(愛發科製造)。靶使用縱5吋、橫15吋之方型靶。將濺鍍成膜評價濺鍍室真空排氣至7×105Pa以下後，根據各 靶之鎵量以成為適當之氧之比率之方式導入氬氣與氧氣之混合氣體，將氣壓調整為0.6Pa。選擇此種條件之濺鍍氣體之原因在於，於濺鍍室之真空度超過1×10-4Pa且腔室內之水分壓高或添加氫氣之情形時，無法進行正確之評價。如由ITO等眾所周知般若源自水分或氫氣之H+進入膜中，則膜之結晶化溫度增高，附著於靶非濺蝕部之膜容易非晶質化。其結果，膜應力降低，故而不易自非濺蝕部剝離，而不易產生瘤塊。關於直流功率，考慮到通常量產中所採用之直流功率密度為3~6W/cm2左右，而設為2500W(直流功率密度為5.17W/cm2)。
瘤塊產生評價係於上述條件下，於50kWh之連續濺鍍放電後，對靶表面進行觀察，而評價有無瘤塊產生。
「評價」
如表1及表2所示，於實施例1~16之鎵含量以Ga/(In+Ga)原子數比計為0.08以上且未達0.20，銅之含量以Cu/(In+Ga+Cu)原子數比計為0.001以上且未達0.03之情形時，由方鐵錳礦型結構之In2O3相、與作為In2O3相以外之生成相之β-Ga2O3型結構之GaInO3相或β-Ga2O3型結構之GaInO3相及(Ga,In)2O3相構成。
相對於此，比較例1之氧化物燒結體中，鎵含量以Ga/(In+Ga)原子數比計低於0.08，比較例2、3之氧化物燒結體中，銅之含量以Cu/(In+Ga+Cu)原子數比計低於0.001，故而成為僅由方鐵錳礦型結構之In2O3相構成之氧化物燒結體。即，未能獲得本發明之由方鐵錳礦型結構之In2O3相、與作為In2O3相以外之生成相之β-Ga2O3型結構之GaInO3相或β-Ga2O3型結構之GaInO3相及(Ga,In)2O3相構成之氧化物燒結體。又，於比 較例4~9之氧化物燒結體中，銅之含量以Cu/(In+Ga+Cu)原子數比計為0.03以上，故而方鐵錳礦型結構之In2O3相以外之生成相含有In2Ga2CuO7及/或InGaCuO4型結構，未能獲得本發明之目標之氧化物燒結體。
又，於實施例2之瘤塊產生評價中，於作為本發明之氧化物 燒結體之實施例2之靶中未確認到瘤塊之產生。另一方面，於比較例1、2、5、8之靶中，確認到大量瘤塊產生。其原因在於，於比較例1、2中，雖然燒結體密度高，但燒結體組織僅由方鐵錳礦型結構之In2O3相構成。對於比較例5、8，認為原因在於燒結體密度低，以及含有電阻高而於濺鍍中容易挖剩之In2Ga2CuO7相及/或InGaCuO4相。
又，於表3及表4中，顯示如下之氧化物半導體薄膜之特性， 該氧化物半導體薄膜係含有銦、鎵及銅作為氧化物之結晶質氧化物半導體薄膜，鎵含量以Ga/(In+Ga)原子數比計被控制為0.08以上且未達0.20，銅含量以Cu/(In+Ga+Cu)原子數比計被控制為0.001以上且未達0.03。
可知實施例之氧化物半導體薄膜均僅由方鐵錳礦型結構之 In2O3相構成。又，可知實施例之氧化物半導體薄膜中，載子濃度為1.0×1018cm-3以下，且載子遷移率為10cm2V-1sec-1以上。
其中，銅含量以Cu/(In+Ga+Cu)原子數比計為0.001 以上且0.015以下之實施例1~4及6~15之氧化物半導體薄膜顯示出載子遷移率為17cm2V-1sec-1以上之優異之特性。其中，尤其是將鎵含量限制在Ga/(In+Ga)原子數比為0.08以上且0.15以下之實施例1~4及6~11之氧化物半導體薄膜顯示出載子遷移率為20cm2V-1sec-1以上的更優異之特性。
相對於此，比較例1~3之氧化物半導體薄膜雖然為僅由方 鐵錳礦型結構之In2O3相構成之氧化物半導體薄膜，但載子濃度超過1.0×1018cm-3，不適合TFT之活性層。又，於比較例4~8之氧化物半導體薄膜中，銅之含量以Cu/(In+Ga+Cu)原子數比計為0.03以上，載子遷移率低於10cm2V-1sec-1，故而未能獲得本發明之目標之氧化物半導體薄膜。進而，比較例9之氧化物半導體薄膜由於鎵含量以Ga/(In+Ga)原子數比計為0.20以上且銅含量以Cu/(In+Ga+Cu)原子數比計為0.30以上，成為非晶質，故而載子濃度超過1.0×1018cm-3，未能獲得本發明之目標之氧化物半導體薄膜。

Claims (9)

  1. 一種氧化物燒結體，含有銦、鎵及銅作為氧化物，該鎵之含量以Ga/(In+Ga)原子數比計為0.08以上且未達0.20，該銅之含量以Cu/(In+Ga+Cu)原子數比計為0.001以上且未達0.03，由方鐵錳礦型結構之In2O3相、與作為In2O3相以外之生成相之β-Ga2O3型結構之GaInO3相或β-Ga2O3型結構之GaInO3相及(Ga,In)2O3相構成，不含有六方晶結構之In2Ga2CuO7相及菱面體晶結構之InGaCuO4相。
  2. 如申請專利範圍第1項之氧化物燒結體，其中，該銅之含量以Cu/(In+Ga+Cu)原子數比計為0.001以上且0.015以下。
  3. 如申請專利範圍第1或2項之氧化物燒結體，其中，該鎵之含量以Ga/(In+Ga)原子數比計為0.08以上且0.15以下。
  4. 如申請專利範圍第1或2項之氧化物燒結體，其實質上不含有銅以外之正二價元素及銦與鎵以外之正三價至正六價元素。
  5. 如申請專利範圍第1或2項之氧化物燒結體，其中，下述式1所定義之β-Ga2O3型結構之GaInO3相之X射線繞射波峰強度比為2%以上且77%以下之範圍，100×I[GaInO3相(111)]/{I[In2O3相(400)]+I[GaInO3相(111)]}[%]……式1。
  6. 一種濺鍍用靶，係對申請專利範圍第1或2項之氧化物燒結體進行加工而獲得。
  7. 一種結晶質氧化物半導體薄膜，係使用申請專利範圍第6項之濺鍍用靶藉由濺鍍法於基板上形成非晶質膜後，藉由氧化性環境中之熱處理使該非晶質膜結晶化。
  8. 如申請專利範圍第7項之氧化物半導體薄膜，其載子遷移率為10cm2V-1sec-1以上。
  9. 如申請專利範圍第7或8項之氧化物半導體薄膜，其載子濃度為1.0×1018cm-3以下。
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