TWI536560B - Metal gate structure and method of forming the same - Google Patents

Description

Metal gate structure and forming method thereof

The invention relates to a metal gate structure and a manufacturing method thereof, in particular to a metal gate structure of a metal oxide semiconductor transistor.

In the semiconductor industry, since polycrystalline germanium materials have heat resistance properties, polycrystalline germanium materials are often used as gate electrodes for transistors in the fabrication of conventional metal oxide semiconductor (MOS) transistors, so that their source and drain regions are Annealing together at high temperatures. Secondly, since the polysilicon can block the atoms doped by the ion implantation into the channel region, the self-aligned source and drain regions can be easily formed after the gate patterning.

However, as the size of semiconductor components continues to shrink, the structure of conventional MOS transistors is beginning to face new challenges. First, the polysilicon gate is formed of a higher resistance semiconductor material than most metal materials, so the polysilicon gate provides an operating rate that is much lower than that of the metal gate. In addition, polycrystalline germanium gates are prone to depletion effects. Due to the limitation of the doping concentration, when the polysilicon gate is biased, the carrier is lacking, and the depletion region is easily generated on the interface close to the polysilicon gate and the gate dielectric layer. This depletion effect not only increases the thickness of the equivalent gate dielectric layer, but also causes the gate capacitance value to decrease, which leads to the dilemma of component drive capability degradation. Therefore, new gate materials have been developed and produced, for example, by using work function metals instead of conventional polysilicon gates.

Secondly, as the size of the semiconductor device continues to shrink, the thickness of the gate dielectric layer of the conventional MOS transistor also becomes thinner. However, a thin layer of ruthenium dioxide or a layer of ruthenium oxynitride tends to cause a tunneling effect of electrons, thus causing a physical limitation of excessive leakage current. In order to effectively extend the evolution of logic components, the gate dielectric layer of MOS transistors begins to use high dielectric constant (hereinafter referred to as High-K) materials to reduce the physical limit thickness and at the same equivalent oxidation thickness (equivalent) Oxide thickness, hereinafter referred to as EOT), effectively reduces leakage current and achieves equivalent capacitance to control channel switching.

The work function metal gate needs to be matched with the NMOS transistor on the one hand, and the PMOS transistor on the other hand, so that the integration technology and process control of the related components are more complicated, and the thickness and composition control requirements of each material are also more complicated. Strict. In this harsh process environment, how to make a good work function metal gate to improve the operational effect of MOS transistors is still an important issue today.

In view of the above, the present invention provides a metal gate structure and a manufacturing method thereof, so that the ratio of nitrogen/titanium elements contained in the metal gate structure decreases from bottom to top, and the equivalent oxidation thickness of the MOS transistor can be reduced. (equivalent oxide thickness, EOT), and maintain an effective work function (EWF).

According to a preferred embodiment of the present invention, a metal gate structure includes a gate dielectric layer, a first work function metal layer disposed on the gate dielectric layer, and a first work function A second work function metal layer on the functional metal layer. Wherein the first and second work function metal layers essentially comprise a first element and a second element, and the first work function metal layer has at least one different from the second work function metal layer Physical properties.

According to a preferred embodiment of the present invention, the present invention further provides a metal gate structure including a gate dielectric layer and a work function metal layer disposed on the gate dielectric layer. Wherein, the work function metal layer essentially comprises a first element and a second element, and the work function metal layer has at least one physical property that changes with thickness.

In accordance with a preferred embodiment of the present invention, the present invention further provides a method of forming a metal gate structure comprising forming a gate dielectric layer and performing a process to form a work function metal on the gate dielectric layer. Wherein the process of forming the work function metal comprises changing at least one process parameter.

Accordingly, the present invention can reduce the EOT of a HK/MG (high-k dielectric and metal gate) type MOS transistor, and maintain the flat band voltage without increasing, thereby providing a good effective work function.

In the following, the metal gate structure and the manufacturing method thereof according to the present invention are described in detail with reference to the accompanying drawings, but the embodiments are not intended to limit the scope of the present invention, and the method flow steps are not described. To limit the order of their execution, any method that has been re-combined by method steps, resulting in equal efficiency, is within the scope of the present invention. The drawings are for illustrative purposes only and are not drawn to the original dimensions.

The metal gate structure of the present invention may be a poly-Si/metal stacking gate comprising polysilicon and a metal, or a metal gate using only a metal material, such as a stacked gate comprising different work function metals. pole. The metal gate structure can be formed by first depositing a work function metal layer and a polysilicon layer, and then performing a gate microlithography process to form a metal gate. Alternatively, a dummy gate conductor is formed by using a polysilicon material. After the transistor is completed, the dummy gate conductor is etched by etching, and then the desired metal is filled to form a metal gate.

Please refer to FIG. 1 to FIG. 6 . FIG. 1 to FIG. 6 are schematic diagrams showing a transistor having a metal gate 66 according to a first preferred embodiment of the present invention, wherein the first preferred embodiment utilizes a dummy gate. The metal gate 66 is formed in a polar manner. The same elements or parts in the drawings are denoted by the same symbols, and the drawings are for illustrative purposes only and are not drawn in the original size. As shown in FIG. 1, a substrate 12 is first provided, such as a germanium substrate, a germanium-containing substrate, or a silicon-on-insulator (SOI) substrate. At least one transistor region 14 may be defined in the substrate 12 and at least one shallow trench isolation (STI) structure 18 may be formed. The transistor region 14 is used to form a PMOS transistor, an NMOS transistor, or a CMOS transistor, and the STI structure 18 is used to isolate the transistor region 14. A gate dielectric layer 22 is then formed on the surface of the substrate 12 and a selective mask layer 24 is formed over the gate dielectric layer 22. In the present embodiment, the gate dielectric layer 22 may include hafnium oxynitride (HfSiO), niobium oxynitride (HfSiON), hafnium oxide (HfO), hafnium oxide (LaO), and hafnium aluminate (LaAlO). a high dielectric constant dielectric layer such as zirconium oxide (ZrO), zirconium oxynitride (ZrSiO), or hafnium zirconate (HfZrO) or a combination thereof. In other embodiments, the gate dielectric layer 22 may also include a dielectric layer such as a hafnium oxide layer or a hafnium oxynitride layer.

Please continue to refer to Figures 2a and 2b, followed by a process such as a physical vapor deposition (PVD) process, a chemical vapor deposition (CVD) process or atomic layer deposition ( An atomic layer deposition (ALD) process is performed to form a work function metal composite layer 26 on the gate dielectric layer 22. In the process of forming the success function metal composite layer 26, the present invention can vary at least one process parameter such that the work function metal composite layer 26 of the present invention can be a multilayer structure. That is, in the embodiment, the process of the shape success function metal composite layer 26 may actually include a plurality of step fashions, and the individual process parameters of each process stage are essentially fixed, but adjacent process stages are The process parameters are different from each other. The specific means for accomplishing, for example, may stop supplying process gas, power or power off in the process of forming the success function metal composite layer 26, thereby temporarily interrupting the deposition of the material layer, and then changing at least one process parameter of the process, For example, the gas flow rate and/or process power of the process gas, and proceed to the next process stage with the changed process parameters. As such, the work function metal composite layer 26 of the present embodiment actually includes a plurality of material layers, adjacent material layers may have different physical properties, and each material layer itself may have uniform physical properties without thickness. Change with change.

In more detail, the present invention can form the first work function metal layer 26a on the gate dielectric layer 22 as shown in FIG. 2a, and then form the second work function metal layer 26b as shown in FIG. 2b. On the first work function metal layer 26a, the work function metal composite layer 26 of the present embodiment can include a first work function metal layer 26a and a second work function metal layer 26b. Wherein, the first and second work function metal layers 26a, 26b of the present invention essentially comprise a first element and a second element, wherein the first element is preferably titanium or tantalum. (tantalum), and the second element is preferably nitrogen. That is, the work function metal composite layer 26 of the present invention may preferably comprise titanium nitride (TiN) or tantalum nitride (TaN), and particularly preferably titanium nitride.

The main difference between the first and second work function metal layers 26a, 26b is that the first work function is different because the process parameters for forming the first work function metal layer 26a are different from the process parameters for forming the second work function metal layer 26b. The metal layer 26a may have at least one physical property different from the second work function metal layer 26b, such as a molecular formula (such as an elemental composition ratio), a density, a resistivity, or a crystal alignment direction. For example, in the present embodiment, the process parameters for forming the first work function metal layer 26a are as follows: the DC power is preferably about 800 watts to 1200 watts, and the AC power is preferably about 640 watts to 960 watts, argon gas. Preferably, the flow rate is about 16 sccm (standard cubic centimeters per minute) to 24 sccm, and the nitrogen flow rate is preferably about 32 sccm to 48 sccm, wherein the ratio of nitrogen flow rate to argon flow rate is substantially between 1.6 and Between 2.4, the first work function metal layer 26a may have a higher nitrogen/titanium element ratio (N-rich, also referred to as nitrogen-rich), more specifically, the titanium/nitrogen element ratio of the first work function metal. It is generally greater than 0.8. Furthermore, the process parameters for forming the second work function metal layer 26b are as follows: the DC power is preferably about 800 watts to 1200 watts, and the AC power is preferably about 640 watts to 960 watts, and the argon flow rate is preferably The flow rate of nitrogen is preferably from about 16 sccm to about 24 sccm, and the flow rate of nitrogen gas is preferably between about 16 sccm and 24 sccm, wherein the ratio of nitrogen flow rate to argon flow rate is substantially between 0.8 and 1.2, so that the second work function metal layer 26b can have a higher The titanium/nitrogen element ratio (Ti-rich, also known as titanium-rich), more specifically, the titanium/nitrogen element ratio of the second work function metal is substantially less than 0.9.

The Ti-rich system here means that the work function metal layer exhibits a metallic mode, that is, the main element of the surface of the work function metal layer is still titanium; and the so-called N-rich system indicates that the work function metal layer exhibits a combination. The poison mode, that is, the surface of the work function metal layer has been nitrided into titanium nitride. Therefore, as the gas flow rate of the process gas nitrogen is gradually increased, the nitrogen element content of the formed work function metal layer is gradually increased, so that the larger the nitrogen gas flow rate, the easier it is to form the work function metal layer in the combined state, and vice versa.

For the material selection of the first and second work function metal layers 26a, 26b, the fermi level of the metal gate is better in the case of fabricating a CMOS transistor or the like having an NMOS transistor and a PMOS transistor. It is close to the mid-gap of the erbium to adjust the threshold voltage (Vth) of the NMOS transistor and the PMOS transistor to match the threshold voltage of the NMOS transistor to the PMOS transistor. In addition, the metal gate material of the present invention preferably has good thermal stability, barrier properties and adhesion, so that the gate material itself does not easily penetrate into the substrate or the dielectric layer to cause pollution, and it is difficult for the impurities to penetrate and spread, and is not easily peeled off. . Materials conforming to the above conditions can be used as the material of the first and second work function metal layers 26a, 26b. For example, in other embodiments, the work function metal composite layer 26 may also include other layers of metallic material, such as tungsten nitride (WN).

In general, the PMOS is suitable for a work function value of about 5.2, while the NMOS is suitable for a work function value of about 4.11. According to the research of the present invention, the MOS transistor having the metal gate preferably uses the foregoing titanium nitride as the material of the intermediate level, and the metal gate formed by the invention will be applicable to the PMOS transistor, the NMOS transistor or CMOS transistors, especially the use of N-rich titanium nitride in the present invention, can provide a suitable work function value for PMOS. However, it should be noted that N-rich titanium nitride also leads to a large equivalent oxide thickness (EOT). This is because when a non-conductive substance such as a nitrogen element or an oxygen element passes through the work function metal of the MOS, the EOT of the MOS presentation is increased, deviating from the predetermined value. Therefore, the present invention further forms a Ti-rich titanium nitride on N-rich titanium nitride, and Ti-rich titanium nitride can provide an effect of reducing EOT.

For the part of the process parameters, the present inventors have found that as the gas flow rate of the process gas nitrogen is gradually increased, the physical properties of the formed work function metal layer, such as elemental composition ratio, density, resistivity, crystal alignment direction and defect density ( The defect density) may be affected. Wherein, when the gas flow rate of the process gas nitrogen is close to 20 sccm, the physical properties of the work function metal layer may have a nonlinear transition, which is called a turning point. One of the possible reasons for the conversion point generation is that when the flow rate of nitrogen is close to, for example, 20 sccm, the lattice alignment direction tends to be converted between (1, 1, 1) and (2, 0, 0). When the gas flow rate of the process gas nitrogen is less than 20sccm, the resistivity and EOT of the work function metal layer gradually decrease with the increase of the nitrogen flow rate, and the increase of the flat band voltage of the work function metal layer is accompanied by the nitrogen flow rate. Increasing and increasing; when the gas flow rate of the process gas nitrogen is greater than 20sccm, the resistivity and EOT of the work function metal layer are gradually increased with the increase of the nitrogen flow rate, and the increase of the flat band voltage of the work function metal layer is Slows as the nitrogen flow increases. Therefore, when the gas flow rate of the process gas nitrogen is close to 20 sccm (close to the switching point), the formed Ti-rich titanium nitride can provide a better effect for thinning EOT.

In addition, since the titanium nitride formed by the CVD process is generally more likely to have impurities, and the plasma of the high-power PVD process may affect the High-K material itself, the titanium nitride formed by the low-power PVD process may be used. Have better quality.

Next, as shown in FIG. 3, a polysilicon layer 28 and a mask layer 30 are formed on the work function metal composite layer 26. The polysilicon layer 28 is used as a sacrificial layer, and may comprise a polycrystalline germanium material without any doped, a polycrystalline germanium material having a dopant, an amorphous germanium or other material; and the mask layer 30 may comprise Cerium oxide (SiO ₂ ), tantalum nitride (SiN), tantalum carbide (SiC) or niobium oxynitride (SiON). Next, a patterned photoresist layer (not shown) is formed on the mask layer 30, and a pattern transfer process is performed using the patterned photoresist layer as a mask to remove a portion of the mask layer 30, and then a single pass. A portion of the polysilicon layer 28, the work function metal composite layer 26, and the gate dielectric layer 22 are removed by etching or successive etching steps, and the patterned photoresist layer is stripped to form a dummy gate 32 in the transistor region 14.

Then, as shown in Fig. 4, a light doping process is selectively performed in the transistor region 14 to form the desired lightly doped source and drain. For example, the present invention may first cover a region of a patterned photoresist layer (not shown) outside the transistor region 14, and then use the patterned photoresist layer as a mask to perform an ion implantation process. The dopants are implanted into the substrate 12 on either side of the dummy gate 32 of the transistor region 14 to form the lightly doped source and drain 34 of the NMOS transistor. Alternatively, a P-type dopant is implanted into the substrate 12 on either side of the dummy gate 32 of the transistor region 14 to form a lightly doped source and drain 34 of the PMOS transistor. In addition, a spacer layer (not shown) may be formed on the sidewall of the dummy gate 32 before the lightly doped source and drain 34 are formed.

Subsequently, a sidewall process is performed, such as first oxidizing the surface of the polysilicon layer 28 or depositing a tantalum oxide layer 38, followed by depositing a tantalum nitride layer 40 and forming an oxide layer 38 and a tantalum nitride layer by etching. The side wall formed by 40 is disposed around the side wall of the dummy gate 32. For different conductivity type MOS transistors, a stress cap layer may be selectively formed or a selective epitaxial growth (SEG) process may be applied to apply compressive stress to the channel region of the PMOS transistor. (compressive strain), or a channel region of an NMOS transistor that exerts a tensile strain.

A heavily doped ion implantation process is then performed to form the desired source/drain regions 48, respectively. The source/drain region 48 is formed in a manner similar to the above-described method of forming a lightly doped drain, but the dopant concentration of the source/drain region 48 is higher, and therefore will not be described again. It should be noted that the formation process of the source/drain regions described above may also be achieved by a selective epitaxial growth process, and the number of sidewalls is not limited thereto. A tantalum nitride layer 54 is then selectively formed on the dummy gate 32, the tantalum nitride layer 40, and the surface of the substrate 12. The tantalum nitride layer 54 is mainly used as an etch stop layer for subsequent planarization, and a thick tantalum nitride layer can also be formed as a stress coating layer. An interlayer dielectric 56 is then formed and covers the tantalum nitride layer 54. The interlayer dielectric layer may comprise one or a combination of nitrides, oxides, carbides, low dielectric constant materials.

As shown in FIG. 5, a chemical mechanical polishing (CMP) process or a dry etching process is performed to remove portions of the interlayer dielectric layer 56, the tantalum nitride layer 54 and the mask layer 30, and the polysilicon layer is formed. The top of 28 is approximately flush with the surface of the interlayer dielectric layer 56 and is exposed. Then, a selective dry etching or wet etching process is performed, for example, using an etching solution such as ammonium hydroxide (NH ₄ OH) or Tetramethylammonium Hydroxide (TMAH) to remove the polycrystalline germanium layer in the transistor region 14. 28, but the interlayer dielectric layer 56 is not etched to form an opening 58 in the transistor region 14 while exposing the work function metal composite layer 26 provided at the bottom of each opening 58. Here, the CMP process or the dry etch process can be set for a predetermined period of time to directly expose the polysilicon layer 28. Alternatively, the CMP process may be divided into a plurality of stages according to the grinding conditions of the different material layers. For example, the surface of the mask layer 30 is used as the polishing end point of the first stage, and the interlayer dielectric layer 56 and the tantalum nitride are sequentially polished. The layer 54 is up to the surface of the mask layer 30, at which point a change in the layer of the ground material is detected to stop the first stage of polishing, and then a second stage is performed to polish the mask layer 30 down to the surface of the polysilicon layer 28. The second stage of grinding can be set to last for a predetermined period of time, or the change in the layer of material being ground can be detected as the point of end of the grinding.

In other embodiments, the CMP process or the dry etch process may be performed first to the interlayer dielectric layer 56 and the tantalum nitride layer 54 to the surface of the mask layer 30, and then the mask layer 30 is removed by a wet etching process.

Next, as shown in Fig. 6, a conductive layer 64 of a low resistance material is filled in the work function metal composite layer 26 of the transistor region 14 and fills the opening 58. In this embodiment, the conductive layer 64 may be composed of a low-resistance material such as aluminum, tungsten, titanium aluminum alloy (TiAl) or cobalt tungsten phosphide (CoWP). Thereafter, another CMP process is performed to remove portions of the conductive layer 64 to form a MOS transistor having a metal gate structure 66.

It should be noted that the metal gate structure of the present invention can be applied to a gate-first process, in other words, without defining a dummy gate, a stacked structure containing metals having different work function is directly used. As a gate. More specifically, another preferred embodiment can provide the substrate 12, the STI structure 18, the gate dielectric layer 22, and the selective mask layer 24 in accordance with the steps of FIG. Next, as shown in FIG. 2a, the first work function metal layer 26a is first formed on the gate dielectric layer 22, and then, as shown in FIG. 2b, the second work function metal layer 26b is formed on the first work. The metal gate structure can be fabricated on the metal layer 26a of the function without defining a dummy gate.

In addition, the process sequence of the above-mentioned FIG. 1 to FIG. 6 may be changed or adjusted according to the process requirements. For example, in other embodiments, the first and second work function metal layers 26a, 26b may also be after the polysilicon layer 28 is removed. It is formed on the cover layer 24. In other words, in other embodiments, the work function metal layer is not deposited when the dummy gate is formed, and the work function metal layer is deposited after the dummy gate layer of the dummy gate is removed, so in this method, the work is performed. The functional metal layer will also be present on the sidewall of the gate.

Accordingly, the metal gate structure 66 can function as a gate of a PMOS transistor, an NMOS transistor, or a CMOS transistor. In addition, in order to better meet the required work function values or other desired characteristics of different types of transistors, the present invention can also perform work value metal coating on the work function metal layer, change the process conditions, or increase or decrease the work function metal compound. The number of layers of material in the layer. For example, the present invention may additionally provide nitrogen ions on the first or second work function metal layers 26a, 26b for the desired PMOS transistor region to increase the work function value.

Furthermore, the present invention can further cover other work function metal layers on the work function metal composite layer 26, for example, another N-rich work function metal layer. Please refer to FIG. 7. FIG. 7 is a schematic view showing the fabrication of a transistor having a metal gate 166 according to a second preferred embodiment of the present invention. As shown in FIG. 7, this embodiment can first provide the substrate 12, the STI structure 18, the gate dielectric layer 22, and the selective mask layer 24 in accordance with the steps of FIG. The second preferred embodiment is different from the first preferred embodiment in that the process of the second preferred embodiment of the success function metal composite layer 126 may actually include at least three process stages for forming First, second and third work function metal layers 26a, 26b, 26c. That is, after the first and second work function metal layers 26a, 26b are formed by the steps of FIGS. 2a to 2b, the process parameters are changed to form the third work function metal layer 26c. The third work function metal layer 26c is different from at least one physical property of the adjacent second work function metal layer 26b. For example, the third work function metal layer 26c may preferably be N-rich titanium nitride. For example, the third work function metal layer 26c may have the same physical properties and process parameters as the first work function metal layer 26a. Thereafter, the MOS transistor having the metal gate structure 166 is formed by the steps of FIGS. 3 to 6 described above.

Accordingly, the preferred embodiment of the second embodiment uses a PVD process-shaped success function metal composite layer 126, wherein the nitrogen flow rate in the first process stage is preferably about 32 sccm to 48 sccm, and the process power is preferably Between about 400 watts and 600 watts, the actual material layer thickness of the first work function metal layer 26a is preferably from about 48 angstroms to 72 angstroms; and the second process stage nitrogen flow rate is preferably about 16 sccm. The process power is preferably from about 800 watts to about 1200 watts to 24 sccm, and the actual material layer thickness of the second work function metal layer 26b is preferably from about 64 angstroms to 96 angstroms; the nitrogen in the third process stage The flow rate is preferably from about 32 sccm to about 48 sccm, the process power is preferably from about 400 watts to about 600 watts, and the actual material layer thickness of the third work function metal layer 26c is preferably from about 48 angstroms to 72 angstroms. Ai. As such, the present embodiment can provide an EOT of about 14.19 nanometers, a flat band voltage of about -0.565 volts, and a work function value of about 4.58.

In other embodiments, the process of forming the metal composite layer of the success function may not actually be divided into a plurality of process stages, but the process parameters are gradually adjusted in a single process to make the titanium nitride composite structure or a single titanium nitride layer. The nitrogen/titanium element ratio will decrease from bottom to top with thickness. Please refer to FIG. 8 and FIG. 9 . FIG. 8 and FIG. 9 are schematic diagrams showing the fabrication of a transistor having metal gates 266 and 366 according to the third and fourth preferred embodiments of the present invention.

As shown in FIG. 8, the third preferred embodiment is different from the first preferred embodiment in that the process of forming the success function metal composite layer 226 of the third preferred embodiment is actually gradually adjusting the process parameters. The work function metal composite layer 226 may comprise only a single titanium nitride layer, and at least one physical property of the work function metal composite layer 226, such as a nitrogen/titanium element ratio, may gradually decrease from bottom to top. The specific formation manner of the work function metal composite layer 226 can, for example, gradually adjust the gas flow rate or the process power of the nitrogen gas of the process, so that the gas flow rate of the nitrogen gas gradually decreases from 40 sccm to 20 sccm.

Or, as shown in FIG. 9, the fourth preferred embodiment is different from the third preferred embodiment in that the fourth preferred embodiment includes a pumping step-down in the step of gradually changing the process parameters ( Pumping down). As a result, the first work function metal layer 326a itself contains at least one physical property, such as a nitrogen/titanium element ratio, which gradually decreases from bottom to top; the second work function metal layer 326b itself contains at least A physical property, such as a nitrogen/titanium element ratio, also gradually decreases with thickness from bottom to top; however, the physical properties of the work function metal composite layer 326 do not continuously change with thickness, but are instead pumped down. There is a discontinuous physical property change before and after the pressing step, that is, the physical properties at the junction of the first and second work function metal layers 26a, 26b are not continuously changed.

In other embodiments, the present invention may also not use a dummy gate, that is, without removing the polysilicon layer 28 and filling the conductive layer 64, but directly using the polysilicon layer 28 as part of the gate structure, or A conductive layer 64 is formed on the work function metal composite layers 26, 126, 226, 326 to replace the polysilicon layer 28 to form a metal gate.

In summary, the metal gate structure of the present invention comprises a work function metal composite layer, and the physical properties of the work function metal composite layer vary with thickness. For example, the work function metal composite layer may be a titanium nitride composite structure, and the nitrogen/titanium element ratio contained in the titanium nitride composite structure may decrease from bottom to top with thickness. Specifically, the titanium nitride composite structure may include a single titanium nitride layer, and the ratio of nitrogen/titanium elements contained in the titanium nitride layer may gradually decrease from bottom to top; or, the titanium nitride composite structure may include a plurality of stacked titanium nitride layers, wherein the ratio of nitrogen/titanium elements contained in each titanium nitride layer is maintained constant, and the proportion of nitrogen/titanium elements in the lowermost titanium nitride layer is higher than that of adjacent titanium nitride The ratio of nitrogen/titanium elements of the layer is higher; or alternatively, the titanium nitride composite structure may comprise a plurality of layers of titanium nitride layers stacked, wherein the ratio of nitrogen/titanium elements contained in each titanium nitride layer itself varies with thickness The upper portion is gradually reduced, and the ratio of nitrogen/titanium elements in the lowermost titanium nitride layer is higher than the ratio of nitrogen/titanium elements in the adjacent titanium nitride layer.

By the above method, the present invention can have the following advantages. First of all, the metal gate structure has the advantages of low resistance and no depletion effect, and has better component driving capability and speed than the conventional polysilicon gate. In addition, since the titanium nitride layer located at the lowermost layer of the titanium nitride composite structure has a higher nitrogen/titanium element ratio (N-rich), a work function value suitable for PMOS can be provided. Furthermore, the titanium nitride composite structure also has a titanium nitride layer having a high titanium/nitrogen element ratio (Ti-rich), thereby effectively preventing non-conductive substances such as nitrogen or oxygen from passing through the metal gate structure. The work function metal, which in turn prevents the EOT from deviating from the predetermined value, and the titanium nitride layer having a lower nitrogen/titanium ratio (the gas flow rate of the process gas nitrogen is about 16 sccm to 24 sccm) can also provide a thinner EOT effect. Accordingly, the present invention can improve the overall performance of the MOS transistor.

The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.

12. . . Base

14. . . Transistor region

18. . . Shallow trench isolation structure

twenty two. . . Gate dielectric layer

twenty four. . . Cover layer

26. . . Work function metal composite layer

26a. . . First work function metal layer

26b. . . Second work function metal layer

26c. . . Third work function metal layer

28. . . Polycrystalline layer

30. . . Mask layer

32. . . Virtual gate

34. . . Lightly doped source and bungee

38. . . Cerium oxide layer

40. . . Tantalum nitride layer

48. . . Source/drain region

54. . . Tantalum nitride layer

56. . . Interlayer dielectric layer

58. . . Opening

64. . . Conductive layer

66. . . Metal gate

126. . . Work function metal composite layer

166. . . Metal gate

226. . . Work function metal composite layer

266. . . Metal gate

326. . . Work function metal composite layer

326a. . . First work function metal layer

326b. . . Second work function metal layer

366. . . Metal gate

1 to 6 are schematic views showing the fabrication of a transistor having a metal gate according to a first preferred embodiment of the present invention.

Figure 7 is a schematic view showing the fabrication of a transistor having a metal gate in accordance with a second preferred embodiment of the present invention.

Figure 8 is a schematic view showing the fabrication of a transistor having a metal gate in accordance with a third preferred embodiment of the present invention.

Figure 9 is a schematic view showing the fabrication of a transistor having a metal gate in accordance with a fourth preferred embodiment of the present invention.

12‧‧‧Base

14‧‧‧Optocrystalline area

18‧‧‧Shallow trench isolation structure

22‧‧‧ gate dielectric layer

24‧‧ ‧ cover layer

26a‧‧‧First work function metal layer

26b‧‧‧Second work function metal layer

26c‧‧‧ third work function metal layer

34‧‧‧Lightly doped source and drain

38‧‧‧Oxide layer

40‧‧‧矽 nitride layer

48‧‧‧Source/bungee area

54‧‧‧layer of tantalum nitride

56‧‧‧Interlayer dielectric layer

64‧‧‧ Conductive layer

126‧‧‧Work function metal composite layer

166‧‧‧Metal gate

Claims (20)

A metal gate structure includes: a gate dielectric layer; a first work function metal layer disposed on the gate dielectric layer; and a second work function metal layer disposed on the first work function metal a layer; wherein the first and second work function metal layers are substantially composed of a first element and a nitrogen element, and the first work function metal layer has at least one and the second The work function metal layer has different physical properties, and further, the proportion of the nitrogen element contained in the first work function metal layer is higher than the ratio of the nitrogen element contained in the second work function metal layer. The metal gate structure of claim 1, wherein the first element is titanium. The metal gate structure of claim 1, wherein the first element is tantalum. The metal gate structure according to claim 1, wherein the physical property is a molecular formula. The metal gate structure of claim 1, wherein the physical property is density. The metal gate structure of claim 1, wherein the physical property is a resistivity. The metal gate structure according to claim 1, wherein the physical property is a crystal alignment direction. A metal gate structure includes: a gate dielectric layer; and a work function metal layer disposed on the gate dielectric layer, wherein the work function metal layer essentially comprises a first element and a nitrogen element, And the work function metal layer has at least one physical property that changes with thickness, and further, the ratio of the nitrogen element to the first element in the work function metal layer gradually decreases as the thickness increases. The metal gate structure of claim 8, wherein the first element is titanium. The metal gate structure of claim 8, wherein the first element is germanium. The metal gate structure according to claim 8, wherein the physical property is a molecular formula. The metal gate structure of claim 8, wherein the physical property is density. The metal gate structure of claim 8, wherein the physical property is a resistivity. The metal gate structure of claim 8, wherein the physical property is a crystal alignment direction. A method of forming a metal gate structure includes: forming a gate dielectric layer; and performing a process to form a work function metal composite layer on the gate dielectric layer, and forming the work function metal composite layer The process changes the at least one process parameter such that the work function metal layer contains a first element and a nitrogen element, and the nitrogen element/the first element ratio of the work function metal layer gradually decreases as the thickness increases. The method of claim 15, wherein the process of forming the work function metal composite layer comprises providing a nitrogen gas, and the process parameter is changed to include a gas flow rate of the nitrogen gas. The method of claim 15, wherein the process parameter is changed Includes a process power. The method of claim 15, wherein the process of forming the work function metal composite layer comprises a plurality of process stages, wherein the process parameters are respectively fixed in each of the process stages, and the process parameters are adjacent to each other. These process stages are different from each other. The method of claim 15, wherein the step of changing the process parameter includes a step of pumping down. The method of claim 15, wherein the step of changing the process parameter includes a step of power off.