TWI509386B - Main board and methods for disposing memory slots on the main board - Google Patents
Main board and methods for disposing memory slots on the main board Download PDFInfo
- Publication number
- TWI509386B TWI509386B TW101150342A TW101150342A TWI509386B TW I509386 B TWI509386 B TW I509386B TW 101150342 A TW101150342 A TW 101150342A TW 101150342 A TW101150342 A TW 101150342A TW I509386 B TWI509386 B TW I509386B
- Authority
- TW
- Taiwan
- Prior art keywords
- memory
- channel
- slot
- slots
- motherboard
- Prior art date
Links
Landscapes
- Combinations Of Printed Boards (AREA)
- Multi Processors (AREA)
Description
本發明屬於個人電腦或伺服器技術領域。The invention belongs to the technical field of personal computers or servers.
本發明關於伺服器的主機板,特別是關於設置於伺服器主機板之混合式記憶體插槽。The present invention relates to a motherboard for a server, and more particularly to a hybrid memory slot provided in a server motherboard.
圖1為先前技術中半寬伺服器的主機板1A之上視示意圖。1 is a top plan view of a motherboard 1A of a half-width server of the prior art.
如圖1所示,半寬伺服器的主機板1A包括複數個(例如兩個)中央處理器2-1及2-2、複數個週邊晶片(例如南橋晶片組3-1以及網路通訊控制晶片組3-2)以及複數個(例如為兩組)記憶體4-1、4-2與5-1、5-2。其中,週邊晶片3-1與3-2設置於主機板後端1b。As shown in FIG. 1, the motherboard 1A of the half-width server includes a plurality of (for example, two) central processors 2-1 and 2-2, and a plurality of peripheral chips (for example, the south bridge chipset 3-1 and the network communication control). Chip set 3-2) and a plurality (for example, two sets) of memories 4-1, 4-2 and 5-1, 5-2. The peripheral wafers 3-1 and 3-2 are disposed on the rear end 1b of the motherboard.
在圖1中,冷卻風扇提供之風流A從主機板前端1a流向主機板後端1b。由於記憶體4-1、4-2與5-1、5-2之每一者所包括之複數個(例如四個)記憶體模組之間的間距W較小,因此阻擋風流A的流動,進而降低散熱的效率而導致中央處理器2-2、記憶體4-1、4-2與5-1、5-2之溫度容易過高。因而,在半寬伺服器的設計上,所能支援的中央處理器2-1與2-2以及記憶體4-1、4-2與5-1、5-2之等級與規格皆受限制。此外,設置於主機板後端1b之週邊晶片3-1與3-2也面臨同樣之溫度過高之問題。In Fig. 1, the airflow A supplied from the cooling fan flows from the front end 1a of the main board to the rear end 1b of the main board. Since the distance W between the plurality of (for example, four) memory modules included in each of the memories 4-1, 4-2 and 5-1, 5-2 is small, the flow of the airflow A is blocked. Further, the efficiency of heat dissipation is reduced, and the temperature of the central processing unit 2-2 and the memories 4-1, 4-2, 5-1, and 5-2 is easily excessively high. Therefore, in the design of the half-width server, the levels and specifications of the central processing units 2-1 and 2-2 and the memories 4-1, 4-2 and 5-1, 5-2 that can be supported are limited. . Further, the peripheral wafers 3-1 and 3-2 provided on the rear end 1b of the motherboard also face the same problem that the temperature is too high.
另一方面,記憶體4-1、4-2與5-1、5-2之插槽使用貫孔式設計,因此,若主機板後端1b之訊號線(例如,週邊晶片3-1與3-2之訊號線S)欲穿越至主機板前端1a,則必須增加主機板1A的層數,或是縮小記憶體4-1、4-2與5-1、5-2的每個記憶體模組之間的間距W,以空出鄰近於主機板一 側1c之空間而允許訊號線S穿越至主機板前端1a。然而,訊號線S上傳輸之高速訊號所產生之電磁場M可能從主機板一側1c輻射至主機板1A之外。此外,縮小記憶體4-1、4-2與5-1、5-2的每個記憶體模組之間的間距W將導致記憶體4-1、4-2與5-1、5-2的溫度過高問題更加嚴重。On the other hand, the slots of the memories 4-1, 4-2 and 5-1, 5-2 use a through-hole design, so if the signal line of the rear end 1b of the motherboard (for example, the peripheral wafer 3-1 and 3-2 signal line S) If you want to cross to the front end 1a of the motherboard, you must increase the number of layers of the motherboard 1A, or reduce each memory of the memory 4-1, 4-2 and 5-1, 5-2. The spacing W between the body modules to vacate one adjacent to the motherboard The space of the side 1c allows the signal line S to traverse to the front end 1a of the motherboard. However, the electromagnetic field M generated by the high-speed signal transmitted on the signal line S may radiate from the motherboard side 1c to the outside of the motherboard 1A. In addition, reducing the spacing W between each of the memory modules 4-1, 4-2 and 5-1, 5-2 will result in memory 4-1, 4-2 and 5-1, 5- The problem of excessive temperature 2 is more serious.
為解決前述之先前技術中半寬伺服器主機板的中央處理器及記憶體模組溫度過高與訊號線電磁輻射之問題,本發明提出了一種混合式記憶體插槽,其包括表面接著式插槽與貫孔式插槽。In order to solve the above problems of the high temperature of the central processing unit and the memory module and the electromagnetic radiation of the signal line in the prior art half-width server motherboard, the present invention provides a hybrid memory slot including surface-attached Slots and through-hole slots.
在本發明的一實施例中,提供一主機板,包括一第一組記憶體插槽,該第一組記憶體插槽包括平行設置之一第一通道與一第二通道,該第一通道與該第二通道分別包括一第一型式插槽與一第二型式插槽,其中該第一通道之該第一型式插槽與該第二型式插槽分別設置於該第一通道之一第一側與一第二側,並且該第二通道之該第一型式插槽與該第二型式插槽分別設置於該第二通道之一第一側與一第二側,該第一通道之該第一側相鄰於該第二通道之該第一側。In an embodiment of the invention, a motherboard is provided, including a first set of memory slots, the first set of memory slots including a first channel and a second channel disposed in parallel, the first channel And the second channel includes a first type slot and a second type slot, wherein the first type slot and the second type slot of the first channel are respectively disposed on one of the first channels One side and a second side, and the first type slot and the second type slot of the second channel are respectively disposed on a first side and a second side of the second channel, the first channel The first side is adjacent to the first side of the second channel.
在本發明的另一實施例中,提供一種於主機板設置記憶體插槽之方法,包括:於主機板設置一中央處理器;於鄰近該中央處理器之一側設置一第一記憶體通道;於鄰近該第一記憶體通道相對於該中央處理器之另一側設置一第二記憶體通道;於該第一記憶體通道之第一側與第二側分別設置一第一型式插槽與一第二型式插槽;以及於該第二記憶體通道之第一側與第二側分別設置一第一型式插槽與一第二型式插槽,其中該第一記憶體通道平行於該第二記憶體通道,該第一記憶體通道之該第一側相鄰於該第二記憶體通道之該第一側,並且該第一記憶體通道之該第二側鄰近於該中央處 理器。In another embodiment of the present invention, a method for setting a memory slot on a motherboard includes: providing a central processing unit on the motherboard; and providing a first memory channel adjacent to one side of the central processing unit Providing a second memory channel adjacent to the first memory channel opposite to the other side of the central processing unit; and providing a first type of slot on the first side and the second side of the first memory channel And a second type slot; and a first type slot and a second type slot respectively disposed on the first side and the second side of the second memory channel, wherein the first memory channel is parallel to the a second memory channel, the first side of the first memory channel is adjacent to the first side of the second memory channel, and the second side of the first memory channel is adjacent to the center Processor.
將在以下結合附圖的較佳實施例的說明中詳細描述本發明的上述及進一步的目的、優點和特徵。The above and further objects, advantages and features of the present invention will be described in detail in the description of the preferred embodiments illustrated herein
圖2為本發明一實施例中,包括混合式記憶體插槽6之主機板1B之部分之上視示意圖。2 is a top plan view of a portion of a motherboard 1B including a hybrid memory slot 6 in accordance with an embodiment of the present invention.
如圖2所示,混合式記憶體插槽6設置於中央處理器2-1與主機板一側1c之間。一記憶體(如圖1中的記憶體4-1)可經由混合式記憶體插槽6而設置於主機板1B上。As shown in FIG. 2, the hybrid memory slot 6 is disposed between the central processing unit 2-1 and the motherboard side 1c. A memory (such as the memory 4-1 in FIG. 1) can be disposed on the motherboard 1B via the hybrid memory slot 6.
混合式記憶體插槽6包括兩個通道61及62,通道61包括兩個記憶體插槽601與602,通道62包括兩個記憶體插槽603與604。於記憶體插槽601、602、603及604中,相鄰的兩個記憶體插槽602與603為表面接著式插槽,而記憶體插槽601與604為貫孔式插槽。The hybrid memory slot 6 includes two channels 61 and 62, the channel 61 includes two memory slots 601 and 602, and the channel 62 includes two memory slots 603 and 604. In the memory slots 601, 602, 603, and 604, the adjacent two memory slots 602 and 603 are surface-engaging slots, and the memory slots 601 and 604 are through-hole slots.
換言之,貫孔式記憶體插槽601設置於鄰近主機板之一側1c,並且貫孔式記憶體插槽604設置於鄰近於中央處理器2-1;而表面接著式記憶體插槽602與603設置於貫孔式記憶體插槽601與604之間。In other words, the through-hole memory slot 601 is disposed adjacent to one side 1c of the motherboard, and the through-hole memory slot 604 is disposed adjacent to the central processing unit 2-1; and the surface-attached memory slot 602 is 603 is disposed between the through-hole memory slots 601 and 604.
圖3為圖2所示之實施例中,混合式記憶體插槽6沿著切線A-A’之剖面示意圖。Figure 3 is a cross-sectional view of the hybrid memory slot 6 taken along line A-A' in the embodiment of Figure 2.
如圖3所示,貫孔式記憶體插槽601與604分別經由貫孔601a與貫孔604a連接於主機板1B。此外,貫孔式記憶體插槽601與604分別連接至表面接著式記憶體插槽602與603。As shown in FIG. 3, the through-hole memory slots 601 and 604 are connected to the motherboard 1B via the through holes 601a and the through holes 604a, respectively. In addition, through-hole memory slots 601 and 604 are coupled to surface-attached memory slots 602 and 603, respectively.
其中,表面接著式記憶體插槽602與603之焊墊602a與603a懸空於主機板1B之上;因此,於貫孔式記憶體插槽 601與604之間與表面接著式記憶體插槽602與603之下方形成一空間,而允許線路(例如圖1所示之訊號線S)從其中穿越。藉由此實施方式,主機板1B之佈線方式更為靈活。Wherein, the pads 602a and 603a of the surface-attached memory sockets 602 and 603 are suspended above the motherboard 1B; therefore, in the through-hole memory slot A space is formed between 601 and 604 and below the surface-attached memory slots 602 and 603, and a line (such as the signal line S shown in FIG. 1) is allowed to pass therethrough. With this embodiment, the wiring pattern of the motherboard 1B is more flexible.
此外,如圖1所示之風流A亦可從上述空間中通過,而能夠有效降低設置於混合式記憶體插槽6之記憶體4-1之溫度。Further, the wind flow A shown in FIG. 1 can also pass through the space, and the temperature of the memory 4-1 provided in the hybrid memory slot 6 can be effectively reduced.
圖4為圖2所示之實施例中,包括混合式記憶體插槽6之主機板1B之另一上視示意圖。4 is another top plan view of the motherboard 1B including the hybrid memory slot 6 in the embodiment shown in FIG. 2.
如圖4所示,來自主機板後端1b之訊號線S可經由貫孔式記憶體插槽601與604之間以及表面接著式記憶體插槽602與603下方之空間,而穿越至主機板前端1a。因此,無須縮小設置於混合式記憶體插槽6上之記憶體(記憶體4-1)之每個記憶體模組的間距W,因而能夠符合原廠規範之記憶體模組間距之要求。As shown in FIG. 4, the signal line S from the back end 1b of the motherboard can pass through the space between the through-hole memory slots 601 and 604 and the surface-side memory slots 602 and 603, and traverse to the motherboard. Front end 1a. Therefore, it is not necessary to reduce the pitch W of each of the memory modules of the memory (memory 4-1) provided on the hybrid memory slot 6, and thus it is possible to meet the requirements of the memory module pitch of the original specification.
圖5為本發明之另一實施例中,包括混合式記憶體插槽之主機板1B’之上視示意圖。Figure 5 is a top plan view of a motherboard 1B' including a hybrid memory slot in accordance with another embodiment of the present invention.
圖5所示的記憶體插槽7、8與9與圖2、3和4所示之混合式記憶體插槽6具有相同或相似的結構。The memory slots 7, 8 and 9 shown in Fig. 5 have the same or similar structure as the hybrid memory slot 6 shown in Figs. 2, 3 and 4.
具體而言,記憶體插槽7包括貫孔式記憶體插槽701與704以及表面接著式記憶體插槽702與703。貫孔式記憶體插槽701設置於鄰近中央處理器2-1,貫孔式記憶體插槽704設置於鄰近主機板一側1d;而表面接著式記憶體插槽702與703設置於貫孔式記憶體插槽701與704之間。Specifically, the memory slot 7 includes through-hole memory slots 701 and 704 and surface-attached memory slots 702 and 703. The through-hole memory slot 701 is disposed adjacent to the central processing unit 2-1, the through-hole memory storage slot 704 is disposed adjacent to the motherboard side 1d; and the surface-attached memory slots 702 and 703 are disposed in the through hole Between memory banks 701 and 704.
另一方面,記憶體插槽8包括貫孔式記憶體插槽801與804以及表面接著式記憶體插槽802與803。貫孔式記憶體插槽804設置於鄰近中央處理器2-2,貫孔式記憶體插槽801設置於鄰近主機板一側1c;而表面接著式記憶體插槽802 與803設置於貫孔式記憶體插槽801與804之間。On the other hand, the memory slot 8 includes through-hole memory slots 801 and 804 and surface-attached memory slots 802 and 803. The through-hole memory slot 804 is disposed adjacent to the central processing unit 2-2, and the through-hole memory slot 801 is disposed adjacent to the motherboard side 1c; and the surface-attached memory slot 802 And 803 are disposed between the through-hole memory slots 801 and 804.
類似於記憶體插槽7之設置方式,記憶體插槽9包括貫孔式記憶體插槽901與904以及表面接著式記憶體插槽902與903。貫孔式記憶體插槽901設置於鄰近中央處理器2-2,貫孔式記憶體插槽904設置於鄰近主機板一側1d;而表面接著式記憶體插槽902與903設置於貫孔式記憶體插槽901與904之間。Similar to the manner in which the memory slot 7 is disposed, the memory slot 9 includes through-hole memory slots 901 and 904 and surface-attached memory slots 902 and 903. The through-hole memory slot 901 is disposed adjacent to the central processing unit 2-2, the through-hole memory slot 904 is disposed adjacent to the motherboard side 1d; and the surface-attached memory slots 902 and 903 are disposed in the through hole Between the memory slots 901 and 904.
藉由上述之設置方式,來自主機板後端1b之訊號線可分別經由混合式記憶體插槽6、7、8與9中的空間而穿越至主機板前端1a。例如,週邊晶片3-1(例如為南橋晶片組)之訊號線S1可經由混合式記憶體插槽6與8中的空間而穿越至主機板前端1a;而週邊晶片3-2(例如為網路通訊控制晶片組)之訊號線S2可經由混合式記憶體插槽7與9中的空間而穿越至主機板前端1a。With the above arrangement, the signal lines from the rear end 1b of the motherboard can pass through the space in the hybrid memory slots 6, 7, 8, and 9, respectively, to the front end 1a of the motherboard. For example, the signal line S1 of the peripheral wafer 3-1 (for example, a south bridge chip group) can pass through the space in the hybrid memory slots 6 and 8 to the front end 1a of the motherboard; and the peripheral chip 3-2 (for example, a net) The signal line S2 of the road communication control chip set can pass through the space in the hybrid memory slots 7 and 9 to the front end 1a of the motherboard.
圖6所示為本發明一實施例中,對應於混合式記憶體插槽6之記憶體4-1之裝設方式。FIG. 6 shows a manner of mounting the memory 4-1 corresponding to the hybrid memory slot 6 in accordance with an embodiment of the present invention.
圖6中,貫孔式記憶體插槽601設置於鄰近於主機板一側1c,並且貫孔式記憶體插槽604設置於鄰近於中央處理器2-1,而表面接著式記憶體插槽602與603設置於貫孔式記憶體插槽601與604之間。In FIG. 6, the through-hole memory slot 601 is disposed adjacent to the motherboard side 1c, and the through-hole memory slot 604 is disposed adjacent to the central processing unit 2-1, and the surface-attached memory slot 602 and 603 are disposed between the through-hole memory slots 601 and 604.
本實施例中,對應於混合式記憶體插槽6之記憶體4-1可包括至少一個記憶體模組。In this embodiment, the memory 4-1 corresponding to the hybrid memory slot 6 may include at least one memory module.
若記憶體4-1僅包括一個記憶體模組41,則記憶體模組41可裝設於表面接著式記憶體插槽603。If the memory 4-1 includes only one memory module 41, the memory module 41 can be mounted on the surface-attached memory slot 603.
若記憶體4-1包括兩個記憶體模組41與42,則記憶體模組41與42可依序裝設於表面接著式記憶體插槽603和貫孔式記憶體插槽604。If the memory 4-1 includes two memory modules 41 and 42, the memory modules 41 and 42 can be sequentially mounted on the surface-mounted memory slot 603 and the through-hole memory slot 604.
若記憶體4-1包括三個記憶體模組41、42與43,則記憶體模組41、42與43可依序裝設於表面接著式記憶體插槽603、貫孔式記憶體插槽604和表面接著式記憶體插槽602。If the memory 4-1 includes three memory modules 41, 42 and 43, the memory modules 41, 42 and 43 can be sequentially mounted on the surface-mounted memory slot 603, and the through-hole memory is inserted. Slot 604 and surface-attach memory slot 602.
若記憶體4-1包括四個記憶體模組41、42、43與44,則記憶體模組41、42、43與44可依序裝設於表面接著式記憶體插槽603、貫孔式記憶體插槽604、表面接著式記憶體插槽602和貫孔式記憶體插槽601。If the memory 4-1 includes four memory modules 41, 42, 43, and 44, the memory modules 41, 42, 43 and 44 can be sequentially mounted on the surface-attached memory slot 603, through-hole Memory slot 604, surface-attached memory slot 602 and through-hole memory slot 601.
圖7為本發明之一實施例中,於主機板設置混合式記憶體插槽之方法流程圖。FIG. 7 is a flow chart of a method for setting a hybrid memory slot on a motherboard according to an embodiment of the present invention.
於步驟701,於圖2所示之主機板1B設置一中央處理器2-1。In step 701, a central processing unit 2-1 is disposed on the motherboard 1B shown in FIG.
接下來,於步驟702中,於鄰近中央處理器2-1之一側2a設置第一記憶體通道62,並且於鄰近第一記憶體通道62相對於中央處理器2-1之另一側設置第二記憶體通道61,其中第二記憶體通道61平行於第一記憶體通道62。Next, in step 702, the first memory channel 62 is disposed adjacent to one side 2a of the central processing unit 2-1, and is disposed adjacent to the first memory channel 62 with respect to the other side of the central processing unit 2-1. The second memory channel 61, wherein the second memory channel 61 is parallel to the first memory channel 62.
接下來,於步驟703中,於第一記憶體通道62之第一側62a設置表面接著式插槽603,並且於第二記憶體通道61之第一側61a設置表面接著式插槽602,其中第一記憶體通道62之第一側62a相鄰於第二記憶體通道61之第一側61a。Next, in step 703, a surface-engaging slot 603 is disposed on the first side 62a of the first memory channel 62, and a surface-engaging slot 602 is disposed on the first side 61a of the second memory channel 61, wherein The first side 62a of the first memory channel 62 is adjacent to the first side 61a of the second memory channel 61.
接下來,於步驟704中,於第一記憶體通道62之第二側62b設置貫孔式插槽604,並且於第二記憶體通道61之第二側61b設置一貫孔式插槽601,其中第一記憶體通道62之第二側62b鄰近於中央處理器2-1。Next, in step 704, a through-hole slot 604 is disposed on the second side 62b of the first memory channel 62, and a consistent hole slot 601 is disposed on the second side 61b of the second memory channel 61, wherein The second side 62b of the first memory channel 62 is adjacent to the central processor 2-1.
接下來,於步驟705中,依序於第一記憶體通道62之表面接著式插槽603、第一記憶體通道62之貫孔式插槽604、第二記憶體通道61之表面接著式插槽602及第二記憶體通道61之貫孔式插槽601分別設置一記憶體模組。Next, in step 705, the surface of the first memory channel 62 is followed by the slot 603, the through hole slot 604 of the first memory channel 62, and the surface of the second memory channel 61. The slot 602 and the through slot 601 of the second memory channel 61 are respectively provided with a memory module.
具體而言,如圖6所示,記憶體4-1包括四個記憶體模組41至44。記憶體模組41至44依序設置於表面接著式插槽603、貫孔式插槽604、表面接著式插槽602以及貫孔式插槽601。Specifically, as shown in FIG. 6, the memory 4-1 includes four memory modules 41 to 44. The memory modules 41 to 44 are sequentially disposed in the surface-engaging slot 603, the through-hole slot 604, the surface-engaging slot 602, and the through-hole slot 601.
接下來,於步驟706中,如圖4所示,於第一記憶體通道62之表面接著式插槽603及/或於第二記憶體通道61之表面接著式插槽602下方設置一組訊號線S。Next, in step 706, as shown in FIG. 4, a set of signals is disposed on the surface of the first memory channel 62 followed by the slot 603 and/or below the surface of the second memory channel 61. Line S.
從以下結合附圖來閱讀的詳細說明最好地理解本發明。需要強調的是,根據慣例,附圖的各個特徵不是按比例的。相反,為了清晰起見,各個特徵的尺寸被任意地放大或者縮小了。附圖中包括以下圖示:圖1為先前技術中半寬伺服器的主機板之上視示意圖;圖2為本發明一實施例中,包括混合式記憶體插槽之主機板之部分之上視示意圖;圖3為圖2所示之實施例中,混合式記憶體插槽沿著切線A-A’之剖面示意圖;圖4為圖2所示之實施例中,包括混合式記憶體插槽之主機板之另一上視示意圖;圖5為本發明之另一實施例中,包括混合式記憶體插槽之主機板之上視示意圖;圖6所示為本發明一實施例中,對應於混合式記憶體插槽之記憶體之裝設方式;以及圖7為本發明之一實施例中,於主機板設置混合式記憶體插槽之方法流程圖The invention will be best understood from the following detailed description read in conjunction with the drawings. It is emphasized that the various features of the figures are not to scale. On the contrary, the size of each feature is arbitrarily enlarged or reduced for the sake of clarity. The drawings include the following illustrations: FIG. 1 is a top plan view of a motherboard of a half-width server of the prior art; FIG. 2 is a diagram of a portion of a motherboard including a hybrid memory slot in accordance with an embodiment of the present invention; FIG. 3 is a cross-sectional view of the hybrid memory slot along the tangential line A-A' in the embodiment shown in FIG. 2; FIG. 4 is a hybrid memory plug in the embodiment shown in FIG. FIG. 5 is a top view of a motherboard including a hybrid memory slot according to another embodiment of the present invention; FIG. 6 is a schematic view of an embodiment of the present invention; Corresponding to the installation manner of the memory of the hybrid memory slot; and FIG. 7 is a flowchart of a method for setting the hybrid memory slot on the motherboard in an embodiment of the present invention
1B‧‧‧主機板1B‧‧‧ motherboard
1a‧‧‧主機板前端1a‧‧‧ motherboard front end
1b‧‧‧主機板後端1b‧‧‧ motherboard backend
1c‧‧‧主機板一側1c‧‧‧ motherboard side
2-1‧‧‧中央處理器2-1‧‧‧Central Processing Unit
6‧‧‧混合式記憶體插槽6‧‧‧Mixed memory slot
601‧‧‧貫孔式插槽601‧‧‧through hole slot
604‧‧‧貫孔式插槽604‧‧‧through hole slot
602‧‧‧表面接著式插槽602‧‧‧ Surface-mounted slots
603‧‧‧表面接著式插槽603‧‧‧ Surface-mounted slots
S‧‧‧訊號線S‧‧‧ signal line
W‧‧‧記憶體模組間距W‧‧‧ memory module spacing
Claims (12)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW101150342A TWI509386B (en) | 2012-12-27 | 2012-12-27 | Main board and methods for disposing memory slots on the main board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW101150342A TWI509386B (en) | 2012-12-27 | 2012-12-27 | Main board and methods for disposing memory slots on the main board |
Publications (2)
Publication Number | Publication Date |
---|---|
TW201426251A TW201426251A (en) | 2014-07-01 |
TWI509386B true TWI509386B (en) | 2015-11-21 |
Family
ID=51725474
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW101150342A TWI509386B (en) | 2012-12-27 | 2012-12-27 | Main board and methods for disposing memory slots on the main board |
Country Status (1)
Country | Link |
---|---|
TW (1) | TWI509386B (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI615721B (en) * | 2015-03-06 | 2018-02-21 | 華碩電腦股份有限公司 | Motherboard |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20020160743A1 (en) * | 2001-04-27 | 2002-10-31 | Rudy Vianna | Communication device plane having a high-speed bus |
TWI253789B (en) * | 2003-11-06 | 2006-04-21 | Molex Inc | Land grid array socket connector |
TW200917581A (en) * | 2007-10-12 | 2009-04-16 | Hon Hai Prec Ind Co Ltd | Motherboard having mixed-slots architecture |
TW200921332A (en) * | 2007-11-09 | 2009-05-16 | Hon Hai Prec Ind Co Ltd | Motherboard with different sized memory slots |
US20110271025A1 (en) * | 2010-04-28 | 2011-11-03 | Hon Hai Precision Industry Co., Ltd. | Computer motherboard |
-
2012
- 2012-12-27 TW TW101150342A patent/TWI509386B/en active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20020160743A1 (en) * | 2001-04-27 | 2002-10-31 | Rudy Vianna | Communication device plane having a high-speed bus |
TWI253789B (en) * | 2003-11-06 | 2006-04-21 | Molex Inc | Land grid array socket connector |
TW200917581A (en) * | 2007-10-12 | 2009-04-16 | Hon Hai Prec Ind Co Ltd | Motherboard having mixed-slots architecture |
TW200921332A (en) * | 2007-11-09 | 2009-05-16 | Hon Hai Prec Ind Co Ltd | Motherboard with different sized memory slots |
US20110271025A1 (en) * | 2010-04-28 | 2011-11-03 | Hon Hai Precision Industry Co., Ltd. | Computer motherboard |
Also Published As
Publication number | Publication date |
---|---|
TW201426251A (en) | 2014-07-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US11617284B2 (en) | Assemblies including heat dispersing elements and related systems and methods | |
JP3619521B2 (en) | Information processing apparatus and component placement method thereof | |
US7309911B2 (en) | Method and stacked memory structure for implementing enhanced cooling of memory devices | |
JP5164273B2 (en) | Multi-die integrated circuit device | |
US20060250780A1 (en) | System component interposer | |
US20080192428A1 (en) | Thermal management system for computers | |
Pal et al. | A case for packageless processors | |
US20080032446A1 (en) | combination heat dissipation device with termination and a method of making the same | |
CN111124081B (en) | Kits for enhanced cooling of components of computing devices and related systems and methods | |
JP6159820B2 (en) | Semiconductor device and information processing apparatus | |
JP2006295193A (en) | System and method for reducing simultaneous switching noise in integrated circuit | |
TWI509386B (en) | Main board and methods for disposing memory slots on the main board | |
CN111987077A (en) | Interconnect hub for die | |
TW201822600A (en) | Memory arrangement | |
US20140168895A1 (en) | Electronic device with heat dissipation module | |
CN216412026U (en) | Server with upper layer and lower layer | |
Winkel et al. | First-and second-level packaging of the z990 processor cage | |
Secker et al. | Co-design and optimization of a 256-GB/s 3D IC package with a controller and stacked DRAM | |
CN207488895U (en) | Main circuit board and its electronic device with heat emission hole | |
US20090129001A1 (en) | Computer host having two layers inside | |
JP2000020168A (en) | Information processor, its parts arranging method and heat sink | |
KR102339899B1 (en) | Semiconductor package, module substrate and semiconductor package module having the same | |
CN212785995U (en) | PCB heat balance layout structure | |
US9158346B2 (en) | Main board and methods for disposing memory slots on the main board | |
CN214254415U (en) | Processor chip |