TWI505492B - Chip with semiconductor dc voltage transformation structure - Google Patents

Description

Wafer with semiconductor DC transformer structure

The present invention relates to the field of semiconductor technology, and in particular, to a wafer having a semiconductor DC transformer structure.

With the continuous development of semiconductor technology, the size of one-area body circuit chip is getting larger and larger, the integration degree is getting higher and higher, various different circuits and even functional modules are integrated on the same wafer, such as RF circuit, analog circuit and digital circuit. , various MEMS (Micro Electronic Mechanical System) devices, flash memory, etc., and they require different operating voltages, such as the voltage of the digital circuit is about 1V, the flash memory requires a high write voltage, some The sensing device may require an operating voltage of several tens of V or even hundreds of V, and even circuit modules of the same voltage may interact with each other through a power line, such as noise, distortion, etc.; The smaller the operating voltage is, the lower the operating voltage is, and the power consumption of the chip is continuously increased. As a result, the operating current of the power supply rises linearly, and the IR loss is more and more affected by the series resistance of the interconnection line on the wafer. These put forward higher requirements on the performance of the power supply system of the chip.

Current technology typically introduces multiple sets of different voltage sources directly from the outside. This method has the following disadvantages: 1. A large number of off-chip power supply devices are required, the cost is high, the interference is high, and the power consumption power management is complicated; 2. Multiple sets of power interfaces require a large number of on-chip input/output buffers for wire bonding pads, occupying a large area and requiring a large number of bond wires; 3. When a low-voltage large current is introduced from the outside, the voltage drop loss on the interconnect resistance of the wafer is very large, and a large number of long-distance power supply traces are required, occupying a large amount of wafer area, which is disadvantageous for heat dissipation, and is also disadvantageous for miniaturization of the wafer and The cost is reduced.

To this end, the development of DC transformer technology and on-chip DC transformer device to achieve integrated multi-voltage power supply scheme on the integrated circuit, free to achieve on-chip transformer, especially boost is a key issue to be solved.

It is an object of the present invention to at least solve one of the above-mentioned technical drawbacks, and in particular to provide a wafer which is small in size, has little voltage drop loss, and can be integrated in a single piece.

The present invention provides a wafer having a semiconductor DC voltage transformation structure, comprising: a substrate; at least one semiconductor DC voltage transformation structure formed over the substrate, comprising: at least one semiconductor electro-optical conversion unit for converting input electrical energy into light And at least one semiconductor photoelectric conversion unit for converting light energy into output electrical energy, wherein the semiconductor electro-optical conversion unit matches the operating light spectrum of the semiconductor photoelectric conversion unit.

A wafer having a semiconductor DC voltage transformation structure according to the present invention, wherein in a semiconductor DC voltage transformation structure, a semiconductor electro-optical conversion unit is provided at an input end to convert direct current into light for transmission, and a semiconductor photoelectric conversion unit is disposed at an output end to light It is converted into a direct current output, and a different number of semiconductor electro-optical conversion units and semiconductor photoelectric conversion units are respectively connected in series at the input end and the output end, and the DC voltage is changed by the operating voltage difference and the ratio of the number of the semiconductor electro-optical conversion unit and the semiconductor photoelectric conversion unit. Press and then pass the power pin and load The road is connected. The wafer has a DC voltage transformation function, has no electromagnetic radiation, has no coil structure, is safe and reliable, has small volume, long life, light weight, and independent isolation of each output module from each other, and the wafer of the present invention can be combined with various circuits. The functional module is integrated on the same substrate to realize on-chip DC voltage transformation, thereby providing multiple sets of different DC voltage sources to meet the requirements of different functional modules, and integrating the voltage transformer on the chip by the on-chip circuit module. The wafer, which generates the required supply voltage, can reduce the loss of electrical energy due to large currents on the metal lines inside the wafer, which was previously impossible with the multiple sets of supply voltage techniques required for off-chip provisioning.

In one embodiment of the present invention, the wafer further includes: an isolation layer, wherein at least one semiconductor electro-optical conversion unit is formed on one side of the isolation layer, and each of the semiconductor electro-optical conversion units includes an electro-optical conversion layer, and at least one semiconductor photoelectric conversion unit Formed on the other side of the isolation layer, and each of the semiconductor photoelectric conversion units includes a photoelectric conversion layer, wherein the isolation layer is transparent to the working light emitted by the electro-optical conversion layer, and the working light is transmitted in a transmissive manner.

In an embodiment of the invention, the wafer further includes: an isolation layer having a reflective structure in the isolation layer, wherein at least one of the semiconductor electro-optical conversion units and the at least one semiconductor photoelectric conversion unit are formed on the same side of the isolation layer and arranged at intervals Each of the semiconductor electro-optical conversion units includes an electro-optical conversion layer, each of the photoelectric conversion units includes a photoelectric conversion layer, the isolation layer is transparent to the working light emitted by the electro-optical conversion layer, and the reflective structure is used for reflecting the working light from the electro-optical conversion layer to the photoelectric On the conversion layer.

In one embodiment of the invention, the materials of the semiconductor electro-optical conversion unit, the isolation layer, and the semiconductor photoelectric conversion unit have similar refractive indices.

In one embodiment of the invention, the refractive indices of the materials of the semiconductor electro-optical conversion unit, the isolation layer, and the semiconductor photoelectric conversion unit are increased.

In one embodiment of the invention, at least one of the semiconductor electro-optical conversion unit, the isolation layer, and the semiconductor photoelectric conversion unit has a roughened surface, a patterned surface, or a photonic crystal structure.

In an embodiment of the invention, the spacer material is solid transparent insulating or semi-insulating Al ₂ O ₃ , Y ₂ O ₃ , Gd ₂ O ₃ , AlN, SiO ₂ , MgO, CaO, Si ₃ N ₄ , BN, Diamond, LiAlO ₂ , LiGaO ₂ , GaAs, SiC, TiO ₂ , ZrO ₂ , SrTiO ₃ , Ga ₂ O ₃ , ZnS, ZnSe, CdTe, SiC, MgAl ₂ O ₄ , LiNbO ₃ , LiTaO ₃ , Y ₃ AI ₅ O ₁₂ , one of KNbO ₃ , LiF, MgF ₂ , BaF ₂ , GaF ₂ , LaF ₃ , BeO, GaP, GaN, and rare earth oxides, and combinations thereof. Preferably, SiO ₂ , Si ₃ N ₄ which is commonly used in the IC integrated circuit process can be used.

In one embodiment of the invention, the material of the electro-optic conversion layer is one of AlGaInP, GaN, InGaN, AlGaInN, ZnO, AlGaInAs, GaAS, InGaAs, InGaAsP, AlGaAs or InGaAsNSb, and combinations thereof.

In one embodiment of the invention, the material of the photoelectric conversion layer is Si, Ge, SiGe, AlGaInP, InGaAs, InGaN, AlGaInN, InGaAsP, GaAs, GaSb, InGaP, InGaAs, InGaAsP, AlGaAs, AlGaP, InAlP, AlGaAsSb or InGaAsNSb. One and a combination thereof.

In an embodiment of the invention, the material of the electrode layer located on the working light transmission path is transparent conductive material GaAs, GaN, AlGaInP, AlGaInN, AlGaInAs, ITO (indium tin oxide), SnO ₂ , ZnO or graphene. One and a combination thereof.

In an embodiment of the present invention, between the semiconductor electro-optical conversion units, between the semiconductor photoelectric conversion units, or between the semiconductor electro-optical conversion unit and the semiconductor photoelectric conversion unit, a transparent insulating medium is filled and the transparent insulating medium covers the reflective layer at the top; or ,semiconductor Between the electro-optical conversion units, between the semiconductor photoelectric conversion units, or between the semiconductor electro-optical conversion unit and the semiconductor photoelectric conversion unit, a reflective insulating medium is filled.

In an embodiment of the invention, the wafer further includes: a trap structure for confining the working light to the inside of the semiconductor DC transformer structure to reduce energy loss caused by light loss.

In one embodiment of the invention, the chip further includes: one or more power pins, the power pins are connected to an external power source; the on-chip power distribution network, the on-chip power distribution network and the power pins, and the at least one semiconductor The DC transformer structure is connected; and the circuit function module, each circuit function module is connected to at least one semiconductor DC transformer structure, wherein the input end of the semiconductor DC transformer structure is connected to the on-chip power distribution network, and the output end is The circuit function modules on the wafer that need to be powered are connected.

In one embodiment of the invention, the wafer further includes: at least one control module coupled to the at least one semiconductor DC transformer structure and controlled by the semiconductor DC transformer structure.

In one embodiment of the invention, the wafer is fully on-chip, and the material of the substrate is Si, SiGe, GaAs, InP, SiC, Al ₂ O ₃ or a flexible material.

In one embodiment of the invention, the wafer includes a plurality of semiconductor DC voltage transformation structures, wherein the plurality of semiconductor DC voltage transformation structures share a semiconductor electro-optical conversion unit.

The additional aspects and advantages of the invention will be set forth in part in the description which follows.

10‧‧‧Semiconductor DC transformer structure

20‧‧‧Substrate

30‧‧‧Power pin

40‧‧‧On-chip power distribution network

50‧‧‧Circuit function module

110, 120‧‧‧ conversion unit

130‧‧‧Isolation

131‧‧‧Reflective structure

LI, LO‧‧‧ lead

The above and/or additional aspects and advantages of the present invention will be apparent from the following description The description of the embodiment will become apparent and easy to understand, wherein: FIG. 1 is a schematic structural view of a wafer according to an embodiment of the present invention; and FIG. 2 is a working principle diagram of a semiconductor DC transformer structure in a wafer according to the present invention. 3 is a schematic structural view of a wafer according to an embodiment of the present invention; FIG. 4 is a schematic structural view of a semiconductor DC voltage transformation structure of a wafer according to an embodiment of the present invention; and FIG. 5 is a schematic view of a semiconductor DC voltage transformation structure according to an embodiment of the present invention; A schematic structural view of a semiconductor DC voltage transformation structure of a wafer; and FIG. 6 is a schematic structural view of a wafer according to an embodiment of the present invention.

The embodiments of the present invention are described in detail below, and the examples of the embodiments are illustrated in the drawings, wherein the same or similar reference numerals are used to refer to the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the drawings are intended to be illustrative of the invention and are not to be construed as limiting.

The following disclosure provides many different embodiments or examples for implementing different structures of the present invention. In order to simplify the disclosure of the present invention, the components and arrangements of the specific examples are described below. Of course, they are merely examples and are not intended to limit the invention. Moreover, the present invention may repeat reference numerals and/or letters in different examples. This repetition is for the purpose of simplicity and clarity, and is not in the nature of the description of the various embodiments and/or arrangements discussed. Moreover, the present invention provides examples of various specific processes and materials, but one of ordinary skill in the art will recognize the applicability of other processes and/or the use of other materials. Additionally, the structure of the first feature described below on the "on" of the second feature may include the first and second features being formed straight Embodiments of the contact contact may also include embodiments in which additional features are formed between the first and second features such that the first and second features may not be in direct contact.

The present invention provides a wafer having a semiconductor DC transformer structure, as shown in FIG. 1, the wafer comprising: a substrate 20; and at least one semiconductor DC transformer structure 10 formed over the substrate 20. The semiconductor DC transformer structure 10 further includes: at least one semiconductor electro-optical conversion unit 110 for converting input electrical energy into optical energy; and at least one semiconductor photoelectric conversion unit 120 for converting optical energy into output electrical energy. The number of the semiconductor photoelectric conversion units 120 is proportional to the number of the semiconductor electro-optical conversion units 110 to achieve DC voltage transformation, and the semiconductor electro-optical conversion unit 110 matches the wavelength band of the working light of the semiconductor photoelectric conversion unit 120. It should be noted that although a fixed number of semiconductor DC voltage transformation structures 10, semiconductor electro-optical conversion units 110, and semiconductor photoelectric conversion units 120 are shown in FIG. 1, they may be any number in practice.

The operation principle of the semiconductor DC voltage transformer structure 10 in the wafer of the present invention is as shown in Fig. 2: the input terminal lead LI is connected to the semiconductor electro-optical conversion unit 110, and the output terminal lead LO is connected to the semiconductor photoelectric conversion unit 120. The semiconductor electro-optic conversion unit 110 includes m light-emitting diodes (LEDs), resonant light-emitting diodes (RC_LEDs) or laser diodes (LD) having a DC operating voltage of V1, and the semiconductor photoelectric conversion unit 120 includes n light-emitting units. Photovoltaic cell with voltage V2. The light emitted by the semiconductor electro-optical conversion unit 110 is the same as the wavelength of the light optimized by the photoelectric conversion efficiency of the semiconductor photoelectric conversion unit 120, that is, the working light of the two needs to be matched to make the electro-optical-photoelectric energy conversion efficiency of the device. Higher, less energy loss during the pressure transformation process. In the operating state, the semiconductor electro-optical conversion unit 110 emits light by applying a voltage to both ends, and the photons are transmitted to the semiconductor photoelectric conversion unit 120 to excite different carriers in the semiconductor photoelectric conversion unit 120. The photo-generated voltage and the photo-generated current are formed by the separation of the built-in electric field, thereby realizing energy transmission using the optical wave. During this energy transfer, the input voltage / output voltage = (m * V1) / (n * V2).

According to the wafer of the embodiment of the present invention, in the semiconductor DC voltage transformation structure, a semiconductor electro-optical conversion unit is provided at the input end to convert direct current into light for transmission, and a semiconductor photoelectric conversion unit is disposed at the output end to convert the light into a direct current output. The input end and the output end respectively use different numbers of semiconductor electro-optical conversion units and semiconductor photoelectric conversion units in series, and the DC voltage is transformed by the operating voltage difference and the ratio of the semiconductor electro-optical conversion unit and the semiconductor photoelectric conversion unit, and then passed through the power supply tube. The pin is connected to the load circuit. The wafer has a DC voltage transformation function, has no electromagnetic radiation, has no coil structure, is safe and reliable, has small volume, long life, light weight, convenient installation and maintenance, and the like, and each output module is independently isolated from each other, and the invention is not affected. The wafers can be integrated in a single piece, which was not possible with prior art.

Figure 3 is a schematic illustration of a wafer having a semiconductor DC transformer structure in accordance with an embodiment of the present invention.

As shown in Figure 3, the wafer has four semiconductor DC transformer structures 10, which can convert 12V DC input voltage into 5V, 1.8V, 50V and 3.3V output voltages, of which 12V is a common DC input voltage. 5V and 3.3V are common analog output voltages, 1.8V is a common digital output voltage, and 50V is a common MEMS output voltage. The chip can realize the purpose of providing an input voltage and outputting a plurality of different output voltages to drive different DC voltage function modules.

In one embodiment of the present invention, the semiconductor DC transformer structure 10 of the wafer further includes an isolation layer 130 for electrically isolating the semiconductor electro-optical conversion unit 110 and the semiconductor photoelectric conversion unit 120. According to the specific position of the isolation layer 130, there are two cases of FIG. 4 and FIG. 5, wherein the arrows in FIGS. 4 and 5 indicate the conduction direction of the working light.

As shown in FIG. 4, the semiconductor DC transformer structure 10 in the wafer has a double-sided structure with the isolation layer 130 in between. At least one semiconductor electro-optical conversion unit 110 is formed on one side of the isolation layer 130, and each of the semiconductor electro-optical conversion units 110 includes an electro-optical conversion layer, and at least one semiconductor photoelectric conversion unit 120 is formed on the other side of the isolation layer 130, and each The semiconductor photoelectric conversion unit 120 includes a photoelectric conversion layer in which the isolation layer 130 is transparent to the working light emitted by the electro-optical conversion layer, and the working light is transmitted in a transmissive manner.

As shown in FIG. 5, the semiconductor DC transformer structure 10 in the wafer is a single-sided structure, and the isolation layer 130 is located at the bottom or the top thereof. The isolation layer 130 has a reflective structure 131 therein. At least one semiconductor electro-optical conversion unit 110 and at least one semiconductor photoelectric conversion unit 120 are formed on the same side of the isolation layer 130 and arranged at intervals, wherein each of the semiconductor electro-optical conversion units 110 includes an electro-optical conversion layer, and each of the photoelectric conversion units 120 includes The photoelectric conversion layer, the isolation layer 130 is transparent to the working light emitted by the electro-optical conversion layer, and the reflective structure 131 is for reflecting the working light from the electro-optical conversion layer onto the photoelectric conversion layer.

In addition, in order to obtain good photoelectric energy conversion efficiency, it should be avoided that total reflection occurs at the interface of each layer when the working light propagates. Since total reflection occurs when light enters a material having a small refractive index from a material having a large refractive index, it is only necessary to appropriately match the refractive indices of the layers along the direction of propagation of the light to avoid the occurrence of total reflection. Therefore, in order to reduce the total reflection of the working light between the interfaces, the refractive index of the material of each layer structure along the working light transmission path is required to satisfy the matching condition. Specifically, in one embodiment of the present invention, the semiconductor electro-optical conversion unit 110, the isolation layer 130, and the semiconductor photoelectric conversion unit 120 have similar refractive indices. In another embodiment of the present invention, the material refractive index of the semiconductor electro-optical conversion unit 110, the isolation layer 130, and the semiconductor photoelectric conversion unit 120 is increased. In one embodiment of the invention, the semiconductor power At least one of the light conversion unit 110, the isolation layer 130, and the semiconductor photoelectric conversion unit 120 has a roughened surface, a patterned surface, or a photonic crystal structure. All of the above measures can reduce the total reflection of light at the interface, which is beneficial to the conduction of working light, thereby facilitating the conversion of energy.

In the above embodiments of the present invention, the material of the isolation layer 130 may be solid transparent insulating or semi-insulating Al ₂ O ₃ , Y ₂ O ₃ , Gd ₂ O ₃ , AlN, SiO ₂ , MgO, CaO, Si ₃ N _{4 .} , BN, diamond, LiAlO ₂ , LiGaO ₂ , GaAs, SiC, TiO ₂ , ZrO ₂ , SrTiO ₃ , Ga ₂ O ₃ , ZnS, ZnSe, CdTe, SiC, MgAl ₂ O ₄ , LiNbO ₃ , LiTaO ₃ , Y ₃ One of AI ₅ O ₁₂ , KNbO ₃ , LiF, MgF ₂ , BaF ₂ , GaF ₂ , LaF ₃ , BeO, GaP, GaN, and rare earth oxides, and combinations thereof.

In the above embodiment of the present invention, the electro-optic conversion layer material in the semiconductor electro-optical conversion unit 110 may be one of AlGaInP, GaN, InGaN, AlGaInN, ZnO, AlGaInAs, GaAS, InGaAs, InGaAsP, AlGaAs or InGaAsNSb, and combinations thereof.

In the above embodiment of the present invention, the material of the photoelectric conversion layer in the semiconductor photoelectric conversion unit 120 may be Si, Ge, SiGe, AlGaInP, InGaAs, InGaN, AlGaInN, InGaAsP, GaAs, GaSb, InGaP, InGaAs, InGaAsP, AlGaAs. One of AlGaP, InAlP, AlGaAsSb or InGaAsNSb and combinations thereof.

In the above embodiment of the present invention, the material of the electrode layer located on the working light transmission path may be one of a transparent conductive material GaAs, GaN, AlGaInP, AlGaInN, AlGaInAs, ITO, SnO ₂ , ZnO or graphene, and combinations thereof. .

In a preferred embodiment of the invention, the medium filled between the unit and the unit also has a light limiting effect. Specifically, in a wafer having the double-sided structure semiconductor DC voltage transformation structure 10 as shown in FIG. 4, a plurality of semiconductor electro-optical conversion units 110 and a plurality of semiconductor photoelectric conversions The cells 120 may be filled with a transparent insulating medium and the transparent insulating medium may be covered with a reflective layer or filled with a reflective insulating medium; or, in a wafer having a single-sided semiconductor DC transformer structure 10 as shown in FIG. Between the semiconductor electro-optical conversion unit 110 and the semiconductor photoelectric conversion unit 120, a transparent insulating medium may be filled and the transparent insulating medium may be covered with a reflective layer or filled with a reflective insulating medium.

In a preferred embodiment of the present invention, the wafer further includes: a light trapping structure 140 for limiting the working light to the inside of the semiconductor DC transformer structure to reduce energy loss caused by light loss. The method of setting the light-limiting structure is flexible. For example, when the semiconductor DC-varying structure 10 is a double-sided structure, the light-limiting structure 140 can take two non-adjacent faces of the semiconductor electro-optical conversion unit 110 and the semiconductor photoelectric conversion unit 120. An omnidirectional mirror (ODR) or a decentralized Bragg mirror (DBR) is provided to reflect light so that the working light cannot be emitted. For another example, when the semiconductor DC transformer structure 10 is a single-sided structure, the light-limiting structure 140 may adopt an omnidirectional mirror (ODR) disposed on a surface of the semiconductor electro-optical conversion unit 110 and the semiconductor photoelectric conversion unit 120 that does not contact the isolation layer 130. Or a decentralized Bragg reflector (DBR) reflects light so that working light cannot be emitted. Among them, the Bragg mirror can be made of rare earth oxide (REO) material, and the REO material is transparent to working light, has good insulation properties, and is resistant to high voltage and puncture.

In one embodiment of the invention, as shown in FIG. 6, the wafer further includes one or more power pins 30, an on-chip power distribution network 40, and a circuit function module 50. The power pin 30 is connected to the external power source; the on-chip power distribution network 40 is connected to the power pin 30 and the input end of the at least one semiconductor DC transformer structure 10, so that the input end of the semiconductor DC transformer structure 10 is connected to the outside. Power supply; the output of the semiconductor DC transformer structure 10 is connected to the power that needs to be supplied The road function module 50 is connected to provide the power required for the work. The circuit function module 50 refers to a digital logic circuit, an analog circuit, an RF circuit, a flash circuit, a MEMS device and the like that are integrated on the same chip and require different voltages. For example, on a flash chip, multiple sets of different supply voltages are required, ranging from 1.2V to 20V, especially when writing programming voltages, which often require 10-20V.

In one embodiment of the invention, the wafer further includes at least one control module 60 coupled to and controlled by the at least one semiconductor DC transformer structure 10. Specifically, the control module 60 can sample and control the current and voltage of the input and output terminals of the semiconductor DC transformer structure 10 to achieve voltage regulation, voltage regulation, power supply efficiency optimization, and power supply shutdown.

In one embodiment of the invention, the wafer is fabricated in an on-chip, fully integrated process, and the material of the substrate 20 is Si, SiGe, GaAs, InP, SiC, Al ₂ O ₃ or a flexible material. Wherein, when the substrate 20 is a flexible material such as a plastic film, the semiconductor electro-optical conversion unit 110 may employ an organic light emitting diode (OLED) or a quantum dot light emitting diode, and the semiconductor photoelectric conversion unit 120 may be an organic photovoltaic cell or a quantum dot. Photocell.

In one embodiment of the invention, the wafer includes a plurality of semiconductor DC transformer structures 10, wherein the plurality of semiconductor DC transformer structures 10 share a semiconductor electro-optical conversion unit 110. For example, a large-area light-emitting diode can be used to serve as the semiconductor electro-optical conversion unit 110 in a plurality of semiconductor DC-transformed structures, and the wafer structure of this embodiment is more compact and reliable.

There are other variant embodiments of the present invention, such as using a three-dimensional wafer stacking or bonding technique to integrate a wafer that implements DC voltage transformation of a power supply with a wafer that implements functions such as storage, computing, and MEMS sensing to form a complete system. Or, a system-level package is used to package a DC-transformed wafer and other functional modules together to form a system.

While the embodiments of the present invention have been shown and described, it will be understood by those skilled in the art Variations, the scope of the invention is defined by the scope of the appended claims and their equivalents.

10‧‧‧Semiconductor DC transformer structure

20‧‧‧Substrate

30‧‧‧Power pin

40‧‧‧On-chip power distribution network

50‧‧‧Circuit function module

Claims (16)

A wafer having a semiconductor DC transformer structure, comprising: a substrate; at least one semiconductor DC voltage transformation structure formed on the substrate, comprising: a voltage input; a voltage output; at least one semiconductor electro-optical conversion unit And for converting the input electrical energy received on the voltage input into optical energy; and at least one semiconductor photoelectric conversion unit is disposed on the substrate for receiving the light energy from the at least one semiconductor electro-optical conversion unit And converting the received light energy to output electrical energy at the voltage output, wherein the semiconductor electro-optical conversion unit matches a working light spectrum of the semiconductor photoelectric conversion unit; and a load circuit coupled to the The voltage is output and powered by it. The wafer of claim 1, further comprising: an isolation layer, wherein the at least one semiconductor electro-optical conversion unit is formed on one side of the isolation layer, and each of the semiconductor electro-optical conversion units comprises An electro-optical conversion layer, and the at least one semiconductor photoelectric conversion unit is formed on the other side of the isolation layer, and each of the semiconductor photoelectric conversion units includes a photoelectric conversion layer, wherein the isolation layer emits to the electro-optical conversion layer The working light is transparent, and the working light propagates in a transmitted manner. The wafer of claim 1, further comprising: an isolation layer having a reflective structure therein, Wherein the at least one semiconductor electro-optical conversion unit and the at least one semiconductor photoelectric conversion unit are formed on the same side of the isolation layer and arranged at intervals, wherein each of the semiconductor electro-optical conversion units comprises an electro-optical conversion layer, each The photoelectric conversion unit includes a photoelectric conversion layer, the isolation layer is transparent to working light emitted by the electro-optical conversion layer, and the reflective structure is configured to reflect the working light from the electro-optical conversion layer to the photoelectric conversion On the floor. The wafer according to claim 2, wherein the material of the semiconductor electro-optical conversion unit, the isolation layer and the semiconductor photoelectric conversion unit has a similar refractive index. The wafer according to claim 2, wherein the refractive index of the material of the semiconductor electro-optical conversion unit, the isolation layer, and the semiconductor photoelectric conversion unit is increased. The wafer of claim 2 or 3, wherein at least one of the semiconductor electro-optic conversion unit, the isolation layer, and the semiconductor photoelectric conversion unit has a roughened surface and a patterned surface. Or photonic crystal structure. The wafer of claim 2 or 3, wherein the spacer material is solid transparent or semi-insulating Al ₂ O ₃ , Y ₂ O ₃ , Gd ₂ O ₃ , AlN, SiO ₂ , MgO, CaO, Si ₃ N ₄ , BN, diamond, LiAlO ₂ , LiGaO ₂ , GaAs, SiC, TiO ₂ , ZrO ₂ , SrTiO ₃ , Ga ₂ O ₃ , ZnS, ZnSe, CdTe, SiC, MgAl ₂ At least one of O ₄ , LiNbO ₃ , LiTaO ₃ , Y ₃ AI ₅ O ₁₂ , KNbO ₃ , LiF, MgF ₂ , BaF ₂ , GaF ₂ , LaF ₃ , BeO, GaP, GaN, and rare earth oxide. The wafer according to claim 7, wherein the material of the electro-optical conversion layer is at least one of AlGaInP, GaN, InGaN, AlGaInN, ZnO, AlGaInAs, GaAS, InGaAs, InGaAsP, AlGaAs, and InGaAsNSb. . The wafer according to claim 8, wherein the material of the photoelectric conversion layer is Si, Ge, SiGe, AlGaInP, InGaAs, InGaN, AlGaInN, InGaAsP, GaAs, GaSb, InGaP, InGaAs, InGaAsP, At least one of AlGaAs, AlGaP, InAlP, AlGaAsSb, and InGaAsNSb. The wafer according to claim 9 is characterized in that the material of the electrode layer located on the working light transmission path is transparent conductive materials GaAs, GaN, AlGaInP, AlGaInN, AlGaInAs, ITO, SnO ₂ , ZnO and At least one of graphene. The wafer according to claim 10, characterized in that between the semiconductor electro-optical conversion units, between the semiconductor photoelectric conversion units, or between the semiconductor electro-optical conversion unit and the semiconductor photoelectric conversion unit Filled with a transparent insulating medium and covering the reflective layer on top of the transparent insulating medium; or between the semiconductor electro-optical conversion units, between the semiconductor photoelectric conversion units, or the semiconductor electro-optical conversion unit and the semiconductor photoelectric conversion The units are filled with a reflective insulating medium. The wafer of claim 11, further comprising: a light trapping structure for limiting the working light to the inside of the semiconductor DC transformer structure to reduce light loss The energy loss brought. The wafer of claim 12, further comprising: one or more power pins, wherein the power pins are connected to an external power source; An on-chip power distribution network, the on-chip power distribution network being coupled to the power pin and the at least one semiconductor DC transformer structure; and a circuit function module, each of the circuit function modules and at least one The semiconductor DC voltage transformation structure is connected, wherein an input end of the semiconductor DC voltage transformation structure is connected to the on-chip power distribution network, and an output end is connected to the circuit function module on the wafer that needs to be powered. The wafer of claim 13, further comprising: at least one adjustment control module, the adjustment control module being coupled to the at least one semiconductor DC transformer structure for The output voltage of the DC transformer structure controls the voltage regulation of the semiconductor DC voltage transformation structure. The wafer of claim 14, wherein the wafer is fully on-chip, the material of the substrate being Si, SiGe, GaAs, InP, SiC, Al ₂ O ₃ or a flexible material. The wafer of claim 15 , wherein the wafer comprises a plurality of the semiconductor DC voltage transformation structures, wherein the plurality of the semiconductor DC voltage transformation structures share one of the semiconductor electro-optical conversion units .