TWI505364B - Hardmask materials - Google Patents

Description

Hard mask material

This invention relates to hard mask films for use in semiconductor processing. The invention also relates to methods and apparatus for forming such films.

During lithographic patterning, such as during the formation of trenches and/or vias in a damascene process, a hard mask film is often used as the sacrificial layer. In damascene processing, a hard mask film is typically deposited onto one of the dielectric layers that needs to be patterned. A photoresist layer is deposited over the hard mask film (an optional anti-reflective layer is deposited between the hard mask and the photoresist) and the photoresist is patterned as desired. A laser is typically used to align the pattern with the underlying structure, and thus the hard mask should be substantially transparent at the wavelengths used for alignment. After development of the photoresist, the exposed hard mask film is removed and the exposed dielectric is etched to form recess features having the desired dimensions. The remaining hard masks are used to protect the portions of the dielectric that need to be retained during the etching process. Therefore, the hard mask material should have a good etch selectivity with respect to the dielectric. Dielectric etching is typically performed using reactive ion etching (RIE) using a halogen-based plasma chemistry.

The etched recess features are then filled with a conductive material such as copper to form a conductive path for the integrated circuit. Typically, after filling the recess features, the hard mask material is completely removed from the partially fabricated semiconductor substrate.

Titanium nitride deposited by physical vapor deposition (PVD) is currently used as a hard mask material in the present application. The use of tantalum carbide as a hard mask material has also been reported in U.S. Patent No. 6,455,409 and U.S. Patent No. 6,506,692.

The present invention provides a hard mask film having improved properties and a method of making the same. In lithography applications, a hard mask material with low stress is required because the material with high compressive or tensile stress causes buckling or delamination of the hard mask film on the substrate, and thus the pattern in the lithography The alignment is getting worse. In addition to low stress, the hard mask material should also have a high hardness and/or a high Young's modulus to adequately protect the underlying material, since hardness and modulus are often closely related to high etch selectivity.

This combination of low stress and high hardness (or high modulus) is particularly difficult to achieve because the harder the material, the higher the compressive stress. For example, conventional titanium nitride is a relatively hard material having a compressive stress greater than about 1,000 MPa. Use this high compression hard mask (especially with overly low k soft dielectrics (k = 2.8 and lower), and especially for defining features with higher aspect ratios (eg features with an aspect ratio of 2:1 and higher) )) can result in poor alignment and can cause undesirable creep in the resulting structure. In general, tantalum carbide can have a wide range of physical properties and it will not have both low stress and high hardness unless otherwise prepared using the special deposition process of the present invention.

In some aspects of the invention, a hard mask material having low stress and high hardness is provided. In certain embodiments, the film has a hardness of at least about 12 GPa, preferably at least about 16 GPa, such as at least about 20 GPa, and a stress between about -600 MPa and 600 MPa, such as between about -300 Between MPa and 300 MPa, preferably between about 0 MPa and 300 MPa. The film is generally substantially metal free and comprises a material selected from the group consisting of high hardness and low stress doped or undoped tantalum carbide, Si _x B _y C _z , Si _x B _y N _z , Si _x B _y C _z N _w , B _x N _y and B _x C _y . These materials can be formed by plasma enhanced chemical vapor deposition (PECVD) and other CVD-based processes. Hard masks are provided for use in a variety of lithography solutions in front-end and back-end semiconductor processing applications. Deposition conditions that provide low stress and high hardness characteristics are set forth herein. Thin film structural features associated with these characteristics are also provided.

In one aspect, a method of forming a high-hardness, low-stress hard mask film on a semiconductor substrate comprises receiving a semiconductor substrate in a plasma enhanced chemical vapor deposition (PECVD) process chamber and using a plurality of densifications Plasma treatment to deposit a doped or undoped multilayer tantalum carbide film. Preferably, such processing is performed after depositing each of the carbonized germanium layers. In certain embodiments, the process includes introducing a process gas comprising a ruthenium-containing precursor (eg, tetramethyl decane) into a process chamber and forming a plasma to deposit one of the tantalum carbide hard mask films. Sublayer. Thereafter, the ruthenium-containing precursor is removed from the process chamber by, for example, purging the process chamber with a purge gas. A plasma treatment gas is then introduced into the chamber to form a plasma, and the carbonized hazelnut layer is plasma treated to densify the material. The plasma treatment gas may be the same as the purge gas or the gases may be different. Suitable purge and / or the gas comprises an inert gas plasma processing (e.g. _{He, Ar), CO 2,} N 2, NH 3 and H _2. In certain embodiments, for both the purge and plasma processing, He, Ar, H ₂ or a mixture of various preferred system. After the first sub-layer of tantalum carbide is subjected to a plasma treatment, deposition, purging, and plasma treatment operations are repeated to form and densify additional sub-layers of tantalum carbide. Typically, each sub-layer has a thickness of less than about 100 (eg less than about 50 ) to allow for good densification. In certain embodiments, the method involves depositing and densifying 10 or more sub-layers (eg, 20 or more sub-layers) to form a hard mask film, in some embodiments, the hard mask film The thickness is about 1,000 With about 6,000 between.

Multiple plasma treatments can improve the hardness of the film relative to a single layer of tantalum carbide film. In certain embodiments, the formed high hardness low stress film comprises an undoped tantalum carbide film having a high Si-C bonding content. In certain embodiments, the ratio of the Si-C peak to the area of Si-H in the IR spectrum is at least about 20. In certain embodiments, the ratio of the Si-C peak to the area of CH in the IR spectrum is at least about 50. The tantalum carbide film provided typically also has a density of at least about 2 g/cm ³ . In some embodiments, high frequency radio frequency (HFRF) and low frequency radio frequency (LFRF) plasma generation is preferably used to perform plasma post treatment wherein the LF/HF power ratio is at least about 1.5, such as at least about 2.

In another aspect of the invention, a method for forming a high hardness low stress film involves depositing a boron containing film selected from the group consisting of: Si _x B _y C _z , Si _x B _y N _z , Si _x B _y C _z N _w , B _x N _y and B _x C _y . These films can be deposited by PECVD using suitable precursors containing barium, carbon and boron. For example, for the deposition of Si _x B _y C _z , in one embodiment, a boron-containing precursor (eg, B ₂ H ₆ ) and a precursor comprising carbon and ruthenium (eg, Si-A) are provided in a PECVD process chamber. The base decane) forms a Si _x B _y C _z film in a plasma. To prepare a high hardness low stress film, a dual frequency plasma having a LF/HF power ratio of at least about 1.5 (e.g., at least about 2) is preferred. In certain embodiments, the film is rich in boron and has a BC/[BC+SiC] ratio of at least about 0.35 as determined by the area of the corresponding peak in the IR spectrum. In certain embodiments, a high hardness boron-rich Si _x B _y C _z film is prepared by flowing B ₂ H ₆ at a flow rate that is at least about 2 times higher than the flow rate of tetramethyl decane. Advantageously, the boron-containing film can be easily removed by chemical mechanical polishing (CMP) after the patterning is completed, since the boron-containing film is generally hydrophilic and readily soluble with CMP chemistry.

In another aspect of the invention, a method of forming a GeN _x hard mask film is provided. In some embodiments, the method includes receiving a semiconductor substrate in a PECVD process chamber and forming a GeN _x hard mask film. The film can be formed by flowing a ruthenium containing precursor and a nitrogen-containing precursor into a PECVD process chamber and forming a plasma. In certain embodiments, the formed GeN _x film has a modulus of at least about 100 GPa and is rich in antimony. In certain embodiments, the yttrium-rich film comprises at least about 60 atomic percent, preferably 70 atomic percent cerium (excluding hydrogen). The density of the film can exceed 4 g/cm ³ . Advantageously, GeN _x is substantially transparent at the alignment wavelengths used in lithographic patterning (eg, in the visible and near IR portions of the spectrum). In certain embodiments, the GeN _x film is deposited by forming a plasma in a process gas comprising one of decane, ammonia, and nitrogen, wherein the decane/ammonia flow rate ratio is at least about 0.05. In some embodiments, a dual frequency plasma source is preferably used to deposit the GeN _x film. In certain embodiments, the LF/HF power ratio used during deposition is at least about 1. Similar to the other films mentioned above, GeN _x films can be used in several processing solutions in back-end and front-end semiconductor processing.

In some embodiments, a hard mask film (such as any of the above films) is deposited on a dielectric layer, such as a dielectric having a dielectric constant of less than about 3, such as less than about 2.8. A layer of photoresist is typically deposited over the hard mask (but not necessarily in direct contact with the hard mask, as an anti-reflective layer may be deposited between the two). Thereafter, lithographic patterning is performed in which recess features (vias and/or trenches) are formed in the dielectric layer. After the patterning is completed and the features are filled with metal, the hard mask is removed (eg, by CMP). In some embodiments, the etch selectivity of the hard mask film relative to the dielectric is at least about 8:1 for a chemical process (typically an RIE process) for etching vias and/or trenches.

In other embodiments, a hard mask film (such as any of the above films) is deposited on a polysilicon layer during front end processing and is used to protect the polysilicon during various processing steps. In some embodiments, the hard mask material is not removed and it will remain in the device being fabricated.

These and other features and advantages of the present invention are described in more detail below with reference to the accompanying drawings.

Introduction and overview

Provides a hard mask film for back-end and front-end semiconductor processing applications. The films comprise a material selected from the group consisting of SiC _x (doped or undoped), Si _x B _y C _z , Si _x B _y N _z , Si _x B _y C _z N _w , B _x N _y , B _x C _y and GeN _x .

The materials consist essentially of the elements recited in the formula and, where appropriate, hydrogen not specifically recited. The subscripts x, y, z and w indicate that the materials are not necessarily stoichiometric. These materials include dopants only when it is explicitly mentioned that a dopant is present. For example, the undoped SiC _x (barium carbide) described herein consists essentially of tantalum and carbon (and does not necessarily have a stoichiometric ratio) and optionally includes one of hydrogen. The doped SiC _x additionally includes a dopant element such as boron, oxygen, phosphorus or nitrogen.

In certain embodiments, the materials provided herein have one or more of the following advantageous properties: high hardness, high Young's modulus, and low stress. In a preferred embodiment, the materials have a combination of high hardness and low stress, making them particularly suitable for hard mask applications at advanced technology nodes (eg, 45 nm and smaller, for example 22 nm). It is particularly suitable for patterning mechanically weak ultra-low k (ULK) dielectrics and is suitable for forming recesses having an aspect ratio of 2:1 and greater (eg, 4:1 and greater).

In certain embodiments, the hard mask material has a hardness of at least about 12 GPa, such as at least about 16 GPa, such as at least about 18 GPa or at least about 20 GPa. Hardness is one of the properties well defined in the field of material engineering and can be measured in a reliable manner, for example by any suitable equipment, including a nanoindentation device. In certain embodiments, in addition to high hardness, the hard mask material also has a low stress of between about -600 and 600 MPa, such as between about -300 MPa and 300 MPa, between about 0 and Between 600 MPa, and optimal between about 0 MPa and 300 MPa.

The compressive and tensile stresses are measured in a scale where a positive value corresponds to tensile stress and a negative value corresponds to compressive stress. According to this scale, higher compressive stresses are characterized by lower negative values, while higher tensile stresses are characterized by higher positive values. According to this scale, a film having no residual stress corresponds to zero. The stress system clearly defines one of the parameters that can be measured, for example, using a "Flexus" tool available from KLA-Tencor Corporation.

Materials with high compressive stress tend to cause buckling of a substrate, while materials with high tensile stress tend to cause delamination (especially when the adhesion between materials is low). Both types of stress are undesirable in hard mask materials. However, for example, in certain boron-containing materials described herein, resistance to low and moderate tensile stresses (e.g., 200 to 600 MPa) is better than resistance to compressive stress of the same magnitude.

In certain embodiments, the hard mask films described herein have a Young's modulus of at least about 100 MPa, such as at least about 125 MPa, such as 150 MPa and greater. Young's modulus can be measured by standard techniques using a nanoindentation device.

It should be noted that the hard mask materials described herein are generally different from the materials used as the dielectric diffusion barrier layer and the etch stop layer. The dielectric diffusion barrier and etch stop material are typically relatively soft materials having a hardness of less than about 10 GPa and a dielectric constant of less than about 5. The diffusion barrier layer remains in the final integrated circuit structure that requires a low dielectric constant. In contrast, the hard mask materials provided herein do not necessarily need to have a low dielectric constant, and the dielectric constant is typically greater than about 4, such as greater than about 5, or greater than about 6. This is due to the fact that the hard mask is a sacrificial layer in many embodiments that is completely self-structuring removed after patterning and thus has no effect on the electrical characteristics of the formed integrated circuit. In such embodiments, if the hard mask is not removed from the final structure, it is present at locations where low dielectric constant is not required, or the device can withstand relatively high dielectric constants The location of the material. In addition, hard mask materials deposited by PECVD are typically deposited in plasma generation using power that is significantly higher than softer low-k diffusion barrier materials. Structurally, hard mask materials are generally more compact and denser than softer low-k diffusion barrier materials.

In various embodiments, the provided hard mask material is substantially transparent at the laser wavelength for pattern alignment (eg, in the visible and near IR portions of the spectrum, such as at 633 nm).

The thickness of the deposited hard mask film depends on a number of parameters, such as the etch selectivity of a particular hard mask material relative to the underlying material, the thickness of the material under etch and the etch chemistry used. In general, harder hard mask materials with higher etch selectivity can be deposited to form thinner films than materials with lower hardness and lower etch selectivity. Additionally, thinner hard mask layers made of highly selective hard materials are advantageous because of the relatively high transparency of thinner films, which allows for better optical alignment. In certain embodiments, the film is deposited to a thickness of between about 100 and 10,000 Between, for example, between about 500 and 6000 between.

In a chemical process for via and/or trench etching, the provided film has a relative dielectric (eg, with respect to a dielectric having a dielectric constant of 3.0 and lower, such as 2.8 and lower, or 2.4 and lower). High etch selectivity. An exemplary etch chemistry includes RIE using a plasma formed in a process gas comprising one of C _x F _y (eg, CF ₄ ), an inert gas (eg, Ar), and an oxidant (eg, O ₂ ). Other dry etching may be used, for example by means of plasma etching comprises one of Cl ₂ and N ₂ gas of the process. In certain embodiments, for example, for a plasma etch chemistry comprising one of C _x F _y mentioned above, an etch selectivity of at least about 5: 1, such as at least about 8: 1 can be obtained (ie, hard masking) The mask material is etched at least 8 times slower than the dielectric). In certain embodiments, the provided film can be used as a hard mask during wet etching operations, such as selective wet etching of a yttria-based material using a wet fluoride etch chemistry.

The dielectric that can be etched in the presence of the exposed hard mask material provided herein includes yttria, carbon-doped yttria (SiCOH), TEOS (tetraethyl phthalate)-deposited oxide, various silicate glasses, Hydrogen sesquioxanes (HSQ), methyl sesquioxanes (MSQ), and porous and/or organic dielectrics, including polyamidene, polynorbornene, benzo rings Butene and the like. The hard mask provided is most advantageously used to pattern mechanically weak organic and/or porous dielectrics having a dielectric constant of 2.8 and lower (e.g., 2.4 and lower).

The hard mask materials described herein can generally be deposited using a variety of methods, including CVD based methods and PVD based methods. PECVD is a particularly preferred deposition method, and PECVD that allows dual frequency plasma generation is even better. Equipment with high frequency and low frequency power supplies includes those available from Novellus Systems of San Jose, CA. and tool. Low frequency radio frequency (RF) power refers to RF power between 100 kHz and 2 MHz. One of the LF plasma sources typically has a frequency range between approximately 100 kHz and 500 kHz, for example 400 kHz. During deposition of the hard mask layer, the LF power density is typically in the range of from about 0.001 to 1.3 W/cm ² , and in particular embodiments from about 0.1 to 0.7 W/cm ² . The HF power is typically in the range of from about 0.001 to 1.3 W/cm ² and, in particular embodiments, from about 0.02 to 0.28 W/cm ² . High frequency power refers to RF power with a frequency greater than 2 MHz. Typically the HF RF frequency is in the range of approximately 2 MHz to 30 MHz. Commonly used HF RF values include 13.56 MHz and 27 MHz. In certain embodiments, the deposition of the hard mask involves setting the LF/HF power ratio to at least about 1, such as at least about 1.5, such as at least about 2.

During PECVD deposition, reactant gases or vapors are typically supplied to the process chamber at a flow rate ranging from 0.001 sccm to about 10,000 sccm, preferably from about 1 sccm to about 1000 sccm, and used between about 20 ° C and about The substrate susceptor temperature in the range of 500 ° C, preferably from about 200 ° C to about 450 ° C. In certain embodiments, temperatures below about 400 ° C (eg, from about 200 ° C to about 400 ° C) are preferred for hard mask deposition. The pressure can range from about 10 millitorr to about 100 torr, preferably from about 0.5 to 5 torr. It should be understood that the flow rate of the precursor may vary with the size of the substrate and the size of the chamber.

Use in backend processing

The films provided are useful in a variety of hard mask applications. An exemplary application of the hard mask film in the back end processing can be illustrated by the structure shown in Figures 1A through 1K and illustrated by the process flow diagram shown in Figure 3. Referring to the illustrative process flow of FIG. 3, the process begins in 301 by providing a substrate having an exposed dielectric layer. The substrate is typically a semiconductor (eg, germanium) wafer having one or more layers of material (eg, a conductor or dielectric) resident thereon. The exposed portion of the substrate contains a dielectric layer that needs to be patterned with vias and trenches. The hard masks provided herein are generally useful for patterning the various dielectric materials listed in the previous section. It is especially advantageous to use the provided hard mask material to pattern ULK dielectrics having a dielectric constant of 2.8 and lower, such as 2.4 and lower, including mechanically weak porous and organic dielectrics. As explained above, the provided hard mask has extremely low stress in many embodiments and can significantly reduce buckling that typically occurs when patterning a mechanically weak ULK dielectric using a high stress hard mask material and Poor pattern alignment. It should be noted that in certain embodiments, a mechanically stronger material buffer layer is used between the brittle ULK dielectric and the hard mask. Thus, in some embodiments, the substrate provided has an exposed buffer layer (eg, a mechanically stronger dielectric) residing on a layer of ULK material. For example, a buffer layer comprising one of k greater than 2.8 may reside on a mechanically weaker dielectric having a lower dielectric constant. For example, the buffer layer comprises a material selected from the group consisting of carbon doped yttrium oxide (SiCOH), TEOS (tetraethyl phthalate) - deposited oxide, various silicate glasses, hydrogen times Hexaoxanes (HSQ) and methyl sesquioxanes (MSQ), which may reside on a porous and/or organic dielectric, which may include polyimine, polynorborns Alkene, benzocyclobutene, and the like. The ULK dielectric and buffer layer dielectric can be deposited by, for example, spin coating or PECVD. In some embodiments, the dielectric and/or buffer layer is deposited in the same PECVD module as the module deposited by the hard mask layer. This provides an additional advantage over titanium nitride hard masks, which require PVD modules for the deposition of titanium nitride hard masks. The hard mask material is deposited in operation 303 onto a dielectric layer in a PECVD process chamber (or onto a buffer layer, which is typically also a dielectric). Thereafter, one or more anti-reflective layers (eg, a bottom anti-reflective coating (BARC)) are deposited as appropriate, after which a photoresist is deposited over the hard mask in operation 305. It should be noted that the photoresist is not necessarily in direct contact with the hard mask material because one or more anti-reflective layers typically reside between the hard mask and the photoresist. Thereafter, in operation 307, the via holes and/or trenches are etched using the deposited hard mask and lithographic patterning in the dielectric layer. Suitable etching includes the RIE described in the previous section, wherein the dielectric material is etched in the presence of an exposed hard mask having high etch selectivity for etching.

Various lithographic schemes can be used to form the desired pattern of recess features, which can include depositing and removing multiple photoresist layers, depositing filler layers, and the like. Such lithography solutions are known in the art and will not be described in detail. A scheme of first defining a trench and then forming a portion of vias is illustrated as one of FIGS. 1A through 1K. However, it should be understood that various other approaches may be used for backend processing. After the vias and/or trenches are formed, the vias and/or trenches are filled with a metal (eg, electrodeposited copper or alloy thereof) in 309, and in operation 311 by, for example, CMP or a suitable wet or Dry etching to remove the hard mask film. In certain embodiments, a peroxide-containing wet etch or CMP composition (eg, an acid slurry containing hydrogen peroxide) is preferred for hard mask removal.

1A through 1K show schematic cross-sectional views of a portion of a semiconductor substrate that has been partially fabricated during back end processing in accordance with an illustrative processing scheme. 1A shows a semiconductor substrate (underlying germanium layer and active device not shown) having a portion of a copper layer 101 embedded in a first dielectric layer 103 (eg, a ULK dielectric), wherein a diffusion barrier layer 105 (eg, including Ta) , Ti, W, TaN _x , TiN _x , WN _x or a combination thereof resides at an interface between the dielectric and the copper. A dielectric diffusion barrier layer (also referred to as an etch stop layer) 107, such as a tantalum nitride or nitrogen doped tantalum carbide layer, resides on top of copper 101 and dielectric 103. A second dielectric layer 109 (e.g., one of the ULK dielectrics deposited by spin coating or PECVD) resides on top of the dielectric diffusion barrier layer 107. Since the dielectric layer 109 may be mechanically weak and may be damaged during hard mask deposition, a mechanically stronger dielectric buffer layer 111 (eg, TEOS dielectric or carbon doped yttrium oxide (SiCOH)) is deposited onto layer 109. on. A hard mask layer 113 comprising a high hardness material as described herein is deposited onto the buffer layer 111 by PECVD. Unlike the dielectric diffusion barrier layer 107, the hard mask layer 113 is deposited on a surface that does not include the exposed metal. A photoresist layer 115 is deposited over the hard mask 113 by a spin coating process. One or more anti-reflective layers are typically deposited directly between the hard mask and the photoresist. These layers are not shown for clarity.

After the photoresist 115 has been deposited, it is patterned using standard lithography techniques to form an opening having a width t that can be used to subsequently form trenches. The resulting structure with patterned photoresist layer 115 is shown in Figure 1B. Thereafter, the hard mask layer 113 residing under the removed photoresist is opened (etched) to form a pattern of exposed dielectric 111, as shown in FIG. 1C. The remaining hard mask will be used to protect the dielectric during photoresist removal and subsequent dielectric etching. Thereafter, the photoresist layer 115 is removed from the structure by, for example, ashing, and a structure having the exposed patterned hard mask 113 is formed. At this stage, patterning is started to form a via hole. To pattern a via, a filler layer 117, which may comprise a removable dielectric (eg, HSQ or MSQ), is deposited over the surface of the structure to fill the opening in the hard mask, as shown in FIG. 1E. . Thereafter, a second photoresist layer 119 is deposited over the filler layer 117 (with an optional anti-reflective layer therebetween) to form the structure shown in FIG. 1F. Photoresist 119 is then patterned to form an opening having a width of V, which can be used to form a via, as shown in structure 1G. Thereafter, the hard mask under the photoresist pattern is removed, and a via is etched in the dielectric 109 using, for example, RIE. The photoresist 119 and the filler layer 117 are removed to form a structure having a portion of the etched via and a defined trench, as shown in FIG. 1H. Thereafter, the dielectric layers 111 and 109 are continued to be etched until the vias reach the etch stop layer 107, which is then etched through to expose the metal layer 101 at the bottom of the via holes, as shown in FIG. A diffusion barrier material layer 105 is then conformally deposited by PVD to line the substrate within the recess features and in the field regions. The recess features are then filled with metal 121 (e.g., electrodeposited copper or alloys thereof) and typically have a certain amount of overload in the field to provide one of the structures shown in Figure 1J. Thereafter, the metal overload, the diffusion barrier material 105, the hard mask layer 113, and the dielectric buffer layer 111 are removed from the field region of the structure to form a partially fabricated device having residen in the low-k dielectric layer 109. One of the metal interconnects is shown in Figure 1K. In other processing schemes, the buffer layer 111 will not be removed and it will remain on the substrate.

A processing scheme involving the formation of a portion of vias as illustrated in Figures 1A through 1K illustrates a possible patterning scheme for low k dielectrics. The hard mask materials provided herein can be used in a variety of other processing options, including via priority and trench priority.

Use in front-end processing

Another illustrative use of the provided hard mask is to protect the polysilicon during front end processing. Polycrystalline germanium is widely used to form active devices (such as transistors) on semiconductor wafers. In some embodiments, the provided hard mask material is deposited onto the polysilicon and used to protect the polysilicon during various processing operations for active device fabrication. It is noted that in the previous end processing in many embodiments, the hard mask layer provided is not a victim and remains in the final device and is in contact with the polysilicon.

An illustrative front end processing scheme is shown in the process flow diagram of FIG. 4 and further illustrated by a schematic cross-sectional view of the partially fabricated structure shown in FIGS. 2A through 2E. Referring to Figure 4, the process begins in 401, which provides a substrate having one of the exposed polysilicon layers residing over an oxide layer (e.g., hafnium oxide, tantalum oxide, etc.). In other embodiments, the polysilicon can reside above different active layers. The oxide typically resides on a single crystal germanium layer. To pattern the oxide and polysilicon layers, two hard mask layers are deposited over the polysilicon layer. Depositing the first hard mask directly onto the polysilicon layer and including one of the materials described herein, such as SiC _x (doped or undoped), Si _x B _y C _z , Si _x B _y N _z , Si _x B _y C _z N _w , B _x N _y , B _x C _y and GeN _{x are} as shown in operation 403. Hard masks are deposited by CVD techniques, preferably by PECVD. Thereafter, an ashable hard mask (e.g., a hard mask consisting essentially of carbon (wherever hydrogen is present) is deposited over the first hard mask in operation 405. The ashable hard mask can also be deposited using a hydrocarbon precursor by a CVD technique (e.g., by PECVD deposition). Thereafter, a photoresist layer is deposited over the ashable hard mask and the photoresist is patterned as desired, as shown in operation 407. One or more anti-reflective layers may optionally be deposited between the ashable hard mask and the photoresist, which are not shown to remain sharp. An illustrative structure having an unpatterned photoresist is illustrated in Figure 2A, wherein layer 201 is a single crystal germanium layer. Layer 203, which resides on ruthenium layer 201, is an oxide layer. The layer 205 on top of the oxide layer 203 is a polycrystalline layer. One of the hard mask materials 207 described herein resides directly on top of the polysilicon 205, and an ashable hard mask (eg, a carbon hard mask) 209 resides over the first hard mask layer 207. A photoresist layer 211 resides over the ashable hard mask 209 (an optional anti-reflective layer between the two is not shown). The structure obtained after patterning of the photoresist is shown in Figure 2B, which illustrates the removal of the photoresist at two locations, leaving a portion between the two locations.

Referring again to FIG. 4, the process follows operation 409 using a ashable hard mask for patterning to etch a desired pattern in the polysilicon and oxide layers. This is illustrated by structures 2C through 2E. In structure 2C, the ashable hard mask layer 209 is opened (etched) at the portion where the photoresist is exposed after patterning. Thereafter, the photoresist 211 is completely removed, and the first hard mask layer 207, the polysilicon layer 205, and the oxide layer 203 are etched at portions not protected by the ashable hard mask layer 209, thereby providing the structure of FIG. 2D. Show one structure.

Referring again to FIG. 4, in operation 411, the ashable hard mask is removed by, for example, an oxygen plasma treatment while leaving a layer on the polysilicon layer containing a material selected from the group consisting of: A hard mask layer: SiC _x (doped or undoped), Si _x B _y C _z , Si _x B _y N _z , Si _x B _y C _z N _w , B _x N _y , B _x C _y and GeN _x . The resulting structure is shown in Figure 2E. The hard mask layer 207 may be retained during subsequent front end processing and may be used to protect the polysilicon during various subsequent operations, such as during implantation of dopants into the crystal germanium. It should be noted that the hard mask material in the process column does not perform an actual masking effect (the masking is accomplished by the ashable hard mask 209) and is primarily used to protect the polysilicon. Depending on the integration scheme, the hard mask 207 can be used for masking in subsequent front end operations, such as during dry or wet etching in cleaning, or during etching to define a gate oxide. The hard mask material may eventually be removed from the final device or may remain in the device, depending on the integration scheme used.

The rear and front end applications illustrated above are provided as exemplary sequences, and it should be understood that the materials provided can be used in a variety of other processes that require high hardness materials to protect the underlying layers.

The preparation of suitable hard mask materials will now be described in detail.

Multilayer tantalum carbide film

In one embodiment, a multilayered tantalum carbide film having high hardness and low stress is provided. In particular, in certain embodiments, the film has a hardness greater than about 12 GPa, such as greater than about 18 GPa, and a stress between about -600 Mpa and 600 MPa, such as between about -300 Mpa and 300 MPa. between. The film is formed by depositing a sub-layer of doped or undoped tantalum carbide material and performing a uniform densified plasma post-treatment after depositing each sub-layer.

Although tantalum carbide can be deposited using a variety of methods, in some embodiments, it is preferred to deposit a sub-layer in a PECVD apparatus and perform a post-plasma treatment. The thickness of each sub-layer is usually less than about 100 , for example, less than about 50 To allow the material to be completely densified. Deposition may involve the formation of any number of sub-layers and plasma treatment to achieve a suitable hard mask thickness. In certain embodiments, at least 2 sub-layers, such as at least 10 sub-layers, or at least about 20 sub-layers are deposited.

An exemplary process flow diagram for forming a multilayer tantalum carbide film is shown in Figure 5A. In operation 501, a semiconductor substrate (eg, having an exposed dielectric layer or an exposed polysilicon layer substrate) is provided to a PECVD process chamber. The PECVD process chamber contains an inlet for introducing a precursor and a plasma generator. In some embodiments, a dual frequency RF plasma generator having HF and LF generator components is preferred.

In operation 503, a first sub-layer of doped or undoped niobium carbide is formed, wherein depositing comprises flowing a niobium-containing precursor into the process chamber and forming a plasma. In one example, a dual frequency plasma with an HF RF frequency of about 13.56 MHz and a LF RF frequency of 400 kHz is used. In this example, the HF power density is from about 0.04 to 0.2 W/cm ² and the LF power density is from about 0.17 to 0.6 W/cm ² .

Various ruthenium containing precursors can be used, including organic ruthenium precursors such as alkyl decane, alkenyl decane and alkynyl decane. In certain embodiments, preferred are saturated precursors such as tetramethylnonane, triisopropyldecane, and 1,1,3,3-tetramethyl1,3-dioxanecyclobutane.

In certain embodiments, the cerium-containing precursor comprises carbon, as described in the examples above. In other embodiments, a carbon-free ruthenium-containing precursor (e.g., decane) and a separate carbon-containing precursor (e.g., a hydrocarbon) may be used in the process gas. Moreover, in certain embodiments, the process gas can include a hydrocarbon precursor and an organic germanium precursor.

The ruthenium containing precursor is typically introduced into the process chamber along with a carrier gas such as an inert gas such as He, Ne, Ar, Kr or Xe. In certain embodiments, H ₂ may be included in the deposition process gas. In one example, the deposition process gas consists essentially of tetramethyl decane (flow rate of about 500 to 2,000 sccm) and ruthenium (flow rate of about 3 to 5 slm).

If it is desired to form a doped layer of tantalum carbide, a suitable dopant is added to the process gas. For example, N ₂ , NH ₃ , N ₂ H ₄ , an amine, or a different nitrogen-containing precursor can be added to the process gas to form a nitrogen-doped tantalum carbide. A boron-containing precursor such as diborane may be added to form a boron-containing niobium carbide. A phosphorus-containing precursor may be added (e.g., PH ₃₎ to form a phosphorus-doped silicon carbide.

After the plasma is ignited and a desired thickness of the carbonized hazel layer has been formed, the cerium-containing precursor is removed from the process chamber in operation 505. In some embodiments, this is accomplished by purging the process chamber with a purge gas, which may contain a gas selected from the group consisting of: inert gases (eg, He, Ar) ), CO ₂ , N ₂ , NH ₃ , H ₂ and mixtures thereof. In certain embodiments, He, Ar, H ₂ or a mixture of one of various preferred purge gas lines. In operation 507, after the ruthenium containing precursor is completely removed, a plasma processing process gas (which may be the same or different from the purge gas) is introduced into the process chamber and preferably has a LF/HF power ratio of at least about 1.5. The first sub-layer is treated with a plasma, for example at least about 2. In operation 509, the deposition and plasma post treatment are repeated to form a multilayer film comprising at least 2 sublayers, such as at least 10 sublayers. The plasma post-treatment of each sub-layer is performed for one time period required for film densification, and the time period can be dependent on the sub-layer thickness. In certain embodiments, post-plasma processing is performed for about 5 to 25 seconds, for example, each sub-layer is performed for about 8 to 15 seconds.

The structure and characteristics of the obtained film were found to be different from those of the conventional tantalum carbide film. Surprisingly, it has been found that multilayer films prepared by post-treatment of multiple densified plasmas can have both high hardness and low stress, which is not achieved by conventional deposition methods.

The structural characterization of these films shows that the infrared (IR) spectra of these films have characteristic high Si-C/Si-H and Si-C/CH peak ratios, where the ratios are centered at about 760 to 800 cm. The ratio of the corresponding IR peak areas at ^-1 (Si-C), 2070 to 2130 cm ^-1 (Si-H), and 2950 to 3000 cm ^-1 (CH).

In certain embodiments, the ratio of the area of the Si-C peak to the CH peak in the IR spectrum is at least about 50 and the Si-C/Si-H ratio is at least about 20. The films provided also typically have a density of at least about 2 g/cm ³ .

5B shows an IR spectrum (curve a) of a single-layer undoped tantalum carbide film obtained by plasma post-treatment and a multilayer undoped tantalum carbide film obtained by a plurality of densified plasma treatments. IR spectrum (curve b). A single layer of film was deposited on a 300 mm wafer by flowing a process gas containing one of tetramethylnonane (flow rate of 1,000 sccm) and ruthenium (flow rate of 3000 sccm) at a pressure of 2.1 Torr. A dual frequency plasma having a LF power density of about 0.25 W/cm ² and an HF power density of about 0.13 W/cm ² was used during deposition. For sub-layer deposition, a multilayer film is deposited under the same conditions, but additionally includes post-plasma treatment performed after deposition of each sub-layer. Post-treatment involves flowing argon as a post-treatment gas into the process chamber at a rate of 3 slm at a pressure of 2.1 Torr, and forming a LF power density of about 0.25 W/cm ² and an HF power density of about 0.13 W. /cm ^{2 one} of the double. Frequency plasma. The resulting single layer film was characterized by an SiC/SiH area ratio of about 15. The resulting multilayer film formed by densification plasma treatment is characterized by a SiC/SiH IR peak area ratio of about 24. The multilayer film has a Young's modulus of about 170 GPa and a hardness of about 20.4 GPa, while the single layer film has a Young's modulus of about 95 GPa and a hardness of only about 12 GPa. The stress values of the single-layer film and the multilayer film were -20 MPa and 179 MPa, respectively.

Figure 5C illustrates the stress and hardness values of two layers of undoped tantalum carbide film prepared by using densified plasma post-treatment and the stress and hardness of two uncoated undoped tantalum carbide films prepared without post-treatment. value. Figure 5D illustrates the stress and Young's modulus values of the same film. Table 1 summarizes the deposition and post-treatment conditions of the film.

All films were prepared using a mixture of tetramethylnonane and hydrazine as a deposition process gas at a pressure of about 2 Torr. Dual frequency plasma generation was used in all deposition scenarios. The power densities of the HF and LF plasmas are listed in the table, where the power density is calculated by dividing the power by the substrate area. Films A and D were single-layer films prepared without post-treatment of the plasma. It can be seen that these films cannot have both high hardness and low stress. For example, film A, although relatively hard (22.4 GPa), has an extremely high compressive stress of -830 MPa. Film D has a medium hardness of 12 GPa despite its low stress (-20 MPa).

Film B and C multilayer films in which post-plasma treatment is performed after depositing each of the carbonized hazel layers. Argon was used as the plasma treatment gas at a pressure of about 2 Torr. Plasma post treatment is performed using dual frequency plasma generation. The power densities of the HF and LF plasmas are listed in the table. Unexpectedly, the multilayer film was found to have both high hardness (and/or modulus) and low stress. For example, the film B has a hardness of 20.86 GPa and a stress of -412 MPa (this stress is more than 2 times lower than the stress of the film A). Further, the multilayer film C has a high hardness of 20.4 GPa and a tensile stress of 179 MPa. The hardness of the film C is greater than 1.5 times the hardness of the film D. It should be noted that in addition to the post-plasma treatment, films C and D were deposited under the same conditions. It can be seen that post-plasma treatment makes the film harder and does not cause an unacceptable increase in the compressive stress of the film.

In some embodiments, the post-treatment of the niobium carbide layer is preferably performed using a dual frequency plasma having a LF power greater than HF power (e.g., a LF/HF power ratio of at least about 1.5 or at least about 2). Unexpectedly, increasing the ratio of LF/HF power used during post-treatment can improve the properties of the resulting film. Increasing the LF/HF power ratio increases the refractive index of the obtained film, and the refractive index is a parameter that is positively correlated with the film hardness. In certain embodiments, a multilayer tantalum carbide film having a refractive index of at least about 2.25, such as at least about 2.30, is provided. The increase in film refractive index as a function of the LF/HF power ratio is shown in Table 2.

Boron-containing hard mask film

In another aspect, a boron-containing hard mask film is provided. The boron-containing film includes a material selected from the group consisting of: Si _x B _y C _z , Si _x B _y N _z , Si _x B _y C _z N _w , B _x N _{y ,} and B _x C _y . In certain embodiments, the materials are modified to have a high hardness (e.g., a hardness of at least about 12 GPa, preferably at least about 16 GPa) and a low stress (e.g., a stress between about -600 and 600 MPa, Good between about -300 and 300 MPa). Advantageously, in certain embodiments, a boron-containing film having no compressive stress is provided, such as a film having an extremely low tensile stress (e.g., between about 0 and 300 MPa). In addition, the boron-containing film is generally more hydrophilic than the undoped tantalum carbide film and can be more easily removed by CMP (eg, using an acidic slurry containing hydrogen peroxide). In general, boron-containing hard masks can be prepared by a variety of methods, such as CVD-based techniques and PVD-based techniques. In certain embodiments, PECVD is preferred for preparing boron-containing hard masks.

Referring to Figure 6, an exemplary process flow for using a boron-containing hard mask in a back end process. The process begins in 601 by providing a semiconductor substrate comprising an exposed dielectric layer in a PECVD process chamber. The dielectric layer can be, for example, an ultra low k dielectric layer (e.g., k less than about 2.8, such as less than about 2.4) or a buffer dielectric layer having a higher dielectric constant.

In operation 601, depositing a high hardness low stress boron-containing hard mask film selected from the group consisting of: Si _x B _y C _z , Si _x B _y N _z , Si _x B _y C _z N _w , B _x N _y and B _x C _y . The deposition is performed by flowing a process gas containing one of the appropriate precursors into the process chamber and forming a plasma. In some embodiments, dual frequency plasma is preferred. In certain embodiments, particularly good film parameters are obtained when the power density of the LF plasma is greater than the power density of the HF plasma (e.g., the LF/HF power ratio is at least about 1.5, such as at least about 2).

After depositing the film, the dielectric is patterned in 605 to form trenches and/or vias, for example as described with reference to Figures 1A-1K. The boron-containing film can be used as a hard mask during dry etching of the dielectric by RIE. Thereafter, after the vias and/or trenches have been formed in the dielectric, they are filled with metal in operation 607. Thereafter, the boron-containing hard mask is removed by CMP, typically at 609, after removal of the metal overload.

PECVD deposition of Si _x B _y C _z can be accomplished by using a process gas containing a ruthenium containing precursor, a boron containing precursor, and a carbon containing precursor. One or more of these precursors may be the same molecule. For example, tetraalkylnonane can function as either a carbon-containing precursor or as a cerium-containing precursor. Typically, diborane is used as a boron-containing precursor, and alkyl decanes (e.g., tetramethylnonane), alkenyl decane, and alkynyl decane can be used as the ruthenium-containing and carbon-containing precursors. Further, saturated and unsaturated hydrocarbons (C _x H _y ) can be used as the carbon-containing precursor, and SiH ₄ can be used as a cerium-containing precursor.

The deposition of Si _x B _y C _z N _w can be formed by a process gas comprising one of a cerium-containing precursor, a boron-containing precursor, a carbon-containing precursor (described above), and a nitrogen-containing precursor. Plasma is done. The nitrogen-containing precursor can include ammonia, hydrazine, N _2, and mixtures thereof. Further, the nitrogen-containing precursor may be the same as the carbon-containing precursor and may include an amine such as a monoalkylamine, a dialkylamine, and a trialkylamine. The nitrogen-containing precursor can be the same as the boron-containing precursor and can include tetramethylborazine. Further, the nitrogen-containing precursor may be the same as the cerium-containing precursor, such as valence.

The deposition of Si _x B _y N _w can be carried out by including a cerium-containing precursor (for example, SiH ₄ ), a boron-containing precursor (such as diborane), and a nitrogen-containing precursor (such as ammonia, hydrazine, N ₂ and A plasma is formed in one of the various mixtures) to form a plasma.

B _x N _y can be deposited using a process gas comprising a boron-containing precursor (e.g., diborane) and a nitrogen-containing precursor (e.g., ammonia, hydrazine, N _{2 ,} and mixtures thereof).

B _x C _y can be deposited using a process gas comprising a boron-containing precursor (e.g., diborane) and a carbon-containing precursor (e.g., a saturated or unsaturated hydrocarbon). An inert carrier gas such as helium or argon is typically part of the process gas used during the deposition of such boron-containing films. In certain embodiments, H ₂ is also included in the process gas.

Figure 6B illustrates the hardness and stress parameters of various Si _x B _y C _z , Si _x B _y N _z , Si _x B _y C _z N _w films deposited by PECVD. Figure 6C illustrates the Young's modulus and stress parameters of the same film. The deposition conditions and characteristics of the obtained film are shown in Table 3.

All films were deposited on a 300 mm wafer using dual frequency plasma at a pressure ranging from about 2 to about 4 Torr, with HFRF power density ranging from about 0.08 to about 0.30, and LFRF power. The density is in the range of from about 0.10 to about 0.24 W/cm ² .

In one embodiment, the Si _x B _y C _z film is deposited using a process gas consisting essentially of B ₂ H ₆ , tetramethyl decane (4MS), and He. The flow rate of B ₂ H ₆ may range between about 2,000 to 4,000 sccm, preferably between about 3,500 and 4,000 sccm, and the flow rate of tetramethylnonane may range from about 1,000 to 1,500 sccm. A carrier gas (e.g., He) flow rate between about 3 and 8 slm is preferred. Dual frequency plasma having an HFRF power density between about 0.04 and 0.26 W/cm ² and a LFRF power density between about 0.14 and 0.53 W/cm ² is used in certain embodiments.

It was unexpectedly found that the hardness of the obtained film was highly dependent on the ratio of B ₂ H ₆ to tetramethyl decane (4MS). Preferably, a B ₂ H ₆ /4 MS flow rate ratio of at least about 2, such as at least about 3, is used to obtain a high hardness boron-rich film.

Figure 6D illustrates the hardness of the Si _x B _y C _z film as a function of the B ₂ H ₆ /4MS flow rate ratio. It can be seen that the hardness is increased by about 2 times by increasing the flow rate from about 0.5 to about 3.5. The corresponding hardness and stress values for different flow ratios are shown in Table 3.

Structurally, films with high hardness and high Young's modulus are characterized by high BC bond content. In certain embodiments, a high hardness film having a BC/[BC+SiC]IR peak area ratio of at least about 0.35 is preferred. This ratio refers to the ratio of the corresponding IR peak areas centered at about 1120 to 1160 cm ^-1 (BC) and 760 to 800 cm ^-1 (Si-C).

Figure 6E illustrates the dependence of the Young's modulus and stress parameters of various Si _x B _y C _z films on the BC/[BC+SiC] area ratio. It can be seen that a film having a BC/[BC+SiC] of less than about 0.3 is significantly softer than a film having a higher BC bond content. Table 4 summarizes the information obtained for the three Si _x B _y C _z films. All three films were used at a pressure of 2.1 scTorr using a dual frequency plasma with an HFRF power density of about 0.12 W/cm ² and a LFRF power density of about 0.22 W/cm ² from B ₂ H ₆ (flow rate from 500 sccm) A process gas consisting of 3500 sccm), 4MS (flow rate of 1,000 sccm) and He (flow rate of 3,000 sccm) was deposited. The hardness, stress and Young's modulus parameters as a function of BC content are shown in Table 4.

In certain embodiments, a dual frequency plasma having a LF power greater than HF power (eg, a LF/HF power ratio of at least about 1.5, at least about 2, such as at least about 3) is preferably used to deposit Si _x B _y C _z . We have found that increasing the LF/HF power used during deposition is a modification of the properties of the obtained film. Increasing the LF/HF power ratio increases the refractive index of the resulting film, which is positively correlated with film hardness. In certain embodiments, a Si _x B _y C _z film having a refractive index of at least about 2.3, such as at least about 2.5, such as at least about 2.6, is provided. The refractive index of the film which increases with increasing LF/HF power ratio is shown in Table 5.

In the Si _x B _y N _z film, one of the important structural features of the film is the BN bond content, which is quantified using the BN/[BN+SiN] peak area ratio in the IR spectrum, where the ratio is centered The ratio of the corresponding IR peak areas at about 1400 cm ^-1 (BN) and 820 to 850 cm ^-1 (Si-N).

Figure 6F shows that both stress and Young's modulus are highly dependent on this parameter. Specifically, the compressive stress rapidly increases as the BN bond content increases. In certain embodiments, a Si _x B _y N _z film having a BN/[BN+SiN] of less than about 0.7, such as less than about 0.6 is preferred. The BN bonding content can be adjusted as needed by appropriately modifying the flow rate of the cerium-containing precursor and the boron-containing precursor. Table 6 shows the film properties of films having different BN/[BN+SiN] ratios.

As mentioned previously, boron-containing films are well suited for hard mask applications. One unique advantage of boron-containing films is their hydrophilic nature, which is easily removed by CMP. Figure 6G illustrates the hydrophilicity of various Si _x B _y C _z films compared to undoped tantalum carbide films using a contact angle test in which a drop of water is placed on the film. One of the contact angles of the water droplets on the film is measured, wherein the lower contact angle corresponds to a film having a stronger hydrophilicity. The Si _x B _y C _z films 4 to 6 shown in Table 3 were tested, and a contact angle of 38 to 42° was obtained. In contrast, the hydrophobicity of the undoped tantalum carbide film is significantly stronger, as evidenced by a significantly higher 66° contact angle.

Tantalum nitride hard mask film

In another aspect, a GeN _x hard mask film is provided. In certain embodiments, the films are characterized by a high Young's modulus and a high density (e.g., a density greater than about 4 g/cm ³ ) of at least about 100 GPa, such as at least about 130 GPa. GeN _x films can be used as hard masks in a variety of back-end and front-end processing schemes, and are sufficiently transparent at the laser wavelengths used for pattern alignment and are easily removed from the substrate by CMP or wet etching techniques after use. except.

In some embodiments, a ruthenium-rich GeN _x hard mask film is preferably used. The cerium-rich film has a cerium concentration of at least about 60 atomic percent, such as at least about 70 atomic percent, such as at least about 75 atomic percent (excluding hydrogen). The high bismuth content makes the tantalum nitride film more sensitive to CMP and wet etch removal after the film has been used for patterning. In some embodiments, the removal is accomplished by contacting the hard mask with a composition comprising one of hydrogen peroxide in a CMP or wet etch operation. For example, an acidic CMP slurry containing hydrogen peroxide can be used.

In one example, a GeN _x hard mask film having a niobium concentration of about 79 atomic percent lanthanum, a Young's modulus of about 144 GPa, and a density of about 4.4 g/cm ³ was prepared.

Tantalum nitride hard masks can generally be prepared using a variety of CVD and PVD techniques, of which PECVD is illustrated as an illustrative example. Referring to the subsequent end process flow diagram shown in Figure 7, the process begins in 701 by providing a semiconductor substrate comprising an exposed dielectric layer in a PECVD process chamber. In operation 703, a GeN _x hard mask film having a germanium content of at least about 60 atomic percent is deposited. The deposition system is formed by introducing a process gas containing a ruthenium-containing precursor (for example, decane) and a nitrogen-containing precursor (for example, NH ₃ , N ₂ , N ₂ H ₄ and various mixtures thereof) into a process chamber. A plasma is performed by depositing a layer of tantalum nitride. The deposition process gas may optionally include an inert gas such as helium or argon. The flow rate ratio of a nitrogen-containing precursor to a ruthenium-containing precursor is selected to form a ruthenium-rich tantalum nitride film. In one example, if the precursor is decane and ammonia, a ratio of decane to ammonia of at least about 0.05 is used.

In one illustrative example, by making a substantially germane (a flow rate between about 50 to 100 sccm) at a temperature ranging between about 350 to at 450 ℃, NH ₃ (flow rate of between about 600 One process gas consisting of 1200 sccm) and N ₂ (flow rate of about 12 slm) flows into the process chamber and forms a dual-frequency plasma to deposit a tantalum nitride film on a substrate on a 300 mm wafer. A GeN _x hard mask is prepared, wherein the temperature is the temperature at the pedestal. In this illustration, the pressure during deposition is between about 2.5 and 4 Torr. An HF RF component having a frequency of about 13.56 MHz (power density of about 0.18 W/cm ² ) and an LF RF component having a frequency of about 400 kHz (power density of about 0.23 W/cm ² ) are used in this illustrative deposition process. In some embodiments, it is preferred to use a LF component having a higher power density than the HF component.

Referring again to the process flow diagram of FIG. 7, after the tantalum nitride film has been deposited, the dielectric is patterned in operation 707 to form trenches and/or vias, such as shown in FIGS. 1A-1K. A tantalum nitride hard mask may be used during dry etch patterning, such as during reactive ion etching (RIE) of the dielectric. For example, a process gas comprising one of C _x F _y (eg, CF ₄ ), an inert gas (eg, Ar), and an oxidant (eg, O ₂ ) may be used in the presence of an exposed GeN _x hard mask to provide an exposed hard cover. The substrate of the cover and the dielectric layer is in contact with a plasma to etch vias and/or trenches in the dielectric. Other dry etching may be used, for example by means of plasma etching comprises one of Cl ₂ and N ₂ gas of the process.

After the dielectric has been patterned, the vias and/or trenches are filled with metal in operation 707. For example, copper can be deposited into the recess features by electroplating. Then in operation 709, the hard mask is removed by CMP. For example, this can be done during copper overload and CMP removal of the diffusion barrier material. In certain embodiments, a GeN _x hard mask is removed using a CMP slurry having an acidic pH and comprising a peroxide such as hydrogen peroxide. In other embodiments, GeN _x film hard mask may be by a wet etch (e.g., containing H ₂ SO ₄ solution and H ₂ O ₂ of which can be a 3: 1 ratio of presence) removed.

The process flow diagram in Figure 7 illustrates a backend processing scheme. The GeN _x film can also be used as a hard mask in front end processing. In addition, the tantalum nitride film can be used as a hard mask during wet etching, such as during patterning of a yttria-based material using a fluoride-containing wet etch chemistry.

device

The hard mask materials described herein can generally be deposited in different types of equipment, including CVD and PVD equipment. In a preferred embodiment, the device is a PECVD device that includes HFRF and LFRF power supplies. Examples of suitable equipment include those available from Novellus Systems, Inc. of San Jose, CA. and tool.

In general, the device will include one or more chambers or "reactors" (sometimes including multiple stations) that can accommodate one or more wafers and are suitable for wafer processing. Each chamber can accommodate one or more wafers for processing. The one or more chambers maintain the wafer in one or more defined positions (with or without movement within the position, such as rotation, vibration, or other agitation). In some embodiments, one of the wafers undergoing hard mask deposition is transferred from one station in the reactor to another during the process. Each wafer is held in place during processing by a susceptor, wafer chuck, and/or other wafer holding device. In operation to heat a wafer, the apparatus can include a heater, such as a heating plate.

Figure 8 provides a simplified block diagram of various reactor components configured to implement one of the suitable PECVD reactors of the present invention. As shown, a reactor 800 includes a process chamber 824 that encloses other components of the reactor and is configured to house a plasma produced by a capacitor type system that includes a grounded heater block 820. One of the jobs is showerhead 814. A high frequency RF generator 804 and a low frequency RF generator 802 are coupled to a matching network 806, which in turn is coupled to the showerhead 814.

Within the reactor, a wafer pedestal 818 supports a substrate 816. The susceptor typically includes a chuck, a yoke or a ejector pin to hold and transfer the substrate during the deposition reaction and between deposition reactions. The chuck can be an electrostatic chuck, a mechanical chuck or various other types of chucks that can be used in industry and/or research.

Process gas is introduced via inlet 812. A plurality of source gas lines 810 are coupled to the manifold 808. The gas can be premixed or not premixed. Appropriate valve control and mass flow control mechanisms are employed to ensure that the correct gas is delivered during the deposition and plasma processing stages of the process. Where a chemical precursor is delivered in liquid form, a liquid flow control mechanism is employed. The liquid is then vaporized and mixed with other process gases during transport in the manifold heated to a vaporization point above the liquid before it reaches the deposition chamber.

Process gas exits chamber 824 via an outlet 822. A vacuum pump 826 (eg, a primary or a two-stage mechanical dry pump and/or a turbo molecular pump) typically draws process gas and is maintained by a closed loop controlled flow restriction device (eg, a throttle valve or a pendulum valve) One of the reactors is suitably low pressure.

In one of these embodiments, a multi-station device can be used to deposit a hard mask layer. The multi-station reactor allows for the simultaneous operation of different or identical processes in a single chamber environment, thereby increasing the efficiency of wafer processing. An example of such a device is illustrated in FIG. It shows a schematic illustration of a top view. An equipment room 901 includes four stations 903 to 909. In general, any number of stations in a single room of a multi-station facility is possible. Station 903 is used to load and unload substrate wafers. Stations 903 through 909 may have the same or different functions, and in some embodiments may operate under different process conditions (e.g., under different temperature regimes).

In some embodiments, the entire hard mask layer is deposited in a station of a device. In other embodiments, a first portion of the hard mask layer is deposited in a first station, and then the wafer is transferred to a second station, wherein a second portion of the same hard mask layer is deposited, and so on Wait until the wafer returns to the first station and leaves the device.

In one embodiment, the deposition of the tantalum carbide layer and the post-plasma processing are performed in one of the stations of the facility. In other embodiments, the deposition of the sub-layers is performed in one or more dedicated stations, while the post-plasma processing is performed at one or more different stations.

In one embodiment, stations 903, 905, 907, and 909 are each used to deposit a hard mask layer. An indexing disk 911 is used to lift the substrate off the pedestal and accurately position the substrate at the next processing station. After the wafer substrate is loaded into the station 903, it is sequentially indexed to stations 905, 907, and 909 where a portion of a hard mask layer is deposited at each station. The processed wafer is unloaded at station 903 and loaded with a new wafer. During normal operation, a separate substrate occupies each station and moves the substrate to a new station each time the process is repeated. Therefore, one of the four stations 903, 905, 907, and 909 allows four wafers to be processed simultaneously.

The process conditions and process flow itself may be controlled by a controller unit 913 that includes monitoring, maintaining, and/or regulating certain process variables (eg, HF and LF power, precursor flow rate, temperature, pressure, and the like) ) program instructions. The controller includes program instructions for performing any of the hard mask deposition processes described herein. For example, in some embodiments, the controller includes program instructions for depositing a layer of carbonized germanium (ie, for flowing a suitable process gas and generating a plasma using the required power parameters), purging the chamber with a purge gas The sub-layer is subjected to a plasma treatment with a plasma treatment gas and the deposition and plasma treatment processes are repeated a desired number of times (eg, depositing and processing at least 10 sub-layers). In some embodiments, the controller includes program instructions for depositing a boron-containing hard mask (which includes instructions for flowing a process gas having a suitable composition as previously described) and for using appropriate power A level (eg, a LF/HF power ratio of at least about 1.5) produces a plasma program command. In other embodiments, the controller includes program instructions for depositing a GeN _x hard mask, the instructions including instructions for flowing a process gas comprising a ruthenium containing precursor and a nitrogen-containing precursor at a flow rate, It preferably results in the formation of a film containing at least about 60 atomic percent of ruthenium. The controller may contain different or the same instructions for different equipment stations, thus allowing the equipment stations to operate independently or synchronously.

It is understood that the examples and embodiments described herein are for illustrative purposes only, and those skilled in the art can understand various modifications or changes in accordance with the examples and embodiments. Although various details have been omitted for clarity, various design alternatives can be implemented. Therefore, the present invention is to be considered as illustrative and not restrictive, and the invention is not limited to the details of the invention, but may be modified within the scope of the appended claims. It should be understood that in certain embodiments, the hard mask film may not be actively used for masking in lithography, but may be used only as one of the hard protective layers of the underlying material.

101. . . Copper layer

103. . . Dielectric

105. . . Diffusion barrier layer

107. . . Dielectric diffusion barrier layer

109. . . Dielectric layer

111. . . Mechanically strong dielectric buffer layer

113. . . Hard mask

115. . . Photoresist layer

117. . . Filler layer

119. . . Photoresist layer

121. . . metal

201. . . Layer

203. . . Oxide layer

205. . . Polycrystalline germanium

207. . . Hard mask layer

209. . . Ashable hard mask

211. . . Photoresist layer

800. . . reactor

802. . . Low frequency RF generator

804. . . High frequency RF generator

806. . . Matching network

808. . . Manifold

810. . . Source gas pipeline

812. . . Entrance

814. . . Shower head

816. . . Substrate

818. . . Wafer base

820. . . Ground heater block

822. . . Export

824. . . room

826. . . Vacuum pump

901. . . equipment room

903. . . The station

905. . . The station

907. . . The station

909. . . The station

911. . . Indexing plate

913. . . Controller unit

1A through 1K are cross-sectional views showing the structure of a device produced using the hard mask provided herein during an illustrative back end lithography process in the fabrication of semiconductor devices.

2A through 2E show cross-sectional illustrations of device structures produced using one of the hard masks provided herein during an illustrative front end lithography process in the fabrication of semiconductor devices.

3 is a process flow diagram of one of the back-end lithography processes suitable for use with the hard masks provided herein.

Figure 4 is a flow diagram of one of the front end lithography processes suitable for use with the hard masks provided herein.

5A is a flow diagram of a process for depositing a tantalum carbide hard mask in accordance with one embodiment provided herein.

Figure 5B provides an IR spectrum of a multilayered tantalum carbide film compared to a single layer of tantalum carbide film obtained using a plurality of densified plasma post-treatments. It illustrates a more prominent Si-C peak.

Figure 5C is an experimental plot of the stress and hardness characteristics of a multilayer tantalum carbide film compared to a single layer film.

Figure 5D is an experimental plot of stress and Young's modulus characteristics of a multilayered tantalum carbide film compared to a single layer film.

6A is a process flow diagram of one exemplary processing method using a boron-containing hard mask in accordance with one embodiment provided herein.

Figure 6B is an experimental plot of the stress and hardness characteristics of a boron-containing film suitable for hard mask applications.

Figure 6C is an experimental plot of the stress and Young's modulus characteristics of a boron-containing film suitable for hard mask applications.

Figure 6D is a graphical representation of one of the dependencies of the Si _x B _y C _z film hardness versus the B ₂ H ₆ /tetramethyl decane flow rate ratio used during PECVD.

Figure 6E is an experimental plot illustrating the dependence of the Young's modulus and stress parameters of the Si _x B _y C _z film on the BC/[BC+SiC]IR peak area ratio.

Figure 6F is an experimental plot illustrating the dependence of the Young's modulus and stress parameters of the Si _x B _y N _z film on the BN/[BN + SiN] IR peak area ratio.

Figure 6G is an experimental plot illustrating the performance of a Si _x B _y C _z film compared to an undoped tantalum carbide film in a contact angle hydrophobicity test. It illustrates the relatively strong hydrophilicity of the Si _x B _y C _z film.

7 is a process flow diagram of one exemplary processing method using a GeN _x hard mask in accordance with one embodiment provided herein.

Figure 8 is a schematic representation of one of the PECVD devices capable of using a low frequency (LF) and high frequency (HF) radio frequency plasma source that can be used to deposit a hard mask film in accordance with certain embodiments of the present invention.

Figure 9 is a schematic representation of one of the multiplex station PECVD apparatus suitable for forming a hard mask film in accordance with certain embodiments of the present invention.

(no component symbol description)

Claims (16)

A method of forming a hard mask film on a semiconductor substrate, the method comprising: receiving a semiconductor substrate in a plasma enhanced chemical vapor deposition (PECVD) process chamber; and forming on the semiconductor substrate by PECVD A hard mask film having a hardness greater than about 12 GPa and a stress between about -600 MPa and 600 MPa, wherein the PECVD hard mask deposition process comprises: depositing undoped layers using a plurality of densifying plasma treatments a tantalum carbide film, the deposit comprising: (a) introducing a process gas comprising a saturated cerium-containing precursor into the process chamber and forming a plasma to deposit the tantalum carbide hard mask film a first sub-layer; (b) removing the saturated ruthenium-containing precursor from the process chamber; (c) introducing a plasma treatment gas into the process chamber and treating the substrate with a plasma to cause the deposit Layer densification; and (d) repeating (a) to (c) to form and densify additional carbonized hazelnut layers. The method of claim 1, wherein the film has a stress between about -300 MPa and 300 MPa. The method of claim 1, wherein the film has a stress between about 0 MPa and 600 MPa. The method of claim 1, wherein the film has a hardness of at least about 16 GPa. The method of claim 1, wherein the film has a modulus of at least about 100 GPa. The method of claim 1, wherein the saturated cerium-containing precursor comprises tetramethyl decane (Me ₄ Si). The method of claim 1, wherein the process gas used during the deposition further comprises a carrier gas selected from the group consisting of He, Ne, Ar, Kr, and Xe. The method of claim 1, wherein the plasma treatment gas is selected from the group consisting of He, Ar, CO ₂ , N ₂ , NH ₃ and H ₂ . The method of claim 1, wherein each sub-layer has a thickness of less than about 100 Å. The method of claim 9, wherein the method comprises depositing at least 10 sub-layers. The method of claim 1, wherein in the formed tantalum carbide film, a ratio of an area of the SiC peak to an area of SiH in the IR spectrum is at least about 20, and an area of the SiC peak in the IR spectrum with respect to CH The ratio is at least about 50. The method of claim 1, wherein the formed tantalum carbide film has a density of at least about 2 g/cm ³ . The method of claim 1, wherein the formed hard mask layer is deposited over a dielectric layer having a dielectric constant of less than about 2.8, and wherein the hard mask film formed in a dry plasma etch is relative to The dielectric has an etch selectivity of at least about 8:1. The method of claim 1, wherein the formed hard mask layer is deposited over a polysilicon layer. The method of claim 1, wherein the hard mask is at one of less than about 400 ° C Formed at temperature. An apparatus for depositing a hard mask film, the apparatus comprising: (a) a PECVD process chamber configured to form a plasma; (b) a support for a wafer substrate, The support is configured to hold the wafer substrate in place during hard mask deposition, and (c) a controller comprising computer program instructions to perform the steps of: receiving a one in the PECVD process chamber a semiconductor substrate; and a hard mask film having a hardness of greater than about 12 GPa and a stress of between about -600 MPa and 600 MPa formed on the semiconductor substrate by PECVD, wherein the PECVD hard mask deposition process comprises: using a plurality of densifications (densifying) plasma treatment to deposit an undoped multilayer tantalum carbide film, the deposit comprising: (a) introducing a process gas comprising a saturated cerium-containing precursor into the process chamber and forming a plasma to deposit a first sub-layer of the tantalum carbide hard mask film; (b) removing the saturated germanium-containing precursor from the process chamber; (c) introducing a plasma processing gas into the process chamber And treating the substrate with a plasma to densify the deposited sub-layer; and (d) heavy Complex (a) to (c) to form and densify the additional carbonized hazelnut layer.