TWI492548B - 二元資料之改錯和偵錯方法 - Google Patents
二元資料之改錯和偵錯方法 Download PDFInfo
- Publication number
- TWI492548B TWI492548B TW098132378A TW98132378A TWI492548B TW I492548 B TWI492548 B TW I492548B TW 098132378 A TW098132378 A TW 098132378A TW 98132378 A TW98132378 A TW 98132378A TW I492548 B TWI492548 B TW I492548B
- Authority
- TW
- Taiwan
- Prior art keywords
- matrix
- vector
- error
- sub
- symbol
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
- H03M13/1162—Array based LDPC codes, e.g. array codes
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/17—Burst error correction, e.g. error trapping, Fire codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/43—Majority logic or threshold decoding
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Probability & Statistics with Applications (AREA)
- Mathematical Physics (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Computing Systems (AREA)
- Pure & Applied Mathematics (AREA)
- Mathematical Optimization (AREA)
- Quality & Reliability (AREA)
- Mathematical Analysis (AREA)
- Computational Mathematics (AREA)
- Error Detection And Correction (AREA)
- Detection And Correction Of Errors (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP08305690A EP2178215A1 (en) | 2008-10-16 | 2008-10-16 | Method for error correction and error detection of modified array codes |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW201018096A TW201018096A (en) | 2010-05-01 |
| TWI492548B true TWI492548B (zh) | 2015-07-11 |
Family
ID=40386438
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW098132378A TWI492548B (zh) | 2008-10-16 | 2009-09-25 | 二元資料之改錯和偵錯方法 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US8245106B2 (https=) |
| EP (2) | EP2178215A1 (https=) |
| JP (1) | JP5543170B2 (https=) |
| KR (1) | KR101562606B1 (https=) |
| CN (1) | CN101729077B (https=) |
| TW (1) | TWI492548B (https=) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102325003B (zh) * | 2011-07-14 | 2014-02-12 | 海能达通信股份有限公司 | 数据错误检测的方法及设备 |
| DE102014118531B4 (de) * | 2014-12-12 | 2016-08-25 | Infineon Technologies Ag | Verfahren und Datenverarbeitungseinrichtung zum Ermitteln eines Fehlervektors in einem Datenwort |
| US10552243B2 (en) | 2017-10-12 | 2020-02-04 | International Business Machines Corporation | Corrupt logical block addressing recovery scheme |
| CN112003626B (zh) * | 2020-08-31 | 2023-11-10 | 武汉梦芯科技有限公司 | 一种基于导航电文已知比特的ldpc译码方法、系统和介质 |
| CN114765055B (zh) * | 2021-01-14 | 2024-05-03 | 长鑫存储技术有限公司 | 纠错系统 |
| KR20240128282A (ko) | 2023-02-17 | 2024-08-26 | 삼성전자주식회사 | 메모리 컨트롤러 및 메모리 시스템 |
| US12273124B2 (en) * | 2023-08-23 | 2025-04-08 | Sk Hynix Nand Product Solutions Corp. | Systems and methods for irregular error correction code construction in order of weights |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5271012A (en) * | 1991-02-11 | 1993-12-14 | International Business Machines Corporation | Method and means for encoding and rebuilding data contents of up to two unavailable DASDs in an array of DASDs |
| US5644695A (en) * | 1994-01-03 | 1997-07-01 | International Business Machines Corporation | Array combinatorial decoding with multiple error and erasure detection and location using cyclic equivalence testing |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4556977A (en) | 1983-09-15 | 1985-12-03 | International Business Machines Corporation | Decoding of BCH double error correction - triple error detection (DEC-TED) codes |
| EP0519669A3 (en) | 1991-06-21 | 1994-07-06 | Ibm | Encoding and rebuilding data for a dasd array |
| JP3451221B2 (ja) * | 1999-07-22 | 2003-09-29 | 日本無線株式会社 | 誤り訂正符号化装置、方法及び媒体、並びに誤り訂正符号復号装置、方法及び媒体 |
| US6961888B2 (en) * | 2002-08-20 | 2005-11-01 | Flarion Technologies, Inc. | Methods and apparatus for encoding LDPC codes |
| KR100996029B1 (ko) * | 2003-04-29 | 2010-11-22 | 삼성전자주식회사 | 저밀도 패리티 검사 코드의 부호화 장치 및 방법 |
| US7234098B2 (en) * | 2003-10-27 | 2007-06-19 | The Directv Group, Inc. | Method and apparatus for providing reduced memory low density parity check (LDPC) codes |
| US7543212B2 (en) * | 2004-09-13 | 2009-06-02 | Idaho Research Foundation, Inc. | Low-density parity-check (LDPC) encoder |
| KR100734262B1 (ko) | 2004-12-07 | 2007-07-02 | 삼성전자주식회사 | 광 저장 매체의 최적화된 결함 처리를 위한 결함 판단 장치 |
| KR20060135451A (ko) * | 2005-06-25 | 2006-12-29 | 삼성전자주식회사 | 저밀도 패리티 검사 행렬 부호화 방법 및 장치 |
| JP4662367B2 (ja) * | 2006-04-18 | 2011-03-30 | 共同印刷株式会社 | 情報シンボルの符号化方法及びその装置並びに情報シンボルの復号化方法及び復号化装置 |
| US7831895B2 (en) * | 2006-07-25 | 2010-11-09 | Communications Coding Corporation | Universal error control coding system for digital communication and data storage systems |
| US8065598B1 (en) * | 2007-02-08 | 2011-11-22 | Marvell International Ltd. | Low latency programmable encoder with outer systematic code and low-density parity-check code |
| US8020063B2 (en) * | 2007-07-26 | 2011-09-13 | Harris Corporation | High rate, long block length, low density parity check encoder |
-
2008
- 2008-10-16 EP EP08305690A patent/EP2178215A1/en not_active Withdrawn
-
2009
- 2009-09-25 TW TW098132378A patent/TWI492548B/zh not_active IP Right Cessation
- 2009-10-07 US US12/587,419 patent/US8245106B2/en active Active
- 2009-10-08 KR KR1020090095595A patent/KR101562606B1/ko not_active Expired - Fee Related
- 2009-10-09 EP EP09172674A patent/EP2178216A1/en not_active Withdrawn
- 2009-10-14 JP JP2009237428A patent/JP5543170B2/ja not_active Expired - Fee Related
- 2009-10-16 CN CN200910205192.9A patent/CN101729077B/zh not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5271012A (en) * | 1991-02-11 | 1993-12-14 | International Business Machines Corporation | Method and means for encoding and rebuilding data contents of up to two unavailable DASDs in an array of DASDs |
| US5644695A (en) * | 1994-01-03 | 1997-07-01 | International Business Machines Corporation | Array combinatorial decoding with multiple error and erasure detection and location using cyclic equivalence testing |
Non-Patent Citations (1)
| Title |
|---|
| HACHIRO FUJITA ET AL: "Modified Low-Density MDS Array Codes for Tolerating Double Disk Failures in Disk Arrays" IEEE TRANSACTIONS ON COMPUTERS, IEEE SERVICE CENTER, LOS ALAMITOS, CA, US, vol. 56, no. 4, 1 April 2007 (2007-04-01), pages 563-566 MARIO BLAUM ET AL: "MDS Array Codes with Independent Parity Symbols" IEEE TRANSACTIONS ON INFORMATION THEORY, IEEE, US, vol. 42, no. 2, 1 March 1996 * |
Also Published As
| Publication number | Publication date |
|---|---|
| US8245106B2 (en) | 2012-08-14 |
| KR20100042589A (ko) | 2010-04-26 |
| EP2178216A1 (en) | 2010-04-21 |
| JP5543170B2 (ja) | 2014-07-09 |
| CN101729077B (zh) | 2014-03-12 |
| TW201018096A (en) | 2010-05-01 |
| EP2178215A1 (en) | 2010-04-21 |
| JP2010098735A (ja) | 2010-04-30 |
| CN101729077A (zh) | 2010-06-09 |
| KR101562606B1 (ko) | 2015-10-23 |
| US20100269025A1 (en) | 2010-10-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US20200177208A1 (en) | Device, system and method of implementing product error correction codes for fast encoding and decoding | |
| US10146618B2 (en) | Distributed data storage with reduced storage overhead using reduced-dependency erasure codes | |
| US7956772B2 (en) | Methods and apparatus employing FEC codes with permanent inactivation of symbols for encoding and decoding processes | |
| TWI492548B (zh) | 二元資料之改錯和偵錯方法 | |
| US8522122B2 (en) | Correcting memory device and memory channel failures in the presence of known memory device failures | |
| US7447970B2 (en) | Soft-decision decoding using selective bit flipping | |
| CN103392172B (zh) | 纠正存储阵列中的擦除 | |
| US8560930B2 (en) | Systems and methods for multi-level quasi-cyclic low density parity check codes | |
| JP4651990B2 (ja) | 有限幾何学コードの受信ワードを復号化する方法 | |
| US8806295B2 (en) | Mis-correction and no-correction rates for error control | |
| US8694872B2 (en) | Extended bidirectional hamming code for double-error correction and triple-error detection | |
| CN104160452A (zh) | 用于存储阵列的纠删码 | |
| US9654147B2 (en) | Concatenated error correction device | |
| Huang et al. | XI-code: A family of practical lowest density MDS array codes of distance 4 | |
| US20200089417A1 (en) | Memory system | |
| KR102007163B1 (ko) | 인코더, 디코더 및 이를 포함하는 반도체 장치 | |
| Huang et al. | An improved decoding algorithm for generalized RDP codes | |
| GB2531783A (en) | Method and device for removing error patterns in binary data | |
| CN103151078A (zh) | 一种存储器检错纠错码生成方法 | |
| CN116470922A (zh) | 面向dna存储系统的约束码和纠错码融合随机编码方法 | |
| da Costa Vieira | A Step-by-Step Introduction to Error-Correcting Codes: From Hamming to Low-Density Parity-Check (LDPC) | |
| US20160043741A1 (en) | Coding method and device | |
| Surekha et al. | IMPLEMENTATION OF LOW-COMPLEXITY LDPC CODES FOR LOSSLESS APPLICATIONS | |
| Sharath et al. | Error Locked Encoder and Decoder for Nanomemory Application | |
| WO2010066777A1 (en) | Error correction method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MM4A | Annulment or lapse of patent due to non-payment of fees |