TWI482322B - 封裝系統 - Google Patents
封裝系統 Download PDFInfo
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- TWI482322B TWI482322B TW099115077A TW99115077A TWI482322B TW I482322 B TWI482322 B TW I482322B TW 099115077 A TW099115077 A TW 099115077A TW 99115077 A TW99115077 A TW 99115077A TW I482322 B TWI482322 B TW I482322B
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- Prior art keywords
- substrate
- emitting diode
- light emitting
- package system
- light
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- 239000000758 substrate Substances 0.000 claims description 122
- 239000000463 material Substances 0.000 claims description 58
- 238000004806 packaging method and process Methods 0.000 claims description 12
- 239000002861 polymer material Substances 0.000 claims description 12
- 239000004065 semiconductor Substances 0.000 description 22
- 238000000034 method Methods 0.000 description 19
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 9
- 229910052732 germanium Inorganic materials 0.000 description 7
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 7
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 6
- 150000001875 compounds Chemical class 0.000 description 5
- 239000004020 conductor Substances 0.000 description 5
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 4
- 229910045601 alloy Inorganic materials 0.000 description 4
- 239000000956 alloy Substances 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 4
- 239000010949 copper Substances 0.000 description 4
- 229910052737 gold Inorganic materials 0.000 description 4
- 239000010931 gold Substances 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 238000005520 cutting process Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 229910052759 nickel Inorganic materials 0.000 description 3
- 238000007517 polishing process Methods 0.000 description 3
- 229910052594 sapphire Inorganic materials 0.000 description 3
- 239000010980 sapphire Substances 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- 229910000980 Aluminium gallium arsenide Inorganic materials 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 2
- 229910005540 GaP Inorganic materials 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- WPPDFTBPZNZZRP-UHFFFAOYSA-N aluminum copper Chemical compound [Al].[Cu] WPPDFTBPZNZZRP-UHFFFAOYSA-N 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 239000010408 film Substances 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 238000007654 immersion Methods 0.000 description 2
- 238000001459 lithography Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 229920000642 polymer Polymers 0.000 description 2
- 239000002096 quantum dot Substances 0.000 description 2
- 229910052715 tantalum Inorganic materials 0.000 description 2
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 2
- 229910001316 Ag alloy Inorganic materials 0.000 description 1
- 229910002704 AlGaN Inorganic materials 0.000 description 1
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 description 1
- 229910000673 Indium arsenide Inorganic materials 0.000 description 1
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 description 1
- 229910000978 Pb alloy Inorganic materials 0.000 description 1
- 229910001128 Sn alloy Inorganic materials 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 1
- 239000002390 adhesive tape Substances 0.000 description 1
- JRBRVDCKNXZZGH-UHFFFAOYSA-N alumane;copper Chemical compound [AlH3].[Cu] JRBRVDCKNXZZGH-UHFFFAOYSA-N 0.000 description 1
- SOWHJXWFLFBSIK-UHFFFAOYSA-N aluminum beryllium Chemical compound [Be].[Al] SOWHJXWFLFBSIK-UHFFFAOYSA-N 0.000 description 1
- 238000000231 atomic layer deposition Methods 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 239000008393 encapsulating agent Substances 0.000 description 1
- HZXMRANICFIONG-UHFFFAOYSA-N gallium phosphide Chemical compound [Ga]#P HZXMRANICFIONG-UHFFFAOYSA-N 0.000 description 1
- WPYVAWXEWQSOGY-UHFFFAOYSA-N indium antimonide Chemical compound [Sb]#[In] WPYVAWXEWQSOGY-UHFFFAOYSA-N 0.000 description 1
- RPQDHPTXJYYUPQ-UHFFFAOYSA-N indium arsenide Chemical compound [In]#[As] RPQDHPTXJYYUPQ-UHFFFAOYSA-N 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000003698 laser cutting Methods 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910003465 moissanite Inorganic materials 0.000 description 1
- 238000005240 physical vapour deposition Methods 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- SBIBMFFZSBJNJF-UHFFFAOYSA-N selenium;zinc Chemical compound [Se]=[Zn] SBIBMFFZSBJNJF-UHFFFAOYSA-N 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/64—Heat extraction or cooling elements
- H01L33/642—Heat extraction or cooling elements characterized by the shape
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/64—Heat extraction or cooling elements
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/17—Structure, shape, material or disposition of the bump connectors after the connecting process of a plurality of bump connectors
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16235—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a via metallisation of the item
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
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- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12042—LASER
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- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12043—Photo diode
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
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- H01L2924/14—Integrated circuits
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- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
- H01L2924/15155—Shape the die mounting substrate comprising a recess for hosting the device the shape of the recess being other than a cuboid
- H01L2924/15156—Side view
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- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15788—Glasses, e.g. amorphous oxides, nitrides or fluorides
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- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
- H01L2924/1816—Exposing the passive side of the semiconductor or solid-state body
- H01L2924/18161—Exposing the passive side of the semiconductor or solid-state body of a flip chip
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- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/483—Containers
- H01L33/486—Containers adapted for surface mounting
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- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/58—Optical field-shaping elements
- H01L33/60—Reflective elements
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- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/64—Heat extraction or cooling elements
- H01L33/647—Heat extraction or cooling elements the elements conducting electric current to or from the semiconductor body
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Led Device Packages (AREA)
- Fastening Of Light Sources Or Lamp Holders (AREA)
Description
本發明係關於半導體封裝系統之領域,且特別是關於發光二極體(light-emitting diode,LED)封裝系統(package system)。
發光二極體(light-emitting diodes,LEDs)為一種半導體光源,且其已用於取代習知之螢光燈(fluorescent lamp)光源。發光二極體通常為由化合物材料所製成之半導體二極體。當二極體處於順向偏壓(forward biased)時,由一節點(node)所提供之電子(electrons)可與由另一節點所提供之電洞(holes)重新結合,進而以光子形態釋放能量。藉由不同化合物材料的選擇,發光二極體之發射光顏色可由紅色變至藍色。
發光二極體係形成於藍寶石基板(sapphire substrate)上。為了封裝之用,接著將發光二極體安裝於導線架(lead frame)之上。接著採用金線(gold wires)以連結導線架與發光二極體之電極,藉以提供用於發出光線之電壓。接著於發光二極體之上沈積形成一半球狀矽透鏡(dome silicon lens),以使得由發光二極體所發出光線可通過此半球狀矽透鏡並為其所折射。
經發現,發光二極體的操作中產生了熱。而藍寶石基板係由氧化鋁所製成,且其具有一不良之熱導率(thermal conductivity)。因此金線變成用於釋放發光二極體操作時所產生之熱之主要選擇。當發光二極體於低功率下操作時,金線可釋放來自於發光二極體之熱。然而,當發光二極體於更大強度下產生更大量之熱時,金線並不適用於釋放熱。而當熱無法逸散而累積時,可能損壞發光二極體並造成其壽命之縮短或導致最後之毀損情形。
此外,亦發現到金線延伸至發光二極體上之情形。因此,金線可能遮蔽了來自於發光二極體之部分光線。因此發光二極體之發光效率將受到負面影響。
基於前述情形,便需要較佳之發光二極體封裝系統。
有鑑於此,本發明提供了包括一發光二極體之一封裝系統。
於一實施例中,本發明提供了一種封裝系統,包括:一基板,具有穿過該基板之至少一第一導熱結構;至少一第二導熱結構,設置於該至少一導熱結構之上;以及至少一發光二極體,設置於該至少一第二導熱結構之上。
於另一實施例中,本發明提供了一種封裝系統,包括:一基板,具有穿過該基板之至少一矽穿孔插銷;至少一凸塊結構,設置於該至少一矽穿孔插銷之上;以及至少一發光二極體,設置於該至少一凸塊結構之上,其中該基板具有一空室以容納該發光二極體。
於又一實施例中,本發明提供了一種封裝系統,包括:一基板,具有穿過該基板之至少一矽穿孔插銷,其中該基板具有一空室,該空室具有一平面與至少一斜面,而該平面與該斜面形成了介於50度~60度之夾角;至少一凸塊結構,設置於該至少一矽穿孔插銷之上;至少一發光二極體,設置於該至少一凸塊結構之上,其中該至少一發光二極體包括一透光基板且設置於該空室內;一透鏡材料,設置於該至少一發光二極體與該基板之間;以及一聚合物材料環繞該基板並自該基板之一第一表面延伸至該基板之一第二表面。
為讓本發明之上述目的、特徵及優點能更明顯易懂,下文特舉一較佳實施例,並配合所附的圖式,作詳細說明如下:
本發明之實施例係關於包括一發光二極體(LED)之一封裝系統。於示範的之封裝系統中可包括一基板,其具有穿過其之至少一第一導熱結構。於上述至少一第一導熱結構之上設置有至少一第二導熱結構。於上述至少一第二導熱結構之上設置有至少一發光二極體。於發光二極體發出光線時,由發光二極體操作所產生之熱可藉由上述之至少一第一導熱結構與上述至少一第二導熱結構而期望地逸散至一散熱片處。由於上述封裝系統可期望地逸散於發光二極體操作中所產生之熱,故上述發光二極體可進行高功率之操作。於下文中將描述示範的封裝系統及其製造方法。本發明之範疇則並未為以下文中描述加以限定。
第1圖為一示意剖面圖,顯示了包括發光二極體之一示範的封裝系統。請參照第1圖,封裝系統100可包括一基板101,其透過如導熱結構110a-110d之至少一導熱結構電性耦接且/或熱耦接於一發光二極體120。於部分實施例中,基板101可包括:一元素態半導體,其包括結晶態之矽或鍺、多晶矽或一非晶結構;一化合物半導體,其包括碳化矽、砷化鎵、磷化鎵、磷化銦、砷化銦與銻化銦;一合金半導體,其包括SiGe、GaAsP、AlInAs、AlGaAs、GaInAs、GaInP與GaInAsP;任何之其他適當材料或上述材料之組合。於一實施例中,上述合金半導體基板可具有一梯度之SiGe特性,於梯度SiGe結構內之矽與鍺組成自一位置處之一比例改變至位於另一處之一比例。於另一實施例中,可使用經應變(stained)之一矽鍺基板。再者,上述半導體基板可為位於一絕緣物上之一半導體,例如絕緣層上覆矽(SOI),或一薄膜電晶體(thin film transistor)。於部份範例中。半導體基板可包括經摻雜之磊晶層或埋入層。於其他範例中,化合物半導體基板可具有一多重膜層結構,或者上述基板可具有多膜層之化合物半導體結構。
於部分實施例中,基板101可包括至少一導熱結構(thermal conductive structure),例如是穿過基板101之導熱結構105a-105d。此些導熱結構105a-105d可為介層物結構、接觸物結構、單鑲嵌結構、雙鑲嵌結構、柱狀結構、導線結構、塊狀結構或其他適當結構,或上述結構之組合。於部分實施例中,此些導熱結構105a-105d可通稱為一矽穿孔插銷(through-silicon vias,TSVs)。於部分實施例中,此些導熱結構105a-105d可包括如阻障材料(例如鈦、氮化鈦、鉭、氮化鉭、其他阻障材料及/或上述材料之組合)、導電材料(鋁、銅、鋁銅、多晶矽、其他導電材料及或上述材料之組合)、適用於形成導熱結構105a-105d之其他材料,及/或上述材料之組合。
請參照第1圖,於部分實施例中,封裝系統100可包括分別設置於導熱結構105a-105d上之導熱結構110a-110d。此些導熱結構110a-110d可具有如球狀結構、橢圓結構、塊狀結構、線狀結構、柱狀結構、其他之適當結構或上述結構之組合。於部分實施例中,導熱結構110a-110d係稱為凸塊(bump)結構。於部分實施例中,此些導熱結構110a-110d可包括如為無鉛合金(例如金或錫/銀/銅合金)、含鉛合金(例如鉛/錫合金)、銅、鋁、鋁銅、導電高分子、其他凸塊金屬材料及/或上述材料之組合之一材料。
請參照第1圖,封裝系統100可包括設置於導熱結構110a-110d上之至少一發光二極體,例如為一發光二極體120。於部分實施例中,發光二極體120可包括一透光基板121以及多個半導體材料層(未標號)。透光基板121可為如藍寶石基板、玻璃基板、氧化鋁基板、或其他透光基板。自發光二極體120之發射光線可穿過此透光基板121。
於部分實施例中,上述半導體材料層可包括至少一N型半導體材料層與至少一P型半導體材料。依照所發射出光線顏色而定,半導體材料層可至少包括如GaAs、AlGaAs、GaAsP、AlGaInP、GaP、GaAsP、AlGaInP、InGaN、GaN、AlGaP、ZnSe、SiC、矽、碳、BN、AlN、AlGaN、AlGaInN、其他半導體材料,或上述材料之組合之一材料。
於部分實施例中,發光二極體120可選擇性地包括設置於N型半導體材料層與P型半導體材料層之間之至少一多重量子井(multiple-quantum-wells)層,一單一量子井(single-quantum-well)層及/或一量子點(quantum-dots)層。上述之量子井或量子點層可為分別來自於N型半導體層與P型半導體層之電子與電洞於該處重新結合之一膜層。
於某些實施例中,可於導熱結構105a-105d與110a-110d之間設置至少一銲墊(未顯示)。此至少一銲墊可至少包括如銅、鋁、銅鋁、鋁矽銅,其他導電材料或上述材料之不同組合之一材料。於部分實施例中,此至少一銲墊可包括一凸塊底層金屬層(under bump metallization layer,UBM layer)。
請再次參照第1圖,於部分實施例中,導熱結構105a與110a可電性耦接於發光二極體120之一電極。至少導熱結構105a-105d與110a-110d之一可分別可電性耦接於發光二極體之另一電極。藉由施加電壓至電極處,發光二極體120可發出具有期望顏色之光線。
如前所述,發光二極體可分別透過導熱結構110a-110d而熱耦接於導熱結構105a-105d。於發光二極體120操作時所產生之熱可期望地經由導熱結構105a-105d及導熱結構110a-110d釋放至一散熱片(heat sink)及/或如印刷電路板之另一基板(未顯示)。藉由熱釋放,發光二極體120可於較高功率操作下有較佳表現。發光二極體120便可大體受到保護而免於受到累積熱能之毀損。
請再次參照第1圖,基底101可具有用於容納發光二極體120之一空室(cavity)103。空室103可具有一平面(flat surface)103a以及如斜面103b之至少一斜面(beveled surface)。斜面103b可作為適用於反射來自發光二極體120之光線之一反射面(reflective surface)。經由斜面103b所反射之光線可貢獻於發光二極體120之發光效率。於部分實施例中,平面103a以及斜面103b可具有約介於50度~60度之一夾角θ。可以理解的是,於第1圖內所示之設置於空室103內之發光二極體的數量僅用於解說之用。於其他實施例中,可於空室103內設置兩個或更多個之發光二極體。
於部分實施例中,封裝系統100可包括設置於基板101與發光二極體120之間之一透鏡材料115。透鏡材料115可包括如矽、聚合物、其他透鏡材料或上述材料之組合。於實施例中,透鏡材料115可選擇地包括用於調整封裝系統100之發射光顏色之彩色螢光粉(color phosphor)。
請再次參照第1圖,透光基板121之一表面121a與透鏡材料115之表面115a可大體與基板101之表面101a共平面。於其他實施例中,可於透光基板121之上設置半球狀透鏡(dome lens)或半球狀包覆物(dome encapsulant,未顯示)並覆蓋發光二極體120。半球狀透鏡可幫助發光二極體120所發出光線折射穿過透光基板121。
於部分實施例中,封裝系統可包括聚合物材料130。聚合物材料130可設置以環繞基板101,並自基板101之表面101a延伸至基板101之另一表面101b處。此聚合物材料130可作為用於基板101與發光二極體之一保護牆及/或一應力緩衝物。
第2圖為一示意剖面圖,顯了包括一發光二極體之另一示範的封裝系統。於第2圖內相同於第1圖內構件之之構件係採用相同標號加上100表示。於第2圖內,可於基板201與發光二極體220之間設置一透鏡材料215且其環繞發光二極體220。於部分實施例中,透鏡材料215可包括用於調整發光二極體220之發射光線顏色之彩色螢光粉。透鏡材料215之表面215a可位於透光基板221之表面221a之上。此表面215a可大體與基板201之表面201a共平面。於其他實施例中,可於透光基板221之上設置半球狀透鏡或半球狀包覆物(未顯示)並覆蓋發光二極體220。此半球狀透鏡可幫助來自於發光二極體220之光線折射穿過透光基板221。
第3A-3H圖為一系列剖面示意圖,顯示了依據本發明一實施例之形成數個封裝系統之方法。於第3A-3H圖內相同於第1圖內構件之之構件將採用相同標號加上200或250而表示。請參照第3A圖,可於基板302內形成聚合物材料330a-330c。此些聚合物材料330a-330c可沿著定義於基板302上之切割道而形成。聚合物材料330a-330c的形成可藉由單一或多重刀片之切割程序或雷射切割程序於基板302內形成數個T形溝槽。可接著於此些T型溝槽內形成聚合物材料330a-330c並將之置於一硬化程序中以硬化聚合物材料330a-330c。
請再次參照第3A圖,可於基板302內形成至少一導熱結構,例如為導熱結構305a-305d與355a-355d。導熱結構305a-305d與355a-355d可具有少於聚合物材料330a-330c之一長度。導熱結構305a-305d可藉由聚合物材料330a-330c而與導熱結構355a-355d相分隔。導熱結構305a-305d與355a-355d可藉由微影與蝕刻程序以於基板302內形成數個開口所形成。可於此些開口內藉由化學氣相沈積、物理氣相沈積、原子層沈積、電鍍方法及/或其他適用於填滿開口之方法填入導電材料。接著施行化學機械研磨程序以研磨位於基板302上之導電材料,以於此些開口內形成導熱結構305a-305d與355a-355d。
請參照第3B圖,可於基板302上設置如玻璃載具之一載具304。載具304可透過一黏著膠帶(未顯示)而附著於基板302上。載具304可於如研磨部份之基板302(請參照第3A圖)與形成基板301與351之移除情形下攜帶基板302。上述移除程序可露出聚合物材料330a-330c。於部份實施例中,聚合物材料330b可隔離基板301與基板351。
請參照第3C圖,可於基板301與351內分別形成數個凹槽(groove)311a-311b以及凹槽(groove)311c-311d。凹槽311a-311b可形成鄰近於聚合物材料330a-330c處。凹槽311a-311d可藉由一斜角切割製程(bevel sawing process)所形成。於其他實施例中,凹槽311a-311d之尖端可位於大體水平於如第3C圖所示之導熱結構305a-305d與355a-355d之底面之處。
如第3D圖所示,可移除部份之基板301與351(如第3C圖所示)以分別於基板301與351內形成一空室303與一空室353。部份基板301與351的移除可露出導熱結構305a-305d與355a-355d。空室303與353可分別具有平面303a與353a與斜面303b與353b。斜面303b與353b可作為發光二極體之反射面。於部份實施例中,移除部份之基板301與351可包括採用一微影程序以形成露出被移除區域之圖案化之光阻(未顯示)。接著施行如反應離子蝕刻程序之一蝕刻程序以移除露出區域。並於形成空室303與353之後移除上述圖案化之光阻。
於部份實施例中,導熱結構305a-305d與355a-355d可選擇性地置入於一無電鍍鎳化金(electroless nickel immersion gold,ENIG)程序或一化學錫(immersion tin,Im-Sn)程序中,以於導熱結構305a-305d與355a-355d之露出表面上形成無電鍍鎳化金材料(ENIG)或化學錫(Im-Sn)材料。此無電鍍鎳化金材料或化學錫材料可作為介於導熱結構305a-305d與355a-355d以及310a-310d與360a-360d之間之一接合介面(請參照第3E圖)。
如第3E圖所示,於空室303與353內可分別設置發光二極體320與370。發光二極體320與370可藉由習知發光二極體製造方法所形成。包括導熱結構310a-310d與360a-360d之發光二極體320與370可分別與導熱結構305a-305d與355a-355d相連結。發光二極體320與370可分別藉由導熱結構310a-310d與360a-360d而熱耦接及/或電耦接於導熱結構305a-305d與355a-355d。
如第3F圖所示,可於基板301與發光二極體320之間及於基板351與發光二極體370之間分別形成透鏡材料315與365。舉例來說,於將如第3E圖所示結構反轉之後,可藉由印刷或分配等方式將一透鏡材料填入於空室303與353內(如第3E圖所示)而形成透鏡材料315與365。可接著施行研磨程序及/或研磨蝕刻程序,以移除高於透光基板321與371之透鏡材料。於本實施例中,透鏡材料315之表面315a可大體與透光基板321之表面321a共平面。於其他實施例中,可於透光基板321上形成半球狀透鏡或半球狀包覆物(未顯示)。
於其他實施例中,可相似於如第2圖所示結構般形成透鏡材料315之表面315a於透光基板321之表面321a之上。於本實施例中,基板301之空室303(如第3E圖所示)則需要更為加深,以於設置發光二極體320於空室303內之後,使得透光基板之表面321a係低於基板301之表面301a。透鏡材料315可形成於透光基板321上並環繞發光二極體320。透鏡材料315之表面315a可大體與基板301之表面301a共平面。
請參照第3G圖,接著翻轉如第3F圖內所示結構並將之安裝於切割膠帶(dicing tape)345上。於部份實施例中,可自基板301與351處移除載具304。
請參照第3H圖,接著將如第3G圖所示之結構置於用於分隔封裝系統300與封裝系統350之一切割程序(dicing process)中。於部份實施例中,上述切割程序可包括一刀片切割程序(blade sawing process)及/或一雷射切割程序(laser sawing process)。於其他實施例中,切割程序可沿著聚合物材料330a、330b與330c而施行。如前所述,聚合物材料330a、330b與330c可設置以環繞基板301與351。聚合物材料330a、330b與330c可於封裝系統300與350之單一化時提供較佳之機械支撐功效。
可以理解的是,於第3A-3H圖內所示製程所能形成之封裝系統300與350的數量係為示範性質。其可形成包括數個發光二極體之更多封裝系統。由於可於相同之基礎基板302(如第3A圖所示)上形成多重封裝系統,故亦可將如第3A-3H圖所示製程稱呼為一晶圓層級製程(wafer level process)。
第4圖為一示意圖,顯示了包括設置於一電路基板上之示範的發光二極體封裝系統。請參照第4圖,系統400可包括402設置於電路基板401上之一封裝系統。電路基板401可包括一印刷電路板(printed circuit board,PCB)、一印刷線路板(printed wire board,PWB)及/或適用於承載一積體電路之其他載具。於部份之實施例中,封裝系統402可相似於如上述第1圖與第2圖內所示情形內之封裝系統100或200。封裝系統402可電性耦接於電路基板401。於部份實施例中,封裝系統402可透過凸塊405而電性耦接及/或熱耦接於電路基板401。系統400可為如顯示器、面板、發光系統、自動車輛、環保裝置或相似物之電子系統之一部。於部份實施例中,包括封裝系統402之系統400可於一積體電路中提供一整個系統,即所謂之晶片系統(system on a chip)或積體電路裝置系統(system on integrated circuit device)。
基於前述之實施情形,本發明之一實施例提供了一封裝系統。此封裝系統包括了一基板,此基板具有穿過其之至少一導熱結構。於至少一第一導熱結構之上設置有至少一第二導熱結構。於該至少一第二導熱結構之上設置有至少一發光二極體。
雖然本發明已以較佳實施例揭露如上,然其並非用以限定本發明,任何熟習此項技藝者,在不脫離本發明之精神和範圍內,當可作更動與潤飾,因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。
100、200、300、350...封裝系統
101、201、301、351...基板
101a、201a...基板之表面
103、203、303、353...空室
103a、203a、303a、353a...平面
103b、203b、303b、353b...斜面
105a、105b、105c、105d、205a、205b、205c、205d、305a、305b、305c、305d、355a、355b、355c、355d...導熱結構
110a、110b、110c、110d、210a、210b、210c、210d、310a、310b、310c、310d、365a、365b、365c、365d...導熱結構/凸塊結構
115、215、315、365...透鏡材料
115a、215a、315a、365a...透鏡材料之表面
120、220、320、370‧‧‧發光二極體
121、221、321、371‧‧‧透光基板
121a、221a、321a、371a‧‧‧透光基板之表面
130、230、330a、330b、330c‧‧‧聚合物材料
θ‧‧‧平面與斜面之夾角
301、302、351‧‧‧基板
311a、311b、311c、311d‧‧‧凹槽
345‧‧‧切割膠帶
400‧‧‧系統
401‧‧‧電路基板
402‧‧‧封裝系統
405‧‧‧凸塊
第1圖為一示意圖,顯示了依據本發明一實施例之包括發光二極體之封裝系統;
第2圖為一示意圖,顯示了依據本發明另一實施例之包括發光二極體之封裝系統;
第3A-3H圖為一系列示意圖,顯示了依據本發明一實施例之形成數個發光二極體封裝系統之方法;
第4圖為一示意圖,顯示了依據本發明一實施例之包括設置於電路板上之發光二極體之封裝系統。
100‧‧‧封裝系統
101a‧‧‧基板之表面
103‧‧‧空室
103a‧‧‧平面
103b‧‧‧斜面
105a、105b、105c、105d‧‧‧導熱結構
110a、110b、110c、110d‧‧‧導熱結構/凸塊結構
115a‧‧‧透鏡材料之表面
120‧‧‧發光二極體
121‧‧‧透光基板
121a‧‧‧透光基板之表面
130‧‧‧聚合物材料
θ‧‧‧平面與斜面之夾角
Claims (12)
- 一種封裝系統,包括:一基板,具有分別延伸並部分穿過該基板之至少三個第一導熱結構;至少三個第二導熱結構,分別設置於該至少三個導熱結構之一之上且與之熱耦接;以及至少一發光二極體,設置於該至少三個之第一導熱結構與該至少三個第二導熱結構之上且與之熱耦接。
- 如申請專利範圍第1項所述之封裝系統,其中該基板具有用於容納該至少一發光二極體之一空室。
- 如申請專利範圍第1項所述之封裝系統,其中該至少一發光二極體包括一P型層與一N型層,該P型層係熱耦接於該至少三個第一導熱結構與該至少三個第二導熱結構之一第一組,而該N型層係熱耦接於該至少三個第一導熱結構與該至少三個第二導熱結構之一第二組,其中至少該第一組與該第二組之一具有大於1之數量。
- 如申請專利範圍第2項所述之封裝系統,其中該至少一發光二極體包括一透光基板,而該透光基板之一表面大體與該基板之一表面共平面,而該封裝系統更包括一透鏡材料,設置於該基板與該至少一發光二極體之上,其中該透鏡材料之一表面大體與該透光基板之該表面共平面。
- 如申請專利範圍第2項所述之封裝系統,其中該至少一發光二極體包括一透光基板,且該透光基板之一表面則低於該基板之一表面,而該封裝系統更包括一透鏡 材料,設置於該基板與該至少一發光二極體之間,其中該透鏡材料之一表面係位於該透光基板之該表面之上。
- 如申請專利範圍第1項所述之封裝系統,更包括一聚合物材料環繞該基板並自該基板之一第一表面延伸至該基板之一第二表面。
- 如申請專利範圍第1項所述之封裝系統,其中該至少三個第一導熱結構分別包括了一矽穿孔插銷,以及該至少三個第二導熱結構分別包括一凸塊結構。
- 一種封裝系統,包括:一第一基板,具有穿過該第一基板之至少一矽穿孔插銷;至少一凸塊結構,設置於該至少一矽穿孔插銷之上;至少一發光二極體,設置於該至少一凸塊結構之上,其中該第一基板具有一空室以容納該發光二極體,其中該至少一發光二極體包括一透光第二基板,而該透光第二基板之一表面大體與該第一基板之一表面共平面;以及一透鏡材料,設置於該第一基板與該至少一發光二極體之間,其中該透鏡材料之一表面大體與該透光第二基板之該表面共平面。
- 如申請專利範圍第8項所述之封裝系統,其中該空室具有一平面與至少一斜面,而該平面與該至少一斜面形成了介於50度~60度之一夾角。
- 如申請專利範圍第8項所述之封裝系統,更包括一聚合物材料環繞該基板並自該基板之一第一表面延伸 至該基板之一第二表面。
- 如申請專利範圍第8項所述之封裝系統,其中該至少一矽穿孔插銷具有多於2之一數量。
- 如申請專利範圍第8項所述之封裝系統,其中該空室包括一反射面。
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