TWI478188B - Stacked-type solid electrolytic capacitor package structure having a plurality of negative lead pins and method of manufacturing the same - Google Patents
Stacked-type solid electrolytic capacitor package structure having a plurality of negative lead pins and method of manufacturing the same Download PDFInfo
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本發明係有關於一種堆疊型固態電解電容器封裝結構及其製作方法,尤指一種具有多個負極引出腳的堆疊型固態電解電容器封裝結構及其製作方法。The present invention relates to a stacked solid electrolytic capacitor package structure and a manufacturing method thereof, and more particularly to a stacked solid electrolytic capacitor package structure having a plurality of negative electrode lead legs and a manufacturing method thereof.
電容器已廣泛地被使用於消費性家電用品、電腦主機板及其周邊、電源供應器、通訊產品、及汽車等的基本元件,其主要的作用包括:濾波、旁路、整流、耦合、去耦、轉相等。是電子產品中不可缺少的元件之一。電容器依照不同的材質及用途,有不同的型態。包括鋁質電解電容、鉭質電解電容、積層陶瓷電容、薄膜電容等。Capacitors have been widely used in consumer appliances, computer motherboards and their peripherals, power supplies, communication products, and automotive basic components, including: filtering, bypass, rectification, coupling, decoupling And turn equal. It is one of the indispensable components in electronic products. Capacitors have different types according to different materials and uses. Including aluminum electrolytic capacitors, tantalum electrolytic capacitors, multilayer ceramic capacitors, film capacitors and so on.
先行技術中,固態電解電容器具有小尺寸、大電容量、頻率特性優越等優點,而可使用於中央處理器的電源電路的解耦合作用上。一般而言,可利用多個電容單元的堆疊,而形成高電容量的固態電解電容器,習知堆疊式固態電解電容器包括多個電容單元與導線架,其中每一電容單元包括陽極部、陰極部與絕緣部,此絕緣部使陽極部與陰極部彼此電性絕緣。特別是,電容單元的陰極部彼此堆疊,且藉由在相鄰的電容單元之間設置導電體層,以使多個電容單元之間彼此電性連接。然而,習知的固態電解電容器只能夠提供1個只具有1個外露焊接段的正極引出腳及1個只具有1個外露焊接段的負極引出腳。In the prior art, the solid electrolytic capacitor has the advantages of small size, large capacitance, superior frequency characteristics, and the decoupling of the power supply circuit for the central processing unit. In general, a stack of a plurality of capacitor units can be utilized to form a high-capacity solid electrolytic capacitor. The conventional stacked solid-state electrolytic capacitor includes a plurality of capacitor units and a lead frame, wherein each capacitor unit includes an anode portion and a cathode portion. And the insulating portion, the insulating portion electrically insulates the anode portion from the cathode portion. In particular, the cathode portions of the capacitor unit are stacked on each other, and a plurality of capacitor units are electrically connected to each other by providing a conductor layer between adjacent capacitor units. However, the conventional solid electrolytic capacitor can only provide one positive lead pin having only one exposed welded section and one negative lead pin having only one exposed welded section.
本發明實施例在於提供一種堆疊型固態電解電容器封裝結構及其製作方法,其可同時提供多個負極引出腳。An embodiment of the present invention provides a stacked solid-state electrolytic capacitor package structure and a manufacturing method thereof, which can simultaneously provide a plurality of negative electrode lead-out legs.
本發明其中一實施例所提供的一種具有多個負極引出腳的堆疊型固態電解電容器封裝結構,其包括:一電容單元、一封裝單元及一導電單元。所述電容單元包括多個依序堆疊且彼此電性連接的堆疊型電容器,其中每一個所述堆疊型電容器具有至少一正極部及至少一負極部。所述封裝單元包括一包覆所述電容單元的封裝體,其中所述封裝體具有一第一側表面、一與所述第一側表面彼此相對應的第二側表面、一連接於所述第一側表面與所述第二側表面之間的前表面、一連接於所述第一側表面與所述第二側表面之間且與所述前表面彼此相對應的後表面、及一連接於所述第一側表面、所述第二側表面、所述前表面及所述後表面之間的底表面。所述導電單元包括至少一第一導電端子及至少一與至少一所述第一導電端子彼此分離的第二導電端子,其中至少一所述第一導電端子具有一電性連接於所述堆疊型電容器的至少一所述正極部且被包覆在所述封裝體內的第一內埋部及一連接於所述第一內埋部的第一裸露部,且所述第一裸露部裸露地設置在所述封裝體外且沿著所述封裝體的所述第一側表面與所述底表面延伸,其中至少一所述第二導電端子具有一電性連接於所述堆疊型電容器的至少一所述負極部且被包覆在所述封裝體內的第二內埋部、一連接於所述第二內埋部的第二側裸露部、一連接於所述第二內埋部的第二前裸露部、及一連接於所述第二內埋部的第二後裸露部,所述第二側裸露部裸露地設置在所述封裝體外且沿著所述封裝體的所述第二側表面與所述底表面延伸,所述第二前裸露部裸露地設置在所述封裝體外且沿著所述封裝體的所述前表面與 所述底表面延伸,且所述第二後裸露部裸露地設置在所述封裝體外且沿著所述封裝體的所述後表面與所述底表面延伸。One embodiment of the present invention provides a stacked solid-state electrolytic capacitor package structure having a plurality of negative electrode lead pins, comprising: a capacitor unit, a package unit and a conductive unit. The capacitor unit includes a plurality of stacked capacitors stacked in series and electrically connected to each other, wherein each of the stacked capacitors has at least one positive portion and at least one negative portion. The package unit includes a package covering the capacitor unit, wherein the package has a first side surface, a second side surface corresponding to the first side surface, and a connection to the a front surface between the first side surface and the second side surface, a rear surface connected between the first side surface and the second side surface and corresponding to the front surface, and a rear surface a bottom surface connected between the first side surface, the second side surface, the front surface, and the rear surface. The conductive unit includes at least one first conductive terminal and at least one second conductive terminal separated from at least one of the first conductive terminals, wherein at least one of the first conductive terminals has an electrical connection to the stacked type At least one of the positive electrode portions of the capacitor and covered in the first embedded portion of the package body and a first exposed portion connected to the first embedded portion, and the first exposed portion is barely disposed Extending outside the package and along the first side surface of the package and the bottom surface, wherein at least one of the second conductive terminals has at least one electrically connected to the stacked capacitor a second embedded portion of the negative electrode portion and covered in the package body, a second side exposed portion connected to the second embedded portion, and a second front portion connected to the second embedded portion a bare portion, and a second rear exposed portion connected to the second embedded portion, the second side exposed portion is barely disposed outside the package and along the second side surface of the package body Extending with the bottom surface, the second front exposed portion is bare Disposed in the package and in vitro along the front surface of the package body and The bottom surface extends and the second rear exposed portion is exposed exposed outside the package and extends along the back surface of the package and the bottom surface.
本發明另外一實施例所提供的一種具有多個負極引出腳的堆疊型固態電解電容器封裝結構的製作方法,其包括下列步驟:首先,將多個堆疊型電容器電性連接於至少一第一導電端子及至少一第二導電端子之間,其中每一個所述堆疊型電容器具有至少一正極部及至少一負極部,至少一所述第一導電端子具有一電性連接於所述堆疊型電容器的至少一所述正極部的第一內埋部及一連接於所述第一內埋部的第一裸露部,至少一所述第二導電端子具有一電性連接於所述堆疊型電容器的至少一所述負極部的第二內埋部、一連接於所述第二內埋部的第二側裸露部、一連接於所述第二內埋部的第二前裸露部、及一連接於所述第二內埋部的第二後裸露部;接著,形成一封裝體以包覆所述電容單元、至少一所述第一導電端子的所述第一內埋部及至少一所述第二導電端子的所述第二內埋部,其中所述封裝體具有一第一側表面、一與所述第一側表面彼此相對應的第二側表面、一連接於所述第一側表面與所述第二側表面之間的前表面、一連接於所述第一側表面與所述第二側表面之間且與所述前表面彼此相對應的後表面、及一連接於所述第一側表面、所述第二側表面、所述前表面及所述後表面之間的底表面,且所述第一裸露部、所述第二側裸露部、所述第二前裸露部及所述第二後裸露部皆裸露地設置在所述封裝體外;最後,彎折所述第一裸露部、所述第二側裸露部、所述第二前裸露部及所述第二後裸露 部,其中所述第一裸露部沿著所述封裝體的所述第一側表面與所述底表面延伸,所述第二側裸露部沿著所述封裝體的所述第二側表面與所述底表面延伸,所述第二前裸露部沿著所述封裝體的所述前表面與所述底表面延伸,且所述第二後裸露部沿著所述封裝體的所述後表面與所述底表面延伸。A method for fabricating a stacked solid electrolytic capacitor package structure having a plurality of negative electrode lead pins according to another embodiment of the present invention includes the following steps: first, electrically connecting a plurality of stacked capacitors to at least one first conductive Between the terminal and the at least one second conductive terminal, wherein each of the stacked capacitors has at least one positive electrode portion and at least one negative electrode portion, at least one of the first conductive terminals having an electrical connection to the stacked capacitor a first embedded portion of the at least one positive electrode portion and a first exposed portion connected to the first embedded portion, at least one of the second conductive terminals having at least one electrically connected to the stacked capacitor a second embedded portion of the negative electrode portion, a second side exposed portion connected to the second embedded portion, a second front exposed portion connected to the second embedded portion, and a connection a second rear exposed portion of the second embedded portion; then, a package is formed to cover the capacitor unit, the first embedded portion of the at least one first conductive terminal, and at least one of the first Two conductive terminals The second embedded portion, wherein the package body has a first side surface, a second side surface corresponding to the first side surface, and a first side surface and the first side surface a front surface between the two side surfaces, a rear surface connected between the first side surface and the second side surface and corresponding to the front surface, and a first side surface a bottom surface between the second side surface, the front surface, and the rear surface, and the first exposed portion, the second side exposed portion, the second front exposed portion, and the first portion The exposed portions are exposed outside the package; finally, the first exposed portion, the second exposed portion, the second front exposed portion, and the second rear exposed portion are bent a portion, wherein the first exposed portion extends along the first side surface of the package body and the bottom surface, and the second side exposed portion is along the second side surface of the package body The bottom surface extends, the second front exposed portion extends along the front surface and the bottom surface of the package body, and the second rear exposed portion is along the rear surface of the package body Extending with the bottom surface.
本發明的有益效果可以在於,本發明實施例所提供的堆疊型固態電解電容器封裝結構及其製作方法,其可透過“所述第一裸露部沿著所述封裝體的所述第一側表面與所述底表面延伸,所述第二側裸露部沿著所述封裝體的所述第二側表面與所述底表面延伸,所述第二前裸露部沿著所述封裝體的所述前表面與所述底表面延伸,且所述第二後裸露部沿著所述封裝體的所述後表面與所述底表面延伸”的設計,以使得本發明的堆疊型固態電解電容器封裝結構及其製作方法能夠同時提供多個負極引出腳,進而有效降低本發明的等效串聯電感(Equivalent Series Inductance,ESL),尤其是在高頻區域。The present invention may be provided in a stacked solid-state electrolytic capacitor package structure and a manufacturing method thereof, which are permeable to the first exposed portion along the first side surface of the package. Extending from the bottom surface, the second side exposed portion extends along the second side surface of the package body and the bottom surface, the second front exposed portion being along the package body a front surface extending from the bottom surface, and the second rear exposed portion extending along the rear surface of the package body and the bottom surface" to enable the stacked solid electrolytic capacitor package structure of the present invention The manufacturing method thereof can simultaneously provide a plurality of negative electrode lead legs, thereby effectively reducing the Equivalent Series Inductance (ESL) of the present invention, especially in a high frequency region.
為使能更進一步瞭解本發明之特徵及技術內容,請參閱以下有關本發明之詳細說明與附圖,然而所附圖式僅提供參考與說明用,並非用來對本發明加以限制者。For a better understanding of the features and technical aspects of the present invention, reference should be made to the accompanying drawings.
請參閱圖1至圖5所示,本創作第一實施例提供一種具有多個負極引出腳的堆疊型固態電解電容器封裝結構,其包括:一電容單元1、一封裝單元2及一導電單元3。Referring to FIG. 1 to FIG. 5 , a first embodiment of the present invention provides a stacked solid electrolytic capacitor package structure having a plurality of negative electrode lead pins, including: a capacitor unit 1 , a package unit 2 , and a conductive unit 3 . .
首先,如圖1所示,電容單元1提供多個堆疊型電容 器10(圖1只顯示其中1個堆疊型電容器10),其具有至少一正極部P及至少一負極部N。舉例來說,每一個堆疊型電容器10包括一閥金屬箔片100、一完全包覆閥金屬箔片100的氧化層101、一包覆氧化層101的一部分的導電高分子層102、一完全包覆導電高分子層102的碳膠層103、及一完全包覆碳膠層103的銀膠層104。此外,每一個堆疊型電容器10包括一設置在氧化層101的外表面上且圍繞氧化層101的圍繞狀絕緣層105,且堆疊型電容器10的導電高分子層102的長度、碳膠層103的長度及銀膠層104的長度被圍繞狀絕緣層105所限制。更進一步來說,氧化層101的外表面上具有一圍繞區域1010,且堆疊型電容器10的圍繞狀絕緣層105圍繞地設置在氧化層101的圍繞區域1010上且同時接觸導電高分子層102的末端1020、碳膠層103的末端1030及銀膠層104的末端1040。然而,本發明所使用的堆疊型電容器10不以上述第一實施例所舉的例子為限。First, as shown in FIG. 1, the capacitor unit 1 provides a plurality of stacked capacitors. The device 10 (only one of the stacked capacitors 10 is shown in FIG. 1) has at least one positive electrode portion P and at least one negative electrode portion N. For example, each of the stacked capacitors 10 includes a valve metal foil 100, an oxide layer 101 completely covering the valve metal foil 100, a conductive polymer layer 102 covering a portion of the oxide layer 101, and a complete package. The carbon glue layer 103 covering the conductive polymer layer 102 and the silver glue layer 104 completely covering the carbon glue layer 103. Further, each of the stacked capacitors 10 includes a surrounding insulating layer 105 disposed on the outer surface of the oxide layer 101 and surrounding the oxide layer 101, and the length of the conductive polymer layer 102 of the stacked capacitor 10, the carbon paste layer 103 The length and length of the silver paste layer 104 are limited by the surrounding insulating layer 105. Further, the outer surface of the oxide layer 101 has a surrounding area 1010, and the surrounding insulating layer 105 of the stacked capacitor 10 is disposed around the surrounding area 1010 of the oxide layer 101 while contacting the conductive polymer layer 102. The end 1020, the end 1030 of the carbon glue layer 103, and the end 1040 of the silver glue layer 104. However, the stacked capacitor 10 used in the present invention is not limited to the example exemplified in the first embodiment described above.
再者,配合圖2至圖5所示,其中圖2為第一導電端子與第二導電端子進行彎折前的上視示意圖,圖3A為第一導電端子與第二導電端子進行彎折前的其中一側視示意圖,圖3B為第一導電端子與第二導電端子進行彎折後的其中一側視示意圖,圖4A為第一導電端子與第二導電端子進行彎折前的另外一側視示意圖,圖4B為第一導電端子與第二導電端子進行彎折後的另外一側視示意圖,圖5為第一導電端子與第二導電端子進行彎折後的底視示意圖。2, FIG. 2 is a top view of the first conductive terminal and the second conductive terminal before being bent, and FIG. 3A is before the first conductive terminal and the second conductive terminal are bent. FIG. 3B is a side view showing the first conductive terminal and the second conductive terminal bent, and FIG. 4A is the other side before the first conductive terminal and the second conductive terminal are bent. 4B is a schematic side view of the first conductive terminal and the second conductive terminal after bending, and FIG. 5 is a bottom view of the first conductive terminal and the second conductive terminal after being bent.
配合上述圖式可知,首先,電容單元1包括多個依序 堆疊且彼此電性連接的堆疊型電容器10,其中每兩個相鄰的堆疊型電容器10的兩個負極部N可透過導電膠11以相互疊堆在一起,且每兩個相鄰的堆疊型電容器10的兩個正極部P可透過焊接層12以相互疊堆在一起(如圖3A與圖3B所示)。再者,封裝單元2包括一包覆電容單元1的封裝體20,其中封裝體20具有一第一側表面201、一與第一側表面201彼此相對應的第二側表面202、一連接於第一側表面201與第二側表面202之間的前表面203、一連接於第一側表面201與第二側表面202之間且與前表面203彼此相對應的後表面204、及一連接於第一側表面201、第二側表面202、前表面203及後表面204之間的底表面205。As can be seen from the above figures, first, the capacitor unit 1 includes a plurality of sequential Stacked capacitors 10 stacked and electrically connected to each other, wherein two negative electrode portions N of each two adjacent stacked capacitors 10 are permeable to the conductive paste 11 to be stacked on each other, and each two adjacent stacked types The two positive pole portions P of the capacitor 10 are permeable to the solder layer 12 to be stacked on each other (as shown in Figs. 3A and 3B). Furthermore, the package unit 2 includes a package body 20 covering the capacitor unit 1. The package body 20 has a first side surface 201, a second side surface 202 corresponding to the first side surface 201, and a connection a front surface 203 between the first side surface 201 and the second side surface 202, a rear surface 204 connected between the first side surface 201 and the second side surface 202 and corresponding to the front surface 203, and a connection A bottom surface 205 between the first side surface 201, the second side surface 202, the front surface 203, and the back surface 204.
另外,導電單元3包括至少一第一導電端子31及至少一與第一導電端子31彼此分離的第二導電端子32。第一導電端子31具有一電性連接於堆疊型電容器10的正極部P且被包覆在封裝體20內的第一內埋部310及一連接於第一內埋部310的第一裸露部311,且第一裸露部311裸露地設置在封裝體20外且沿著封裝體20的第一側表面201與底表面205延伸。第二導電端子32具有一電性連接於堆疊型電容器10的負極部N且被包覆在封裝體20內的第二內埋部320、一連接於第二內埋部320的第二側裸露部321、一連接於第二內埋部320的第二前裸露部322、及一連接於第二內埋部320的第二後裸露部323,其中第二側裸露部321裸露地設置在封裝體20外且沿著封裝體20的第二側表面202與底表面205延伸,第二前裸露部322裸露地設置在封裝體20外且沿著封裝體20的前表面 203與底表面205延伸,且第二後裸露部323裸露地設置在封裝體20外且沿著封裝體20的後表面204與底表面205延伸。In addition, the conductive unit 3 includes at least one first conductive terminal 31 and at least one second conductive terminal 32 separated from the first conductive terminal 31 from each other. The first conductive terminal 31 has a first embedded portion 310 electrically connected to the positive electrode portion P of the stacked capacitor 10 and covered in the package 20 and a first exposed portion connected to the first embedded portion 310. 311 , and the first exposed portion 311 is exposed outside the package body 20 and extends along the first side surface 201 and the bottom surface 205 of the package body 20 . The second conductive terminal 32 has a second buried portion 320 electrically connected to the negative portion N of the stacked capacitor 10 and covered in the package 20, and a second side connected to the second embedded portion 320. a second front exposed portion 322 connected to the second embedded portion 320 and a second rear exposed portion 323 connected to the second embedded portion 320, wherein the second side exposed portion 321 is barely disposed in the package Outside the body 20 and extending along the second side surface 202 and the bottom surface 205 of the package body 20, the second front exposed portion 322 is barely disposed outside the package body 20 and along the front surface of the package body 20. The bottom surface 205 extends 203 and the second rear exposed portion 323 is exposed outside the package body 20 and extends along the back surface 204 and the bottom surface 205 of the package body 20.
舉例來說,如圖3B所示,第一裸露部311具有一從第一內埋部310向下彎折且沿著封裝體20的第一側表面201延伸的第一延伸段3110及一從第一延伸段3110向內彎折且沿著封裝體20的底表面205延伸的第一焊接段3111,且第二側裸露部321具有一從第二內埋部320向下彎折且沿著封裝體20的第二側表面202延伸的第二側延伸段3210及一從第二側延伸段3210向內彎折且沿著封裝體20的底表面205延伸的第二側焊接段3211。如圖4B所示,第二前裸露部322具有一從第二內埋部320向下彎折且沿著封裝體20的第二前表面203延伸的第二前延伸段3220及一從第二前延伸段3220向內彎折且沿著封裝體20的底表面205延伸的第二前焊接段3221,且第二後裸露部323具有一從第二內埋部320向下彎折且沿著封裝體20的第二後表面204延伸的第二後延伸段3230及一從第二後延伸段3230向內彎折且沿著封裝體20的底表面205延伸的第二後焊接段3231。另外,如圖5所示,第二前焊接段3221與第二後焊接段3231設置於第一焊接段3111與第二側焊接段3211之間,且第二前焊接段3221與第二後焊接段3231皆遠離第一焊接段3111且鄰近第二側焊接段3211。由於本發明提供第二側焊接段3211、第二前焊接段3221、第二後焊接段3231來作為負極焊墊,所以本發明的負極焊墊面積可有效被提升。For example, as shown in FIG. 3B, the first exposed portion 311 has a first extension 3110 and a slave extending downward from the first embedded portion 310 and extending along the first side surface 201 of the package 20. The first extension 3110 is bent inwardly and along the bottom surface 205 of the package 20, and the second side exposed portion 321 has a downward bend from the second embedded portion 320 and along A second side extension 3210 of the second side surface 202 of the package 20 extends and a second side weld segment 3211 that is bent inwardly from the second side extension 3210 and extends along the bottom surface 205 of the package 20. As shown in FIG. 4B, the second front exposed portion 322 has a second front extension 3220 that is bent downward from the second embedded portion 320 and extends along the second front surface 203 of the package 20, and a second from the second The front extension 3220 is bent inwardly and along the bottom front surface 205 of the package 20, and the second rear exposed portion 323 has a downward bend from the second embedded portion 320 and along A second rear extension 3230 of the second rear surface 204 of the package 20 extends and a second rear weld section 3231 extending inwardly from the second rear extension 3230 and extending along the bottom surface 205 of the package 20. In addition, as shown in FIG. 5, the second front welding section 3221 and the second rear welding section 3231 are disposed between the first welding section 3111 and the second side welding section 3211, and the second front welding section 3221 and the second rear welding section 321. The segments 3231 are all remote from the first weld segment 3111 and adjacent to the second side weld segment 3211. Since the present invention provides the second side welding section 3211, the second front welding section 3221, and the second rear welding section 3231 as the negative electrode pads, the anode pad area of the present invention can be effectively improved.
更進一步來說,本創作第一實施例提供一種具有多個 負極引出腳的堆疊型固態電解電容器封裝結構的製作方法,其包括下列步驟:首先,配合圖1與圖2所示,將多個堆疊型電容器10電性連接於至少一第一導電端子31及至少一第二導電端子32之間,其中每一個堆疊型電容器10具有至少一正極部P及至少一負極部N,第一導電端子31具有一電性連接於堆疊型電容器10的正極部P的第一內埋部310及一連接於第一內埋部310的第一裸露部311,第二導電端子32具有一電性連接於堆疊型電容器10的負極部N的第二內埋部320、一連接於第二內埋部320的第二側裸露部321、一連接於第二內埋部320的第二前裸露部322、及一連接於第二內埋部320的第二後裸露部323(S100)。Further, the first embodiment of the present invention provides a plurality of The manufacturing method of the stacked solid-state electrolytic capacitor package structure of the negative lead pin comprises the following steps: First, the plurality of stacked capacitors 10 are electrically connected to the at least one first conductive terminal 31 and shown in FIG. 1 and FIG. The at least one second conductive terminal 32 has a positive electrode portion P and at least one negative electrode portion N. The first conductive terminal 31 has a positive electrode portion P electrically connected to the stacked capacitor 10. a first embedded portion 310 and a first exposed portion 311 connected to the first embedded portion 310. The second conductive terminal 32 has a second embedded portion 320 electrically connected to the negative portion N of the stacked capacitor 10. a second side exposed portion 321 connected to the second embedded portion 320, a second front exposed portion 322 connected to the second embedded portion 320, and a second rear exposed portion connected to the second embedded portion 320 323 (S100).
接著,配合圖2、圖3A與圖4A所示,透過模壓成型(compression molding),以形成一封裝體20以包覆電容單元1、第一導電端子31的第一內埋部310及第二導電端子32的第二內埋部320,其中封裝體20具有一第一側表面201、一與第一側表面201彼此相對應的第二側表面202、一連接於第一側表面201與第二側表面202之間的前表面203、一連接於第一側表面201與第二側表面202之間且與前表面203彼此相對應的後表面204、及一連接於第一側表面201、第二側表面202、前表面203及後表面204之間的底表面205,且第一裸露部311、第二側裸露部321、第二前裸露部322及第二後裸露部323皆裸露地設置在封裝體20外(S102)。Next, as shown in FIG. 2, FIG. 3A and FIG. 4A, a package body 20 is formed to cover the capacitor unit 1, the first embedded portion 310 of the first conductive terminal 31, and the second portion by compression molding. a second embedded portion 320 of the conductive terminal 32, wherein the package body 20 has a first side surface 201, a second side surface 202 corresponding to the first side surface 201, and a first side surface 201 and a first side surface 201 a front surface 203 between the two side surfaces 202, a rear surface 204 connected between the first side surface 201 and the second side surface 202 and corresponding to the front surface 203, and a first side surface 201, a bottom surface 205 between the second side surface 202, the front surface 203, and the rear surface 204, and the first exposed portion 311, the second side exposed portion 321, the second front exposed portion 322, and the second rear exposed portion 323 are barely exposed It is disposed outside the package 20 (S102).
最後,配合圖3B、圖4B及圖5所示,彎折第一裸露部311、第二側裸露部321、第二前裸露部322及第二後裸 露部323,其中第一裸露部311沿著封裝體20的第一側表面201與底表面205延伸,第二側裸露部321沿著封裝體20的第二側表面202與底表面205延伸,第二前裸露部322沿著封裝體20的前表面203與底表面205延伸,且第二後裸露部323沿著封裝體20的後表面204與底表面205延伸(S104)。Finally, as shown in FIG. 3B, FIG. 4B and FIG. 5, the first exposed portion 311, the second side exposed portion 321, the second front exposed portion 322, and the second rear bare portion are bent. The exposed portion 323, wherein the first exposed portion 311 extends along the first side surface 201 and the bottom surface 205 of the package body 20, and the second side exposed portion 321 extends along the second side surface 202 and the bottom surface 205 of the package body 20, The second front exposed portion 322 extends along the front surface 203 and the bottom surface 205 of the package 20, and the second rear exposed portion 323 extends along the rear surface 204 and the bottom surface 205 of the package 20 (S104).
請參閱圖7所示,本創作第二實施例提供一種具有多個負極引出腳的堆疊型固態電解電容器封裝結構,其包括:一電容單元1、一封裝單元2及一導電單元3。由圖7與圖3B的比較可知,第二實施例與第一實施例最大的差別在於:在第二實施例中,多個堆疊型電容器10中的其中一部分堆疊型電容器10A依序堆疊且彼此電性連接於第二內埋部320的上方,且多個堆疊型電容器10中的另外一部分堆疊型電容器10B依序堆疊且彼此電性連接於第二內埋部320的下方。舉例來說,每兩個相鄰的堆疊型電容器(10A或10B)的兩個負極部N可透過導電膠11以相互疊堆在一起,且每兩個相鄰的堆疊型電容器(10A或10B)的兩個正極部P可透過焊接層12以相互疊堆在一起。Referring to FIG. 7 , a second embodiment of the present invention provides a stacked solid electrolytic capacitor package structure having a plurality of negative electrode lead pins, including: a capacitor unit 1 , a package unit 2 , and a conductive unit 3 . 7 and FIG. 3B, the greatest difference between the second embodiment and the first embodiment is that, in the second embodiment, a part of the stacked capacitors 10A of the plurality of stacked capacitors 10 are sequentially stacked and mutually connected. The other part of the stacked capacitors 10B is sequentially stacked and electrically connected to each other under the second embedded portion 320. For example, two negative electrode portions N of every two adjacent stacked capacitors (10A or 10B) are permeable to the conductive paste 11 to be stacked on each other, and each two adjacent stacked capacitors (10A or 10B) The two positive electrode portions P are permeable to the solder layer 12 to be stacked on each other.
本發明實施例所提供的堆疊型固態電解電容器封裝結構及其製作方法,其可透過“所述第一裸露部沿著所述封裝體的所述第一側表面與所述底表面延伸,所述第二側裸露部沿著所述封裝體的所述第二側表面與所述底表面延伸,所述第二前裸露部沿著所述封裝體的所述前表面與所述底表面延伸,且所述第二後裸露部沿著所述封裝體的
所述後表面與所述底表面延伸”的設計,以使得本發明的堆疊型固態電解電容器封裝結構及其製作方法能夠同時提供多個負極引出腳,進而有效降低本發明的等效串聯電感(Equivalent Series Inductance,ESL),尤其是在高頻區域。下表為習知只具有2個外露焊接段(2 PIN結構)與本發明擁有4個外露焊接段(4 PIN結構,其包括第一焊接段3111、第二側焊接段3211、第二前焊接段3221及第二後焊接段3231)在不同頻率(KHz)下所量測到的ESL(nH)值的比較關係:
以上所述僅為本發明之較佳可行實施例,非因此侷限本發明之專利範圍,故舉凡運用本發明說明書及圖式內容所為之等效技術變化,均包含於本發明之範圍內。The above are only the preferred embodiments of the present invention, and are not intended to limit the scope of the invention, and the equivalents of the invention are included in the scope of the invention.
1‧‧‧電容單元1‧‧‧Capacitor unit
10、10A、10B‧‧‧堆疊型電容器10, 10A, 10B‧‧‧ stacked capacitors
100‧‧‧閥金屬箔片100‧‧‧ valve metal foil
101‧‧‧氧化層101‧‧‧Oxide layer
1010‧‧‧圍繞區域1010‧‧‧ Around the area
102‧‧‧導電高分子層102‧‧‧ Conductive polymer layer
1020‧‧‧末端End of 1020‧‧
103‧‧‧碳膠層103‧‧‧carbon layer
1030‧‧‧末端End of 1030‧‧
104‧‧‧銀膠層104‧‧‧Silver layer
1040‧‧‧末端End of 1040‧‧
105‧‧‧圍繞狀絕緣層105‧‧‧round insulation
11‧‧‧導電膠11‧‧‧Conductive adhesive
12‧‧‧焊接層12‧‧‧welding layer
P‧‧‧正極部P‧‧‧ positive part
N‧‧‧負極部N‧‧‧Negative section
2‧‧‧封裝單元2‧‧‧Package unit
20‧‧‧封裝體20‧‧‧Package
201‧‧‧第一側表面201‧‧‧ first side surface
202‧‧‧第二側表面202‧‧‧Second side surface
203‧‧‧前表面203‧‧‧ front surface
204‧‧‧後表面204‧‧‧Back surface
205‧‧‧底表面205‧‧‧ bottom surface
3‧‧‧導電單元3‧‧‧Conducting unit
31‧‧‧第一導電端子31‧‧‧First conductive terminal
310‧‧‧第一內埋部310‧‧‧First Internal Department
311‧‧‧第一裸露部311‧‧‧First exposed department
3110‧‧‧第一延伸段3110‧‧‧First extension
3111‧‧‧第一焊接段3111‧‧‧First welding section
32‧‧‧第二導電端子32‧‧‧Second conductive terminal
320‧‧‧第二內埋部320‧‧‧Second Internal Department
321‧‧‧第二側裸露部321‧‧‧ second side exposed part
3210‧‧‧第二側延伸段3210‧‧‧Second extension
3211‧‧‧第二側焊接段3211‧‧‧Second side welding section
322‧‧‧第二前裸露部322‧‧‧Second former exposed department
3220‧‧‧第二前延伸段3220‧‧‧Second front extension
3221‧‧‧第二前焊接段3221‧‧‧Second front welding section
323‧‧‧第二後裸露部323‧‧‧Second post exposed department
3230‧‧‧第二後延伸段3230‧‧‧second extension
3231‧‧‧第二後焊接段3231‧‧‧Second post welding section
圖1為本創作第一實施例的電容單元的剖面示意圖。1 is a schematic cross-sectional view showing a capacitor unit of a first embodiment of the present invention.
圖2為本創作第一實施例的第一導電端子與第二導電端 子進行彎折前的上視示意圖。2 is a first conductive terminal and a second conductive end of the first embodiment of the present invention The top view of the child before bending.
圖3A為本發明第一實施例的第一導電端子與第二導電端子進行彎折前的其中一側視示意圖。3A is a side elevational view of the first conductive terminal and the second conductive terminal before being bent according to the first embodiment of the present invention.
圖3B為本發明第一實施例的第一導電端子與第二導電端子進行彎折後的其中一側視示意圖。FIG. 3B is a side elevational view showing the first conductive terminal and the second conductive terminal bent according to the first embodiment of the present invention. FIG.
圖4A為本發明第一實施例的第一導電端子與第二導電端子進行彎折前的另外一側視示意圖。4A is another side view of the first conductive terminal and the second conductive terminal before being bent according to the first embodiment of the present invention.
圖4B為本發明第一實施例的第一導電端子與第二導電端子進行彎折後的另外一側視示意圖。FIG. 4B is another schematic side view showing the first conductive terminal and the second conductive terminal being bent according to the first embodiment of the present invention. FIG.
圖5為本創作第一實施例的第一導電端子與第二導電端子進行彎折後的底視示意圖。FIG. 5 is a bottom plan view showing the first conductive terminal and the second conductive terminal of the first embodiment of the present invention being bent.
圖6為本創作第一實施例的堆疊式固態電解電容器封裝結構的製作方法的流程圖。6 is a flow chart of a method of fabricating a stacked solid electrolytic capacitor package structure according to a first embodiment of the present invention.
圖7為本創作第二實施例的第一導電端子與第二導電端子進行彎折後的其中一側視示意圖。FIG. 7 is a side elevational view showing the first conductive terminal and the second conductive terminal of the second embodiment of the present invention being bent.
1‧‧‧電容單元1‧‧‧Capacitor unit
10‧‧‧堆疊型電容器10‧‧‧Stacked capacitors
P‧‧‧正極部P‧‧‧ positive part
N‧‧‧負極部N‧‧‧Negative section
2‧‧‧封裝單元2‧‧‧Package unit
20‧‧‧封裝體20‧‧‧Package
3‧‧‧導電單元3‧‧‧Conducting unit
31‧‧‧第一導電端子31‧‧‧First conductive terminal
310‧‧‧第一內埋部310‧‧‧First Internal Department
311‧‧‧第一裸露部311‧‧‧First exposed department
32‧‧‧第二導電端子32‧‧‧Second conductive terminal
320‧‧‧第二內埋部320‧‧‧Second Internal Department
321‧‧‧第二側裸露部321‧‧‧ second side exposed part
322‧‧‧第二前裸露部322‧‧‧Second former exposed department
323‧‧‧第二後裸露部323‧‧‧Second post exposed department
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CN104299788A (en) * | 2014-10-28 | 2015-01-21 | 钰邦电子(无锡)有限公司 | Manufacturing method of solid electrolytic capacitor packaging structure for improvement of conductive terminals |
CN105810439A (en) * | 2015-10-27 | 2016-07-27 | 钰邦电子(无锡)有限公司 | Matrix arrangement type stack solid electrolytic capacitor packaging structure and manufacturing method thereof |
CN105810440A (en) * | 2015-10-27 | 2016-07-27 | 钰邦电子(无锡)有限公司 | Stack type solid electrolytic capacitor packaging structure and manufacturing method thereof |
CN107958786A (en) * | 2016-10-14 | 2018-04-24 | 钰邦电子(无锡)有限公司 | Stacked solid electrolytic capacitor encapsulating structure and preparation method thereof |
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TW201103052A (en) * | 2009-07-10 | 2011-01-16 | Apaq Technology Co Ltd | Lamellar stacked solid electrolytic condenser |
TWM393775U (en) * | 2010-06-18 | 2010-12-01 | Apaq Technology Co Ltd | Stacked solid electrolytic condenser |
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