TWI469386B - Light emitting diode and method for making the same - Google Patents
Light emitting diode and method for making the same Download PDFInfo
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本發明涉及一種發光二極體,尤其涉及一種可提高發光效率的發光二極體以及該發光二極體的製作方法。The present invention relates to a light emitting diode, and more particularly to a light emitting diode capable of improving luminous efficiency and a method of fabricating the same.
發光二極體(Light Emitting Diode,LED)是一種可將電流轉換成特定波長範圍的光的半導體元件。發光二極體以其亮度高、工作電壓低、功耗小、易與積體電路匹配、驅動簡單、壽命長等優點,從而可作為光源而廣泛應用於照明領域。A Light Emitting Diode (LED) is a semiconductor component that converts current into light of a specific wavelength range. The light-emitting diode is widely used in the field of illumination because of its high brightness, low operating voltage, low power consumption, easy matching with integrated circuits, simple driving, and long life.
LED通常包括p型半導體層、活性層及n型半導體層。在LED兩端施加電壓,空穴與電子將會於活性層複合,輻射出光子。LED在應用過程中所面臨的一個問題是其出光效率問題。由於在活性層中有電流通過才能產生光子,因此LED的出光效率與電流在LED器件表面的分佈均勻性有很大關係。一種提高LED出光效率的方法是在電極下方外延生長一層電流擴展層,利用電流擴展層使注入電流橫向擴展,從而使電流在器件表面分佈均勻,從而提高其出光效率。這種方法的一個不足之處在於,電流擴展層的厚度與LED器件的面積成正比關係,LED器件的面積越大,所需電流擴展層就越厚。由於現有的外延生長技術較難獲得厚度較大,摻雜濃度較高的電流擴展層,使到電流擴展層的橫向電流擴展能力有限。The LED typically includes a p-type semiconductor layer, an active layer, and an n-type semiconductor layer. Applying a voltage across the LED, holes and electrons will recombine in the active layer, radiating photons. One of the problems faced by LEDs in the application process is their light extraction efficiency. Since the photons are generated by the passage of current in the active layer, the light extraction efficiency of the LED has a great relationship with the uniformity of current distribution on the surface of the LED device. One method for improving the light-emitting efficiency of the LED is to epitaxially grow a current spreading layer under the electrode, and use the current spreading layer to laterally expand the injection current, so that the current is evenly distributed on the surface of the device, thereby improving the light-emitting efficiency. One disadvantage of this method is that the thickness of the current spreading layer is proportional to the area of the LED device. The larger the area of the LED device, the thicker the current spreading layer is. Since the existing epitaxial growth technique is difficult to obtain a current spreading layer having a large thickness and a high doping concentration, the lateral current spreading capability to the current spreading layer is limited.
有鑒於此,有必要提供一種具有較高發光效率的發光二極體。In view of this, it is necessary to provide a light-emitting diode having higher luminous efficiency.
一種發光二極體,其包括一個導熱基板及依次在導熱基板表面形成的半導體層、透明電極層與電極接觸墊。該半導體層包括在導熱基板上依次層疊設置的p型半導體層、活性層及n型半導體層。透明電極層與電極接觸墊設置在n型半導體層的表面。在n型半導體層與活性層相對的表面設置有多個蝕刻孔洞,在最靠近電極接觸墊的地方蝕刻孔洞的分佈密度最高,沿遠離電極接觸墊的方向上蝕刻孔洞的分佈密度逐漸變小且蝕刻孔洞的尺寸亦逐漸變小。在p型半導體層與活性層相對的表面上設置有電流阻擋層,該電流阻擋層的圖案與蝕刻孔洞的圖案成互補關係。A light emitting diode comprising a heat conductive substrate and a semiconductor layer, a transparent electrode layer and an electrode contact pad formed on the surface of the heat conductive substrate in sequence. The semiconductor layer includes a p-type semiconductor layer, an active layer, and an n-type semiconductor layer which are sequentially stacked on a thermally conductive substrate. The transparent electrode layer and the electrode contact pad are disposed on the surface of the n-type semiconductor layer. A plurality of etching holes are disposed on a surface of the n-type semiconductor layer opposite to the active layer, and a distribution density of the etching holes is highest at a position closest to the electrode contact pads, and a distribution density of the etching holes is gradually smaller in a direction away from the electrode contact pads. The size of the etched holes is also gradually reduced. A current blocking layer is disposed on a surface of the p-type semiconductor layer opposite to the active layer, and the pattern of the current blocking layer is complementary to the pattern of the etched holes.
一種發光二極體的製作方法,其步驟為:A method for manufacturing a light-emitting diode, the steps of which are:
提供一個藍寶石基板;Providing a sapphire substrate;
在藍寶石基板上依次形成n型半導體層、活性層及p型半導體層;Forming an n-type semiconductor layer, an active layer, and a p-type semiconductor layer sequentially on the sapphire substrate;
在p型半導體層表面蝕刻出電流阻擋層所需的圖案,然後在圖案中填充電絕緣介質,形成電流阻擋層;Etching a pattern required for the current blocking layer on the surface of the p-type semiconductor layer, and then filling the pattern with an electrically insulating medium to form a current blocking layer;
在p型半導體層表面沉積一層反射層;Depositing a reflective layer on the surface of the p-type semiconductor layer;
將p型半導體層與導熱基板結合,移除藍寶石基板;Bonding the p-type semiconductor layer to the thermally conductive substrate to remove the sapphire substrate;
對n型半導體層的表面進行蝕刻,形成所需的蝕刻孔洞,該蝕刻孔洞的圖案與電流阻擋層的圖案成互補關係;Etching the surface of the n-type semiconductor layer to form a desired etched hole, the pattern of the etched hole being complementary to the pattern of the current blocking layer;
在n型半導體層表面製作透明電極層;Forming a transparent electrode layer on the surface of the n-type semiconductor layer;
在透明電極層表面製作電極接觸墊。An electrode contact pad is formed on the surface of the transparent electrode layer.
與現有技術相比,本發明藉由在靠近電極接觸墊的地方設置分佈密度較高與尺寸較大的蝕刻孔洞,而在遠離電極接觸墊的地方設置分佈密度較低與尺寸較小的蝕刻孔洞,來驅使電流朝遠離電流接觸墊的方向流動,使電流分佈均勻。原因在於靠近電極接觸墊的地方,因為蝕刻孔洞的分佈密度較高即阻值較大,從而驅動電流朝蝕刻孔洞分佈密度較小即阻值較小的地方擴散。從而使電流沿著電流接觸墊向周圍擴散。同時,為了使正對著被蝕刻部分的活性層亦有電流流過,在p型半導體層表面設置與蝕刻孔洞圖案成互補關係的電流阻擋層,使電流因為電流阻擋層的作用往兩邊擴散,即讓電流在活性層上分佈均勻,從而提高整個器件的發光效率。Compared with the prior art, the present invention provides an etch hole having a lower distribution density and a smaller size at a place away from the electrode contact pad by providing an etch hole having a higher distribution density and a larger size near the electrode contact pad. , to drive the current to flow away from the current contact pad, so that the current distribution is uniform. The reason is that it is close to the electrode contact pad, because the distribution density of the etched hole is high, that is, the resistance value is large, and the driving current is diffused toward a place where the etching hole density is small, that is, the resistance value is small. Thereby the current is spread to the surroundings along the current contact pads. At the same time, in order to make a current flow through the active layer facing the etched portion, a current blocking layer is formed on the surface of the p-type semiconductor layer in a complementary relationship with the etched hole pattern, so that the current spreads to both sides due to the action of the current blocking layer. That is, the current is evenly distributed on the active layer, thereby improving the luminous efficiency of the entire device.
下面以具體的實施例對本發明作進一步地說明。The invention is further illustrated by the following specific examples.
請參見圖1,本發明實施例的發光二極體包括一個導熱基板11及依次在導熱基板11表面形成的p型半導體層121、活性層122及n型半導體層123。同時,該發光二極體還包括透明電極層13與電極接觸墊14。Referring to FIG. 1, a light emitting diode according to an embodiment of the present invention includes a heat conductive substrate 11 and a p-type semiconductor layer 121, an active layer 122, and an n-type semiconductor layer 123 which are sequentially formed on the surface of the heat conductive substrate 11. At the same time, the light emitting diode further includes a transparent electrode layer 13 and an electrode contact pad 14.
導熱基板11由具有高導熱率的材料製成,其可以是採用銅、鋁、鎳、銀、金等金屬材料或者任意兩種以上金屬所形成的合金所製成的基板,或者是採用導熱性能好的陶瓷基板如矽基板、鍺基板。在本實施例中,導熱基板11為具有高導熱效率的金屬鎳層。The heat conductive substrate 11 is made of a material having high thermal conductivity, and may be a substrate made of a metal material such as copper, aluminum, nickel, silver, gold or the like, or an alloy formed of any two or more metals, or a thermal conductivity. A good ceramic substrate such as a tantalum substrate or a tantalum substrate. In the present embodiment, the thermally conductive substrate 11 is a metallic nickel layer having high thermal conductivity.
p型半導體層121、活性層122及n型半導體層123依次層疊在導熱基板11上。該半導體層的製作材料包括氮化鎵、氮化鋁鎵、氮化銦鎵。在本實施例中,半導體層由氮化鎵材料製成。The p-type semiconductor layer 121, the active layer 122, and the n-type semiconductor layer 123 are sequentially laminated on the thermally conductive substrate 11. The material for fabricating the semiconductor layer includes gallium nitride, aluminum gallium nitride, and indium gallium nitride. In this embodiment, the semiconductor layer is made of a gallium nitride material.
透明電極層13設置在n型半導體層123的表面,該透明電極層13採用ITO(Indium Tin Oxide)透明導電膜製成。使用該透明電極層13不會阻擋本發光二極體的出射光線,從而提高發光二極體的出光效率。在本實施例中,透明電極層13的形狀與n型半導體層123的表面形狀相一致。The transparent electrode layer 13 is provided on the surface of the n-type semiconductor layer 123, and the transparent electrode layer 13 is made of an ITO (Indium Tin Oxide) transparent conductive film. The use of the transparent electrode layer 13 does not block the light emitted from the light-emitting diode, thereby improving the light-emitting efficiency of the light-emitting diode. In the present embodiment, the shape of the transparent electrode layer 13 coincides with the surface shape of the n-type semiconductor layer 123.
電極接觸墊14設置在透明電極層13的表面,作為發光二極體與外界電源的連接區域。該n型接觸墊14由銀、金、銅、鋁等金屬材料製成。在本實施例中,電極接觸墊14設置在發光二極體的中心位置。The electrode contact pad 14 is disposed on the surface of the transparent electrode layer 13 as a connection region between the light emitting diode and the external power source. The n-type contact pad 14 is made of a metal material such as silver, gold, copper or aluminum. In the present embodiment, the electrode contact pad 14 is disposed at a center position of the light emitting diode.
在n型半導體層123與活性層122相對的表面上設置有多個蝕刻孔洞124,如圖2所示。在離電極接觸墊14最近的地方,蝕刻孔洞124的分佈密度最高。沿遠離電極接觸墊14的方向,蝕刻孔洞124的分佈密度與尺寸逐漸變小,形成一個具有漸變的分佈密度與尺寸的圖案。在本實施例中,蝕刻孔洞124分佈在電極接觸墊14的周圍,蝕刻孔洞124圍成多個不同半徑的圓環型圖案。每個圓環型圖案由相同大小與形狀蝕刻孔洞124組成。本實施例的蝕刻孔洞124的形狀為圓形,該圓形的蝕刻孔洞124在靠近電極接觸墊14的地方上直徑最大。在遠離電極接觸墊14的方向上,蝕刻孔洞124的直徑逐漸變小。並且,沿遠離電極接觸墊14的方向上,各圓環型圖案之間的距離亦越來越大,組成同一個圓環型圖案的蝕刻孔洞124之間的距離亦越來越大。A plurality of etching holes 124 are provided on the surface of the n-type semiconductor layer 123 opposite to the active layer 122, as shown in FIG. The etched holes 124 have the highest density of distribution closest to the electrode contact pads 14. Along the direction away from the electrode contact pads 14, the distribution density and size of the etched holes 124 gradually become smaller, forming a pattern having a gradual distribution density and size. In the present embodiment, the etch holes 124 are distributed around the electrode contact pads 14, and the etch holes 124 enclose a plurality of annular patterns of different radii. Each annular pattern consists of etched holes 124 of the same size and shape. The etched holes 124 of this embodiment are circular in shape, and the circular etched holes 124 have the largest diameter near the electrode contact pads 14. In the direction away from the electrode contact pad 14, the diameter of the etched hole 124 gradually becomes smaller. Moreover, in the direction away from the electrode contact pad 14, the distance between the annular patterns is also larger, and the distance between the etching holes 124 constituting the same annular pattern is also larger.
在n型半導體層123表面設置多個蝕刻孔洞124的作用在於,由於蝕刻孔洞124在靠近電極接觸墊14的分佈密度較大即阻值較大,在遠離電極接觸墊14的地方分佈密度較小即阻值較小,從而驅使電流從蝕刻孔洞124分佈密度較大的地方流向蝕刻孔洞124分佈密度較小的地方,即使電流朝遠離電極接觸墊14的方向流動,使電流分佈均勻,提高發光二極體的發光效率。The effect of providing a plurality of etching holes 124 on the surface of the n-type semiconductor layer 123 is that since the etching holes 124 have a large distribution density near the electrode contact pads 14, that is, the resistance value is large, and the distribution density is small away from the electrode contact pads 14. That is, the resistance value is small, so that the current flows from the place where the density of the etched holes 124 is distributed to the place where the distribution density of the etched holes 124 is small, even if the current flows in a direction away from the electrode contact pad 14, the current distribution is uniform, and the light emission is improved. The luminous efficiency of the polar body.
根據需要,組成圓環型圖案的蝕刻孔洞124的圖案亦可以為正三角形、正方形、正六邊形、正多邊形或者其他規則或者不規則的形狀。該蝕刻孔洞124的尺寸沿著遠離電極接觸墊14的方向逐漸變小。The pattern of the etched holes 124 constituting the annular pattern may also be an equilateral triangle, a square, a regular hexagon, a regular polygon, or other regular or irregular shape, as needed. The size of the etched holes 124 gradually decreases in a direction away from the electrode contact pads 14.
蝕刻孔洞124的深度約為n型半導體層123厚度的1/3到2/3。其目的在於不能使蝕刻孔洞124太過靠近活性層122。如果蝕刻孔洞124過於靠近活性層122的話,在蝕刻孔洞124相應位置上的活性層122將沒有電流通過,使到器件的發光效率降低。因此在蝕刻孔洞124與活性層122之間設置一定的間距使電流分散。以厚度為3μm的n型半導體層123為例,蝕刻孔洞124的厚度最好在1μm到2μm之間,即蝕刻孔洞的深度最好在1μm到2μm之間。The etching hole 124 has a depth of about 1/3 to 2/3 of the thickness of the n-type semiconductor layer 123. The purpose is to prevent the etched holes 124 from being too close to the active layer 122. If the etched holes 124 are too close to the active layer 122, the active layer 122 at the corresponding location of the etched holes 124 will have no current to pass, reducing the luminous efficiency to the device. Therefore, a certain spacing is provided between the etched holes 124 and the active layer 122 to disperse the current. Taking the n-type semiconductor layer 123 having a thickness of 3 μm as an example, the thickness of the etching hole 124 is preferably between 1 μm and 2 μm, that is, the depth of the etching hole is preferably between 1 μm and 2 μm.
活性層122設置在p型半導體層121與n型半導體層123之間,當在p型半導體層121與n型半導體層123之間施加電壓時,活性層122將會有電流通過,即p型半導體層121中的空穴與n型半導體層123中的電子複合,從而輻射出光子。The active layer 122 is disposed between the p-type semiconductor layer 121 and the n-type semiconductor layer 123. When a voltage is applied between the p-type semiconductor layer 121 and the n-type semiconductor layer 123, the active layer 122 will have an electric current, that is, a p-type The holes in the semiconductor layer 121 are recombined with the electrons in the n-type semiconductor layer 123, thereby radiating photons.
p型半導體層121處於活性層122與導熱基板11之間。在p型半導體層121與導熱基板11相接觸的表面設置有電流阻擋層125,該電流阻擋層125由絕緣材料組成。本實施例中電流阻擋層125的材料為二氧化矽材料。該電流阻擋層125圖案與蝕刻孔洞124所組成的圖案成互補關係,即在n型半導體層123表面設置有蝕刻孔洞124的地方,在p型半導體層121的相應位置上就沒有設置電流阻擋層125;而在沒有設置蝕刻孔洞124的地方,在p型半導體層121的相應位置上就設置有電流阻擋層125。The p-type semiconductor layer 121 is between the active layer 122 and the thermally conductive substrate 11. A surface of the p-type semiconductor layer 121 in contact with the thermally conductive substrate 11 is provided with a current blocking layer 125 composed of an insulating material. The material of the current blocking layer 125 in this embodiment is a ceria material. The pattern of the current blocking layer 125 is complementary to the pattern formed by the etched holes 124, that is, where the etched holes 124 are provided on the surface of the n-type semiconductor layer 123, no current blocking layer is provided at the corresponding position of the p-type semiconductor layer 121. 125; Where the etched holes 124 are not provided, a current blocking layer 125 is disposed at a corresponding position of the p-type semiconductor layer 121.
設置電流阻擋層125的作用在於,使到被蝕刻孔洞124遮擋的活性層122部分亦有電流通過。如果沒有電流阻擋層125,當整個發光二極體在通電時,電流將直接從未被蝕刻的n型半導體層123通向其下方相對應的活性層122,然後到達p型半導體層,使到旁邊蝕刻孔洞124所對應的活性層122電流較少。如果在未被蝕刻的n型半導體層123的對應位置設置具有絕緣性能的電流阻擋層125,電流將會在電流阻擋層125的作用下往兩邊擴散,使到旁邊蝕刻孔洞124所對應的活性層122亦有電流通過,使電流在整個活性層122分佈均勻,提高器件的發光效率。The function of the current blocking layer 125 is to allow current to pass through the portion of the active layer 122 that is blocked by the etched holes 124. If there is no current blocking layer 125, when the entire light emitting diode is energized, current will flow directly from the unetched n-type semiconductor layer 123 to the corresponding active layer 122 below, and then reach the p-type semiconductor layer, so that The active layer 122 corresponding to the adjacent etched holes 124 has less current. If a current blocking layer 125 having an insulating property is disposed at a corresponding position of the unetched n-type semiconductor layer 123, the current will be diffused to the both sides by the current blocking layer 125, so that the active layer corresponding to the side etching hole 124 is provided. 122 also has a current passing through, so that the current is evenly distributed throughout the active layer 122, improving the luminous efficiency of the device.
該電流阻擋層125的厚度約為p型半導體層121厚度的1/3到2/3。與n型半導體層123中的蝕刻孔洞124類似,電流阻擋層125不能太過靠近活性層122,原因在於電流阻擋層125與活性層122之間需要預留一定的間距使電流均勻分佈。以厚度為0.3μm的p型半導體層121為例,其電流阻擋層125的厚度最好在0.1μm至0.2μm之間。The current blocking layer 125 has a thickness of about 1/3 to 2/3 of the thickness of the p-type semiconductor layer 121. Similar to the etched holes 124 in the n-type semiconductor layer 123, the current blocking layer 125 cannot be too close to the active layer 122 because a certain spacing needs to be reserved between the current blocking layer 125 and the active layer 122 to evenly distribute the current. Taking the p-type semiconductor layer 121 having a thickness of 0.3 μm as an example, the thickness of the current blocking layer 125 is preferably between 0.1 μm and 0.2 μm.
在本實施例的發光二極體中,設置在n型半導體層123上的蝕刻孔洞124所組成的圖案與設置在p型半導體層123表面的電流阻擋層125的圖案成互補關係。因此在發光二極體的製作過程中需要精確定位。一種定位的方法在發光二極體的任何位置設置定位孔,該定位孔的作用在於確定電流阻擋層125圖案的位置,然後在n型半導體層123上製作蝕刻孔洞124時,使蝕刻孔洞124的圖案與電流阻擋層125的圖案保持互補關係。該定位孔從p型半導體層121延伸到n型半導體層123。事實上,本定位方法並不限於定位孔,其亦可以使用其他定位方法,只要使到蝕刻孔洞124所組成的圖案與電流阻擋層125的圖案成互補關係即可。In the light-emitting diode of the present embodiment, the pattern of the etching holes 124 provided on the n-type semiconductor layer 123 is complementary to the pattern of the current blocking layer 125 provided on the surface of the p-type semiconductor layer 123. Therefore, precise positioning is required in the fabrication process of the light-emitting diode. A positioning method provides a positioning hole at any position of the light emitting diode, the positioning hole functioning to determine the position of the pattern of the current blocking layer 125, and then etching the hole 124 when the etching hole 124 is formed on the n-type semiconductor layer 123 The pattern maintains a complementary relationship with the pattern of current blocking layer 125. The positioning hole extends from the p-type semiconductor layer 121 to the n-type semiconductor layer 123. In fact, the positioning method is not limited to the positioning holes, and other positioning methods may be used as long as the pattern formed by the etching holes 124 is complementary to the pattern of the current blocking layer 125.
根據需要,在p型半導體層121與導熱基板11之間還可以設置一層具有高反射率的反射層15,該反射層15可以是布拉格反射層,亦可以是由銀、鎳、鋁、銅、金等金屬所製成的金屬鏡面反射層。該反射層15的目的在於將活性層122所發出的,朝向p型半導體層121的光線反射,使其從n型半導體層123表面發出,提高整個發光二極體的出光效率。A reflective layer 15 having a high reflectivity may be disposed between the p-type semiconductor layer 121 and the thermally conductive substrate 11 as needed. The reflective layer 15 may be a Bragg reflection layer, or may be made of silver, nickel, aluminum, or copper. A metallic specular reflection layer made of a metal such as gold. The purpose of the reflective layer 15 is to reflect the light emitted from the active layer 122 toward the p-type semiconductor layer 121 and emit it from the surface of the n-type semiconductor layer 123, thereby improving the light-emitting efficiency of the entire light-emitting diode.
下面對上述發光二極體的製作方法進行描述。Next, a method of fabricating the above-described light-emitting diode will be described.
圖3A-圖3I為本實施例發光二極體的製作方法,其步驟包括:3A-3I illustrate a method for fabricating a light-emitting diode according to the embodiment, and the steps thereof include:
參見圖3A,首先提供一個藍寶石基板16;Referring to Figure 3A, a sapphire substrate 16 is first provided;
參見圖3B,採用金屬有機化學氣相沉積法(MOCVD, metal organic chemical vapour deposition)在藍寶石基板16上依次形成n型GaN層123、活性層122與p型GaN層121。Referring to FIG. 3B, an n-type GaN layer 123, an active layer 122, and a p-type GaN layer 121 are sequentially formed on the sapphire substrate 16 by metal organic chemical vapor deposition (MOCVD).
參見圖3C,採用感應耦合式電漿(ICP, Inductive Couple Plasma)蝕刻系統在p型GaN層121的表面蝕刻出所需的電流阻擋層125的圖案凹孔。其蝕刻方法可以是先在p型GaN層121的表面塗上光阻層,然後採用曝光顯影的方法在去除相應的光阻層,然後用ICP蝕刻的方法蝕刻未被光阻層覆蓋的部分,從而在p型GaN層121的表面形成所需電流阻擋層125的圖案。在凹孔上沉積二氧化矽絕緣材料,以形成電流阻擋層125,如圖3D所示。該電流阻擋層125的深度約為p型GaN層121厚度的1/3到2/3。Referring to FIG. 3C, a pattern recess of the current blocking layer 125 is etched on the surface of the p-type GaN layer 121 using an inductive couple plasma (ICP) etching system. The etching method may be that a photoresist layer is first coated on the surface of the p-type GaN layer 121, and then the corresponding photoresist layer is removed by exposure and development, and then the portion not covered by the photoresist layer is etched by ICP etching. Thereby, a pattern of the desired current blocking layer 125 is formed on the surface of the p-type GaN layer 121. A cerium oxide insulating material is deposited on the recessed holes to form a current blocking layer 125 as shown in FIG. 3D. The current blocking layer 125 has a depth of about 1/3 to 2/3 of the thickness of the p-type GaN layer 121.
此時,可以採用ICP蝕刻方法在半導體層的任意位置製作一個定位孔,該定位孔從p型GaN層121延伸到n型GaN層123,用於後續電流阻擋層125與n型GaN層123中蝕刻圖案125的精確定位所用。At this time, a positioning hole may be formed at any position of the semiconductor layer by an ICP etching method, and the positioning hole extends from the p-type GaN layer 121 to the n-type GaN layer 123 for use in the subsequent current blocking layer 125 and the n-type GaN layer 123. The precise positioning of the etched pattern 125 is used.
根據需要,此時可以在p型GaN層121上沉積一層具有高反射率的反射層15,如圖3E所示。該反射層15可以是布拉格反射層,亦可以是由銀、鎳、鋁、銅、金等金屬所製成的金屬鏡面反射層。該反射層15的目的在於將活性層122所發出的,朝向p型GaN層121的光線反射,使其從n型GaN層123表面發出,提高整個發光二極體的出光效率。在本實施例中,反射層15為銀層。金屬層的沉積方法可以藉由電子束、濺射、真空蒸鍍或者電鍍的方式來實現。A reflective layer 15 having a high reflectance may be deposited on the p-type GaN layer 121 as needed, as shown in FIG. 3E. The reflective layer 15 may be a Bragg reflection layer or a metal specular reflection layer made of a metal such as silver, nickel, aluminum, copper or gold. The purpose of the reflective layer 15 is to reflect the light emitted from the active layer 122 toward the p-type GaN layer 121 and emit it from the surface of the n-type GaN layer 123, thereby improving the light-emitting efficiency of the entire light-emitting diode. In the present embodiment, the reflective layer 15 is a silver layer. The method of depositing the metal layer can be achieved by electron beam, sputtering, vacuum evaporation or electroplating.
參見圖3F,將p型GaN層121藉由反射層15與導熱基板11相結合。其結合的方式可以藉由高溫高壓的方式與Si基板或者金屬基板結合,或者是採用電鍍的方式來形成導熱基板11。在本實施例中,採用電鍍的方式在反射層15上電鍍上一層金屬鎳層。採用這層金屬鎳層作為導熱基板11。Referring to FIG. 3F, the p-type GaN layer 121 is bonded to the thermally conductive substrate 11 by the reflective layer 15. The bonding method can be combined with a Si substrate or a metal substrate by a high temperature and high pressure method, or a thermally conductive substrate 11 can be formed by electroplating. In the present embodiment, a layer of metallic nickel is electroplated on the reflective layer 15 by electroplating. This layer of metallic nickel is used as the thermally conductive substrate 11.
參見圖3G,將藍寶石基板16與上述結構剝離。其剝離方法可以採用機械切割或者採用電磁輻射使半導體層分解又或者是鐳射切割的方法。在本實施例中,採用准分子鐳射切割的方法剝離藍寶石基板16。使n型GaN層123顯露出來。Referring to Fig. 3G, the sapphire substrate 16 is peeled off from the above structure. The stripping method may be a method of mechanically cutting or using electromagnetic radiation to decompose the semiconductor layer or laser cutting. In the present embodiment, the sapphire substrate 16 is peeled off by excimer laser cutting. The n-type GaN layer 123 is exposed.
參見圖3H,採用ICP蝕刻方法在n型GaN層123的表面蝕刻出具有漸變的分佈密度與尺寸的蝕刻孔洞124,該蝕刻孔洞124所組成的圖案與電流阻擋層125的圖案成互補關係。即在n型半導體層123表面設置有蝕刻孔洞124的地方,在p型半導體層121的相應位置上就沒有設置電流阻擋層125;而在沒有設置蝕刻孔洞124的地方,在p型半導體層121的相應位置上就設置有電流阻擋層125。該圖案層125蝕刻的深度約為n型GaN層123厚度的1/3到2/3。Referring to FIG. 3H, an etched hole 124 having a graded distribution density and size is etched on the surface of the n-type GaN layer 123 by an ICP etching method, and the pattern of the etched holes 124 is complementary to the pattern of the current blocking layer 125. That is, where the etching hole 124 is provided on the surface of the n-type semiconductor layer 123, the current blocking layer 125 is not provided at the corresponding position of the p-type semiconductor layer 121; and where the etching hole 124 is not provided, the p-type semiconductor layer 121 is provided. A current blocking layer 125 is disposed at a corresponding location. The pattern layer 125 is etched to a depth of about 1/3 to 2/3 of the thickness of the n-type GaN layer 123.
參見圖3I,在n型GaN層123的表面沉積透明電極層13,該透明電極層13的完全覆蓋n型GaN層123的表面,透明電極層13的圖案形狀與n型GaN層123的表面形狀相一致,同時亦與電流阻擋層125的圖案相一致。即具有透明電極層13圖案的地方,在p型半導體層121相應的位置上就設置有電流阻擋層125。Referring to FIG. 3I, a transparent electrode layer 13 is deposited on the surface of the n-type GaN layer 123, the surface of the transparent electrode layer 13 completely covering the surface of the n-type GaN layer 123, the pattern shape of the transparent electrode layer 13 and the surface shape of the n-type GaN layer 123. Consistent, it also coincides with the pattern of the current blocking layer 125. That is, where the pattern of the transparent electrode layer 13 is provided, the current blocking layer 125 is provided at a corresponding position of the p-type semiconductor layer 121.
事實上,亦可以先在n型GaN層123的表面沉積透明電極層13,然後再藉由ICP蝕刻方法在n型GaN層123的表面蝕刻出漸變密度與尺寸的蝕刻圖案125。In fact, the transparent electrode layer 13 may be deposited on the surface of the n-type GaN layer 123, and then an etched pattern 125 of a graded density and size is etched on the surface of the n-type GaN layer 123 by an ICP etching method.
根據需要,還可以在透明電極層13表面製作一個n型接觸墊14,如圖3J所示,作為發光二極體與外界電源的連接區域。該n型接觸墊14由銀、金、銅、鋁、鎳等金屬或者以上任意兩種金屬所形成的合金製成。在本實施例中,n型接觸墊14採用銀層接觸墊。If necessary, an n-type contact pad 14 may be formed on the surface of the transparent electrode layer 13, as shown in FIG. 3J, as a connection region between the light-emitting diode and the external power source. The n-type contact pad 14 is made of a metal such as silver, gold, copper, aluminum, or nickel or an alloy of any two of the above. In the present embodiment, the n-type contact pad 14 is a silver layer contact pad.
在上述的製作過程中,在離電極接觸墊14最近的地方,蝕刻孔洞124的分佈密度最高。在遠離電極接觸墊14的方向上,蝕刻孔洞124的分佈密度與尺寸逐漸變小,形成一個具有漸變的分佈密度與尺寸的圖案。在本實施例中,蝕刻孔洞124分佈在電極接觸墊14的周圍,蝕刻孔洞124圍成多個不同半徑的圓環型圖案。每個圓環型圖案由相同大小與形狀蝕刻孔洞124組成。本實施例的蝕刻孔洞124的形狀為圓形,該圓形的蝕刻孔洞124在靠近電極接觸墊14的地方上直徑最大。在遠離電極接觸墊14的方向上,蝕刻孔洞124的直徑逐漸變小。並且,沿遠離電極接觸墊14的方向上,各圓環型圖案之間的距離亦越來越大,組成同一個圓環型圖案的蝕刻孔洞124之間的距離亦越來越大。In the fabrication process described above, the etched holes 124 have the highest density of distribution closest to the electrode contact pads 14. In a direction away from the electrode contact pads 14, the distribution density and size of the etched holes 124 gradually become smaller, forming a pattern having a gradual distribution density and size. In the present embodiment, the etch holes 124 are distributed around the electrode contact pads 14, and the etch holes 124 enclose a plurality of annular patterns of different radii. Each annular pattern consists of etched holes 124 of the same size and shape. The etched holes 124 of this embodiment are circular in shape, and the circular etched holes 124 have the largest diameter near the electrode contact pads 14. In the direction away from the electrode contact pad 14, the diameter of the etched hole 124 gradually becomes smaller. Moreover, in the direction away from the electrode contact pad 14, the distance between the annular patterns is also larger, and the distance between the etching holes 124 constituting the same annular pattern is also larger.
根據需要,組成圓環型圖案的蝕刻孔洞124的圖案亦可以為正三角形、正方形、正六邊形、正多邊形或者其他規則或者不規則的形狀。該蝕刻孔洞124的尺寸沿著遠離電極接觸墊14的方向逐漸變小。The pattern of the etched holes 124 constituting the annular pattern may also be an equilateral triangle, a square, a regular hexagon, a regular polygon, or other regular or irregular shape, as needed. The size of the etched holes 124 gradually decreases in a direction away from the electrode contact pads 14.
綜上所述,本發明確已符合發明專利之要件,遂依法提出專利申請。惟,以上所述者僅為本發明之較佳實施方式,自不能以此限制本案之申請專利範圍。舉凡熟悉本案技藝之人士援依本發明之精神所作之等效修飾或變化,皆應涵蓋於以下申請專利範圍內。In summary, the present invention has indeed met the requirements of the invention patent, and has filed a patent application according to law. However, the above description is only a preferred embodiment of the present invention, and it is not possible to limit the scope of the patent application of the present invention. Equivalent modifications or variations made by persons skilled in the art in light of the spirit of the invention are intended to be included within the scope of the following claims.
11‧‧‧導熱基板11‧‧‧thermal substrate
121‧‧‧p型半導體層121‧‧‧p-type semiconductor layer
122‧‧‧活性層122‧‧‧Active layer
123‧‧‧n型半導體層123‧‧‧n type semiconductor layer
13‧‧‧透明電極層13‧‧‧Transparent electrode layer
14‧‧‧電極接觸墊14‧‧‧Electrode contact pads
124‧‧‧蝕刻孔洞124‧‧‧ etching holes
125‧‧‧電流阻擋層125‧‧‧current barrier
15‧‧‧反射層15‧‧‧reflective layer
16‧‧‧藍寶石基板16‧‧‧Sapphire substrate
圖1是本發明實施例的發光二極體的結構示意圖。1 is a schematic structural view of a light emitting diode according to an embodiment of the present invention.
圖2是本發明實施例中的蝕刻孔洞的圖案形狀。Fig. 2 is a view showing the pattern shape of an etched hole in the embodiment of the present invention.
圖3A-圖3J是本發明實施例的發光二極體的製作過程中的剖面示意圖。3A-3J are schematic cross-sectional views showing a process of fabricating a light-emitting diode according to an embodiment of the present invention.
11‧‧‧導熱基板 11‧‧‧thermal substrate
121‧‧‧p型半導體層 121‧‧‧p-type semiconductor layer
122‧‧‧活性層 122‧‧‧Active layer
123‧‧‧n型半導體層 123‧‧‧n type semiconductor layer
13‧‧‧透明電極層 13‧‧‧Transparent electrode layer
14‧‧‧電極接觸墊 14‧‧‧Electrode contact pads
124‧‧‧蝕刻孔洞 124‧‧‧ etching holes
125‧‧‧電流阻擋層 125‧‧‧current barrier
15‧‧‧反射層 15‧‧‧reflective layer
Claims (10)
提供一個藍寶石基板;
在藍寶石基板上依次形成n型半導體層、活性層及p型半導體層;
在p型半導體層表面蝕刻出電流阻擋層所需的圖案,然後在圖案中填充電絕緣介質,形成電流阻擋層;
在p型半導體層表面沉積一層反射層;
將p型半導體層與導熱基板結合,並移除藍寶石基板;
對n型半導體層與活性層相對的表面進行蝕刻,形成所需的蝕刻空洞,蝕刻孔洞所形成的圖案與電流阻擋層的圖案成互補關係;
在n型半導體層表面製作透明電極層;
在透明電極層表面製作電極接觸墊。A method for manufacturing a light-emitting diode, the steps of which are:
Providing a sapphire substrate;
Forming an n-type semiconductor layer, an active layer, and a p-type semiconductor layer sequentially on the sapphire substrate;
Etching a pattern required for the current blocking layer on the surface of the p-type semiconductor layer, and then filling the pattern with an electrically insulating medium to form a current blocking layer;
Depositing a reflective layer on the surface of the p-type semiconductor layer;
Bonding the p-type semiconductor layer to the thermally conductive substrate and removing the sapphire substrate;
Etching the surface of the n-type semiconductor layer opposite to the active layer to form a desired etch hole, and the pattern formed by etching the hole is complementary to the pattern of the current blocking layer;
Forming a transparent electrode layer on the surface of the n-type semiconductor layer;
An electrode contact pad is formed on the surface of the transparent electrode layer.
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US7306964B2 (en) * | 2005-05-10 | 2007-12-11 | Samsung Electro-Mechanics Co., Ltd. | Method of manufacturing a vertically-structured GaN-based light emitting diode |
US20080142824A1 (en) * | 2006-12-18 | 2008-06-19 | Shih-Peng Chen | Electroluminescent device and fabrication method thereof |
TW200847472A (en) * | 2007-05-24 | 2008-12-01 | Genesis Photonics Inc | A vertical-conduction type LED |
TW200910630A (en) * | 2007-08-20 | 2009-03-01 | Delta Electronics Inc | Light-emitting diode apparatus and manufacturing method thereof |
TW200926449A (en) * | 2007-12-14 | 2009-06-16 | Delta Electronics Inc | Light-emitting diode device and manufacturing method thereof |
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