TWI465814B - Liquid crystal display panel - Google Patents

Description

LCD panel

The present invention relates to a display panel, and more particularly to a liquid crystal display panel.

For the rapid advancement of the multimedia society, most of them benefit from the dramatic advancement of semiconductor components or human-machine display devices. In terms of displays, cathode ray tubes (CRTs) have always dominated the display market in recent years due to their excellent display quality and economy. However, for individuals who operate most terminal/display devices on the table, or from an environmental point of view, if there are still many problems in predicting the utilization of space and energy consumption of cathode ray tubes in terms of energy saving, The need for light, thin, short, small, and low power consumption does not provide an effective solution. Therefore, a thin film transistor liquid crystal display panel (TFT-LCD panel) having high image quality, good space utilization efficiency, low power consumption, and no radiation has gradually become the mainstream in the market.

Since the development of liquid crystal displays, many conventional technologies have proposed a technique of directly integrating a color filter film onto a thin film transistor array (COA), which mainly involves the COA substrate and another alignment. The substrate is assembled, and liquid crystal molecules are filled between the two substrates to form a liquid crystal display panel. In general, the liquid crystal layer is filled mainly by a vacuum suction method and a one drop fill (ODF) method. As the size of the liquid crystal display panel becomes larger, it is quite time-consuming to fill the liquid crystal by vacuum suction. Therefore, in the assembly process of a large-sized liquid crystal display panel, a drop-injection method is often used.

Specifically, before the drop-type implantation method, a sealant is formed on the boundary of the display area of the active device array substrate to surround a liquid crystal receiving space. Then, the amount of dropping of the liquid crystal is estimated according to the size of the liquid crystal accommodating space and the cell gap of the two substrates, and a specific volume of liquid crystal is dropped into the liquid crystal accommodating space. Finally, the active device array substrate and the color filter substrate are aligned and assembled, and the sealant is cured to seal the liquid crystal between the two substrates.

1 is a schematic cross-sectional view of a conventional liquid crystal display panel. Referring to FIG. 1 , the liquid crystal display panel 100 includes an active device array substrate 110 , an opposite substrate 120 disposed opposite to the active device array substrate 110 , and a liquid crystal layer 130 disposed therebetween. The thickness of the liquid crystal layer 130 . The display quality of the liquid crystal display panel 100 is deteriorated when the distance D1 varies depending on the distance D1 between the active device array substrate 110 and the opposite substrate 120.

As shown in FIG. 1 , the color filter layer 126 is disposed on the opposite substrate 120 , and the opposite substrate 120 includes a black matrix layer 122 and a plurality of spacers 124 , wherein the color filter layer 126 is interposed between the spacers 124 and black. Between the matrix layers 122, the spacers 124 extend between the active device array substrate 110 and the color filter layer 126. Therefore, the deviation of the distance D1 between the liquid crystal display panels 200 mainly comes from the thickness variation amount Δa1 of the black matrix layer 122, the height variation amount Δb1 of the spacers 124, and the thickness variation amount Δc1 of the color filter layer 126.

2 is a schematic cross-sectional view of another conventional liquid crystal display panel. Referring to FIG. 2 , the liquid crystal display panel 200 includes an active device array substrate 210 , an opposite substrate 220 disposed opposite to the active device array substrate 210 , and a liquid crystal layer 230 disposed therebetween. The color filter layer 216 is disposed. The active substrate array substrate 210 is integrated, and the opposite substrate 220 includes a black matrix layer 222 and a plurality of spacers 224 , and the spacers 224 extend between the active device array substrate 210 and the opposite substrate 220 . Therefore, the deviation of the distance D2 between the liquid crystal display panels 200 mainly comes from the thickness variation amount Δa2 of the black matrix layer 222, the height variation amount Δb2 of the spacer 224, and the thickness variation amount Δc2 of the color filter layer 216.

It is to be noted that since the structure of the black matrix layer 222 and the spacer 224 in FIG. 2 is similar to the black matrix layer 122 and the spacer 124 in FIG. 1, the variation Δa1 is the same as the variation Δa2, and the variation is Δb1 is the same as the variation Δb2. However, since the color filter layer 216 is conformally formed on the stacked film of the active device array substrate 210, the thickness variation Δc2 (shown in FIG. 2) of the color filter layer 216 is more than the color filter. The thickness variation Δc1 (shown in FIG. 1) of the optical layer 126 is large. In other words, in the liquid crystal display panel 200 of FIG. 2 (ie, COA architecture), when the deviation of the pitch D2 (ie, the sum of Δa2, Δb2, and Δc2) increases beyond the allowable range of the liquid crystal drop amount (LC margin) At this time, the liquid crystal layer 230 is failed to be injected, which in turn affects the manufacturing yield and display quality of the liquid crystal display panel 200.

The present invention provides a liquid crystal display panel having a small variation in pitch.

The invention provides a liquid crystal display panel comprising an active device array substrate, a pair of substrates and a liquid crystal layer. The active device array substrate includes a first substrate, a pixel array, and a color filter layer. The pixel array is disposed on the first substrate. The color filter layer covers the pixel array, wherein the color filter layer has a plurality of openings. The opposite substrate includes a second substrate and a plurality of spacers. The plurality of spacers are disposed on the second substrate, wherein each of the spacers extends into one of the openings of the color filter layer. The liquid crystal layer is located between the active device array substrate and the opposite substrate.

In an embodiment of the present invention, the pixel array includes a plurality of pixels arranged in an array, and each pixel is an In-Plane Switch pixel and a Split Vertically Aligned pixel. ), Multi-Domain Vertically Aligned Pixels, and TN pixels.

In an embodiment of the invention, the color filter layer comprises a plurality of color filter patterns, and the color filter pattern corresponds to a pixel distribution, and each of the openings is located in one of the color filter patterns.

In an embodiment of the invention, the color filter layer includes a plurality of color filter patterns, and the color filter pattern corresponds to a pixel distribution, and each of the openings is located at a boundary between two adjacent color filter patterns. At the office.

In an embodiment of the invention, the opposite substrate further includes a black matrix layer disposed on the second substrate, and the spacer is disposed on the black matrix layer and extends to one of the openings of the color filter layer in.

In an embodiment of the invention, the opposite substrate further includes a common electrode covering the second substrate and the black matrix layer, and the spacer is disposed on the common electrode and extends to one of the color filter layers. In the opening.

In an embodiment of the invention, the opposite substrate further includes a common electrode covering the second substrate, and the spacer is disposed on the common electrode and extends into one of the openings of the color filter layer.

In an embodiment of the invention, each of the spacers has a contact surface in contact with the active device array substrate, and the width of the contact surface is less than or equal to 20 micrometers.

In an embodiment of the invention, each of the openings has a first end and a second end, the width of the first end being greater than the width of the second end, and the width of the second end being greater than the width of the contact surface.

In an embodiment of the invention, each of the first ends has a width W1, and each of the second ends has a width W2 and W1-W2 > 5 microns.

Based on the above, the variation in the distance between the liquid crystal display panels of the present invention is related to the thickness variation of the black matrix layer and the height variation of the spacer, and is almost independent of the thickness variation of the color filter layer. Therefore, the liquid crystal display panel of the present invention can have a small inter-distance deviation, thereby having better manufacturing yield and display quality.

The above described features and advantages of the present invention will be more apparent from the following description.

[First Embodiment]

3A is a schematic cross-sectional view of a liquid crystal display panel according to an embodiment of the present invention, and FIG. 3B is a top view of the liquid crystal display panel of FIG. 3A. Referring to FIG. 3A and FIG. 3B , the liquid crystal display panel 300 of the present embodiment includes an active device array substrate 310 , an opposite substrate 320 disposed opposite to the active device array substrate 310 , and an active device array substrate 310 and an opposite substrate. A liquid crystal layer 330 between 320. The active device array substrate 310 includes a first substrate 312, a pixel array 314, and a color filter layer 316. The pixel array 314 is disposed on the first substrate 312 and between the color filter layer 316 and the first substrate 312. In addition, the pixel array 314 includes a plurality of arrays of pixels P, and each pixel P may be an In-Plane Switch pixel, a Split Vertically Aligned Pixel, and a multi-domain vertical. Multi-Domain Vertically Aligned pixels and Twisted Nematic pixels. The In-Plane Switch pixel further includes another morphing pixel, such as a fringe field switching pixel. It should be noted that this application does not limit the form of pixels, and other pixel types can also be applied to this application. In this embodiment, the pixel P has three sub-pixels 316A, 316B, and 316C arranged in parallel, but the embodiment is not limited thereto.

The pixel array 314 further includes a plurality of scan lines SL and a plurality of data lines DL, and the respective pixels P and the corresponding scan lines SL and the corresponding data lines DL are electrically connected, respectively. connection. In this embodiment, the pixel array 314 may be formed by stacking a plurality of thin films. For example, the pixel array 314 includes a first patterned conductive layer M1, a first insulating layer GI, a semiconductor layer SE, and a second layer. The patterned conductive layer M2, a protective layer PV, and a pixel electrode PE. The first patterned conductive layer M1 includes a plurality of gates GE and a plurality of scan lines SL electrically connected to the gates GE. The first insulating layer GI covers the first patterned conductive layer M1 and the first substrate 312. The semiconductor layer SE includes a plurality of channel layers CH separated from each other and a plurality of liners L, wherein each channel layer CH is respectively located above the corresponding gate GE, and the first insulating layer GI is located at the channel layer CH and the first pattern The conductive layers M1 are disposed between the conductive layers M1, and the lining layers L are respectively located on a portion of the first insulating layer GI corresponding to the scan lines SL. The second patterned conductive layer M2 includes a plurality of source electrodes S, a plurality of drain electrodes D disposed opposite to the source S, and a plurality of data lines DL electrically connected to the source S, wherein the source S and the drain D are mutually connected Electrically insulated, and partially covered on the corresponding channel layer CH, in addition, the source S and the drain D are respectively located on opposite sides of the corresponding channel layer CH, and each source S is electrically connected to the corresponding data line DL . Further, the data line DL and the scanning line SL are alternately arranged. In the present embodiment, the lining layer L is located on a portion of the first insulating layer GI where the data line DL and the scanning line SL are staggered. Here, the gate GE, the first insulating layer GI, the channel layer CH, the source S, and the drain D constitute a plurality of active elements T for driving the pixel array 314. This embodiment is exemplified by a bottom gate type active element in which the gate GE is below the channel layer CH, but is not limited thereto. In other embodiments, a top gate active element having a gate GE above the channel layer CH can also be used. In addition, the protective layer PV covers the active device T, the data line DL, and the first insulating layer GI, and the pixel electrode PE covers the portion of the protective layer PV.

A color filter layer 316 covers the pixel array 314. In this embodiment, the partial color filter layer 316 is located between the pixel electrode PE and the protective layer PV. In other embodiments, the protective layer PV may selectively cover the active device T, the data line DL, and the first insulating layer GI. At this time, the color filter layer 316 directly covers the active device T, the data line DL, and the first insulating layer GI without the protective layer PV. In addition, the active device array substrate 310 preferably further includes a second insulating layer 318 covering the color filter layer 316 for isolating the color filter layer 316 and the liquid crystal layer 330. Moreover, in other embodiments, the second insulating layer 318 can selectively cover the color filter layer 316. At this time, the color filter layer 316 is not isolated from the liquid crystal layer 330. In addition, when the second insulating layer 318, the color filter layer 316, and the protective layer PV are simultaneously present, there is a through hole V which is turned on, and the through hole V exposes the drain D of the active device T, and the pixel electrode PE Connected to the drain D through the through hole V. When the second insulating layer 318 and the color filter layer 316 are simultaneously present without the protective layer PV, there is a through hole V which is turned on, and the through hole V exposes the drain D of the active device T, and the pixel electrode PE Connected to the drain D through the through hole V. Or when the color filter layer 316 and the protective layer PV are simultaneously present without the second insulating layer 318, there is a through hole V which is turned on, and the through hole V exposes the drain D of the active device T, and the pixel electrode The PE is connected to the drain D through the through hole V.

Further, the color filter layer 316 includes a plurality of color filter patterns, and the color filter patterns correspond to the pixel P distribution. In the present embodiment, the color filter pattern includes, for example, a red filter pattern 316a, a green filter pattern 316b, and a blue filter pattern 316c, and each of the color filter patterns is distributed corresponding to the sub-pixels 316A, 316B, and 316C. For example, the red filter pattern 316a corresponds to the sub-pixel 316A distribution, the green filter pattern 316b corresponds to the sub-pixel 316B distribution, and the blue filter pattern 316c corresponds to the sub-pixel 316C distribution. Of course, this embodiment is not intended to limit the number of color filter patterns and/or sub-pixels of the present invention or the color of the color filter pattern. In addition, the color filter layer 316 has a plurality of openings W, and the openings W expose a portion of the pixel array 314. In the present embodiment, the opening W exposes a portion of the protective layer PV, but the embodiment does not limit the film layer of the pixel array 314 exposed by the opening W. In other words, the opening W can also expose other layers under the protective layer PV.

In this embodiment, each of the openings W is located, for example, at a boundary of two adjacent color filter patterns. Specifically, the openings W are located, for example, at the intersection of the data line DL and the scan line SL, respectively. Of course, this embodiment does not limit the position of the opening W. In other embodiments, the aperture W can also be located in the color filter pattern. Further, the opening W is, for example, located on the scanning line SL of the pixel array 314.

The opposite substrate 320 includes a second substrate 322 and a plurality of spacers 324. The material of the spacers 324 is, for example, a photoresist material, and the shape thereof is, for example, a square column shape, a rectangular column shape, a circular column shape, or an elliptical column shape. , regular polygonal column or irregular polygonal column. In addition, a plurality of spacers 324 are disposed on the second substrate 322 , and each of the spacers 324 extends into one of the openings W of the color filter layer 316 .

In this embodiment, a black matrix layer 326 and a common electrode 328 may be further disposed on the opposite substrate 320, wherein the common electrode 328 is located between the black matrix layer 326 and the liquid crystal layer 330, and the common electrode 328 covers the black matrix layer 326. And a second substrate 322. Further, the spacers 324 are disposed on the common electrode 328 on the black matrix layer 326 and extend into one of the openings W of the color filter layer 316. Of course, in another embodiment, the black matrix layer may not be disposed at the second substrate where the spacer is located, and the spacer is disposed on the common electrode and extends into one of the openings of the color filter layer.

It is to be noted that the liquid crystal display panel 300 of the present embodiment can be extended into the opening W of the color filter layer 316 by the spacer 324, and the variation of the pitch D3 and the thickness variation Δa3 of the black matrix layer 326 and The height variation Δb3 of the spacer 324 is almost independent of the thickness variation of the color filter layer 316, thereby reducing the variation of the pitch D3, so that the liquid crystal display panel 300 has better manufacturing yield and display quality.

In addition, each of the spacers 324 has a contact surface C that is in contact with the active device array substrate 310, and each of the openings W has a first end P1 and a second end P2, wherein the width W1 of the first end P1 is substantially larger than The width of the two ends P2 is W2. In the present embodiment, the difference (W1-W2) between the width W2 and the width W1 is, for example, substantially greater than 5 μm. Further, the width W2 of the second end P2 is greater than the width WC of the contact surface C, wherein the width WC of the contact surface C is, for example, substantially less than or equal to 20 micrometers. Since the width WC of the contact surface C is smaller than the width W2 of the second end P2, the reliability of the liquid crystal display panel 300 of the present embodiment is preferable. Specifically, when the liquid crystal display panel 300 is subjected to the lateral force, since the width WC of the contact surface C is substantially smaller than the width W2 of the second end P2, the spacer 324 has a slidable space.

[Second embodiment]

4A is a cross-sectional view of a liquid crystal display panel according to another embodiment of the present invention, and FIG. 4B is a top view of the liquid crystal display panel of FIG. 4A. Referring to FIG. 4A and FIG. 4B, the liquid crystal display panel 400 of the present embodiment has a similar structure to the liquid crystal display panel 300 of FIG. 3A and FIG. 3B, and similar reference numerals denote similar and identical components, but the difference between the two The openings W of the liquid crystal display panel 400 are respectively located in one of the color filter layers 316' (316A', 316B', and 316C'). In the present embodiment, the opening W is, for example, located on the scanning line 11b. For the sake of illustration, FIG. 4B and FIG. 4B only show that the opening W is located in the red filter pattern 316a, but the embodiment is not limited thereto.

In summary, the present invention can arrange openings on the color filter layer corresponding to the spacers, and extend the spacers between the opposite substrate and the pixel array of the active device array substrate to make the pitch deviation. It is related to the thickness variation of the black matrix layer and the height variation of the spacer, and is almost independent of the thickness variation of the color filter layer. Therefore, the liquid crystal display panel of the present invention can have a small inter-distance deviation, thereby having better manufacturing yield and display quality.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.

100, 200, 300, 400. . . LCD panel

110, 210, 310. . . Active device array substrate

120, 220, 320. . . Counter substrate

122, 222, 326. . . Black matrix layer

124, 224, 324. . . Interstitial

126, 216, 316, 316'. . . Color filter layer

130, 230, 330. . . Liquid crystal layer

312. . . First substrate

314, 414. . . Pixel array

316A, 316B, 316C, 316A', 316B', 316C'. . . Subpixel

316a. . . Red filter pattern

316b. . . Green filter pattern

316c. . . Blue filter pattern

318. . . Second insulating layer

322. . . Second substrate

328. . . Common electrode

M1. . . First patterned conductive layer

GE. . . Gate

SL. . . Scanning line

GI. . . First insulating layer

SE. . . Semiconductor layer

L. . . lining

CH. . . Channel layer

M2. . . Second patterned conductive layer

S. . . Source

D. . . Bungee

DL. . . Data line

PV. . . The protective layer

PE. . . Pixel electrode

△a1, △b1, △c1, △a2, △b2, △c2, △a3, △b3. . . variation

C. . . Contact surfaces

D1, D2, D3. . . spacing

P. . . Pixel

P1. . . First end

P2. . . Second end

W. . . Opening

W1, W2, W3. . . width

T. . . Active component

V. . . Through hole

A-A’, B-B’. . . Section line

1 is a schematic cross-sectional view of a conventional liquid crystal display panel.

2 is a schematic cross-sectional view of a conventional COA liquid crystal display panel.

3A is a cross-sectional view of a liquid crystal display panel according to an embodiment of the present invention.

FIG. 3B is a top view of the liquid crystal display panel of FIG. 3A.

4A is a cross-sectional view of a liquid crystal display panel according to another embodiment of the present invention.

4B is a top plan view of the liquid crystal display panel of FIG. 4A.

300. . . LCD panel

310. . . Active device array substrate

320. . . Counter substrate

324. . . Interstitial

326. . . Black matrix layer

312. . . First substrate

314. . . Pixel array

316. . . Color filter layer

316a. . . Red filter pattern

316b. . . Green filter pattern

318. . . Second insulating layer

322. . . Second substrate

328. . . Common electrode

330. . . Liquid crystal layer

M1. . . First patterned conductive layer

GE. . . Gate

SL. . . Scanning line

GI. . . First insulating layer

SE. . . Semiconductor layer

L. . . lining

CH. . . Channel layer

M2. . . Second patterned conductive layer

S. . . Source

D. . . Bungee

DL. . . Data line

PV. . . The protective layer

PE. . . Pixel electrode

△a3, △b3. . . variation

C. . . Contact surfaces

D3. . . spacing

P1. . . First end

P2. . . Second end

W. . . Opening

W1, W2, W3. . . width

T. . . Active component

V. . . Through hole

A-A’, B-B’. . . Section line

Claims (25)

A liquid crystal display panel comprising: an active device array substrate, comprising: a first substrate; a pixel array disposed on the first substrate, the pixel array comprising a first patterned conductive layer, a semiconductor layer, a second patterned conductive layer and a plurality of pixel electrodes; a color filter layer covering the pixel array, wherein the color filter layer has a plurality of openings, wherein each of the openings is located in the first pattern And a plurality of spacers disposed on the second substrate, wherein each of the spacers extends to the color One of the openings of the filter layer, and each of the spacers corresponds to the corresponding overlap below the opening; and a liquid crystal layer between the active device array substrate and the opposite substrate. The liquid crystal display panel of claim 1, wherein the pixel array comprises a plurality of pixels arranged in an array, and each of the pixels is a planar conversion pixel, a separation vertical alignment pixel, and a multi-domain vertical alignment picture. Prime, twisting nematic pixels. The liquid crystal display panel of claim 1, wherein the color filter layer comprises a plurality of color filter patterns, and the color filter patterns The case corresponds to the pixel distributions, and each of the openings is located in one of the color filter patterns. The liquid crystal display panel of claim 1, wherein the color filter layer comprises a plurality of color filter patterns, and the color filter patterns correspond to the pixel distributions, and each of the openings is located The junction of two adjacent color filter patterns. The liquid crystal display panel of claim 1, wherein the opposite substrate further comprises a black matrix layer disposed on the second substrate, and the spacers are disposed on the black matrix layer and extend to One of the color filter layers is in the opening. The liquid crystal display panel of claim 5, wherein the opposite substrate further comprises a common electrode covering the second substrate and the black matrix layer, and the spacers are disposed on the common electrode. And extending into one of the openings of the color filter layer. The liquid crystal display panel of claim 1, wherein the opposite substrate further comprises a common electrode covering the second substrate, and the spacers are disposed on the common electrode and extend to the color One of the openings in the filter layer. The liquid crystal display panel of claim 1, wherein each of the spacers has a contact surface in contact with the active device array substrate, and the width of the contact surface is less than or equal to 20 micrometers. The liquid crystal display panel of claim 8, wherein each of the openings has a first end and a second end, the first end has a width greater than a width of the second end, and the second end has a width greater than The width of the contact surface degree. The liquid crystal display panel of claim 9, wherein each of the first ends has a width W1, and each of the second ends has a width W2 and a W1-W2 > 5 μm. The liquid crystal display panel of claim 1, wherein the first patterned conductive layer comprises a plurality of gates and a plurality of scan lines respectively connected to the gates. The liquid crystal display panel of claim 1, wherein the second patterned conductive layer comprises a plurality of sources, a plurality of drains disposed opposite the sources, and a plurality of strips respectively connected to the sources. a data line, wherein the source and the drain are separated from each other, and the source and the drain partially cover a corresponding one of the semiconductor layers. The liquid crystal display panel of claim 1, wherein each of the spacers does not overlap the color filter layer. A liquid crystal display panel comprising: an active device array substrate, comprising: a first substrate; a pixel array disposed on the first substrate, the pixel array comprising a first patterned conductive layer, a semiconductor layer, a second patterned conductive layer and a plurality of pixel electrodes, wherein the semiconductor layer comprises: a channel layer above the corresponding gate; and a liner layer on the first patterned conductive layer and the second pattern Between the conductive layers, and the lining layer and the channel layer are separated from each other; a color filter layer covering the pixel array, the color filter layer Having a plurality of openings, wherein each of the openings is located at an overlap of the first patterned conductive layer and the liner; the pair of substrates includes: a second substrate; a plurality of spacers disposed on the second On the substrate, each of the spacers extends into one of the openings of the color filter layer, and each of the spacers corresponds to the corresponding overlap below the corresponding opening; and a liquid crystal layer is located at the active Between the element array substrate and the opposite substrate. The liquid crystal display panel of claim 14, wherein the color filter layer comprises a plurality of color filter patterns, and the color filter patterns correspond to the pixel distributions, and each of the openings is located One of the color filter patterns. The liquid crystal display panel of claim 14, wherein the color filter layer comprises a plurality of color filter patterns, and the color filter patterns correspond to the pixel distributions, and each of the openings is located The junction of two adjacent color filter patterns. The liquid crystal display panel of claim 14, wherein the opposite substrate further comprises a black matrix layer disposed on the second substrate, and the spacers are disposed on the black matrix layer and extend to One of the color filter layers is in the opening. The liquid crystal display panel of claim 17, wherein the opposite substrate further comprises a cover on the second substrate and the black matrix layer And a common electrode disposed on the common electrode and extending into one of the openings of the color filter layer. The liquid crystal display panel of claim 14, wherein the opposite substrate further comprises a common electrode covering the second substrate, and the spacers are disposed on the common electrode and extend to the color One of the openings in the filter layer. The liquid crystal display panel of claim 14, wherein each of the spacers has a contact surface in contact with the active device array substrate, and the width of the contact surface is less than or equal to 20 micrometers. The liquid crystal display panel of claim 14, wherein each of the openings has a first end and a second end, the first end has a width greater than a width of the second end, and the second end has a width greater than The width of the contact surface. The liquid crystal display panel of claim 21, wherein each of the first ends has a width W1, and each of the second ends has a width W2 and a W1-W2 > 5 μm. The liquid crystal display panel of claim 14, wherein the first patterned conductive layer comprises a plurality of gates and a plurality of scan lines respectively connected to the gates. The liquid crystal display panel of claim 14, wherein the second patterned conductive layer comprises a plurality of sources, a plurality of drains disposed opposite the sources, and a plurality of cathodes respectively connected to the sources. a data line, wherein the source and the drain are separated from each other, and the source and the drain partially cover the corresponding channel layer. The liquid crystal display panel of claim 14, wherein each of the spacers does not overlap the color filter layer.