TWI465715B - Method for testing the solder in through hole of printed circuit board - Google Patents

Description

Test method for solder in the hole of circuit board

The invention relates to a test method for a circuit board, in particular to a test method for solder defects such as solder cracks in a hole of a circuit board after tin-spraying or tin deficiency in a hole.

As a common surface coating form for circuit board surface treatment, spray tin is widely used in the production of wires. The quality of spray tin directly affects the quality and solderability of subsequent customers during production. The quality of tin has become a focus of quality control for circuit board manufacturers.

When tin is sprayed into the hole of a thick circuit board, the solder is often difficult to enter the hole due to the high viscosity of the solder, so that the tin in the hole is poor, and the tin is deficient in some areas. In addition, due to stress, etc., solder in the hole is also prone to defects such as solder cracks. Defects such as solder cracks in the holes or tin deficiency in the holes often lead to a decrease in the reliability of the board, so these defects must be found during board testing. It is difficult to detect the crack in the solder or the tin in the hole by the appearance inspection. It is generally necessary to make a slice and observe it with a microscope. The production of the slice is cumbersome, and generally requires glue filling, solidification, rough grinding, fine grinding, etc. The process can be observed under the microscope, and the production of the slice requires a certain amount of experience and technology. It is difficult to make the slice by the inexperienced operator. It is difficult to smooth the slice and evenly, and the quality of the slice is good or bad. The correctness of the quality study and judgment of the sliced samples.

In view of this, it is necessary to provide a test method for soldering in the hole of a circuit board which is easy to operate.

A method for testing solder in a hole in a circuit board, comprising the steps of: providing a circuit board to be tested, the circuit board to be tested comprising a substrate, the substrate having an opposite first surface and a second surface, the substrate The upper opening is provided with a through hole penetrating the first surface and the second surface, the hole wall of the through hole is plated with a hole copper layer, and the first surface is formed with a first annular copper layer surrounding the through hole, The second surface is formed with a second annular copper layer surrounding the through hole, the first annular copper layer, the hole copper layer and the second annular copper layer are seamlessly connected, the first Forming a seamlessly connected first tin-spraying layer, a second tin-spraying layer, and a third tin-spraying layer on the surfaces of the annular copper layer, the porous copper layer, and the second annular copper layer; The resistance value between a tin-spraying layer and a third tin-spraying layer is recorded as R1; the circuit board to be tested is immersed in an alkaline etching solution, and then taken out and cleaned and dried, and the alkaline etching liquid is used. The components include ammonia water, ammonium chloride and copper chloride, and the pH of the alkaline etching solution ranges from 7.8 to 9.0; the first spray is measured again The resistance value between the layer and the third tin-spraying layer is recorded as R2; and the calculated ratio ΔR=(R2-R1)/R1. If the ratio ΔR is greater than a set value, it is determined that the second tin-emitting layer has poor soldering. .

A method for testing solder in a hole in a circuit board, comprising the steps of: providing a circuit board to be tested, wherein the circuit board to be tested has opposite first and second surfaces, and is open to penetrate the first surface and the second surface a plurality of through holes, a hole wall of each of the through holes is plated with a hole copper layer, and the first surface is formed with a plurality of first annular copper layers sequentially connected, each of the first annular copper layers surrounding a corresponding pass a hole, and is seamlessly connected to the hole copper layer in the through hole, the second surface is formed with a plurality of second annular copper layers sequentially connected, each second annular copper layer surrounding a corresponding through hole, and Seamlessly connecting with the hole copper layer in the through hole, each first annular copper layer, each hole copper layer and each second annular copper layer are respectively formed with a first tin-spraying layer and a second spraying a tin layer and a third tin-spraying layer; measuring a resistance value between the first tin-spraying layer and the third tin-spraying layer, recorded as R1; immersing the circuit board to be tested in an alkaline etching solution for 1 to 5 minutes After taking out and cleaning and drying, the components of the alkaline etching solution include ammonia water, ammonium chloride and copper chloride, and the alkali The pH of the etching solution is 7.8-9.0; the resistance between the first tin layer and the third tin layer is measured again, recorded as R2; and the ratio ΔR=(R2-R1)/R1 is calculated, if the ratio When ΔR is greater than a set value, it is determined that at least one of the second tin-spraying layers in the plurality of via holes has poor soldering.

The test method for poor soldering in the hole of the circuit board of the technical solution has the following advantages: the change of the resistance value between the first tin-plated layer and the third tin-plated layer or the long wire before and after immersion in the test alkaline etching solution It is judged that there is a defect such as a solder crack in the second tin-plated layer or a tin deficiency in a part of the position, and it is not necessary to make a slice, and the operation is simple, and the test and the result determination can be performed without an empirical technique.

The test method for soldering defects in the hole of the circuit board provided by the technical solution will be further described in detail below with reference to FIG. 1 and the embodiment.

The test method for poor soldering in the hole of the circuit board includes the following steps:

The first step: providing a circuit board 10 to be tested.

Referring to FIG. 2 to FIG. 3, the circuit board 10 to be tested includes a substrate 110. The material of the substrate 110 may be a reinforcing material such as a fiberglass cloth base, a paper base, a composite base, and an arylamine. A resin base material such as a fiber nonwoven fabric base, a synthetic fiber base or the like, or a reinforcing material may be a multilayer circuit board in which an inner layer is formed with a line.

The substrate 110 has a first surface 111 and a second surface 112 opposite to each other. The substrate 110 is provided with a cylindrical through hole 120 penetrating the first surface 111 and the second surface 112. The hole 120 hole wall is plated with a porous copper layer 130. The first surface 111 is formed with a first annular copper layer 140 surrounding the through hole, and the second surface 112 is formed with a second annular copper layer 150 surrounding the through hole, the first ring shape The copper layer 140, the hole copper layer 130, and the second annular copper layer 150 are seamlessly connected. Forming the first annular copper layer 140, the via copper layer 130, and the second annular copper layer 150 in a manner common to circuit board fabrication, that is, prior to the first surface 111 and the The second surface 112 forms the first annular copper layer 140 and the second annular copper layer 150, and then electroplated copper into the through hole 120 to form a hole copper layer 130, and simultaneously the first annular copper The layer 140 and the second annular copper layer 150 are plated with copper to seamlessly connect the first annular copper layer 140, the via copper layer 130, and the second annular copper layer 150. a surface of the first annular copper layer 140, the hole copper layer 130, and the second annular copper layer 150 are respectively formed with a first tin-spraying layer 160, a second tin-spraying layer 170, and a third tin-spraying layer. 180. The first tin-spraying layer 160, the second tin-spraying layer 170, and the third tin-spraying layer 180 are also seamlessly connected.

Wherein, if only the condition of the tin-plated layer in the through hole 120 is detected, the hole copper layer 130 is not electrically connected to the hole copper layer of the other holes on the substrate 110. Of course, it is also possible to test the tin-spraying condition on the copper layer of the plurality of through-hole holes electrically connected to each other, and test the hole copper layer in the plurality of through-holes of the electrical connection as a whole, thereby increasing the sensitivity of the test, and recommending the The circuit board 10 to be tested includes a substrate and ten or more through holes penetrating the substrate, each of the through holes corresponding to a first annular copper layer, a hole copper layer and a second annular copper layer, the substrate The first surface is formed with a plurality of first annular copper layers sequentially connected, each of the first annular copper layers surrounding a corresponding through hole and seamlessly connected with the hole copper layer in the through hole, the substrate The second surface opposite to the first surface is formed with a plurality of second annular copper layers sequentially connected, each second annular copper layer surrounding a corresponding through hole, and a hole copper layer in the through hole The first tin-plated layer, the second tin-sprayed layer and the third tin-sprayed layer are respectively formed on the surface of each of the first annular copper layer, the copper layer of each hole, and the surface of each of the second annular copper layers.

The purpose of the test method is to detect whether the second tin-plated layer 170 has a solder crack or a defect in a part of the tin. Before the test, the first tin-plated layer 160 and the third tin-plated layer need to be determined. If there is a defect such as a solder crack or a partial tin deficiency, if the first tin-plated layer 160 and the third tin-plated layer 180 are defective, the test method of the technical solution cannot be used to determine whether the defect is located in the second spray tin. Layer 170. The defects of the first tin-plated layer 160 and the third tin-plated layer 180 can be detected by the appearance detecting method, and the circuit board 10 to be tested is not required to be sliced.

The second step: measuring the resistance between the first tin-plated layer 160 and the third tin-plated layer 180.

In the present embodiment, the instrument for measuring resistance is a four-wire precision resistance meter. The edge of the first tin-spraying layer 160 away from the opening of the through-hole 120 is used as the first test point 191, and the edge of the third tin-plated layer 180 is away from the edge of the through-hole opening as the second test point 192. The resistance value between the first test point 191 and the second test point 192 is measured and recorded as R1.

It can be understood that the positions of the first test point 191 and the second test point 192 are not limited to the above embodiments, and any point on the first tin-plated layer 160 and the third tin-plated layer 180 may be respectively selected. Any one of the points is used as a test point; the resistance between the first test point 191 and the second test point 192 can also be measured using other types of resistance meters or instruments having a measured resistance function; and, when When testing the copper layer of the hole in the plurality of through holes as a whole, the first annular copper layer, the copper layer of the hole and the second annular copper layer of each of the connected through holes are regarded as a long wire. The measuring point is the two ends of the long wire.

The third step: immersing the circuit board 10 to be tested in an alkaline etching solution for a predetermined time, then taking out and cleaning and drying.

In this embodiment, the main components of the alkaline etching solution are ammonia water, ammonium chloride, copper chloride, wherein the concentration of copper ions ranges from 155±35 g/L, and the concentration of chloride ions ranges from 200±40 g/L. The specific gravity of the alkaline etching solution is 1.21±0.01 (that is, the density of the alkaline etching solution is proportional to the standard atmospheric pressure, the density under pure H2O at 3.98 ° C (999.972 kg/m 3 )), and the range of the pH value. It is 7.8-9.0 and the temperature range is 50 ± 5 °C.

First, the circuit board 10 to be tested is immersed in the alkaline etching solution for 1 minute.

Because the tin is resistant to the corrosion of the weak base, it can withstand the corrosion of the alkaline etching solution in the embodiment, so the first tin-plated layer 160 and the second tin-plated layer 170 in the circuit board 10 to be tested and The third tin-plated layer 180 is not etched by the alkaline etchant. The copper can be etched by the alkaline etching solution in the embodiment. If the second tin-plated layer 170 has solder cracks or defects such as tin deficiency in some places, the alkaline etching solution can be formed by the crack or The voided copper layer 130 is partially etched, and the reaction principle of the porous copper layer 130 and the alkaline etching solution is mainly as follows:

(1) complexation reaction of copper chloride with ammonia water: CuCl ₂ + 4NH ₃ → Cu(NH ₃ ) ₄ Cl ₂ ;

(2) Cu is etched by Cu(NH ₃ ) ₄ ^2- plex ion oxidation reaction: Cu(NH ₃ ) ₄ Cl ₂ +Cu→2Cu(NH ₃ ) ₂ Cl;

Then, the circuit board 10 to be tested is taken out, cleaned with pure water, and then the circuit board 10 to be tested is dried.

Of course, the time for the circuit board 10 to be tested to be immersed in the alkaline etching solution may be 1 minute or more or less than 1 minute, and it is recommended to be 1-5 minutes, which can save time and at the same time enable the copper layer to be fully Etching to improve test sensitivity.

The fourth step: measuring the resistance between the first tin-plated layer 160 and the third tin-plated layer 180 again, determining whether the second tin-plated layer 170 has a solder crack or a portion of the soldering defect such as tin deficiency .

The resistance value between the first test point 191 and the second test point 192 is again measured using a four-wire precision resistance meter and recorded as R2.

Wherein, when the resistance value between the first tin-plated layer 160 and the third tin-plated layer 180 is measured again, the recommended measuring point coincides with the measuring point of the first measurement, or two measurements are performed. The test points are located on the same concentric circle of the first tin-plated layer 160 and the third tin-plated layer 180 to reduce the measurement error.

Calculating a change in resistance between the first tin-plated layer 160 and the third tin-plated layer 180 of the circuit board 10 to be tested before and after soaking the alkaline etching solution (R2-R1) and before immersing the alkaline etching solution The ratio of the resistance value R1 between the first tin-plated layer 160 and the third tin-plated layer 180 is ΔR=(R2-R1)/R1. If the ratio ΔR is greater than a set value, it can be determined that the second tin-plated layer 170 has no solder cracks or defects such as tin deficiency at some locations.

Theoretically, if the second tin-plated layer 170 has no defects such as solder cracks and tin deficiency, the ratio ΔR is equal to 0, and if the second tin-plated layer 170 has a solder crack or a part of the position, there is a defect such as tin deficiency. Then the ratio ΔR is greater than zero. In the actual test, the ratio ΔR may be greater than 0 due to factors such as the accuracy of the measuring instrument, but the second tin-plated layer 170 is not defective in solder cracking or tinning in some positions, or the ratio is Although ΔR is greater than 0, the solder crack or tin deficiency of the second tin-plated layer 170 is within the range permitted by the customer or by industry standards. Therefore, the solder crack or the tin deficiency is generally set to an allowable range, and the ratio ΔR sets an allowable set value. When the ratio ΔR is greater than the set value, the second may be determined. The tin-spraying layer 170 has defects such as solder cracks or tin defects in some places. The set value generally needs to refer to the immersion time of the circuit board 10 to be tested in the alkaline etchant, the allowable solder crack or tin deficiency of the second tin-plated layer 170, and the accuracy of the resistance measuring device. Make settings. In the present embodiment, the set value is 10%, that is, if ΔR ≧ 10%, it is determined that there is a solder crack in the second tin-plated layer 170 or a defect such as tin deficiency in some places, and if ΔR ≦ 10%, Then, it can be determined that the second tin-spraying layer 170 has no defects such as solder cracks or tin deficiency.

It can be understood that if it is required to test the condition of the tin-spray layer in the hole of the plurality of circuit boards to be tested, the plurality of circuit boards to be tested may be first measured by the method as described in the second step, and then the plurality of circuit boards to be tested are tested. At the same time, the alkaline etching solution is immersed, and then the resistance is measured again by using the method as described in the fourth step to obtain the poor soldering condition in the hole of the plurality of circuit boards to be tested.

Compared with the prior art, the manufacturing method of the circuit board with the embedded component of the present technical solution has the following advantages: the first tin-spraying layer 160 and the third tin-spraying layer 180 before and after the immersion in the test alkaline etching solution are used in this embodiment. Between the change in the resistance value, it is judged whether the second tin-plated layer 170 has a solder crack or a part of the position has defects such as tin deficiency, no slicing is required, the operation is simple, and the test and the result determination can be performed without an empirical technique; The average slicing time is more than 15 minutes, and the detection efficiency is low. However, the time for soaking the etching solution in the technical solution is generally completed within 5 minutes, and the detection efficiency is high, and the circuit board to be tested can be compared. A large number of circuit boards 10 to be tested are simultaneously placed in an alkaline etching solution to facilitate batch inspection.

However, the above description is only a preferred embodiment of the present invention, and it is not possible to limit the scope of the patent application of the present invention. Equivalent modifications or variations made by persons skilled in the art in light of the spirit of the invention are intended to be included within the scope of the following claims.

10. . . Circuit board to be tested

110. . . Substrate

111. . . First surface

112. . . Second surface

120. . . Through hole

130. . . Copper layer

140. . . First annular copper layer

150. . . Second annular copper layer

160. . . First tin layer

170. . . Second tin layer

180. . . Third tin layer

191. . . First test point

192. . . Second test point

FIG. 1 is a flow chart of a test method provided by an embodiment of the present technical solution.

The circuit board to be tested is a front view of the circuit board to be tested provided by the embodiment of the present technical solution.

FIG. 3 is a schematic cross-sectional view of a circuit board to be tested provided by an embodiment of the present technical solution.

10. . . Circuit board to be tested

110. . . Substrate

111. . . First surface

112. . . Second surface

120. . . Through hole

130. . . Copper layer

140. . . First annular copper layer

150. . . Second annular copper layer

160. . . First tin layer

170. . . Second tin layer

180. . . Third tin layer

191. . . First test point

192. . . Second test point

Claims (10)

A method for testing solder in a hole in a circuit board, comprising the steps of:
Providing a circuit board to be tested, the circuit board to be tested comprises a substrate, the substrate has opposite first and second surfaces, and the substrate is provided with a through-the-surface and a second surface a hole, the hole wall of the through hole is plated with a hole copper layer, the first surface is formed with a first annular copper layer surrounding the through hole, and the second surface is formed with a second surrounding the through hole a ring-shaped copper layer, the first annular copper layer, the hole copper layer, and the second annular copper layer are seamlessly connected, the first annular copper layer, the hole copper layer, and the first a surface of the second annular copper layer is respectively formed with a first tin-spraying layer, a second tin-spraying layer and a third tin-spraying layer;
Measuring the resistance between the first tin layer and the third tin layer, recorded as R1;
The circuit board to be tested is immersed in an alkaline etching solution, and then taken out and cleaned and dried. The components of the alkaline etching solution include ammonia water, ammonium chloride and copper chloride, and the alkaline etching liquid PH range is 7.8-9.0;
Re-measuring the resistance value between the first tin-spraying layer and the third tin-spraying layer, recorded as R2; and calculating the ratio ΔR=(R2-R1)/R1, if the ratio ΔR is greater than a set value, determining the The second tin-spraying layer has poor soldering. The method for testing solder in a hole in a circuit board according to the first aspect of the invention, wherein the substrate is a resin substrate containing a reinforcing material, a pure resin substrate or a multilayer circuit board in which an inner layer is formed with a line. The method for testing solder in a hole in a circuit board according to the first aspect of the invention, wherein the concentration of copper ions in the alkaline etching solution ranges from 120 to 190 g/L. The method for testing solder in a hole in a circuit board according to the first aspect of the invention, wherein the concentration of the chloride ion in the alkaline etching solution ranges from 160 to 240 g/L. The method for testing solder in a hole in a circuit board according to the first aspect of the invention, wherein the alkaline etching solution has a specific gravity of 1.21±0.01. The method for testing solder in a hole in a circuit board according to claim 1, wherein the alkaline etching solution has a temperature ranging from 45 to 55 °C. The method for testing solder in a hole in a circuit board according to claim 1, wherein the soaking step is performed for 1-5 minutes. The method for testing solder in a hole in a circuit board according to the first aspect of the invention, wherein the ratio ΔR is 10%. The method for testing solder in a hole in a circuit board according to the first aspect of the invention, wherein the instrument for measuring the resistance step is a four-wire precision resistance meter. A method for testing solder in a hole in a circuit board, comprising the steps of:
Providing a circuit board to be tested, the circuit board to be tested has opposite first and second surfaces, and a plurality of through holes penetrating through the first surface and the second surface, and a hole wall of each of the through holes The first surface is formed with a plurality of first annular copper layers connected in sequence, each of the first annular copper layers surrounding a corresponding through hole, and having no copper layer in the through hole a second annular copper layer is sequentially connected to the second surface, and each of the second annular copper layers surrounds a corresponding through hole and is seamlessly connected to the hole copper layer in the through hole. a first tin-emitting layer, a second tin-spraying layer and a third tin-spraying layer are respectively formed on a surface of each of the first annular copper layer, each of the copper-clad layers, and each of the second annular copper layers;
Measuring the resistance between the first tin layer and the third tin layer, recorded as R1;
The circuit board to be tested is taken out in an alkaline etching solution for 1 to 5 minutes, and then taken out and cleaned and dried. The components of the alkaline etching solution include ammonia water, ammonium chloride and copper chloride, and the alkalinity The pH of the etching solution ranges from 7.8 to 9.0;
Re-measuring the resistance value between the first tin-spraying layer and the third tin-spraying layer, recorded as R2; and calculating the ratio ΔR=(R2-R1)/R1, and determining the complex number if the ratio ΔR is greater than a set value At least one of the second tin-spraying layers in the via hole has poor soldering.