TWI462678B - Method of manufacturing printed circuit board - Google Patents

Description

Method of manufacturing a printed circuit board

The present invention generally relates to a printed circuit board and a method of fabricating the same. In particular, the present invention particularly relates to a method of fabricating a printed circuit board having a buried wiring using a stacked substrate.

Printed circuit boards have been widely used in various electronic products as an important component for joining various electronic components in electronic products. With the development of technology, the emergence of high density interconnection (HDI) printed circuit boards has met the requirements for miniaturization and weight reduction of electronic products. Among the current methods of manufacturing high-density interconnected printed circuit boards, any layer inner via hole (ALIVH) technology that uses conductive paste to achieve electrical interconnection is one of the most well-known methods.

However, in the method of conducting via holes in any layer, the conductive paste in the substrate is used to connect the wires between the different layers. However, the material of the conductive paste is mostly a polymer material colloid containing conductive powder, so the conductivity is not as good as that of the metal material. . In addition, the method of the via hole of any layer in the process of fabricating a multilayer wiring is to stack and laminate a plurality of substrates having a copper foil line pattern on each other, so that there is a problem that the fitting error needs to be overcome.

Furthermore, the line produced by the above method is a table protruding from the base of each layer. Face, so for each additional layer of wire, you must add a layer of substrate and a layer of copper foil thickness. When the printed circuit board contains multiple layers of wiring, the thickness of the overall printed circuit board limits the possibility of making the printed circuit board lighter and thinner.

It is an object of the present invention to provide a method of fabricating a printed circuit board having a buried wiring using a stack substrate to shorten the process, save cost, and eliminate the disadvantage of etching the line using yellow light. At the same time, the method of the invention does not use a wet process, and can eliminate the disadvantage of using toxic water to increase environmental pollution.

To achieve the above object, the present invention provides a method of fabricating a printed circuit board. First, a first substrate is provided. The first substrate has an upper surface and a lower surface parallel to each other, and a first carrier is further provided on the upper surface. Next, the first carrier and the first substrate are patterned, and at least one first line pattern is formed on the upper surface of the first substrate. Then, a conductive treatment process is performed to form a first thin conductive layer on the upper surface of the first substrate, which covers the surface of the first line pattern. Then, the electroplating process is performed after the first carrier is removed, and at least one first line is formed on the surface of the first line pattern. Next, the first substrate having the first line is attached to the second substrate that has been pre-wired by the first bonding layer.

In an embodiment of the invention, the lower surface of the first substrate is provided with a second carrier. It is also possible to continue patterning the second carrier while forming at least one second line pattern on the lower surface of the first substrate. Continuing, performing a conductive treatment process to form a first thin conductive layer on the lower surface of the first substrate and covering the second line pattern The surface. Then, after the second carrier is removed, an electroplating process is performed, and at least one second line is formed on the surface of the second line pattern.

In another embodiment of the invention, the step of forming the pre-lined second substrate may be to first provide a second substrate. The second substrate has an upper surface and a lower surface parallel to each other, and the upper surface is provided with a third carrier. Next, the third carrier and the second substrate are patterned, and at least one third line pattern is formed on the upper surface of the second substrate. Then, a conductive treatment process is performed to form a second thin conductive layer covering the surface of the third line pattern on the upper surface of the second substrate. Thereafter, the electroplating process is performed after the third carrier is removed, and at least a third line is formed on the surface of the third line pattern.

In another embodiment of the invention, the lower surface of the second substrate may also have a fourth line. The step of forming the fourth line may be to first pattern the fourth carrier on the lower surface of the second substrate and form at least one fourth line pattern on the lower surface of the second substrate. Then, a conductive treatment process is performed to form a second thin conductive layer covering the surface of the fourth line pattern on the lower surface of the second substrate. Next, after the fourth carrier is removed, an electroplating process is performed, and at least a fourth line is formed on the surface of the fourth line pattern.

In another embodiment of the present invention, the second substrate having the second line may be attached to the pre-lined third substrate by using the second bonding layer.

In another embodiment of the invention, the step of routing the third substrate may be to first provide a third substrate. The third substrate has an upper surface and a lower surface parallel to each other, and the upper surface is further provided with a fifth carrier. Second, the fifth of the pattern The body and the third substrate form at least one fifth line pattern on the upper surface of the third substrate. Then, a conductive treatment process is performed to form a third thin conductive layer on the upper surface of the third substrate, which covers the surface of the fifth line pattern. Then, after the fifth carrier is removed, an electroplating process is performed, and at least a fifth line is formed on the surface of the fifth line pattern.

In another embodiment of the invention, the lower surface of the third substrate may also have a sixth line. The step of forming the sixth line may be to first pattern the sixth carrier on the lower surface of the third substrate and form at least a sixth line pattern on the lower surface of the third substrate. Then, a conductive treatment process is performed to form a third thin conductive layer on the lower surface of the third substrate, which covers the surface of the sixth line pattern. Continuing, the electroplating process is performed after the sixth carrier is removed, and at least a sixth line is formed on the surface of the sixth line pattern.

In another embodiment of the present invention, a plurality of first substrates having a first line, a plurality of adhesive layers, and a plurality of second substrates having a third line may be combined to form a laminated printed circuit board. In the laminated printed circuit board, any of the adhesive layers may cause the first substrate having the first line or the second substrate having the third line to be attached to the first substrate having the first line or having the fifth line One of the third bases.

In another embodiment of the invention, in a laminated printed circuit board, the first substrate having the first line in turn has a second line.

In another embodiment of the invention, in the laminated printed circuit board, the second substrate having the third line in turn has a fourth line.

In another embodiment of the present invention, the first substrate and the second substrate are The third substrate may be a soft substrate or a rigid substrate.

In another embodiment of the present invention, at least one of the first substrate, the second substrate and the third substrate may be a polyimide (PI) film or a polyethylene naphthalate (PEN) film. , polypropylene (PP) plate or liquid crystal polymer (LCP) film.

In another embodiment of the present invention, the hole forming step can be continued to form a through hole. The vias connect at least two of the adjacent first substrate, the lined second substrate, and the lined third substrate.

In another embodiment of the present invention, the conducting step may be further performed such that the via is electrically connected to the adjacent first substrate, the lined second substrate, or the lined third substrate.

In another embodiment of the present invention, the process of patterning the first carrier and the first substrate can be accomplished by a laser process.

In another embodiment of the present invention, after patterning the first carrier and the first substrate, the method further includes performing a desmear process on the first substrate.

In another embodiment of the present invention, the conductive treatment process includes an electroless copper deposition process, an electroless nickel process, an immersion silver process, a blackhole process, Shadow process, synthesize catalytic ink process, nano copper material ink-jet printing Process) or nano copper material screen printing process.

In another embodiment of the present invention, the first line pattern, the third line pattern, and the fifth line pattern respectively comprise at least one of a via pattern, a blind via pattern, or a buried pattern.

Since the present invention first forms a wiring pattern in the substrate and then fills the formed wiring pattern with a metal material, the wiring in the printed circuit board of the present invention is embedded in the substrate, which can reduce the overall thickness of the printed circuit board, and The electrical components such as the wires or via holes in the substrate are made of a metal material, so that the characteristics and reliability of the conductive gas can be greatly improved. The invention utilizes an adhesive layer to directly bond the lined substrate, and can complete the manufacture of the printed circuit board by a simple process.

The present invention will be further understood by those of ordinary skill in the art to which the present invention pertains. However, it is not intended to limit the scope of the invention.

Please refer to FIG. 1 to FIG. 15 for a schematic flow chart of a method for fabricating the printed circuit board of the present invention. The printed circuit board of the present invention is a printed circuit board produced by a stack substrate method in which a plurality of core substrates are bonded. First, as shown in FIG. 1, a first substrate 110 and a second substrate 120 are provided. The first substrate 110 has an upper surface 111 and a lower surface 112 disposed in parallel with each other. Similarly, the second substrate 120 also has a table arranged parallel to each other. Face 121 and lower surface 122. A third substrate 130 may also be provided as shown in FIG. 2 as needed. The third substrate 130 also has an upper surface 131 and a lower surface 132 disposed in parallel with each other.

Please note that whether the first substrate 110, the second substrate 120 or the third substrate 130 has a line formed in advance on at least one of the upper surface 111/121/131 or the lower surface 112/122/132 Traces, referred to as first line 119, third line 129, and fifth line 139, respectively, serve as functional traces for the printed circuit board of the present invention. In addition, the material or characteristics of the first substrate 110, the second substrate 120, or the third substrate 130 may be the same or different, and may be a soft substrate or a hard substrate. For example, in one embodiment of the present invention, the first substrate 110, the second substrate 120, or the third substrate 130, which are formed with a line in advance, may be a polyimide (PI) film or a polybutylene naphthalate, respectively. The (polyethylene naphthalate, PEN) film may also be a liquid crystal polymer (LCP) film.

Then, as shown in FIG. 3A, the first substrate 110 having the first line is attached to the second substrate 120 which has been pre-wired to obtain the printed circuit board 100 of the present invention. Optionally, as shown in FIG. 4A, the pre-routed second substrate 120 and the third substrate 130 may be attached together on the first substrate 110 having the first line to obtain the printing of the present invention. Circuit board 100.

For example, if the second substrate 120 and the third substrate 130 are a polyimide film, a polyethylene naphthalate film or a polypropylene plate, an adhesive function can be used. The first adhesive layer 101 or the second adhesive layer 102 is further used to adhere the second substrate 120 that has been pre-wired to the third substrate 130 as needed, respectively, to the upper surface 111 and the lower surface of the first substrate 110. 112 on. In other embodiments, when the second substrate 146 and the third substrate 148 as needed are liquid crystal polymer films, the first adhesive layer 101 or the second adhesive layer 102 may be omitted and selectively combined with heating. The second substrate 120 and the third substrate 130 as needed are directly pressed and fixed to the surface of the first substrate 110 in a pressurized manner, as shown in FIG. 4B.

The manner in which the lined first substrate 110, the second substrate 120, or the third substrate 130 is formed can be referred to the following description. Taking the first substrate 110 as an example, referring to FIG. 5, the first carrier 113 is disposed on the upper surface 111 of the first substrate 110. A second carrier 114 may be further disposed on the lower surface 112 of the first substrate 110 as occasion demands. The first carrier 113 or the second carrier 114 may be a polyethylene terephthalate (PET) film, a polyester film, or a dry photoresist film (hereinafter referred to as a dry film). Or a liquid photosensitive film (hereinafter referred to as a liquid photoimable ink). The dry film may comprise a dry photoresist material or a photosensitive material, and the material of the dry film may be, for example, a mixture of materials including a monomer, a binder, a photo initiator, and the like. It may comprise a liquid photosensitive material or a wet photosensitive material, and the wet film material may include, for example, an acrylic resin, a photoinitiator, an organic pigment (phtalocyanine green), barium sulfate. (barium sulfate), cerium oxide (silica), a mixture of materials such as diethylene glycol monoethyl ether acetate, petroleum naphtha, and silicon polymer.

If the first carrier 113 or the second carrier 114 is a polyethylene terephthalate film or a polyester film, it may be attached to the upper surface 111 or the lower surface 112 of the first substrate 110 by a glue layer. On the other hand, if the first carrier 113 or the second carrier 114 is a dry film, the dry film material can be pressed to the surface of the first substrate 110 by, for example, lamination, and then cured by a light treatment to cure the dry film. Moreover, if the first carrier 113 or the second carrier 114 is a wet film, the wet film material can be printed on the first substrate 110 by, for example, screen printing, and then baked and cured. The material of the dry film and the wet film may include a photoresist material or a resin to which a photoresist or a photocurable material is added. The thickness of each material is exemplified as follows: the thickness of the polyethylene naphthalate film may be about 25 to 100 micrometers, the thickness of the polyimide film may be about 8 to 100 micrometers, and the thickness of the liquid crystal polymer film may be For a thickness of from about 25 to 100 microns, the dry film may have a thickness of from about 15 to 40 microns.

Then, as shown in FIG. 6A, the first carrier 113 and the first substrate 110 are patterned, and at least a first line pattern 115 is formed on the upper surface 111 of the first substrate 110. As needed, as shown in FIG. 6B, the second carrier 114 may also be patterned together, and at least one second line pattern 116 may be formed on the lower surface 112 of the first substrate 110. The patterning process at this time can be a laser process. When the first substrate 110 is a polyethylene naphthalate film, a polyimide film or a liquid crystal polymer film, ultraviolet (UV) laser light or two is preferably used. A carbon oxide laser is used to pattern the upper surface 111 or the lower surface 112 of the first substrate 110.

For example, if the first substrate 110 is a liquid crystal polymer film, a carbon dioxide laser process can be used. In this embodiment, the first line pattern 115 or the second line pattern 116 may include at least one of the blind via pattern 103 and the via pattern 104. Taking the first line pattern 115 as an example, the blind hole pattern 103 is formed in the first substrate 110 through the first carrier 113, a portion of the first substrate 110 is exposed at the bottom thereof, and the through hole pattern 104 penetrates the first carrier 113. The first substrate 110 and the second carrier 114. The details of the second line pattern 116 can be referred to the description of the first line pattern 115.

The blind via pattern 103 can be used to make a line, and the via pattern 104 can be used to make a via. In general, the via pattern 104 may have a size of about 50 to 100 microns, and the blind via pattern 103 may have a size of about 200 to 250 microns. The patterns of the first line pattern 115 and the second line pattern 116 are merely illustrative, and do not limit the present invention to pattern the first substrate 110 by laser. For example, the process of directly engraving a line pattern on a surface of a substrate by laser may include engraving a blind hole pattern, a via pattern, a buried hole pattern, a pad pattern, or a thinner line pattern, that is, Regardless of size or shape, the pattern of the electrical components to be formed in the substrate is laser-engraved. Then, as needed, the first substrate 110 may be subjected to a desmear process, such as a plasma process, to remove the slag 140 or the coke slag 140 generated by the laser process, as shown in FIG. .

Continue, as shown in Figure 8A, and conduct a conductive processing process, in the first A surface 111 of the substrate 110 forms a first thin conductive layer 117 to cover the surface of the first line pattern 115 formed in the laser process. Or, as needed, as shown in FIG. 8B, a second thin conductive layer 118 is formed on the lower surface 112 of the first substrate 110 to cover the surface of the second line pattern 116 formed in the laser process. .

As can be seen from FIG. 8A/8B, the first thin conductive layer 117 or the second thin conductive layer 118 covers the bottom and sidewall surfaces of the via pattern 104 and the blind via pattern 103, and also covers the first carrier 113. The outer side surface of the second carrier 114 is required as appropriate. The conductive treatment process can be an electroless copper deposition process, an electroless nickel process, an immersion silver process, a blackhole process, a shadow process, a metal. The nano copper material ink-jet printing or screen printing process, but is not limited thereto. The material of the first thin conductive layer 117 or the second thin conductive layer 118 may comprise copper, carbon, graphite, silver or gold.

Next, as shown in FIG. 9A, the first carrier 113 and, as the case may be, the second carrier 114 are removed, as shown in FIG. 9B, so that the remaining first thin conductive layer 117 is optionally required. The two thin conductive layers 118 will only cover the inner surfaces of the via pattern 104 and the blind via pattern 103. Then, after the first carrier 113 or the second carrier 114 as needed, the electroplating process is performed, and the first line pattern 115 is as shown in FIG. 10A, or The surface of the second line pattern 116, as desired, is formed as shown in Fig. 10B to form at least a first line 119 and, if desired, at least one second line 119'.

The electroplating process, for example, a metal plating process, is performed by forming a metal layer on the surface of the second thin conductive layer 117 having the first thin conductive layer 117 or, as the case may be, to fill the conductive material, such as a metal material. The blind via pattern 103 and the via pattern 104 are formed to form at least one first line 119, at least one second line 119' and a via 106 as needed. Thus, in the printed circuit board 100 of the present invention, any single core substrate having a single-layer conductive line (first line 119) or a double-layer conductive line (the first line 119 and the second line 119' together) is completed ( Single core substrate) preliminary internal circuit production. The manner in which the second substrate 120 is lined and the third substrate 130 is lined may be referred to the manner in which the first substrate 110 is formed. Therefore, the description thereof will not be repeated. 3B illustrates a first substrate 110 of a double-layer conductive line with a second substrate of a single-layer conductive line, and FIG. 3C illustrates a first substrate 110 of a single-layer conductive line with a second substrate 120 of a double-layer conductive line, 4C shows a first substrate 110 of a double-layer conductive line with a second substrate 120 and a third substrate 130 of a single-layer conductive line, and FIG. 4D shows a first substrate 110 of a single-layer conductive line with a double-layer conductive line. Different combinations of the two substrates 120 and the third substrate 130 are possible.

Then, as shown in FIG. 11, an upper protective layer 107 and a lower protective layer 108 may be respectively formed on the upper surface and the lower surface of the first substrate 110, the second substrate 120, or the third substrate 130, for example, for example, Insulation (coverlay), a surface treatment process, an electrical test, a punching process, and a visual inspection are performed to modify the printed circuit board 100 of the present invention. Among them, the molding process is, for example, a mold forming process or a laser cutting process.

In one embodiment of the present invention, as shown in FIG. 12A or FIG. 12B, the through hole 106 may be formed by performing a hole forming step on the laminated printed circuit board 100. The via 106 will communicate with at least two of the adjacent first substrate 110, the lined second substrate 120, and the lined third substrate 130. In another embodiment of the present invention, as shown in FIG. 13A or FIG. 13B, the conducting step of the laminated printed circuit board 100 can be further continued, so that the through holes 106 filled with the conductive material are electrically connected to the adjacent ones. The first substrate 110, the lined second substrate 120, or the lined third substrate 130 are such that adjacent substrates are electrically connected to each other. In addition, through the electrical connection of the vias 106 filled with the conductive material, the non-adjacent substrates are also electrically connected through the adjacent substrates.

Since the high-density interconnected printed circuit board 100 of the present invention includes a lined first substrate 110, a lined second substrate 120, and optionally a lined third substrate 130, the method of the present invention can also combine a plurality of a first substrate 110 having a first line 119, a plurality of adhesive layers 101/102, a plurality of second substrates 120 having a third line 129, and a plurality of third substrates 130 having a fifth line 139, as the case may be, The laminated printed circuit board 100 is formed as shown in FIG. The first substrate 110 may also have a second line 119', the second substrate 120 may also have a fourth line 129', and the third substrate 130 may also have a sixth line 139', as the case may be.

In the laminated printed circuit board 100, any one of the adhesive layers (101 or 102) causes the first substrate 110 having the first line 119 or the second substrate 120 having the third line 129 to be attached to the first line 119. The first substrate 110, the second substrate 120 having the third line 129, or one of the third substrates 130 having the fifth line 139.

The first line pattern 115 and the second line pattern 116 may be formed on the upper surface 111 and the lower surface 112 of the first substrate 110 by a laser process, as occasion demands. The second line pattern 116 may include at least one blind via pattern 103 and at least one via pattern 104. It should be noted that the via pattern 104 can directly engrave the first substrate 110 by laser when the first line pattern 115 or the second line pattern 116 is formed, for example, when the first line pattern 115 is formed. Through the hole, without making it twice. Then, a subsequent process similar to that of the first embodiment, including a grit cleaning process, a conductive process, a carrier removal, an electroplating process, etc., can be completed to complete the two-layer circuit (the first line 119 and the second line 119'). And a printed circuit board 100 of the via 106.

The printed circuit board of the present invention and the method of fabricating the same are not limited to the above embodiments. The other embodiments and variations of the present invention are described in the following, and the same reference numerals will be used to refer to the same elements, and the repeated parts will not be described again.

In addition, as shown in FIG. 15, a pattern of through holes 150 is formed in the printed circuit board 100 completed in the prior art by the laser process, and then the conductive processing and the plating process are performed in the manner described above to make the through hole pattern 150 Fill in a conductive material such as copper. A protective layer 151, such as an insulating layer, is then formed on the outermost substrate outer surface, such as the second substrate 120 or the outer surface of the third substrate 130, respectively. Surface treatment, electrical testing, molding, and visual inspection can then be performed to complete the fabrication of the high density interconnect printed circuit board 100 of the present invention. In other embodiments, the protective layer 151 can also be a solder mask.

It can be seen from the foregoing embodiments that the present invention utilizes a process such as laser to dig a hole in a substrate, and forms a circuit pattern in the hole by using an electroplating process, and then bonding the circuitized substrates to each other to form a printed circuit board, thereby reducing the PCB. The overall thickness of the board, and the circuit including the metal material has good electrical properties, reduces noise interference, and provides good electrical characteristics and reliability.

The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.

100‧‧‧Printed circuit board

101‧‧‧First adhesive layer

102‧‧‧Second adhesive layer

103‧‧‧Blind hole pattern

104‧‧‧through hole pattern

106‧‧‧through hole

107‧‧‧Upper protective layer

108‧‧‧ lower protective layer

110‧‧‧First base

111‧‧‧Upper surface

112‧‧‧ lower surface

113‧‧‧First carrier

114‧‧‧Second carrier

115‧‧‧First line pattern

116‧‧‧second line pattern

117‧‧‧First thin conductive layer

118‧‧‧Second thin conductive layer

119‧‧‧First line

119’‧‧‧second line

120‧‧‧second base

121‧‧‧ upper surface

122‧‧‧ lower surface

129‧‧‧ third line

130‧‧‧ third base

131‧‧‧ upper surface

132‧‧‧ lower surface

139‧‧‧ fifth line

150‧‧‧through holes

151‧‧‧Protective layer

1 to 15 are schematic flow charts showing a method of fabricating a printed circuit board according to the present invention, wherein: FIG. 3B shows a double-layer conductive line with a single-layer conductive line; and FIG. 3C shows a single-layer conductive line with a double layer. Conductive line; Figure 4C shows the two-layer conductive line with different bases of the single-layer conductive line; Figure 4D shows the single-layer conductive line with different bases of the double-layer conductive line.

100‧‧‧Printed circuit board

101‧‧‧First adhesive layer

102‧‧‧Second adhesive layer

110‧‧‧First base

111‧‧‧Upper surface

112‧‧‧ lower surface

119‧‧‧First line

119’‧‧‧second line

120‧‧‧second base

121‧‧‧ upper surface

122‧‧‧ lower surface

129‧‧‧ third line

130‧‧‧ third base

131‧‧‧ upper surface

132‧‧‧ lower surface

139‧‧‧ fifth line

Claims (20)

A method of fabricating a printed circuit board, comprising: providing a first substrate having an upper surface and a lower surface parallel to each other, wherein the upper surface is provided with a first carrier; and patterning the first carrier and the first substrate Forming at least one first line pattern on the upper surface of the first substrate; performing a conductive processing process, forming a first thin conductive layer on the upper surface of the first substrate, and covering the first line pattern a surface; removing the first carrier; performing an electroplating process to form at least one first line on a surface of the first line pattern; and attaching the first substrate having the first line to a lined second Substrate. The method of fabricating a printed circuit board according to claim 1, wherein the lower surface is provided with a second carrier. The method of manufacturing the printed circuit board of claim 2, further comprising: patterning the second carrier, and forming at least one second line pattern on the lower surface of the first substrate; performing the conductive processing process The lower surface of the first substrate forms the first thin conductive layer to cover the surface of the second line pattern; the second carrier is removed; and the plating process is performed, and at least one surface is formed on the surface of the second line pattern second line. The manufacturing method of the printed circuit board of claim 1, further comprising: providing a second substrate having an upper surface and a lower surface parallel to each other, wherein the upper surface is provided with a third carrier; and the third is patterned Forming at least a third line pattern on the upper surface of the second substrate; performing a conductive processing process to form a second thin conductive layer on the upper surface of the second substrate a surface of the third line pattern; removing the third carrier; and performing an electroplating process to form at least one third line on a surface of the third line pattern. The method of manufacturing the printed circuit board of claim 4, further comprising: patterning a fourth carrier on the lower surface of the second substrate, and forming at least one fourth line on the lower surface of the second substrate Patterning; performing the conductive processing process, forming the second thin conductive layer on the lower surface of the second substrate to cover the surface of the fourth line pattern; removing the fourth carrier; and performing the plating process, and The surface of the fourth line pattern forms at least one fourth line. The method for manufacturing a printed circuit board according to claim 3, further comprising: The first substrate having the second line is attached to a lined third substrate by a second adhesive layer. The method of manufacturing the printed circuit board of claim 6, further comprising: providing a third substrate having an upper surface and a lower surface parallel to each other, wherein the upper surface is provided with a fifth carrier; and the fifth is patterned a carrier and the third substrate, and forming at least a fifth line pattern on the upper surface of the third substrate; performing a conductive processing process, forming a third thin conductive layer on the upper surface of the third substrate, and covering a surface of the fifth line pattern; removing the fifth carrier; and performing an electroplating process to form at least a fifth line on a surface of the fifth line pattern. The method of manufacturing the printed circuit board of claim 7, further comprising: patterning a sixth carrier on the lower surface of the third substrate, and forming at least a sixth line on the lower surface of the third substrate Patterning; performing the conductive processing process, forming the third thin conductive layer on the lower surface of the third substrate to cover the surface of the sixth line pattern; removing the sixth carrier; and performing the plating process, and The surface of the sixth line pattern forms at least one sixth line. The manufacturing method of the printed circuit board of claim 1, further comprising: combining a plurality of the first substrate having the first line, a plurality of bonding layers, and a plurality of the lined second substrates to form a stack a printed circuit board, wherein any of the adhesive layers causes the first substrate having the first line and one of the lined second substrates to be attached to the first substrate having the first line and the One of the second substrates is lined. The method of fabricating a printed circuit board according to claim 9, wherein the first substrate having the first line has a second line. The method of fabricating a printed circuit board according to claim 9, wherein the second substrate has a third line and a fourth line. The method of fabricating a printed circuit board according to claim 1 or 7, wherein one of the first substrate, the second substrate and the third substrate is one of a flexible substrate and a rigid substrate. The method of fabricating a printed circuit board according to claim 1 or 7, wherein at least one of the first substrate, the second substrate and the third substrate is a polyimide film. A polyethylene naphthalate (PEN) film, a polypropylene (PP) plate or a liquid crystal polymer (LCP) film. The manufacturing method of the printed circuit board of claim 1 or 6, further comprising: performing a hole forming step to form a through hole to connect the adjacent first substrate, the lined second substrate, and the line At least two of the third substrates. The manufacturing method of the printed circuit board of claim 14, further comprising: performing a conducting step, wherein the through hole electrically connects the adjacent first substrate, the lined second substrate, and the lined third substrate . The method of fabricating a printed circuit board according to claim 1, wherein the process of patterning the first carrier and the first substrate is performed by a laser process. The method of manufacturing the printed circuit board of claim 1, further comprising: performing a desmear process on the first substrate after the patterning the first carrier and the first substrate. The method of fabricating a printed circuit board according to claim 1, wherein the conductive processing process comprises an electroless copper deposition process, an electroless nickel process, and an immersion silver process. ), a blackhole process, a shabow process, a synthesize catalytic ink process, a nano copper material ink-jet printing process or A nano copper material screen printing process. The method of manufacturing the printed circuit board of claim 1, wherein the first line pattern, the third line pattern, and the fifth line pattern respectively comprise at least one via pattern, a blind hole pattern or a Buried hole pattern. The method of fabricating a printed circuit board according to claim 1, wherein a first adhesive layer is used to attach the first substrate having the first line to the lined second substrate.