TWI462651B - Converter and converting control circuit thereof - Google Patents

Description

Converter and its conversion control circuit

The invention relates to a conversion control circuit, in particular to a conversion control circuit with a built-in voltage stabilization circuit.

In recent years, non-isolated converters have been widely used in the LED lighting market due to their simple circuit, low component and low cost.

Fig. 1 is an application circuit diagram of a light-emitting diode driving chip HV9910 produced by SUPERTEX Corporation of the United States. The figure shows a buck converter. The buck converter has a switching control circuit 10a (ie, driving die HV9910), an inductor L0, a diode D0, a power transistor Q0, and a current detecting resistor R0. When the power transistor Q0 is turned on, the power supplied by the voltage input terminal VIN is simultaneously supplied to the inductor L0 and the LED string 20. When the power transistor Q0 is turned off, the electric energy stored in the inductor L0 is supplied to the light-emitting diode string 20 in an electric current, so that the light-emitting diode string 20 continues to emit light. The switching control circuit 10a controls the turning on and off of the power transistor Q0 according to the detecting signal Vcs from the current detecting resistor R0 to stabilize the current value flowing through the light emitting diode string 20.

The switching control circuit 10a is directly connected to the voltage input terminal VIN to obtain the required power. As shown in the figure, the input voltage of the voltage input terminal VIN is converted into a power supply voltage VDD (the power supply voltage is 7.5V here) via the linear regulator circuit 11 inside the conversion control circuit 10a, and the supply switching control circuit 10a operates. The power needed. After the conversion control circuit 10a starts up with sufficient power supply voltage VDD, the oscillator 12 then outputs a conduction pulse to the input terminal S of the SR flip-flop 13 to output a high-potential signal to the output terminal Q of the SR flip-flop 13 to Turn on the external power transistor Q0.

When the power transistor Q0 is turned on, the current flows from the voltage input terminal VIN to the ground through the inductor L0, the LED array 20, the power transistor Q0, and the current detecting resistor R0. As the current flows gradually increase, when the potential of the high voltage terminal of the current detecting resistor R0 rises to the reference voltage Vr0 (for example, 250 mV), the comparator COMP0 outputs a high potential signal, so that the output terminal Q of the SR flip-flop 13 is output low. Potential signal to cut off power transistor Q0.

The inductor L0 stores energy during the on period of the external power transistor Q0, and releases energy after the external power transistor Q0 is turned off. The released energy is returned to the inductor L0 by the inductor L0 through the LED array 20 and the diode D0 in an electric current manner until the oscillator 12 generates the next conduction pulse to turn on the external power transistor Q0. When the current flowing through the power transistor Q0 causes the potential of the high voltage terminal of the resistor R0 to rise to the reference voltage Vr0, the external power transistor Q0 is again turned off, repeating the above-mentioned periodic operation.

As mentioned above, the HV9910 LED is driven by internal high-voltage linear voltage regulation. The power consumption caused by the voltage regulation process can be expressed by the following formula:

Power consumption (Pd)=(Vin-VDD) x IDD...(1)

Vin refers to the input voltage of the voltage input terminal VIN, VDD refers to the power supply voltage, and IDD refers to the current used to generate the power supply voltage VDD. According to the data provided by the operating instructions of the LED driver HV9910: VDD=7.5V, IDD=1mA, Vin=264x1.414=373V, the power consumption calculated by the formula (1) is: power consumption (Pd) )=(373-7.5) x 1 x 10 ^-3 =0.37(W).

According to the above calculation results, the power consumption of the regulated voltage can reach 0.37 watts when the AC input voltage is applied. This power consumption is equivalent to 12.33% of the regulated power consumption of the commonly used 3-watt output LED bulb. This high power consumption will result in low converter efficiency.

The second picture shows the application circuit diagram of the LED diode driver BP2808 produced by Shanghai Jingfeng Mingyuan Company (BPS). As shown in the figure, the converter control circuit 10b (i.e., the driving transistor BP2808) internally has a low voltage transistor QL connected in series to the external power transistor Q0. The on and off of the external power transistor Q0 can be synchronously controlled by controlling the on and off of the low voltage transistor QL inside the switching control circuit 10b.

Unlike the previously disclosed driver chip HV9910, which generates a conduction pulse in a constant frequency, the two are slightly different. The switching control circuit 10b generates a conduction pulse wave in a control manner of a fixed off time. That is, when the cutoff time reaches a predetermined length of time, the control unit 15 then generates a conduction pulse waveguide through the low voltage transistor QL, which lowers the source potential of the external power transistor Q0, so that the external power transistor Q0 starts to conduct. At this time, the current starts to flow from the voltage input terminal VIN to the ground through the inductor L0, the LED array 20, the power transistor Q0, the low voltage transistor QL, and the current detecting resistor R0. When the current causes the potential of the high voltage terminal of the current detecting resistor R0 to rise to the reference voltage, the control unit 15 then turns off the internal low voltage transistor QL and the external power transistor Q0. This repeats the above cycle action.

The converter utilizes a Zener diode Z0 to convert the electrical energy from the voltage input VIN to the supply voltage VDD required to operate the switching control circuit 10b. The application circuit different from the front light-emitting diode driving chip HV9910 converts the input voltage supplied from the voltage input terminal VIN into the power supply voltage VDD by the linear voltage stabilizing circuit 11 inside the switching control circuit 10a.

It can be seen that the light-emitting diode driving chip BP2808 is composed of external components to form a linear regulator, and the power consumption caused by the voltage regulation process can be expressed by the following formula:

Power consumption (Pd)=(Vin-VLED-VDD) x(IDD+IZK)...(2)

Among them, Vin refers to the input voltage of the voltage input terminal VIN, VLED refers to the voltage drop of the LED string, VDD refers to the power supply voltage, IDD refers to the current used to generate the power supply voltage VDD, IZK refers to the flow through The current of the nano-polar body Z0. According to the data provided by the operating instructions of the LED driver chip BP2808: VDD=12V, IDD=0.2mA, Vin=264x1.414=373V, VLED=10V, IZK=1A, nested in the calculation of (2) Consumption: Power consumption (Pd) = (373-10-12) x 1.2 x 10 ^-3 = 0.42 (W).

Figure 3 is an application circuit diagram of the LED polarizer driver chip GR8210 produced by Grenergy Corporation of Taiwan. Except for the power supply voltage regulation method, which is different from the LED diode driver BP2808 of the Shanghai Jingfeng Mingyuan Company shown in Figure 2, the other operation modes are basically the same.

This driver chip uses an internal low-voltage linear regulator for power supply regulation instead of an external linear regulator. As shown in the figure, the conversion control circuit 10c has a low-voltage linear regulator circuit 14 internally connected to the source terminal of the power transistor Q0 to obtain the input voltage, and the other end is connected to an external capacitor C0 to generate Power supply voltage VDD. When the control unit 15 controls the internal low voltage transistor QL to be turned off, the low voltage linear regulator circuit 14 generates a charging current to charge the external capacitor C0. At this time, the external power transistor Q0 is in a semi-conducting state and exhibits a high impedance characteristic. That is, the power transistor Q0 supplies the operating current required for the low-voltage linear regulator circuit 14 to generate the power supply voltage VDD in a state of withstanding high voltage.

The LED polarizer driver chip GR8210 is regulated by an internal low-voltage linear regulator. The power consumption caused by the regulation can be expressed by the following formula:

Power consumption (Pd) = (Vin + VD - VDD) x IDD ... (3)

Among them, Vin refers to the input voltage of the voltage input terminal VIN, VD refers to the voltage drop of the diode, VDD refers to the power supply voltage, and IDD refers to the current used to generate the power supply voltage VDD. According to the data provided by the operating instructions of the LED driver chip GR8210: VDD=5V, IDD=0.9mA, Vin=264x1.414=373V, the power consumption calculated by the calculation formula (3) is: power consumption (Pd) = (373 + 0.7-5) x (0.9) x 10 ^-3 = 0.33 (W).

In summary, the light-emitting diode driving wafer HV9910 contains a high-voltage linear regulator, and the linear conduction loss caused by the voltage regulation is directly generated in the driving wafer, which easily causes the temperature of the driving wafer to rise. The application circuit of the LED driver chip BP2808 uses an external resistor and a Zener diode to form a linear regulator, which can withstand most of the linear conduction loss and can reduce the controller temperature. However, in terms of the efficiency of the overall power supply regulation, no matter whether the internal linear regulator circuit or external components are used to form a linear regulator, the problem of excessive regulation loss can not be effectively improved.

Therefore, the present invention provides a switching regulator technology that can greatly reduce the loss in the voltage regulation operation of the converter to provide the power required to operate the control circuit, thereby improving the overall conversion efficiency.

One embodiment of the present invention provides a switching control circuit for controlling the turn-on and turn-off of a power transistor. The conversion control circuit includes a voltage regulator switch and a control unit. One end of the voltage regulator switch is connected to an external voltage input terminal, and the other end is connected to a voltage stabilizing capacitor to convert an input voltage of the external voltage input terminal into a power supply voltage. This supply voltage is used to supply the power required by the control circuit. The control unit receives a feedback voltage signal to generate a regulated pulse wave signal and a conduction pulse wave signal, respectively for controlling the conduction and the cutoff of the voltage regulator switch and the power transistor, and turning on the pulse wave signal The timing of the wave is later than the timing of the corresponding pulse wave of one of the regulated pulse signals.

In an embodiment of the invention, the external voltage input terminal is the 汲 terminal of the power transistor. In another embodiment of the invention, the aforementioned external voltage input is the source terminal of the power transistor.

In an embodiment of the invention, the control circuit has a low voltage transistor connected in series between a source terminal of the power transistor and a ground terminal. The conduction pulse signal generated by the control unit controls the conduction state of the power transistor by controlling the conduction state of the low voltage transistor.

In an embodiment of the invention, the control unit has a delay circuit that receives the regulated pulse wave signal to generate a turn-on pulse wave signal. In this embodiment, the starting point of the pulse wave of one of the regulated pulse wave signals is earlier than the starting point of the corresponding pulse wave of the one of the turned-on pulse wave signals, but the cut-off point of the pulse wave of the stabilized pulse wave signal is simultaneously The cutoff point of the corresponding pulse wave that turns on the pulse wave signal.

In an embodiment of the invention, the starting point of the pulse wave of one of the regulated pulse wave signals is earlier than the starting point of the corresponding pulse wave of one of the turned-on pulse wave signals, and the pulse wave of the stabilized pulse wave signal is The duration is equivalent to the duration of the corresponding pulse wave that turns on the pulse signal.

According to the foregoing conversion control circuit, another embodiment of the present invention provides a converter for LED driving. The converter has a power transistor and a conversion control circuit. The power transistor system is coupled to a light emitting diode string for controlling current flowing through the LED string. The switching control circuit is used to control the turn-on and turn-off of the power transistor. The conversion control circuit includes a voltage regulator switch and a control unit. One end of the voltage regulator switch is connected to an external voltage input terminal, and the other end is connected to a voltage stabilizing capacitor to convert an input voltage of the external voltage input terminal into a power supply voltage. This supply voltage is used to supply the power required by the control circuit. The control unit receives a feedback voltage signal to generate a regulated pulse wave signal and a conduction pulse wave signal, respectively for controlling the conduction and the cutoff of the voltage regulator switch and the power transistor, and turning on the pulse wave signal The timing of the wave is later than the timing of the corresponding pulse wave of one of the regulated pulse signals.

The advantages and spirit of the present invention will be further understood from the following detailed description of the invention.

Fig. 4 is a schematic view showing an application circuit of an embodiment of a converter for driving a light emitting diode according to the present invention. Figure 6 is an action waveform diagram of this converter. The figure is illustrated by taking a buck converter as an example. However, the invention is not limited thereto. The invention can also be applied to other types of non-isolated converters, such as boost converters, buck-boost converters, and isolated converters, such as flyback converters. (flyback converter) or forward converter (forward converter).

As shown in FIG. 4, the converter has a conversion control circuit 100, an inductor L1, a diode D1, a power transistor Q1 and a current detecting resistor R1. The inductor L1 and the LED array 200 are connected in series between the voltage input terminal vIN and the drain terminal of the power transistor Q1. The source terminal of the power transistor Q1 is connected to an external voltage input terminal IN of the switching control circuit 100 to supply the power required for the operation of the switching control circuit 100. One end of the current detecting resistor R1 is connected to one of the switching control circuits 100 to feed back the voltage detecting terminal CS, and the other end is grounded. The current detecting resistor R1 is coupled to the power transistor Q1 through the switching control circuit 100 to detect the current flowing through the LED string 200.

The conversion control circuit 100 has a voltage regulator switch SW1, a control unit 120 and a built-in low voltage transistor Q2. The voltage regulator switch SW1 is connected in series with a diode D2. In this embodiment, one end of the voltage regulator switch SW1 is coupled to the external voltage input terminal IN through the diode D2. The other end of the voltage regulator switch SW1 is connected to a voltage stabilizing capacitor C1 to generate a power supply voltage VDD. The stabilizing capacitor C1 can be externally connected or built in. However, the invention is not limited thereto. The diode D2 is connected in series to the voltage regulator switch SW1 to limit the current flowing through the voltage regulator switch SW1. Therefore, the diode D2 can also be disposed between the voltage regulator switch SW1 and the voltage regulator capacitor C1.

The control unit 120 detects the feedback voltage signal Vcs from the current detecting power group R1 through the feedback voltage detecting terminal, and generates a regulated pulse wave signal Vp1 and a conduction pulse wave according to the feedback voltage signal Vcs. The signal Vp2 controls the conduction and the off of the voltage regulator switch SW1 and the low voltage transistor Q2, respectively. The low piezoelectric crystal Q2 is connected in series between the power transistor Q1 and the current detecting resistor R1. By controlling the on and off of the low voltage transistor Q2, the conduction and the cutoff of the power transistor Q1 can be synchronously controlled.

Initially, when the conversion control circuit 100 has not been activated, the input voltage Vin from the voltage input terminal VIN charges the voltage stabilizing capacitor C1 via the resistor R2, and the power supply voltage VDD gradually rises. When the power supply voltage VDD reaches the reference voltage Vr1 of the undervoltage lockout comparator 130, the undervoltage lockout comparator 130 outputs a high level signal to turn on the power switch SW2, and the power supply voltage VDD is supplied to the switching control circuit 100. The power needed.

The control unit 120 has a comparator 122, an SR flip-flop 124, a gate 126, a delay circuit 128 and a timing cutoff circuit 129. The comparator 122 receives the feedback voltage signal Vcs from the current detecting resistor R1, and compares the feedback voltage signal Vcs with a reference voltage Vr2 to generate a comparison signal output to the input of the SR flip-flop 124. End R. The SR flip-flop 124 generates an output signal to the AND gate 126 based on the comparison signal. One of the inputs of the AND gate 126 receives the output signal from the output Q of the SR flip-flop 124, and the other input receives the signal from the output of the undervoltage lockout comparator 130. When the power supply voltage VDD exceeds the reference voltage Vr1, the output signal of the undervoltage lockout comparator 130 is maintained at a high level. Therefore, the output signal of the gate 126 (ie, the regulated pulse wave signal Vp1) is subjected to SR positive. Control of the output signal of the counter 124. The timing of the regulated pulse wave signal Vp1 is equivalent to the timing of the output signal of the output terminal Q of the SR flip-flop 124.

The delay circuit 128 generates a pulse wave start signal at a timing later than the regulated pulse wave signal Vp1 according to the regulated pulse wave signal Vp1 from the AND gate 126. 7A and 7B are a circuit diagram and an operation waveform diagram of an embodiment of the delay circuit 128 of the present embodiment. As shown in the figure, the delay circuit 128 has a delay unit 1282 and a gate 1284. The delay unit 1282 receives the regulated pulse wave signal Vp1 from the AND gate 126 to generate a delay signal Vde that is delayed by a predetermined time. The delayed signal Vde is input to the gate 1284 simultaneously with the regulated pulse wave signal Vp1 to generate a turn-on pulse wave signal Vp2. The turn-off point of the pulse wave of the on-pulse signal Vp2 generated by the delay circuit 128 is simultaneously at the off-time of the corresponding pulse wave of the regulated pulse wave signal Vp1.

The timing cut-off circuit 129 starts to calculate a preset fixed off time Toff (constant off time) when the output terminal Q of the SR flip-flop detects the output of the low-level signal, and after the calculation of the off-time Toff The pulse signal is output to the input terminal S of the SR flip-flop 124, so that the output terminal Q of the SR flip-flop 124 outputs a high-level signal.

As shown in Fig. 6, at time t1, when the regulated pulse signal Vp1 is switched from the low level to the high level to turn on the voltage regulator switch SW1, the potential of the source terminal of the power transistor Q1 is lowered, resulting in a power transistor. Q1 is turned on. At this time, the current IL flows from the voltage input terminal VIN to the voltage stabilizing capacitor C1 via the light emitting diode string 200, the inductor L1, the power transistor Q1, the diode D2, and the voltage regulator switch SW1. This current IL will gradually increase.

Subsequently, at time t2, when the on-pulse signal Vp2 is turned on through the low-voltage transistor Q2, although the voltage-regulating switch SW1 remains in the on state, the diode D2 between the external voltage input terminal IN and the voltage regulator switch SW1 Both ends generate a reverse bias and abort the current flowing through the regulator switch SW1. At this time, the current IL flows from the voltage input terminal VINI to the ground through the light-emitting diode lamp string 200, the inductor L1, the power transistor Q1, the low-voltage transistor Q2, and the current detecting resistor R1. At this stage, the current IL flowing through the LED string 200 continues to increase until the time point t3, after the low voltage transistor Q2 is turned off, the current IL begins to decrease.

The non-isolated converter of this embodiment adopts an exchange voltage regulation mode. The voltage regulator switch SW1 is turned on in advance a predetermined time before the low voltage transistor Q2 is turned on. The length of this preset time is controlled by the delay circuit 128. During this preset time, the power from the external voltage input terminal IN is stored to the voltage stabilizing capacitor C1 through the diode D2 and the voltage regulator switch SW1. Subsequently, after the low voltage transistor Q2 is turned on, a reverse bias is generated at both ends of the diode D2, and the current for charging the Zener capacitor C1 is suspended. Therefore, the power consumption caused by the power supply voltage regulation process of this embodiment can be calculated by the following formula:

Power consumption (Pd) = (VD + VSW) x ILED_valley x duty...(4)

Among them, VD refers to the voltage drop of diode D2, VSW refers to the voltage drop when the regulator switch SW1 is turned on, ILED_valley refers to the valley current flowing through the LED string 200, and duty is to charge the regulator capacitor. The time ratio. Assume that the on-resistance (Ron) of the aforementioned regulator switch SW1 is 5 ohms, the valley current flowing through the LED array 200 is 0.3 amps, the period of the on-pulse is 20 microseconds, and the preset time is 0.2 microseconds. second. The power consumption calculated by equation (4) is: power consumption (Pd) = (0.7 + 0.3 x 5) x (0.3) x (200n / 20u) = 0.07 (W).

In the high AC input voltage application, the non-isolated converter of this embodiment consumes only 0.07 watts, and the proportion of the commonly used 3 watt LED bulb is only 2.33%. Therefore, the non-isolated converter of the present invention can greatly improve the influence of the converter power supply voltage regulation process on the energy use efficiency.

Figure 5 is a schematic diagram of an application circuit of another embodiment of the converter of the present invention. In the converter of FIG. 4, the on-pulse signal Vp2 indirectly controls the on and off of the power transistor Q1 by controlling the conduction state of the low-voltage transistor Q2. This embodiment omits the low-voltage transistor Q2 and directly utilizes it. The turn-on pulse wave signal Vp2 controls the turn-on and turn-off of the power transistor Q1. Secondly, the external voltage input terminal IN different from the conversion control circuit of FIG. 4 is connected to the source terminal of the power transistor Q1 to draw power. The external voltage input terminal IN of this embodiment is connected to the extreme terminal of the power transistor Q1. (ie directly connected to the inductor L1) to draw power.

Next, in the embodiment of Fig. 6, the starting point of the pulse wave of the on-pulse signal Vp2 is later than the starting point of the corresponding pulse wave of the regulated pulse wave signal Vp1, but the cut-off point is the same. However, the invention is not limited thereto. Fig. 8 is another embodiment of the operational waveform diagram of the regulated pulse wave signal Vp1' and the on-pulse signal Vp2' of the present invention. In this embodiment, the delay pulse circuit is used to delay the regulated pulse wave signal Vp1' for a predetermined time to generate the turn-on pulse wave signal Vp2'. In this embodiment, the starting point of the pulse wave of the regulated pulse wave signal Vp1' is earlier than the starting point of the corresponding pulse wave of the turned-on pulse wave signal Vp2', and the pulse wave of the regulated pulse wave signal Vp1' The duration is equivalent to the duration of the corresponding pulse of the on-pulse signal Vp2'. Therefore, the cut-off timings of the corresponding pulse waves of the two pulse wave signals Vp1' and Vp2' are different.

Figure 9 is still another embodiment of the operational waveform diagram of the regulated pulse wave signal and the conduction pulse wave signal of the present invention. Unlike the embodiments of Figs. 7 and 8, the corresponding pulse waves of the regulated pulse wave signals Vp1, Vp1' and the on pulse signals Vp2, Vp2' at least partially overlap. The regulated pulse wave signal Vp1" and the turned-on pulse wave signal Vp2" of the present embodiment are complementary signals. 9A and 9B are circuit diagrams and operational waveform diagrams of an embodiment of a delay circuit 228 for generating a regulated pulse wave signal Vp1" and a turn-on pulse wave signal Vp2" of FIG. As shown in the figure, the delay circuit 228 has a delay unit 2282, a gate 2284 and an inverter 2286. Different from the embodiment of FIG. 7, in the embodiment, the output signal Vp0 of the AND gate 126 is not directly used as the regulated pulse wave signal Vp1". The delay unit 2282 receives the output signal Vp0 from the AND gate 126 to generate The integrated pulse wave signal Vp2" is delayed by a predetermined time. The inverter 2286 receives the turn-on pulse signal Vp2" to generate a reverse signal Vp2b. The reverse signal Vp2b and the output signal Vp0 of the AND gate 126 are input to the gate 2284 to generate the regulated pulse signal Vp1". The pulse wave of the on-pulse signal Vp2" generated by the delay circuit 228 and the pulse wave corresponding to the regulated pulse wave signal Vp1" are complementary signals.

The 9C and 9D diagrams are circuit diagrams and operational waveform diagrams of another embodiment of the delay circuit 328 for generating the regulated pulse wave signal Vp1" and the conduction pulse wave signal Vp2" of FIG. As shown in the figure, the delay circuit 328 has a delay unit 3282, a first sum gate 3284, an inverter 3286 and a second sum gate 3288. Different from the embodiment of FIG. 9A, in the present embodiment, the signal Vp2a outputted by the delay unit 3282 is not used as the on-pulse signal Vp2". The output signal Vp2a of the delay unit 3282 and the output signal Vp0 of the AND gate 126 are input. Gate 3288 to generate a turn-on pulse wave signal Vp2". The off-time point of the pulse wave of the on-pulse signal Vp2" is simultaneously at the off-time of the corresponding pulse of the input signal Vp0 of the gate.

Figure 10 is a schematic diagram of an application circuit of an embodiment of the converter of the present invention. As described above, the present invention utilizes a regulated pulse wave signal Vp1 whose timing is earlier than the turn-on pulse wave signal Vp2 to pre-conduce the voltage regulator switch SW1 before the power transistor Q2 is turned on to extract the power required for the operation of the conversion control circuit. However, since the switching control circuit controls the power transistor Q2 according to the detection signal Vcs, there is a signal transmission delay, and the conversion control circuit detects that the detection signal Vcs is higher than the reference voltage Vr2 and the conduction pulse signal Vp2. There will be a time delay between the cut-off points of the pulse wave. During this delay time, the power transistor Q2 maintains its conduction state, and therefore, the current IL flowing through the light-emitting diode continues to increase.

The relationship between the input voltage of this converter and the generated current can be expressed by the following formula: Δi/Δt=(VIN-VED)/L...(5)

Where Δi/Δt represents the current slope of the current IL flowing through the LED string 200, Vin refers to the input voltage of the voltage input terminal, and VLED refers to the voltage of the terminal of the LED string 200, L system Refers to the inductance value of the inductor L1. As can be seen from equation (5), the current slope is related to the input voltage Vin, the voltage at the terminal of the LED array 200, and the inductance of the inductor L1. In the case where the inductance value of the inductor L1 and the LED terminal voltage are constant, the current slope of the current IL flowing through the LED array 200 changes with the input voltage Vin of the voltage input terminal VIN. Since the conversion control circuit has a fixed time signal transmission delay, as shown in FIG. 11, the signal transmission delay at this fixed time causes the current IL flowing through the LED string 200 to be generated at different input voltages. Different peaks.

In order to compensate for the time delay, the converter of this embodiment has a compensation circuit 300 coupled to the current detecting resistor R1 to adjust the level of the detection signal Vcs. As shown in the figure, the compensation circuit 300 has a first resistor Rc1 and a second resistor Rc2 connected in series between the high voltage end of the current detecting resistor R1 (ie, the end of the output detecting signal Vcs) and the inductor L1. . The contact between the first resistor Rc1 and the second resistor Rc2 outputs a compensation detection signal Vcp to compensate for the signal delay caused by the delay pulse signal of the on-pulse signal Vp2. Referring to FIG. 12 at the same time, the potential of the compensation detection signal Vcp is equivalent to the voltage generated by the first resistor and the second resistor of the potential of the detection signal Vcs. The magnitude of this partial voltage changes with the input voltage Vin to maintain the peak value of the current IL flowing through the LED array 200.

Figure 13 is a schematic illustration of yet another embodiment of the converter of the present invention. Compared with the embodiment of FIG. 4, the present embodiment uses the 汲 terminal of the power transistor Q1 as the external voltage input terminal IN.

Figure 14 is a schematic illustration of yet another embodiment of the converter of the present invention. Compared with the previous embodiments, the present invention is a non-isolated converter and is applied to drive the LED string 200. This embodiment applies the technique of the present invention to an isolated converter for converting an input voltage VIN to an output voltage VOUT.

Figure 15 is a schematic illustration of yet another embodiment of the converter of the present invention. Compared with the embodiment of FIG. 14, the present embodiment uses the 汲 terminal of the power transistor Q1 as the external voltage input terminal IN, and omits the low voltage transistor Q2, and directly controls the power transistor Q1 by using the on-pulse signal Vp2. Turn-on and cut-off.

The above is only the preferred embodiment of the present invention, and the scope of the invention is not limited thereto, that is, the simple equivalent changes and modifications made by the scope of the invention and the description of the invention are All remain within the scope of the invention patent. In addition, any of the objects or advantages or features of the present invention are not required to be achieved by any embodiment or application of the invention. In addition, the abstract sections and headings are only used to assist in the search of patent documents and are not intended to limit the scope of the invention.

10a. . . Conversion control circuit

L0. . . inductance

D0. . . Dipole

Q0. . . Power transistor

R0. . . Current detecting resistor

VIN. . . Voltage input

20. . . Light-emitting diode string

11. . . Linear regulator circuit

VDD. . . voltage

12. . . Oscillator

13. . . SR flip-flop

COMP0. . . Comparators

10b. . . Conversion control circuit

QL. . . Low voltage crystal

15. . . control unit

Z0. . . Zener diode

14. . . Low voltage linear regulator circuit

C0. . . capacitance

100. . . Conversion control circuit

L1. . . inductance

D1. . . Dipole

Q1. . . Power transistor

R1. . . Current detecting resistor

200. . . Light-emitting diode string

IN. . . External voltage input

CS. . . Feedback voltage detection terminal

SW1. . . Regulated switch

120. . . control unit

Q2. . . Low voltage crystal

D2. . . Dipole

C1. . . Voltage stabilizing capacitor

130. . . Undervoltage lockout comparator

SW2. . . switch

122. . . Comparators

124. . . SR flip-flop

126. . . Gate

128. . . Delay circuit

129. . . Timing cutoff circuit

1282. . . Delay unit

1284. . . Gate

228. . . Delay circuit

2282. . . Delay unit

2284. . . Gate

2286. . . Inverter

328. . . This delay circuit

3282. . . Delay unit

3284. . . First gate

3286. . . Inverter

3288. . . Second gate

300. . . Compensation circuit

Rc1. . . First resistance

Rc2. . . Second resistance

Fig. 1 is an application circuit diagram of a light-emitting diode driving chip HV9910 produced by SUPERTEX Corporation of the United States.

The second picture shows the application circuit diagram of the LED diode driver BP2808 produced by Shanghai Jingfeng Mingyuan Company (BPS).

Figure 3 is an application circuit diagram of the LED polarizer driver chip GR8210 of Grenergy Corporation of Taiwan.

Figure 4 is a schematic diagram of an application circuit of a first embodiment of the converter of the present invention.

Figure 5 is a schematic diagram of an application circuit of a second embodiment of the converter of the present invention.

Fig. 6 is a waveform diagram showing the operation of an embodiment of the converter of Fig. 4.

7A and 7B are circuit diagrams and operational waveform diagrams of an embodiment of the delay circuit of FIG. 4.

Figure 8 is a waveform diagram of another embodiment of a regulated pulse wave signal and a turn-on pulse wave signal generated by the conversion control circuit of the present invention.

Figure 9 is a waveform diagram of still another embodiment of a regulated pulse wave signal and a turn-on pulse wave signal generated by the conversion control circuit of the present invention.

9A and 9B are circuit diagrams and operational waveform diagrams of an embodiment of a delay circuit for generating a regulated pulse wave signal and a conduction pulse wave signal of FIG.

The 9C and 9D diagrams are circuit diagrams and operational waveform diagrams of another embodiment of a delay circuit for generating a regulated pulse wave signal and a conduction pulse wave signal of FIG.

Figure 10 is a schematic diagram of an application circuit of a third embodiment of the converter of the present invention.

Fig. 11 is a waveform diagram of the LED current and the detection signal before the compensation of the converter in Fig. 10 is compensated by the compensation circuit.

Fig. 12 is a waveform diagram of the LED current and the detection signal after the compensation of the converter of Fig. 10 is compensated by the compensation circuit.

Figure 13 is a schematic diagram of an application circuit of a fourth embodiment of the converter of the present invention.

Figure 14 is a schematic diagram of an application circuit of a fifth embodiment of the converter of the present invention.

Figure 15 is a schematic diagram of an application circuit of a sixth embodiment of the converter of the present invention.

100. . . Conversion control circuit

L1. . . inductance

D1. . . Dipole

Q1. . . Power transistor

R1. . . Current detecting resistor

200. . . Light-emitting diode string

IN. . . External voltage input

CS. . . Feedback voltage detection terminal

SW1. . . Regulated switch

120. . . control unit

Q2. . . Low voltage crystal

D2. . . Dipole

C1. . . Voltage stabilizing capacitor

130. . . Undervoltage lockout comparator

SW2. . . switch

122. . . Comparators

124. . . SR flip-flop

126. . . Gate

128. . . Delay circuit

129. . . Timing cutoff circuit

R2. . . resistance

Claims (20)

A conversion control circuit for controlling the on and off of a power transistor, the conversion control circuit comprising: a voltage regulator switch, one end of the voltage regulator switch is connected to an external voltage input end, and the other end is connected to a voltage stabilizing capacitor, Transmitting an input voltage of the external voltage input terminal into a power supply voltage to supply the power required by the control circuit; and a control unit generating a regulated pulse wave signal and a conduction pulse wave signal for respectively controlling the The voltage regulator switch is turned on and off with the power transistor, and a pulse of one of the conduction pulse signals is later than a pulse corresponding to one of the regulated pulse signals. The conversion control circuit of claim 1 further includes a diode connected in series to the voltage regulator switch. When the power transistor is turned on, the two-pole system exhibits a reverse bias and stops flowing through the The current of the regulated switch. The conversion control circuit of claim 1, wherein the external voltage input terminal is a source terminal or a terminal of the power transistor. The conversion control circuit of claim 1 further includes a low voltage transistor serially connected between a source terminal of the power transistor and a ground terminal, wherein the conduction pulse signal is controlled by the low voltage The on state of the crystal to control the turn-on and turn-off of the power transistor. The conversion control circuit of claim 1, wherein the control unit comprises a delay circuit, and the delay circuit receives the regulated pulse wave signal to generate the conduction pulse wave signal. The conversion control circuit of claim 1, wherein the regulated pulse wave signal and the conduction pulse wave signal are complementary signals. The conversion control circuit of claim 1, wherein the control unit receives a detection voltage to generate the conduction pulse signal. For example, in the conversion control circuit of claim 5, wherein the starting point of the pulse wave of one of the regulated pulse wave signals is earlier than the starting point of the corresponding pulse wave of the one of the conduction pulse wave signals, the regulated pulse The cutoff point of one of the wave signals is simultaneously at the cutoff point of the corresponding pulse wave of one of the conduction pulse signals. The conversion control circuit of claim 5, wherein the duration of the pulse wave of the regulated pulse wave signal is equal to the duration of the corresponding pulse wave of one of the conduction pulse wave signals. A converter includes: a power transistor coupled between a light emitting diode string and a ground; and a switching control circuit for controlling the turn-on and turn-off of the power transistor, including: a stable a voltage switch, one end of the voltage regulator switch is connected to an external voltage input end, and the other end is connected to a voltage stabilizing capacitor to convert an input voltage of the external voltage input terminal into a power supply voltage to supply the power required by the control circuit And a control unit for generating a regulated pulse wave signal and a conduction pulse wave signal for respectively controlling conduction and cutoff of the voltage regulator switch and the power transistor, and wherein one of the pulse signals of the conduction pulse wave signal is The timing is later than one of the regulated pulse signals. The converter of claim 10, wherein the conversion control circuit further comprises a diode connected in the forward direction between the external voltage input terminal and the voltage regulator switch. The converter of claim 10, wherein the external voltage input is one of a source terminal or a terminal of the power transistor. The converter of claim 10, wherein the conversion control circuit further comprises a low voltage transistor connected in series between a source terminal and a ground terminal of the power transistor, wherein the conduction pulse signal is transmitted through The conduction state of the low voltage transistor is controlled, and the potential of the source terminal of the power transistor is adjusted to control the on and off of the power transistor. The converter of claim 10, wherein the control unit comprises a delay circuit that receives the regulated pulse wave signal to generate the conduction pulse wave signal. The converter of claim 10, wherein the regulated pulse wave signal and the conduction pulse wave signal are complementary signals. The converter of claim 10, wherein a starting point of the regulated pulse wave signal is earlier than a starting point corresponding to one of the conducting pulse wave signals, and one of the regulated pulse wave signals is simultaneously cut off A cutoff point corresponding to one of the conduction pulse signals. The converter of claim 10, wherein the duration of the pulse of one of the regulated pulse signals is equal to the duration of the corresponding pulse of the one of the on-pulse signals. The converter of claim 10 further includes a current detecting resistor coupled to the power transistor to detect a current flowing through the light emitting diode string to generate a detecting a signal, the control unit is configured to generate the regulated pulse wave signal according to the detection signal. The converter of claim 14 further includes a compensation circuit coupled to the current detecting resistor, wherein the compensation circuit is used to adjust the detection signal. Bit to compensate for the delay caused by the delay pulse circuit due to the conduction pulse signal. The converter of claim 18, wherein the compensation circuit comprises a first resistor and a second resistor connected in series between the current detecting resistor and an inductor, and the first resistor and the first resistor The contact output of the two resistors is higher than the compensation detection signal of the detection signal, and the control unit generates the regulated pulse wave signal and the conduction pulse wave signal according to the compensation detection signal.