CN203722871U - LED drive circuit system and LED drive control circuit - Google Patents
LED drive circuit system and LED drive control circuit Download PDFInfo
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- CN203722871U CN203722871U CN201320867895.XU CN201320867895U CN203722871U CN 203722871 U CN203722871 U CN 203722871U CN 201320867895 U CN201320867895 U CN 201320867895U CN 203722871 U CN203722871 U CN 203722871U
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Abstract
The utility model discloses a LED drive circuit system and LED drive control circuit. The LED driving circuit system comprises an LED power converter with at least one power switch, an LED dimming circuit for dimming according to a dimming signal, and an LED driving control circuit. The LED drive control circuit is provided with a feedback circuit, an enabling signal generator and a feedback control loop. The system comprises an enabling signal generator, a dimming signal generator and a PWM dimming signal generator, wherein the enabling signal generator generates an enabling signal, when the output voltage of the system is in a normal range, the enabling signal is synchronous with the dimming signal, and when the output voltage of the system is too low, the duty ratio of the enabling signal is larger than that of the PWM dimming signal. The utility model discloses a LED drive circuit system can effectively avoid among the prior art LED drive circuit system to fall when the signal duty cycle of adjusting luminance is low excessively to press and work unusual problem.
Description
Technical field
The utility model relates to circuit field, more specifically but be not limited to relate to LED drive circuit system and control circuit.
Background technology
Along with the development of electronic equipment, LED (light-emitting diode) is high with its luminous intensity, DC driven, and the advantages such as long service life and environmental protection, have obtained application very widely in every field.
At present, the main dimming mode of LED system is divided into silicon controlled rectifier (TRIAC) light modulation and pulse-width modulation (PWM) light modulation.Compare silicon controlled rectifier light modulation, a considerable advantage of PWM light modulation is to avoid visual visible light source scintillation, is therefore more subject to industry favor.
Concerning PWM dimming LED (Light Emitting Diode) drive system, for reducing power consumption, conventionally can use PWM dim signal to control LED and drive system simultaneously, at LED, close device and also LED drive system is closed.Fig. 1 shows a circuit diagram that adopts the LED drive circuit system 10 of PWM light modulation in prior art.As shown in Figure 1, LED drive circuit system 10 comprises a Boost (boosting) power supply changeover device 101, LED load 102, feedback circuit 103, feedback control loop 104 and dimmer switch S1, S2, S3.Wherein feedback control loop 104 is a ring feedback controller, be used to the feedback signal VFB of self-feedback ciucuit 103, reference signal VREF and from the sensing inductive current ISENSE of Boost power supply changeover device 101, by drive signal generator 105, produce drive control signal CTRL, control the power switch in Boost power supply changeover device.When PWM dim signal is during by high step-down, dimmer switch S1, S2, S3, the switch S 4 that is arranged in control circuit 103 is all turn-offed, and drive signal generator 105 does not enable simultaneously, to improve system effectiveness, reduces power consumption.
Yet under the application scenario of high LED light modulation ratio, it is very little that the duty ratio of PWM dim signal can become.Now within a PWM light modulation cycle, the inductive current of Boost power supply changeover device may have little time to raise and arrive desired value from zero, causes power supply changeover device cannot provide enough energy to LED load.If this situation continues to occur, will make power supply changeover device output voltage decline, make LED loaded work piece abnormal.
Utility model content
For one or more problems of the prior art, the utility model provides a kind of LED drive circuit system and control circuit.
Aspect one of the present utility model, a kind of LED drive circuit system has been proposed, comprise LED power supply changeover device, comprise at least one power switch, produce an output voltage for driving LED load; LED light adjusting circuit, comprises dimmer switch, and described dimmer switch is controlled and turned on and off by a PWM dim signal; LED Drive and Control Circuit, described LED Drive and Control Circuit comprises: feedback circuit, couple described LED load, according to described output voltage, produce a feedback signal; Enable signal generator, couple described feedback circuit, according to described feedback signal, first reference signal and described PWM dim signal, produce an enable signal, when described output voltage is positioned at normal range (NR), described enable signal is synchronizeed with described PWM dim signal, when described output voltage is too low, the duty ratio of described enable signal is greater than described PWM dim signal; Feedback control loop, couples described feedback circuit, and according to described feedback signal, second reference signal and described enable signal, produce a drive control signal, controls turning on and off of described power switch.
In one embodiment, described enable signal generator further comprises: sampling hold circuit, couple and receive described feedback signal and described PWM dim signal, for sampling the value of described feedback signal keep this value during described PWM dim signal turn-offs described dimmer switch during opening described dimmer switch at described PWM dim signal; Trsanscondutance amplifier, there is an in-phase input end, an inverting input and an output, wherein said in-phase input end is couple to described sampling hold circuit and receives the described feedback signal after sampling keeps, described inverting input couples and receives described the first reference signal, described output output mutual conductance amplified current; Bias current sources, exports a bias current, superimposed with described mutual conductance amplified current, produces a charging current; And timing logic circuit, receive described PWM dim signal and described charging current, at a timing time of the inner generation of described timing logic circuit, and produce enable signal according to described timing time and described PWM dim signal.
In one embodiment, described the first reference signal is the poor of described the second reference signal and a bias voltage.
In one embodiment, described timing time is set and has a maximum and a minimum value.
In one embodiment, the described maximum of described timing time be the described LED power supply changeover device work period 5-10 doubly.
In one embodiment, the described minimum value of described timing time is 1us-2us.
In another embodiment, described timing logic circuit comprises: timing circuit, an input of described timing circuit receives described charging current and flows into, described timing circuit is by a switch, a charging capacitor, a PMOS pipe and a resistance form, the switch of wherein said timing circuit and described charging capacitor coupled in parallel are in the input of described timing circuit with systematically, the input of described timing circuit is further coupled to the grid of described PMOS pipe, the source electrode of described PMOS pipe is couple to system power supply voltage, drain electrode is couple to one end of described resistance, described in the other end of described resistance connects systematically, the drain electrode while of described PMOS pipe is as the output of described timing circuit, the first inverter, input couples and receives described PWM dim signal, trigger, described trigger is a basic rest-set flip-flop that two NAND gate form, and has S end, R end, Q end and Q end, wherein, described S end is couple to the output of described timing circuit, and described R end is couple to the output of described the first inverter, the second inverter, the input of described the second inverter is couple to the Q end of described trigger, or door, first input end described or door is couple to the output of described the second inverter, and the second input described or door receives described PWM dim signal, and output described or door is exported described enable signal, and the 3rd inverter, the input of described the 3rd inverter is couple to the Q end of described trigger, and the control end that the output of described the 3rd inverter is couple to the switch of described timing circuit is controlled the turning on and off of switch of described timing circuit.
In one embodiment, described enable signal generator comprises: sampling hold circuit, couple and receive described feedback signal and described PWM dim signal, for sampling the value of described feedback signal keep this value during described PWM dim signal turn-offs described dimmer switch during opening described dimmer switch at described PWM dim signal; The first error amplifier, comprise an in-phase input end, an inverting input and an output, the output that wherein said in-phase input end is couple to described sampling hold circuit receives the described feedback signal after sampling keeps, described inverting input couples and receives described the second reference signal, and described output produces a current controlled signal; Controlled current source, described controlled current source is couple to the output of described the first error amplifier, according to described current controlled signal, produces a charging current; And timing logic circuit, receive described PWM dim signal and described charging current, in inside, produce a timing time, and produce enable signal according to described charging current and described PWM dim signal.
In another embodiment, described enable signal generator comprises: sampling hold circuit, couple and receive described feedback signal and described PWM dim signal, for sampling the value of described feedback signal keep this value during described PWM dim signal turn-offs described dimmer switch during opening described dimmer switch at described PWM dim signal; Trsanscondutance amplifier, there is an in-phase input end, an inverting input and an output, wherein said inverting input is couple to described sampling hold circuit and receives the described feedback signal after sampling keeps, and described in-phase input end couples and receives described the first reference signal; Current mirror, described current mirror has the first current branch and the second current branch, the output of wherein said trsanscondutance amplifier is couple to described the first current branch and provides electric current for described the first current branch, the bias transistor that the output of described trsanscondutance amplifier is further couple to described the second current branch is simultaneously to set bias point, and the second branch road of described current mirror is exported a mutual conductance amplified current; Bias current sources, exports a bias current, superimposed with described mutual conductance amplified current, produces a charging current; And timing logic circuit, receive described PWM dim signal and described charging current, in inside, produce a timing time, and produce enable signal according to described charging current and described PWM dim signal.
In another embodiment, described feedback control loop comprises: feedback error amplifier, described feedback error amplifier comprises an in-phase input end, an inverting input and an output, wherein said in-phase input end couples and receives described the second reference signal, described inverting input receives described feedback signal, an error amplification signal of described output output; Current sensing circuit, sensing comes from the inductive current of described LED power supply changeover device, produces a current sensing signal; Triangular-wave generator, produces a triangular signal, and described triangular signal and the stack of described current sensing signal produce a slope compensation signal; Drive signal generator, described drive signal generator comprises an in-phase input end, an inverting input, an Enable Pin and an output, described in-phase input end receives described slope compensation signal, and described inverting input receives described error amplification signal, described Enable Pin receives described enable signal, described output is according to described error amplification signal, and described slope compensation signal and described enable signal, produce drive control signal; And enable switch, described enable switch is coupled between described feedback error amplifier out and described drive signal generator inverting input, according to described enable signal, controls and turns on and off.
On the other hand of the present utility model, a kind of LED driving governor has been proposed, comprising: feedback circuit, couple a LED load, according to the output voltage of LED drive circuit system, produce a feedback signal; Enable signal generator, couple described feedback circuit, according to described feedback signal, first reference signal and a PWM dim signal, produce an enable signal, when described output voltage is positioned at normal range (NR), described enable signal is synchronizeed with described PWM dim signal, when described output voltage is too low, the duty ratio of described enable signal is greater than described PWM dim signal; Feedback control loop, couples described feedback circuit, and according to described feedback signal, second reference signal and described enable signal, produce a drive control signal, and the power switch of controlling in described LED drive circuit system turns on and off.
In one embodiment, described enable signal generator comprises: sampling hold circuit, couple and receive described feedback signal and described PWM dim signal, for sampling the value of described feedback signal keep this value at described PWM dim signal indication blocking interval during opening in described PWM dim signal indication; Trsanscondutance amplifier, there is an in-phase input end, an inverting input and an output, wherein said in-phase input end is couple to described sampling hold circuit and receives the described feedback signal after sampling keeps, described inverting input receives described the first reference signal, a mutual conductance amplified current of described output output; Bias current sources, exports a bias current, superimposed with described mutual conductance amplified current, produces a charging current; And timing logic circuit, receive described PWM dim signal and described charging current, in inside, produce a timing time, and produce enable signal according to described timing time and described PWM dim signal.
In one embodiment, described timing logic circuit comprises: timing circuit, an input of described timing circuit receives described charging current and flows into, described timing circuit is by a switch, a charging capacitor, a PMOS pipe and a resistance form, the switch of wherein said timing circuit and described charging capacitor coupled in parallel are in the input of described timing circuit with systematically, the input of described timing circuit is further coupled to the grid of described PMOS pipe, the source electrode of described PMOS pipe is couple to system power supply voltage, drain electrode is couple to one end of described resistance, described in the other end of described resistance connects systematically, the drain electrode while of described PMOS pipe is as the output of described timing circuit, the first inverter, input receives described PWM dim signal, trigger, described trigger is a basic rest-set flip-flop that two NAND gate form, and has S end, R end, Q end and Q end, wherein, described S end is couple to the output of described timing circuit, and described R end is couple to the output of described the first inverter, the second inverter, the input of described the second inverter is couple to the Q end of described trigger, or door, first input end described or door is couple to the output of described the second inverter, and the second input described or door receives described PWM dim signal, and output described or door is exported described enable signal, and the 3rd inverter, the input of described the 3rd inverter is couple to the Q end of described trigger, and the control end that the output of described the 3rd inverter is couple to the switch of described timing circuit is controlled the turning on and off of switch of described timing circuit.
In one embodiment, described the first reference signal is the poor of described the second reference signal and a bias voltage.
Utilize the utility model embodiment, that can effectively avoid in prior art that LED drive circuit system produces when PWM dim signal duty ratio is too low press and operation irregularity phenomenon.
Accompanying drawing explanation
Following accompanying drawing relates to the description of the embodiment of the non-limiting and non exhaustive property of relevant the utility model.Except as otherwise noted, otherwise same numbers and symbols TYP or similar part in whole accompanying drawing.Accompanying drawing is without drawing in proportion.In addition, the size of relevant portion shown in figure may be different from the size of narrating in specification.For understanding better the utility model, following details is described and accompanying drawing will be provided to as a reference.
Fig. 1 shows a circuit diagram that adopts the LED drive circuit system 10 of PWM light modulation in prior art;
Fig. 2 shows the module diagram according to the LED drive circuit system 20 of an embodiment of the utility model;
Fig. 3 shows according to the circuit diagram of the LED drive circuit system 30 of an embodiment of the utility model;
Fig. 4 shows according to the circuit diagram of the enable signal generator 243 of an alternative embodiment of the present utility model;
Fig. 5 shows according to the circuit diagram of the enable signal generator 243 of another alternative embodiment of the present utility model;
Fig. 6 shows the circuit diagram according to the timing logic circuit 335 of an embodiment of the utility model.；
Fig. 7 A and Fig. 7 B show respectively the LED drive system 10 of employing PWM light modulation in the prior art shown in Fig. 1 with the experimental work comparison of wave shape figure of the LED drive circuit system 20 according to an embodiment of the utility model shown in Fig. 2;
In different accompanying drawings, identical mark represents same or analogous feature.
Embodiment
Specific embodiment hereinafter described represents exemplary embodiment of the present utility model, and in essence only for example explanation is unrestricted.In specification, mention that " embodiment " or " embodiment " mean in conjunction with the described special characteristic of this embodiment, structure or characteristic to be included at least one embodiment of the present utility model.Term " in one embodiment " each position in specification occurs all not relating to identical embodiment, neither mutually get rid of other embodiment or variable embodiment.Disclosed all features in this specification, or the step in disclosed all methods or process, except mutually exclusive feature and/or step, all can combine by any way.
In the following description, in order to provide thorough understanding of the present utility model, a large amount of specific detail have been set forth.Yet, for those of ordinary skills, it is evident that: needn't adopt these specific detail to carry out the utility model.In other examples, for fear of obscuring the utility model, do not specifically describe known circuit, material or method.
Describe below with reference to the accompanying drawings embodiment of the present utility model in detail.Run through institute's identical Reference numeral of drawings attached and represent same or analogous parts or feature.
Fig. 2 shows the module diagram according to the LED drive circuit system 20 of an embodiment of the utility model.As shown in Figure 2, LED drive circuit system 20 comprises a LED driving power transducer 201, comprises at least one power switch, for driving LED load 202.In the illustrated embodiment, LED driving power transducer 201 is (Boost) transducer that boosts, and comprises master power switch 211, outputting inductance L, output capacitance COUT and rectifying tube 212.Wherein, rectifying tube 212 can be a diode (for example as shown in Figure 2) or a synchronous rectifier.LED driving power transducer 201 may have other suitable switch power supply topological structure in other embodiments, possesses at least one power switch, for example step-down (Buck) type power supply changeover device, flyback (fly-back) type power supply changeover device, resonance oscillation semi-bridge type power supply changeover device etc.LED driving power transducer 201 receives input voltage VIN, is converted into output voltage VO UT.In the illustrated embodiment, LED load 202 comprises 3 LED lamp bars.LED load 202 couples the output OUT of LED driving power transducer 201, receives output voltage VO UT.In other embodiments, LED load 202 may comprise and be different from the LED lamp bar of illustrated embodiment quantity or the LED load of other type.
LED drive circuit system 20 also comprises a LED light adjusting circuit 203.This LED light adjusting circuit 203 comprises dimmer switch.In the illustrated embodiment, LED light adjusting circuit 203 comprises 3 dimmer switch S1, S2, S3, is couple to respectively 3 lamp bars of LED load 202.In this area, having average technical staff can understand, and in other embodiments, the quantity of dimmer switch and arrangement can change according to the variation of LED load 202, repeat no more herein.Dimmer switch is controlled and is opened and turn-off by a PWM dim signal DIM.
LED driving power transducer 201 is controlled by the LED Drive and Control Circuit 204 that is positioned at LED drive circuit system 20.In the illustrated embodiment, LED Drive and Control Circuit 204 comprises feedback circuit 241, feedback control loop 242, enable signal generator 243.Wherein, feedback circuit 241 is couple to LED load 202, produces a feedback signal VFB.Enable signal generator 243 is couple to feedback circuit 241, and according to feedback signal VFB, first reference signal VREF1 and PWM dim signal DIM, produce an enable signal EN.Feedback control loop 242 is couple to feedback circuit 241, according to feedback signal VFB, second reference signal VREF2 and enable signal EN, produce a drive control signal CTRL, for controlling the turning on and off of master power switch 211 of LED driving power transducer 201.
When system, normally move, VOUT fluctuates in normal range (NR), and enable signal EN is synchronizeed with PWM dim signal DIM, does not enable feedback control loop 242, to avoid energy loss at dimmer switch blocking interval." normal range (NR) " is the scope of the output voltage of the normal work of certain drives system in an embodiment of the present invention, with different physical circuits, determines.When output voltage VO UT prescribes a time limit lower than the lower of normal range (NR), the impact that declined by feedback signal VFB, the duty ratio of enable signal EN increases, be greater than the duty ratio of PWM dim signal DIM, like this, at dimmer switch S1-S3, close and have no progeny, LED load 202 is consumed energy no longer, and LED driving power transducer 201 still moves until enable signal EN indication is turn-offed, now output capacitance COUT continues to be recharged, and makes VOUT can get back to normal range (NR).
Fig. 3 shows according to the circuit diagram of the LED drive circuit system 30 of an embodiment of the utility model.In the embodiment shown in fig. 3, feedback circuit 241 comprises a minimum value and selects circuit 311, and its input is couple to respectively 3 lamp bar negative terminals of LED load 202, reception comes from the feedback signal VFB1 of each lamp bar, VFB2, VFB3, selection minimum value is wherein as feedback signal VFB.This area has average technical staff and can understand, in other embodiments, feedback circuit 241 may produce depending on the difference of control mode the feedback signal of other form, for example, feedback signal VFB may be for coming from peak value, mean value or weighted average of each lamp bar feedback signal etc.
In the embodiment shown in fig. 3, feedback control loop 242 is a ring feedback control circuit, comprises feedback error amplifier 321, current sensing circuit 322, triangular-wave generator 323, drive signal generator 324 and enable switch 325.Feedback error amplifier 321 comprises an in-phase input end, an inverting input and an output, wherein in-phase input end couples and receives the second reference signal VREF2, inverting input receiving feedback signals VFB, an error amplification signal COMP of output output.The electric current I L that current sensing circuit 322 sensings come from the outputting inductance L of LED driving power transducer 201 produces a current sensing signal ISENSE, and superimposed with a triangular signal SAW of triangular-wave generator 323 generations, generate a slope compensation signal RAMP.Drive signal generator 324 comprises an in-phase input end, an inverting input, an Enable Pin and an output.Enable switch 325 is coupled between the output of feedback error amplifier and the inverting input of drive signal generator 324, error amplification signal COMP receives via the inverting input of the driven signal generator 324 of enable switch 325, and the in-phase input end of the driven signal generator 324 of slope compensation signal RAMP receives.Enable signal EN is couple to the Enable Pin of drive signal generator 324, and drive signal generator 324 outputs are according to error amplification signal COMP, slope compensation signal RAMP, and enable signal EN, produces drive control signal CTRL, controls master power switch 211.Enable switch 325 is also controlled and is turned on and off by enable signal EN.
In this area, having mean level technical staff can understand, and the concrete structure of feedback control loop 242 is not limited to previous embodiment.In other embodiments, feedback control loop 242 may adopt other suitable structure to produce PWM and drive signal, and for example, in other embodiments, feedback control loop 242 may be voltage mode control circuit.Repeat no more herein.
In the illustrated embodiment, enable signal generator 243 comprises a sampling hold circuit 333, one bias current sources 334 of 332, one trsanscondutance amplifiers of 331, one optional bias voltage sources and a timing logic circuit 335.Wherein sampling hold circuit 331 couples receiving feedback signals VFB and PWM dim signal DIM, for the value of sampling feedback VFB during opening dimmer switch at dim signal DIM and during dim signal DIM turn-offs dimmer switch, keeps.In one embodiment, sampling hold circuit 331 sampling dimmer switchs open during the minimum value of feedback signal VFB.In the illustrated embodiment, optional bias voltage source 332 has a direct current (DC) bias voltage VOFFSET, and the first reference signal VREF1 is the poor of the second reference signal VREF2 and bias voltage VOFFSET.In one embodiment, VOFFSET is 100mV, and in other embodiments, VOFFSET may be other suitable value, or the first reference signal may be irrelevant with the second reference signal.Trsanscondutance amplifier 333 comprises an in-phase input end, an inverting input and an output, the output that wherein in-phase input end is couple to sampling hold circuit 331 receives the feedback signal VFB after sampling keeps, inverting input couples and receives the first reference signal VREF1, a mutual conductance amplified current IGM of output output.A bias current IB of bias current sources 334 outputs, IGM is superimposed with mutual conductance amplified current, produces a charging current IC.Timing logic circuit 335 receives PWM dim signal DIM and charging current IC, produces a timing time T, and produce enable signal EN according to timing time T and PWM dim signal DIM in inside.
When VOUT fluctuates in normal range (NR), can make VFB be greater than VREF1, the mutual conductance amplified current IGM of trsanscondutance amplifier 333 output is one and draws electric current, the charging current IC after stack is greater than IB.Larger charging current IC makes timing time T be less than the indicated service time of PWM dim signal DIM.Now enable signal EN is determined by PWM dim signal DIM completely, and enable signal EN is synchronous with DIM signal.
When VOUT drops to the lower limit lower than normal range (NR), now VFB is less than VREF1, and the mutual conductance amplified current IGM of trsanscondutance amplifier 333 outputs is a filling electric current, and the charging current IC after stack is less than IB.Less charging current IC makes the timing time T of timing logic circuit 335 be greater than the indicated turn-off time of PWM dim signal DIM.Now the time that enables of enable signal EN is determined by timing time T, and LED power supply changeover device 201 is worked on after PWM dim signal DIM indication is turn-offed, and to output capacitance COUT charging, makes output voltage VO UT before enabling end, get back to normal range (NR).
In certain embodiments, timing time T can be set up and have maximum and minimum value.The maximum of timing time T can be 5-10 times of 201 work periods of LED driving power transducer in one embodiment.In another embodiment, the minimum value of timing time T can be 1us-2us, and like this, enable signal EN has a minimum and enables the time.
In this area, having average technical staff can understand, and in other embodiments, the structure of enable signal generator 243 may be different from the embodiment shown in Fig. 3, and realizes similar function.For example, Fig. 4 and Fig. 5 show according to the circuit diagram of the enable signal generator 243 of two other embodiment of the utility model.In the embodiment shown in fig. 4, feedback voltage V FB and the first reference signal VREF1 may produce a current controlled signal at output by first error amplifier 433, output to the control end of a controlled current source 434, make this controlled current source directly produce charging current IC.In Fig. 5 embodiment, enable signal generator 243 may further comprise a current mirror 336, has the first current branch and the second current branch.Wherein the in-phase input end of trsanscondutance amplifier 333 receives the first reference signal VREF1, and the output that inverting input is coupled to sampling hold circuit 331 receives the feedback signal VFB after sampling keeps.In the illustrated embodiment, current mirror 336 is a wilson current mirror (Wilson Current Mirror), and the first current branch that the output of trsanscondutance amplifier 333 is couple to current mirror 336 provides electric current for the first current branch.The output of trsanscondutance amplifier 333 is further couple to the bias transistor of the second current branch to set bias point.The second branch road output mutual conductance amplified current IGM of current mirror 336, with formation charging current IC after bias current IB stack.In other embodiments, current mirror 336 may have other structure, for example, current mirror 336 may be a basic current mirror, trsanscondutance amplifier 333 outputs are couple to the first current branch and provide electric current for the first current branch, the grid that is further couple to current mirror 336 two transistors is set biasing simultaneously, the second branch road output mutual conductance amplified current IGM of current mirror 336.
Fig. 5 shows the circuit diagram according to the timing logic circuit 335 of an embodiment of the utility model.As shown in Figure 5, in one embodiment, timing logic circuit 335 comprises timing circuit 601, the first inverters 602, trigger 603, the second inverters 604, or door the 605 and the 3rd inverter 606.Wherein the input IN of timing circuit 601 receives charging current IC and flows into, and timing circuit 601 is by a switch S C1, charging capacitor C1, and P type metal-oxide-semiconductor (metal-semiconductor oxide field-effect transistor) PM1 and a resistance R C1 form.Wherein switch S C1 and charging capacitor C1 coupled in parallel are in input IN with systematically between GND.Input IN is further coupled to the grid of PMOS pipe PM1.The source electrode of PMOS pipe PM1 is couple to system power supply voltage VCC, and drain electrode is couple to one end of resistance R C1.The other end connected system ground GND of resistance R C1.The drain electrode while of PMOS pipe PM1 is as the output of timing circuit 601.The input of the first inverter 602 couples and receives PWM dim signal DIM.In the illustrated embodiment, trigger 603 is a basic rest-set flip-flop that two NAND gate form, and has S (set) end, R (reset) end, Q (positive output) end and Q (negative output) end.Wherein, S end is couple to the output of timing circuit 601, and R end is couple to the output of the first inverter 602.The input of the second inverter 604 is couple to the Q end of trigger 603.Or door 605 first input end is couple to the output of the second inverter 604, the second input couples and receives PWM dim signal DIM.The input of the 3rd inverter 606 is couple to the Q end of trigger 603, and output is couple to the turning on and off of control end control switch SC1 of switch S C1.Or the output output enable signal EN of door 605.
Under initial condition, when PWM dim signal DIM is during by low uprising, or a high level signal of door 605 outputs, make enable signal EN become high level, enable feedback control loop 242.The R of trigger 603 end becomes low level simultaneously, makes a high level signal of Q end output, by the 3rd inverter 606, switch S C1 is disconnected.On the other hand, PMOS pipe PM1 grid voltage is zero, and PMOS pipe is open-minded, will on the S end of trigger 603, draw as high level.Like this, charging current IC starts charging capacitor C to charge, and the timing time T of timing logic circuit starts at since then constantly.
When VOUT fluctuates in normal range (NR), as previously mentioned, IGM is for drawing electric current, and charging current IC is greater than IB.Before PWM dim signal DIM is by high step-down, the voltage on charging capacitor C has just risen to and has made the gate source voltage of PMOS pipe PM1 reach threshold voltage, and PMOS pipe PM1 turn-offs.Now the S of trigger 603 end jumps to low level by high level, and the Q output of trigger 603 becomes high level, or the first input end of door 605 becomes low level.Because DIM signal is now still high level, therefore or the output of door 605 unaffected.In addition, Q end becomes low level, and by switch S C1 conducting, timing time T finishes, charging capacitor C electric discharge, and the voltage drop at electric capacity two ends, makes PMOS pipe PM1 conducting again, and the S end of trigger 603 becomes high level once again again.When DIM signal is during by high step-down, or two inputs of door 605 are low level simultaneously, enable EN signal and drop into low level, do not enable feedback control loop 242.Visible, now the time that enables of EN signal is completely by DIM signal deciding, irrelevant with timing time T.
When the decline overrun of VOUT, the output current IGM of trsanscondutance amplifier 333 becomes filling electric current, and charging current IC is less than IB.When PWM dim signal DIM is during by high step-down, less charging current IC makes voltage on charging capacitor C still for reaching the threshold voltage of PMOS pipe PM1.Now the R of trigger 603 end is high level by low transition, and Q end remains unchanged with Q end, or door 605 continues output high level enable signal EN, continuity ON time.When the voltage at charging capacitor C two ends makes the gate source voltage of PMOS pipe PM1 reach threshold voltage, PMOS pipe PM1 turn-offs, and the S end of trigger 603 is pulled down to low level, and timing time T finishes.Now Q end is exported high level, and Q end is low level.Like this, or door 605 two inputs are all low level, and EN signal drops into low level, no longer enables feedback control loop 242.In this process, the time that enables of EN signal is determined by timing time T.
This area has average technical staff can be understood, and the circuit structure of timing logic circuit 335 is not limited to embodiment as above.In other embodiments, timing logic circuit 335 can have different circuit structures to realize similar timing logic function.
Fig. 6 shows the LED drive system 10 of employing PWM light modulation in the prior art shown in Fig. 1 with the experimental work comparison of wave shape figure of the LED drive circuit system 20 according to an embodiment of the utility model shown in Fig. 2.In this experiment, VIN=6V, L=47uH, COUT=33uF, the every lamp bar of ILED=100mA/, BOOST transducer operating frequency=200KHz, PWM dim signal DIM duty ratio=10%, frequency=20KHz.
Be the experimental waveform figure of LED drive system 10 as shown in Figure 7 A.As shown in the figure, when the duty ratio of PWM dim signal DIM is 10%, in each enables the cycle, inductive current IL cannot be elevated to normal value, for COUT and LED load provide enough energy, make output voltage VO UT continue to decline, LED load current is also far below set point simultaneously, and LED load cannot normally be worked.
Fig. 7 B is depicted as the experimental waveform figure of LED drive circuit system 20.As can be seen, for each, enable the cycle, the survival time of inductive current is greater than the survival time of LED electric current, illustrates that the time of enabling of BOOST transducer is greater than the indicated ON time of DIM signal.Like this, inductive current IL can rise to normal value before the time of enabling finishes, and COUT and LED load can obtain enough energy and maintain normal value, and circuit is normally worked.
About foregoing, obviously a lot of other remodeling of the present utility model and change are also feasible.Here should be understood that in the protection range of containing at the claims of enclosing, the utility model can be applied not to be had specifically described technology herein and implements.Certainly it is also to be understood that, because foregoing only relates to preferred embodiment of the present utility model, so can also carry out much remodeling, do not depart from spirit of the present utility model and protection range that the claim of enclosing contains.Due to disclosed be only preferred embodiment, those of ordinary skills can infer different remodeling and not depart from by the defined spirit of the present utility model of the claim of enclosing and protection range.
Claims (14)
1. a LED drive circuit system, comprises:
LED power supply changeover device, comprises at least one power switch, produces an output voltage for driving LED load;
LED light adjusting circuit, comprises dimmer switch, and described dimmer switch is controlled and turned on and off by a PWM dim signal; And
LED Drive and Control Circuit, is characterized in that, described LED Drive and Control Circuit comprises:
Feedback circuit, couples described LED load, according to described output voltage, produces a feedback signal;
Enable signal generator, couple described feedback circuit, according to described feedback signal, first reference signal and described PWM dim signal, produce an enable signal, when described output voltage is positioned at normal range (NR), described enable signal is synchronizeed with described PWM dim signal, when described output voltage, lower than the lower of described normal range (NR), prescribe a time limit, the duty ratio of described enable signal is greater than described PWM dim signal; And
Feedback control loop, couples described feedback circuit, and according to described feedback signal, second reference signal and described enable signal, produce a drive control signal, controls turning on and off of described power switch.
2. LED drive circuit system as claimed in claim 1, is characterized in that, described enable signal generator comprises:
Sampling hold circuit, couple and receive described feedback signal and described PWM dim signal, for sampling the value of described feedback signal keep this value during described PWM dim signal turn-offs described dimmer switch during opening described dimmer switch at described PWM dim signal;
Trsanscondutance amplifier, there is an in-phase input end, an inverting input and an output, wherein said in-phase input end is couple to described sampling hold circuit and receives the described feedback signal after sampling keeps, described inverting input couples and receives described the first reference signal, described output output mutual conductance amplified current;
Bias current sources, exports a bias current, superimposed with described mutual conductance amplified current, produces a charging current; And
Timing logic circuit, receives described PWM dim signal and described charging current, at a timing time of the inner generation of described timing logic circuit, and produces enable signal according to described timing time and described PWM dim signal.
3. LED drive circuit system as claimed in claim 2, is characterized in that, described the first reference signal is the poor of described the second reference signal and a bias voltage.
4. LED drive circuit system as claimed in claim 2, is characterized in that, described timing time is set has a maximum and a minimum value.
5. LED drive circuit system as claimed in claim 4, is characterized in that, the described maximum of described timing time is 5-10 times of described LED power supply changeover device work period.
6. LED drive circuit system as claimed in claim 4, is characterized in that, the described minimum value of described timing time is 1us-2us.
7. LED drive circuit system as claimed in claim 2, is characterized in that, described timing logic circuit comprises:
Timing circuit, an input of described timing circuit receives described charging current and flows into, described timing circuit is by a switch, a charging capacitor, a PMOS pipe and a resistance form, the switch of wherein said timing circuit and described charging capacitor coupled in parallel are in the input of described timing circuit with systematically, the input of described timing circuit is further coupled to the grid of described PMOS pipe, the source electrode of described PMOS pipe is couple to system power supply voltage, drain electrode is couple to one end of described resistance, described in the other end of described resistance connects systematically, the drain electrode while of described PMOS pipe is as the output of described timing circuit,
The first inverter, input couples and receives described PWM dim signal;
Trigger, described trigger is a basic rest-set flip-flop that two NAND gate form, and has S end, R end, Q end and Q end, wherein, described S end is couple to the output of described timing circuit, and described R end is couple to the output of described the first inverter;
The second inverter, the input of described the second inverter is couple to the Q end of described trigger;
Or door, first input end described or door is couple to the output of described the second inverter, and the second input described or door receives described PWM dim signal, and output described or door is exported described enable signal; And
The 3rd inverter, the input of described the 3rd inverter is couple to the Q end of described trigger, and the control end that the output of described the 3rd inverter is couple to the switch of described timing circuit is controlled the turning on and off of switch of described timing circuit.
8. LED drive circuit system as claimed in claim 1, is characterized in that, described enable signal generator comprises:
Sampling hold circuit, couple and receive described feedback signal and described PWM dim signal, for sampling the value of described feedback signal keep this value during described PWM dim signal turn-offs described dimmer switch during opening described dimmer switch at described PWM dim signal;
The first error amplifier, comprise an in-phase input end, an inverting input and an output, the output that wherein said in-phase input end is couple to described sampling hold circuit receives the described feedback signal after sampling keeps, described inverting input couples and receives described the second reference signal, and described output produces a current controlled signal;
Controlled current source, described controlled current source is couple to the output of described the first error amplifier, according to described current controlled signal, produces a charging current; And
Timing logic circuit, receives described PWM dim signal and described charging current, produces a timing time, and produce enable signal according to described charging current and described PWM dim signal in inside.
9. LED drive circuit system as claimed in claim 1, is characterized in that, described enable signal generator comprises:
Sampling hold circuit, couple and receive described feedback signal and described PWM dim signal, for sampling the value of described feedback signal keep this value during described PWM dim signal turn-offs described dimmer switch during opening described dimmer switch at described PWM dim signal;
Trsanscondutance amplifier, there is an in-phase input end, an inverting input and an output, wherein said inverting input is couple to described sampling hold circuit and receives the described feedback signal after sampling keeps, and described in-phase input end couples and receives described the first reference signal;
Current mirror, described current mirror has the first current branch and the second current branch, the output of wherein said trsanscondutance amplifier is couple to described the first current branch and provides electric current for described the first current branch, the bias transistor that the output of described trsanscondutance amplifier is further couple to described the second current branch is simultaneously to set bias point, and the second branch road of described current mirror is exported a mutual conductance amplified current;
Bias current sources, exports a bias current, superimposed with described mutual conductance amplified current, produces a charging current; And
Timing logic circuit, receives described PWM dim signal and described charging current, produces a timing time, and produce enable signal according to described charging current and described PWM dim signal in inside.
10. LED drive circuit system as claimed in claim 1, is characterized in that, described feedback control loop comprises:
Feedback error amplifier, described feedback error amplifier comprises an in-phase input end, an inverting input and an output, wherein said in-phase input end couples and receives described the second reference signal, described inverting input receives described feedback signal, an error amplification signal of described output output;
Current sensing circuit, sensing comes from the inductive current of described LED power supply changeover device, produces a current sensing signal;
Triangular-wave generator, produces a triangular signal, and described triangular signal and the stack of described current sensing signal produce a slope compensation signal;
Drive signal generator, described drive signal generator comprises an in-phase input end, an inverting input, an Enable Pin and an output, described in-phase input end receives described slope compensation signal, and described inverting input receives described error amplification signal, described Enable Pin receives described enable signal, described output is according to described error amplification signal, and described slope compensation signal and described enable signal, produce drive control signal; And
Enable switch, described enable switch is coupled between described feedback error amplifier out and described drive signal generator inverting input, according to described enable signal, controls and turns on and off.
11. 1 kinds of LED Drive and Control Circuit, is characterized in that, described LED Drive and Control Circuit comprises:
Feedback circuit, couples a LED load, according to the output voltage of LED drive circuit system, produces a feedback signal;
Enable signal generator, couple described feedback circuit, according to described feedback signal, first reference signal and a PWM dim signal, produce an enable signal, when described output voltage is positioned at normal range (NR), described enable signal is synchronizeed with described PWM dim signal, when described output voltage, lower than the lower of described normal range (NR), prescribe a time limit, the duty ratio of described enable signal is greater than described PWM dim signal; And
Feedback control loop, couples described feedback circuit, and according to described feedback signal, second reference signal and described enable signal, produce a drive control signal, and the power switch of controlling in described LED drive circuit system turns on and off.
12. LED Drive and Control Circuit as claimed in claim 11, is characterized in that, described enable signal generator comprises:
Sampling hold circuit, couples and receives described feedback signal and described PWM dim signal, for sampling the value of described feedback signal keep this value at described PWM dim signal indication blocking interval during opening in described PWM dim signal indication;
Trsanscondutance amplifier, there is an in-phase input end, an inverting input and an output, wherein said in-phase input end is couple to described sampling hold circuit and receives the described feedback signal after sampling keeps, described inverting input receives described the first reference signal, a mutual conductance amplified current of described output output;
Bias current sources, exports a bias current, superimposed with described mutual conductance amplified current, produces a charging current; And
Timing logic circuit, receives described PWM dim signal and described charging current, produces a timing time, and produce enable signal according to described timing time and described PWM dim signal in inside.
13. LED Drive and Control Circuit as claimed in claim 12, is characterized in that, described timing logic circuit comprises:
Timing circuit, an input of described timing circuit receives described charging current and flows into, described timing circuit is by a switch, a charging capacitor, a PMOS pipe and a resistance form, the switch of wherein said timing circuit and described charging capacitor coupled in parallel are in the input of described timing circuit with systematically, the input of described timing circuit is further coupled to the grid of described PMOS pipe, the source electrode of described PMOS pipe is couple to system power supply voltage, drain electrode is couple to one end of described resistance, described in the other end of described resistance connects systematically, the drain electrode while of described PMOS pipe is as the output of described timing circuit,
The first inverter, input receives described PWM dim signal;
Trigger, described trigger is a basic rest-set flip-flop that two NAND gate form, and has S end, R end, Q end and Q end, wherein, described S end is couple to the output of described timing circuit, and described R end is couple to the output of described the first inverter;
The second inverter, the input of described the second inverter is couple to the Q end of described trigger;
Or door, first input end described or door is couple to the output of described the second inverter, and the second input described or door receives described PWM dim signal, and output described or door is exported described enable signal; And
The 3rd inverter, the input of described the 3rd inverter is couple to the Q end of described trigger, and the control end that the output of described the 3rd inverter is couple to the switch of described timing circuit is controlled the turning on and off of switch of described timing circuit.
14. LED Drive and Control Circuit as claimed in claim 11, is characterized in that, described the first reference signal is the poor of described the second reference signal and a bias voltage.
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| CN201320867895.XU CN203722871U (en) | 2013-12-26 | 2013-12-26 | LED drive circuit system and LED drive control circuit |
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| CN104917571B (en) * | 2015-06-15 | 2017-06-09 | 南京南大光电工程研究院有限公司 | The high speed LED light communication quasi- switch modulator of resonant mode |
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