TWI456695B - 半導體裝置及其形成之方法 - Google Patents

半導體裝置及其形成之方法 Download PDF

Info

Publication number
TWI456695B
TWI456695B TW097100225A TW97100225A TWI456695B TW I456695 B TWI456695 B TW I456695B TW 097100225 A TW097100225 A TW 097100225A TW 97100225 A TW97100225 A TW 97100225A TW I456695 B TWI456695 B TW I456695B
Authority
TW
Taiwan
Prior art keywords
region
conductivity type
semiconductor layer
doping concentration
semiconductor
Prior art date
Application number
TW097100225A
Other languages
English (en)
Other versions
TW200837883A (en
Inventor
Evgueniy Stefanov
Alain Deram
Jean-Michel Reynes
Original Assignee
Freescale Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Freescale Semiconductor Inc filed Critical Freescale Semiconductor Inc
Publication of TW200837883A publication Critical patent/TW200837883A/zh
Application granted granted Critical
Publication of TWI456695B publication Critical patent/TWI456695B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802Vertical DMOS transistors, i.e. VDMOS transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843Source or drain regions of field-effect devices
    • H01L29/0847Source or drain regions of field-effect devices of field-effect transistors with insulated gate
    • H01L29/0852Source or drain regions of field-effect devices of field-effect transistors with insulated gate of DMOS transistors
    • H01L29/0873Drain regions
    • H01L29/0878Impurity concentration or distribution
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66674DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/66712Vertical DMOS transistors, i.e. VDMOS transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42364Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
    • H01L29/42368Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)
  • Thyristors (AREA)

Claims (16)

  1. 一種形成半導體裝置的方法,其包含:提供一半導體基板(4);在該半導體基板(4)上提供一第一導電類型之一半導體層(6),該半導體層(6)具有該第一導電類型之一第一摻雜濃度;在該半導體層(6)中形成該第一導電類型之一第一區(8);在該半導體層(6)上及該第一區(8)之部分上形成一控制區(26);在該半導體層上形成一遮罩層,該遮罩層加外框於該第一區(8)之部分上的該半導體層(6)之一表面(10)的一第一部分(58);將一第二導電類型之半導體材料提供予該已加外框第一部分(58),以在該半導體層(6)中提供一第二區(12);驅動該第一區(8)及第二區(12)進入該半導體層中,以形成該第一導電類型之一預控制區(8),其自該表面(10)及在該控制區(26)之一部分下延伸進入該半導體層,且具有一第一摻雜濃度之該第二導電類型之一漸變本體區(12)在該預控制區(8)下延伸進入該半導體;將該第二導電類型之半導體材料提供予該已加外框第一部分(58),以提供延伸進入該預控制區(8)的具有一第二摻雜濃度之一本體區(14),其中該預控制區(8)增加圍繞該本體區(14)之該半導體層(6)中之該第一導電類型之 該第一摻雜濃度;及在該本體區(14)中形成該第一導電類型之一電流電極區(18)。
  2. 如請求項1之方法,其中該漸變本體區(12)之該第一摻雜濃度遠離該預控制區(8)而降低。
  3. 如請求項1或2之方法,其中該漸變本體區(12)在該預控制區(8)下延伸至該基板(4)。
  4. 如請求項1或2之方法,其中該第二導電類型之該第二摻雜濃度係大於該第二導電類型的該第一摻雜濃度。
  5. 如請求項1或2之方法,其中該預控制區(8)具有該第一導電類型之一第二摻雜濃度,其中該第二摻雜濃度係大於該半導體層(6)之該第一導電類型之該第一摻雜濃度。
  6. 如請求項1或2之方法,其中該基板(4)係該第一導電類型且形成另一電流電極區(4),且其中在操作中當該半導體裝置係在一開啟狀態時,在該等電流電極區(4、18)間流動之電流實質上依一V形通過該本體區(14)、該預控制區(8)及該半導體層(6)。
  7. 如請求項1或2之方法,其中形成一第一區(8)之該步驟包含在該半導體層(6)上毯覆式植入該第一導電類型之半導體材料。
  8. 如請求項1或2之方法,其中該驅動步驟包含以一第一溫度之一第一熱驅動操作,且其中提供一本體區(14)之步驟包含以一第二溫度執行一第二熱驅動操作,以驅動該第二導電類型之該半導體材料進入該預控制區(8)內,其 中該第一溫度係大於該第二溫度。
  9. 如請求項1或2之方法,其中形成一電流電極區(14)之步驟包含:將該第一導電類型的半導體材料提供至該已加外框第一部分(58)之一部分及進入該本體區(14)內。
  10. 如請求項1或2之方法,其中形成一遮罩層之步驟包含:在該控制區(26)上形成一介電層(28),及移除該介電層(28)及該控制區(26)之一部分,以提供一穿過該介電層(28)及該控制區(26)之開口(58),且其中該已加外框第一部分包含該開口(58)。
  11. 如請求項1或2之方法,其中形成一第一區(8)之該步驟包含在該半導體層(6)中提供該第一導電類型之半導體材料,其具有一在1至3e12 cm-2 之範圍中的摻雜劑量,其中提供一第二導電類型之半導體材料以提供該第二區(12)的步驟,包含提供半導體材料至具有在1至2e13 cm-2 之範圍中的一摻雜劑量之該已加外框第一部分(58),且其中該半導體層(6)具有一約1.5e16 cm-3 之摻雜濃度。
  12. 一種半導體裝置,其包含:一半導體基板(4),其係一第一導電類型;該第一導電類型的一半導體層(6),其係形成在該半導體基板(4)上;一控制區(26),其係形成在該半導體層(6)之一表面(10)上;該第一導電類型之一預控制區(8),其係自該半導體層(6)之該表面(10)及在該控制區(26)之一部分下延伸進入 該半導體層(6)中;該第二導電類型且具有一第一摻雜濃度之一漸變本體區(12),其形成在該半導體層(6)中,且在該預控制區(8)下延伸進入該半導體層;具有一第二摻雜濃度之一本體區(14),其形成在該預控制區(8)中,且自該表面(10)延伸進入該預控制區(8);及該第一導電類型之電流電極區(18),其係形成在該本體區(14)中,且自該表面(10)延伸進入該本體區(14);及其中該基板(4)形成另一電流電極區(4),且其中在操作中,當該半導體裝置係在一開啟狀態時,在該等電流電極區(4、18)間流動之電流實質上依一V形通過該本體區(14)、該預控制區(8)及該半導體層(6)。
  13. 如請求項12之半導體裝置,其中該漸變本體區(12)之該第一摻雜濃度遠離該預控制區(8)而降低。
  14. 如請求項12或13之半導體裝置,其中該漸變本體區(12)在該預控制區(8)下延伸至該基板(4)。
  15. 如請求項12或13之半導體裝置,其中該第二導電類型之該第二摻雜濃度係大於該第二導電類型的該第一摻雜濃度。
  16. 如請求項12或13之半導體裝置,其中該半導體層(6)具有該第一導電類型之一第一摻雜濃度,且該預控制區(8)具有該第一導電類型之一第二摻雜濃度,其中該第二摻雜濃度係大於該第一摻雜濃度。
TW097100225A 2007-01-04 2008-01-03 半導體裝置及其形成之方法 TWI456695B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/IB2007/000522 WO2008081225A1 (en) 2007-01-04 2007-01-04 Semiconductor device and method of forming a semiconductor device

Publications (2)

Publication Number Publication Date
TW200837883A TW200837883A (en) 2008-09-16
TWI456695B true TWI456695B (zh) 2014-10-11

Family

ID=38283167

Family Applications (1)

Application Number Title Priority Date Filing Date
TW097100225A TWI456695B (zh) 2007-01-04 2008-01-03 半導體裝置及其形成之方法

Country Status (4)

Country Link
US (1) US8217448B2 (zh)
CN (1) CN101589471B (zh)
TW (1) TWI456695B (zh)
WO (1) WO2008081225A1 (zh)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010010408A (ja) * 2008-06-27 2010-01-14 Sanyo Electric Co Ltd 半導体装置及びその製造方法
WO2010044226A1 (ja) * 2008-10-17 2010-04-22 パナソニック株式会社 半導体装置およびその製造方法
US20100314695A1 (en) * 2009-06-10 2010-12-16 International Rectifier Corporation Self-aligned vertical group III-V transistor and method for fabricated same
JP4938157B2 (ja) * 2009-10-22 2012-05-23 パナソニック株式会社 半導体装置およびその製造方法
US11075295B2 (en) * 2018-07-13 2021-07-27 Cree, Inc. Wide bandgap semiconductor device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08288303A (ja) * 1995-04-11 1996-11-01 Sharp Corp 縦型電界効果トランジスタ及びその製造方法
US5900662A (en) * 1995-11-06 1999-05-04 Sgs Thomson Microelectronics S.R.L. MOS technology power device with low output resistance and low capacitance, and related manufacturing process
US20030057478A1 (en) * 2001-09-12 2003-03-27 Chong-Man Yun Mos-gated power semiconductor device

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5130767C1 (en) * 1979-05-14 2001-08-14 Int Rectifier Corp Plural polygon source pattern for mosfet
ATE298929T1 (de) * 1999-11-17 2005-07-15 Freescale Semiconductor Inc Herstellungsverfahren für eine diode zur integration mit einem halbleiterbauelement und herstellungsverfahren für ein transistor- bauelement mit einer integrierten diode
US6747312B2 (en) * 2002-05-01 2004-06-08 International Rectifier Corporation Rad hard MOSFET with graded body diode junction and reduced on resistance
EP1387408A1 (en) 2002-06-12 2004-02-04 Motorola, Inc. Power semiconductor device and method of manufacturing the same
KR100873419B1 (ko) * 2002-06-18 2008-12-11 페어차일드코리아반도체 주식회사 높은 항복 전압, 낮은 온 저항 및 작은 스위칭 손실을갖는 전력용 반도체 소자

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08288303A (ja) * 1995-04-11 1996-11-01 Sharp Corp 縦型電界効果トランジスタ及びその製造方法
US5900662A (en) * 1995-11-06 1999-05-04 Sgs Thomson Microelectronics S.R.L. MOS technology power device with low output resistance and low capacitance, and related manufacturing process
US20030057478A1 (en) * 2001-09-12 2003-03-27 Chong-Man Yun Mos-gated power semiconductor device

Also Published As

Publication number Publication date
US20100109078A1 (en) 2010-05-06
TW200837883A (en) 2008-09-16
CN101589471A (zh) 2009-11-25
CN101589471B (zh) 2012-05-23
WO2008081225A1 (en) 2008-07-10
US8217448B2 (en) 2012-07-10

Similar Documents

Publication Publication Date Title
TWI456695B (zh) 半導體裝置及其形成之方法
EP2299481A3 (en) Semiconductor power device with multiple drain structure and corresponding manufacturing process
JP2002313810A5 (zh)
JP2008244460A5 (zh)
WO2008057392A3 (en) Methods of fabricating semiconductor devices including implanted regions for providing low-resistance contact to buried layers and related devices
JP2007531268A5 (zh)
JP2009520365A5 (zh)
JP2006186303A5 (zh)
WO2007053339A3 (en) Method for forming a semiconductor structure and structure thereof
JP2008205444A5 (zh)
JP2009521131A5 (zh)
JP2006173432A5 (zh)
JP2006349673A (ja) ナノワイヤセンサ装置およびナノワイヤセンサ装置構造の製造方法
JP2010219515A5 (zh)
JP2005276930A5 (zh)
JPH04107877A (ja) 半導体装置及びその製造方法
JP2019021871A5 (zh)
JP2009054999A5 (zh)
JP2008182055A5 (zh)
JP2009054999A (ja) 半導体装置およびその製造方法
JP2010040951A5 (zh)
JP2006345003A5 (zh)
JP2005109389A5 (zh)
JP2006332603A5 (zh)
JP2004111479A5 (zh)