TWI452313B - Fpga-based embedded inspection system for circuit board - Google Patents

Fpga-based embedded inspection system for circuit board Download PDF

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TWI452313B
TWI452313B TW101144739A TW101144739A TWI452313B TW I452313 B TWI452313 B TW I452313B TW 101144739 A TW101144739 A TW 101144739A TW 101144739 A TW101144739 A TW 101144739A TW I452313 B TWI452313 B TW I452313B
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circuit board
fpga
detection signal
lines
inspection system
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TW101144739A
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TW201421049A (en
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Chih Yung Chen
Wen Jie Chen
Chia Wei Hsu
Cheng Che Wu
Shen Fu Huang
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Univ Shu Te
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  • Tests Of Electronic Circuits (AREA)

Description

基於FPGA之嵌入式電路板檢測系統 FPGA-based embedded circuit board inspection system

本發明是有關於一種基於FPGA之嵌入式電路板檢測系統,特別是有關於一種能夠以圖形顯示電路板之線路是否導通之檢測系統。 The present invention relates to an FPGA-based embedded circuit board inspection system, and more particularly to a detection system capable of graphically displaying whether a circuit board is conductive.

電性檢測在印刷電路板(Printed circuit board,PCB)的製造過程中是十分重要的一環。在空板製作過程中,由於電路板不斷朝高密度、細間距及多層次的方向發展,難免會因為外在因素而產生瑕疵,如:短路、斷路、漏電等,若這些瑕疵在佈建電子元件前被發現,便能夠有效地降低成本的浪費。 Electrical detection is an important part of the manufacturing process of printed circuit boards (PCBs). In the process of making empty boards, as the board continues to develop toward high density, fine pitch and multi-level, it will inevitably cause defects due to external factors, such as short circuit, open circuit, leakage, etc. The components are found before, which can effectively reduce the waste of cost.

習知之印刷電路板檢測方法係藉由拍照之影像式檢測方式,以視覺方式觀測印刷電路板之線路外觀是否有瑕疵,藉此控制產品的品質及良率。 The conventional printed circuit board detection method visually observes whether the appearance of the printed circuit board is flawed by the image-based detection method of photographing, thereby controlling the quality and yield of the product.

然而,習知之影像式檢測方式並無法檢測多層電路板之內層電路,因此無法檢測電路板之內部線路是否有瑕疵。 However, the conventional image detection method cannot detect the inner layer circuit of the multilayer circuit board, and therefore it is impossible to detect whether the internal circuit of the circuit board is defective.

有鑑於上述習知技藝之問題,本發明之其中之一目的在於提供一種基於現場可程式邏輯閘陣列(Field-programmable gate array,FPGA)之嵌入式電路板檢測系統以有效地檢測電路板內部之線 路,藉此提高電路板檢測之準確率。此外,藉由FPGA數量龐大且可供使用者自由設定的I/O腳位,更適合較複雜的電路板之佈線結構。 In view of the above problems of the prior art, one of the objects of the present invention is to provide an embedded circuit board detection system based on a field-programmable gate array (FPGA) to effectively detect the inside of the circuit board. line Road, thereby improving the accuracy of board inspection. In addition, with the large number of FPGAs and user-configurable I/O pins, it is more suitable for the wiring structure of more complex boards.

緣是,根據本發明之另一目的,本發明提出一種基於FPGA之嵌入式電路板檢測系統,用以對具有複數條線路之印刷電路板進行電性導通測試。此基於FPGA之嵌入式電路板檢測系統至少包含FPGA晶片、嵌入式裝置及顯示裝置。 According to another object of the present invention, the present invention provides an FPGA-based embedded circuit board inspection system for electrically conducting a test of a printed circuit board having a plurality of lines. The FPGA-based embedded circuit board inspection system includes at least an FPGA chip, an embedded device, and a display device.

續言之,FPGA晶片係電性連接探針床。此FPGA晶片藉由探針床傳送第一檢測訊號至印刷電路板以檢測各個線路之電性導通與否而取得第二檢測訊號。 In other words, the FPGA chip is electrically connected to the probe bed. The FPGA chip obtains a second detection signal by transmitting a first detection signal to the printed circuit board by the probe bed to detect electrical continuity of each line.

此外,探針床具有複數個彈性(retractable)探針。此探針床更機械式連接升降裝置以使得探針床之彈性探針選擇性地接觸印刷電路板。因此,若遇到印刷電路板鋪銅不平均或檢測平台有些許落差時,便可利用彈性探針精準碰觸檢測點,以降低檢測時之誤差。 In addition, the probe bed has a plurality of retractable probes. The probe bed is more mechanically coupled to the lifting device such that the elastomeric probe of the probe bed selectively contacts the printed circuit board. Therefore, if the copper on the printed circuit board is unevenly distributed or the detection platform is slightly different, the elastic probe can be used to accurately touch the detection point to reduce the error during detection.

前述之升降裝置係藉由伺服馬達驅動,並且此檢測裝置更藉由FPGA晶片調整伺服馬達之脈波寬度以驅動伺服馬達。 The aforementioned lifting device is driven by a servo motor, and the detecting device further adjusts the pulse width of the servo motor by the FPGA chip to drive the servo motor.

續言之,嵌入式裝置則藉由傳輸介面電性連接FPGA晶片以擷取第二檢測訊號,且嵌入式裝置圖型化第二檢測訊號以取得並傳送第三檢測訊號。其中,FPGA晶片係藉由第一檢測訊號對每一線路進行編號,藉以使得嵌入式裝置將已編號之線路圖型化。藉以使得檢測人員能夠快速掌握問題點,並且降低不必要的人力浪費。 In other words, the embedded device electrically connects the FPGA chip to the second detection signal by using the transmission interface, and the embedded device patterns the second detection signal to obtain and transmit the third detection signal. The FPGA chip numbers each line by the first detection signal, so that the embedded device maps the numbered lines. In this way, the inspectors can quickly grasp the problem points and reduce unnecessary labor waste.

前述之傳輸介面係選自由國際電機電子工程師協會(IEEE)1394介 面、通用序列匯排流(USB)、序列式高階技術附件(SATA)、整合式驅動電子(IDE)、建議標準232(RS232)及小型電腦系統介面(SCSI)所組成之族群。 The aforementioned transmission interface is selected from the International Society of Electrical and Electronics Engineers (IEEE) 1394 Ethnicity, Universal Serial Bus (USB), Serial Advanced Technology Attachment (SATA), Integrated Drive Electronics (IDE), Recommended Standard 232 (RS232), and Small Computer System Interface (SCSI).

續言之,顯示裝置係電性連接嵌入式裝置。此顯示裝置接收第三檢測訊號以顯示印刷電路板之線路,並且以圖形顯示各個線路之導通與否。藉此在線式(In-circuit)之電路板檢測系統,可及時發現電路板瑕疵,以有效提高電路板檢測之準確率。 In other words, the display device is electrically connected to the embedded device. The display device receives the third detection signal to display the circuit of the printed circuit board, and graphically displays whether the respective lines are turned on or not. By using the in-circuit circuit board detection system, the circuit board can be found in time to effectively improve the accuracy of the board detection.

此外,印刷電路板更包含複數個檢測接點及複數個接地接點,檢測接點係藉由線路電性連接於接地接點。其中,FPGA晶片係藉由探針床傳送第一檢測訊號至各個檢測接點,而FPGA晶片係測量各個接地接點之電位以檢測各個線路之導通與否而取得第二檢測訊號。 In addition, the printed circuit board further includes a plurality of detecting contacts and a plurality of grounding contacts, and the detecting contacts are electrically connected to the grounding contacts by wires. The FPGA chip transmits the first detection signal to each detection contact by the probe bed, and the FPGA chip measures the potential of each ground contact to detect whether the respective lines are turned on or not to obtain the second detection signal.

承上所述,依據本發明之基於FPGA之嵌入式電路板檢測系統,其可具有一或多個下述優點: In view of the above, an FPGA-based embedded circuit board inspection system in accordance with the present invention may have one or more of the following advantages:

(1)本發明之基於FPGA之嵌入式電路板檢測系統藉由線路之圖型化,使得檢測人員能夠快速掌握問題點,並且降低不必要的人力浪費。 (1) The FPGA-based embedded circuit board inspection system of the present invention enables the inspectors to quickly grasp the problem points and reduce unnecessary labor waste by the patterning of the lines.

(2)本發明之基於FPGA之嵌入式電路板檢測系統,可及時發現電路板瑕疵,以有效提高電路板檢測之準確率。 (2) The FPGA-based embedded circuit board detection system of the present invention can timely discover the circuit board 瑕疵 to effectively improve the accuracy of the circuit board detection.

(3)本發明之基於FPGA之嵌入式電路板檢測系統利用彈性探針精準碰觸檢測點,以降低檢測時之誤差。 (3) The FPGA-based embedded circuit board detection system of the present invention utilizes an elastic probe to accurately touch the detection point to reduce the error during detection.

茲為使 貴審查委員對本發明之技術特徵及所達到之功效有更進 一步之瞭解與認識,謹佐以較佳之實施例及配合詳細之說明如後。 In order to make the reviewer's technical characteristics and the effects achieved by the reviewer more advanced A one-step understanding and understanding, please refer to the preferred embodiment and the detailed description as follows.

10‧‧‧FPGA晶片 10‧‧‧FPGA chip

11‧‧‧第一檢測訊號 11‧‧‧First detection signal

12‧‧‧第二檢測訊號 12‧‧‧Second detection signal

20‧‧‧印刷電路板 20‧‧‧Printed circuit board

30‧‧‧探針床 30‧‧‧ probe bed

31‧‧‧彈性探針 31‧‧‧Elastic probe

40‧‧‧嵌入式裝置 40‧‧‧ embedded devices

41‧‧‧第三檢測訊號 41‧‧‧ Third detection signal

50‧‧‧顯示裝置 50‧‧‧ display device

60‧‧‧升降裝置 60‧‧‧ lifting device

61‧‧‧伺服馬達 61‧‧‧Servo motor

71、81-82、91-92‧‧‧線路 71, 81-82, 91-92‧‧‧ lines

72、83、93‧‧‧檢測接點 72, 83, 93‧‧‧ test contacts

73、84-85、94-95‧‧‧接地接點 73, 84-85, 94-95‧‧‧ Grounding contacts

第1圖係為本發明之基於FPGA之嵌入式電路板檢測系統之方塊圖。 Figure 1 is a block diagram of an FPGA-based embedded circuit board inspection system of the present invention.

第2圖係為本發明之基於FPGA之嵌入式電路板檢測系統之線路是否導通之示意圖。 Figure 2 is a schematic diagram showing whether the circuit of the FPGA-based embedded circuit board detection system is turned on.

以下將參照相關圖式,說明依本發明之基於現場可程式邏輯閘陣列(Field-programmable gate array,FPGA)之嵌入式電路板檢測系統之實施例,為使便於理解,下述實施例中之相同元件係以相同之符號標示來說明。 Hereinafter, an embodiment of an embedded circuit board detecting system based on a Field-programmable Gate Array (FPGA) according to the present invention will be described with reference to the related drawings, in order to facilitate understanding, in the following embodiments. The same elements are denoted by the same reference numerals.

請參閱第1圖及第2圖,第1圖係為本發明之基於FPGA之嵌入式電路板檢測系統之方塊圖。第2圖係為本發明之基於FPGA之嵌入式電路板檢測系統之線路是否導通之示意圖。此基於FPGA之嵌入式電路板檢測系統至少包含FPGA晶片10、嵌入式裝置40及顯示裝置50。 Please refer to FIG. 1 and FIG. 2 , which is a block diagram of an FPGA-based embedded circuit board detection system of the present invention. Figure 2 is a schematic diagram showing whether the circuit of the FPGA-based embedded circuit board detection system is turned on. The FPGA-based embedded circuit board inspection system includes at least an FPGA chip 10, an embedded device 40, and a display device 50.

續言之,FPGA晶片10係電性連接探針床30。此FPGA晶片10可例如藉由探針床30之彈性(retractable)探針31傳送第一檢測訊號11至印刷電路板20之檢測接點72、83、93,藉以測量印刷電路板20之接地接點73、84、85、94、95之電位以檢測線路71、81、82、91、92之電性導通與否而取得第二檢測訊號12。其中,檢測接點72、83、93係藉由線路71、81、82、91、92電性連接於接地接點 73、84、85、94、95。 In other words, the FPGA chip 10 is electrically connected to the probe bed 30. The FPGA chip 10 can transmit the first detection signal 11 to the detection contacts 72, 83, 93 of the printed circuit board 20, for example, by the retractable probe 31 of the probe bed 30, thereby measuring the ground connection of the printed circuit board 20. The potentials of the points 73, 84, 85, 94, and 95 are used to detect the electrical conduction of the lines 71, 81, 82, 91, 92 to obtain the second detection signal 12. Wherein, the detecting contacts 72, 83, 93 are electrically connected to the ground contact by the lines 71, 81, 82, 91, 92. 73, 84, 85, 94, 95.

續言之,第一檢測訊號11可例如為電流或電壓。接地接點73、84、85、94、95可例如藉由電阻電性連接於接地端。當FPGA晶片10例如傳送第一檢測訊號11至檢測接點72時,便使得檢測接點72為高電位,若線路71為導通狀態,則接地接點73為高電位。 In other words, the first detection signal 11 can be, for example, a current or a voltage. The ground contacts 73, 84, 85, 94, 95 can be electrically connected to the ground terminal, for example, by a resistor. When the FPGA chip 10 transmits the first detection signal 11 to the detection contact 72, for example, the detection contact 72 is at a high potential, and if the line 71 is in an on state, the ground contact 73 is at a high potential.

反之,當FPGA晶片10例如傳送第一檢測訊號11至檢測接點83時,便使得檢測接點83為高電位,若線路82為斷路狀態,則接地接點85為低電位(接地)。藉此便能由接地接點73、84、85、94、95之電位高低以檢測線路71、81、82、91、92之電性導通與否。 On the contrary, when the FPGA chip 10 transmits the first detection signal 11 to the detection contact 83, for example, the detection contact 83 is at a high potential, and if the line 82 is in an open state, the ground contact 85 is at a low potential (ground). Thereby, the potential of the ground contacts 73, 84, 85, 94, 95 can be used to detect whether the lines 71, 81, 82, 91, 92 are electrically connected.

此外,探針床30更可例如經由焊接或壓接等方式機械式連接升降裝置60,以使得探針床30之彈性探針31選擇性地接觸印刷電路板20之檢測接點72、83、93及接地接點73、84、85、94、95。其中,彈性探針31可例如為具有彈簧機構之金屬探針,惟本創作不限於此,只要能夠精準接觸每一檢測點之探針,皆應屬本發明所請求保護之範圍。因此,若遇到印刷電路板20鋪銅不平均或檢測平台有些許落差時,便可利用彈性探針31精準碰觸檢測點,以降低檢測時之誤差。 In addition, the probe bed 30 can be mechanically connected to the lifting device 60, for example, by soldering or crimping, so that the elastic probe 31 of the probe bed 30 selectively contacts the detecting contacts 72, 83 of the printed circuit board 20, 93 and ground contacts 73, 84, 85, 94, 95. The elastic probe 31 can be, for example, a metal probe having a spring mechanism. However, the present invention is not limited thereto, and any probe capable of accurately contacting each detection point should fall within the scope of the claimed invention. Therefore, if the copper unevenness of the printed circuit board 20 is encountered or the detection platform is slightly different, the elastic probe 31 can be used to accurately touch the detection point to reduce the error during detection.

此外,升降裝置60係可例如藉由伺服馬達61驅動,並且此檢測裝置更可藉由FPGA晶片10調整伺服馬達61之脈波寬度以驅動伺服馬達61,惟本發明不限於此,只要能夠驅動升降裝置60之馬達,皆應屬本發明所請求保護之範圍。 In addition, the lifting device 60 can be driven by the servo motor 61, for example, and the detecting device can adjust the pulse width of the servo motor 61 to drive the servo motor 61 by the FPGA chip 10. However, the present invention is not limited thereto, as long as it can be driven. The motor of the lifting device 60 is intended to be within the scope of the claimed invention.

續言之,嵌入式裝置40則藉由傳輸介面電性連接FPGA晶片10以擷取第二檢測訊號12,且嵌入式裝置40圖型化第二檢測訊號12以取 得並傳送第三檢測訊號41。其中,FPGA晶片10係藉由第一檢測訊號11對每一線路71、81、82、91、92進行編號,藉以使得嵌入式裝置40將已編號之線路71、81、82、91、92圖型化。 In other words, the embedded device 40 is electrically connected to the FPGA chip 10 through the transmission interface to capture the second detection signal 12, and the embedded device 40 maps the second detection signal 12 to take The third detection signal 41 is obtained and transmitted. The FPGA chip 10 numbers each line 71, 81, 82, 91, 92 by the first detection signal 11, so that the embedded device 40 will map the numbered lines 71, 81, 82, 91, 92. Modeling.

前述之嵌入式裝置40可例如為使用基於三星(Samsung)公司之S3C6410嵌入式晶片之嵌入式開發板,惟本發明不限於此。前述之傳輸介面係選自由國際電機電子工程師協會(IEEE)1394介面、通用序列匯排流(USB)、序列式高階技術附件(SATA)、整合式驅動電子(IDE)、建議標準232(RS232)及小型電腦系統介面(SCSI)所組成之族群,惟本發明不限於此。 The aforementioned embedded device 40 may be, for example, an embedded development board using an S3C6410 embedded chip based on Samsung, but the invention is not limited thereto. The aforementioned transmission interface is selected from the International Institute of Electrical and Electronics Engineers (IEEE) 1394 interface, Universal Serial Bus (USB), Serial High-Tech Accessories (SATA), Integrated Drive Electronics (IDE), and Recommended Standard 232 (RS232). And a small computer system interface (SCSI) group, but the invention is not limited thereto.

續言之,顯示裝置50係電性連接嵌入式裝置40。此顯示裝置50接收第三檢測訊號41以顯示印刷電路板20之線路71、81、82、91、92,並且以圖形顯示各個線路71、81、82、91、92之導通與否。其中,嵌入式裝置40可例如以視訊圖形陣列(Video Graphics Array,VGA)或高畫質晰度多媒體介面(High Definition Multimedia Interface,HDMI)輸出至顯示裝置50,而顯示裝置50可例如為液晶顯示器、場發射顯示器、電漿顯示器、電致發光顯示器或真空螢光顯示器,惟本發明不限於此。 In other words, the display device 50 is electrically connected to the embedded device 40. The display device 50 receives the third detection signal 41 to display the lines 71, 81, 82, 91, 92 of the printed circuit board 20, and graphically displays the conduction of the respective lines 71, 81, 82, 91, 92. The embedded device 40 can be output to the display device 50, for example, by a video graphics array (VGA) or a high definition multimedia interface (HDMI), and the display device 50 can be, for example, a liquid crystal display. A field emission display, a plasma display, an electroluminescent display or a vacuum fluorescent display, but the invention is not limited thereto.

舉例而言,顯示裝置50係顯示各個線路71、81、82、91、92在印刷電路板20上之相對位置。若線路71為導通狀態,則顯示裝置50便可例如將線路71以實線表示。 For example, display device 50 displays the relative positions of respective lines 71, 81, 82, 91, 92 on printed circuit board 20. If the line 71 is in the on state, the display device 50 can, for example, indicate the line 71 as a solid line.

反之,若線路82為斷路狀態,則顯示裝置50便可例如將線路82以虛線表示。惟本發明不限於此,只要能夠在顯示裝置50上區別各個線路71、81、82、91、92之導通與否之顯示方式,皆應屬本發 明所請求保護之範圍。藉以使得檢測人員能夠快速掌握問題點,並且降低不必要的人力浪費,更能有效提高電路板檢測之準確率。 Conversely, if line 82 is in an open state, display device 50 can, for example, indicate line 82 as a dashed line. However, the present invention is not limited thereto, and any display manner of distinguishing whether the respective lines 71, 81, 82, 91, 92 are turned on or off on the display device 50 should belong to the present invention. The scope of protection requested by Ming. In order to enable the inspectors to quickly grasp the problem points, and reduce unnecessary labor waste, it can effectively improve the accuracy of board detection.

以上所述僅為舉例性,而非為限制性者。任何未脫離本發明之精神與範疇,而對其進行之等效修改或變更,均應包含於後附之申請專利範圍中。 The above is intended to be illustrative only and not limiting. Any equivalent modifications or alterations to the spirit and scope of the invention are intended to be included in the scope of the appended claims.

10‧‧‧FPGA晶片 10‧‧‧FPGA chip

11‧‧‧第一檢測訊號 11‧‧‧First detection signal

12‧‧‧第二檢測訊號 12‧‧‧Second detection signal

20‧‧‧印刷電路板 20‧‧‧Printed circuit board

30‧‧‧探針床 30‧‧‧ probe bed

31‧‧‧彈性探針 31‧‧‧Elastic probe

40‧‧‧嵌入式裝置 40‧‧‧ embedded devices

41‧‧‧第三檢測訊號 41‧‧‧ Third detection signal

50‧‧‧顯示裝置 50‧‧‧ display device

60‧‧‧升降裝置 60‧‧‧ lifting device

61‧‧‧伺服馬達 61‧‧‧Servo motor

Claims (9)

一種基於現場可程式邏輯閘陣列(Field-programmable gate array,FPGA)之嵌入式電路板檢測系統,用以對具有複數條線路之一印刷電路板進行電性導通測試,該基於FPGA之嵌入式電路板檢測系統包含:一FPGA晶片,係電性連接一探針床,該FPGA晶片藉由該探針床傳送一第一檢測訊號至該印刷電路板以檢測該些線路之電性導通與否而取得一第二檢測訊號;一嵌入式裝置,係藉由一傳輸介面電性連接該FPGA晶片以擷取該第二檢測訊號,且該嵌入式裝置圖型化該第二檢測訊號以取得並傳送一第三檢測訊號,其中該FPGA晶片係藉由該第一檢測訊號對每一該些線路進行編號,藉以使得該嵌入式裝置將已編號之該些線路圖型化;以及一顯示裝置,係電性連接該嵌入式裝置,該顯示裝置接收該第三檢測訊號以顯示該印刷電路板之該些線路之一線路圖。 An embedded circuit board detection system based on a field-programmable gate array (FPGA) for electrically conducting a test on a printed circuit board having a plurality of lines, the FPGA-based embedded circuit The board detection system includes: an FPGA chip electrically connected to a probe bed, wherein the FPGA chip transmits a first detection signal to the printed circuit board to detect electrical continuity of the lines. Obtaining a second detection signal; an embedded device electrically connecting the FPGA chip by a transmission interface to capture the second detection signal, and the embedded device patterning the second detection signal to obtain and transmit a third detection signal, wherein the FPGA chip numbers each of the lines by the first detection signal, so that the embedded device maps the numbered lines; and a display device The embedded device is electrically connected, and the display device receives the third detection signal to display a circuit diagram of the lines of the printed circuit board. 如申請專利範圍第1項所述之基於FPGA之嵌入式電路板檢測系統,其中該探針床具有複數個彈性探針,該探針床更機械式連接一升降裝置以使得該探針床之該些彈性探針選擇性地接觸該印刷電路板。 The FPGA-based embedded circuit board inspection system of claim 1, wherein the probe bed has a plurality of elastic probes, and the probe bed is mechanically connected to a lifting device to make the probe bed The elastic probes selectively contact the printed circuit board. 如申請專利範圍第2項所述之基於FPGA之嵌入式電路板檢測系統,其中該升降裝置係藉由一伺服馬達驅動。 The FPGA-based embedded circuit board inspection system of claim 2, wherein the lifting device is driven by a servo motor. 如申請專利範圍第3項所述之基於FPGA之嵌入式電路板檢測系統 ,其中該FPGA晶片更藉由調整該伺服馬達之脈波寬度以驅動該伺服馬達。 An FPGA-based embedded circuit board inspection system as described in claim 3 The FPGA chip further drives the servo motor by adjusting a pulse width of the servo motor. 如申請專利範圍第1項所述之基於FPGA之嵌入式電路板檢測系統,其中該線路圖係顯示該印刷電路板之該些線路,並且以圖形顯示該些線路之導通與否。 The FPGA-based embedded circuit board inspection system of claim 1, wherein the circuit diagram displays the lines of the printed circuit board and graphically displays whether the lines are conductive or not. 如申請專利範圍第1項所述之基於FPGA之嵌入式電路板檢測系統,其中該印刷電路板更包含複數個檢測接點及複數個接地接點,該些檢測接點係藉由該些線路電性連接於該些接地接點。 The FPGA-based embedded circuit board inspection system of claim 1, wherein the printed circuit board further comprises a plurality of detection contacts and a plurality of ground contacts, wherein the detection contacts are through the lines Electrically connected to the ground contacts. 如申請專利範圍第6項所述之基於FPGA之嵌入式電路板檢測系統,其中該FPGA晶片係藉由該探針床傳送該第一檢測訊號至該些檢測接點。 The FPGA-based embedded circuit board inspection system of claim 6, wherein the FPGA chip transmits the first detection signal to the detection contacts by using the probe bed. 如申請專利範圍第7項所述之基於FPGA之嵌入式電路板檢測系統,其中該FPGA晶片係測量該些接地接點之電位以檢測該些線路之導通與否而取得該第二檢測訊號。 The FPGA-based embedded circuit board inspection system of claim 7, wherein the FPGA chip measures the potentials of the ground contacts to detect whether the lines are turned on or not to obtain the second detection signal. 如申請專利範圍第1項所述之基於FPGA之嵌入式電路板檢測系統,其中該傳輸介面係選自由國際電機電子工程師協會(IEEE)1394介面、通用序列匯排流(USB)、序列式高階技術附件(SATA)、整合式驅動電子(IDE)、建議標準232(RS232)及小型電腦系統介面(SCSI)所組成之族群。 The FPGA-based embedded circuit board inspection system according to claim 1, wherein the transmission interface is selected from an International Institute of Electrical and Electronics Engineers (IEEE) 1394 interface, a universal serial bus (USB), and a sequential high order. A group of technical accessories (SATA), integrated drive electronics (IDE), recommended standard 232 (RS232), and small computer system interface (SCSI).
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* Cited by examiner, † Cited by third party
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TW200703354A (en) * 2005-03-18 2007-01-16 Inapac Technology Inc Internally generating patterns for testing in an integrated circuit device
TW200807427A (en) * 2006-06-13 2008-02-01 Formfactor Inc Method of designing an application specific probe card test system
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