TW200919555A - Technique for matching performance of ion implantation devices using an in-situ mask - Google Patents

Abstract

A technique for matching performance of ion implantation devices using an in-situ mask. In one particular exemplary embodiment, ion implantation is performed on a portion of a substrate while the remainder is masked off. The substrate is then moved to a second implanter tool. Implantation is then performed on another portion of the same substrate using the second tool while a mask covers the remainder of the substrate including the first portion. After the second implantation process, parametric testing may be performed on semicodubtor devices manufactured on the first and second portions to determine if there is varation in one or more performance characteristics of these semiconductor devices. If variations are found, changes may be suggested to one or more operating parameters of one of the implantation tools to reduce performance varation of implanters within the fabrication facility.

Description

200919555 IX. INSTRUCTIONS: TECHNICAL FIELD OF THE INVENTION The present invention relates to substrate processing techniques, and more particularly to the performance of an ion implantation apparatus using an in-situ mask in-situ mask (performance) ) Technical summary ^. [Prior Art]

In semiconductor manufacturing, ion implantation is used to change the material properties of some substrates. In fact, ion implantation has become a standard technology for changing the properties of semiconductor crystals in the production of various semiconductor-based products. Implantation can be used to introduce conductivity-altering impurities into the resulting buried layer (halo implants), changing the crystal surface (pre-amorphization/pfe-amorphization) to produce contaminants The position of the gettering, resulting in the expansion screen P early (F and C implants). Implants are also used in semiconductors for the production of flat panel displays and for amorphous applications in surface treatments, such as alloyed metal contact areas. All of these ion implantation applications can generally be modified into material properties. y In an ion implantation process, the desired impurity material is ionized in the ion source, and the final ions are accelerated to form an ion beam of a defined energy, which is directed to the target substrate, such as a semiconductor-based day and day circle. The high-energy ions in the ion beam penetrate the loose _k) semiconductor material of the wafer into the crystal lattice of the semiconductor material to form the desired conductivity. The ion implantation system typically includes the conversion of gas or solid materials into 200919555 ^ .uw ιυμιι The ion source of the salty bunch of the moon. The ion beam can be mass analyzed to eliminate unwanted species, accelerate to the desired energy, and lead to the target area, typically a semiconductor wafer. The ion beam can be distributed to the target area by a combination of light 'beam purity, target area movement, or wire sweeping and target zone motion. The target can be set to a specified angle and orientation relative to the ion beam. An example of a prior art ion implanter is disclosed in U.S. Patent No. 4,276,477, issued June 30, 1981, to U.S. Patent No. 4,283,631, to Freysis et al. U.S. Patent No. 4,899,059, issued on Feb. 2, et al., U.S. Patent No. 4,922,1,6, issued on May 30, and U.S. Patent No. 4,1994, issued on September 27, 1994, by White et al. 5,350,926. The benefits of semiconductor manufacturers are directly affected by their ability to maintain high yields. The manufacturer's yield is the percentage of the area of the 圆 W that can be successfully processed into usable microelectronic devices (processors, memory cells, or other transistor-based semiconductor components). Manufacturers want to maintain high yields due to the high cost of (iv) wafers and the cost of processing equipment. For example, if a single wafer can support a device' and the wholesale price per device is $150, if the entire available surface area can be processed into usable devices, ie yield, loo%, the value of a single processed wafer Can be as high as $45, 〇 (8). In general, - the yield must be _ above 7〇%, the performance (4) is achieved or even survives, and even small improvements in yield can be turned into significant gains in profitability. In the semiconductor device manufacturing industry, since the value-added cost of manufacturing more good (ie, usable) products on each wafer is lower, the main goal is to maximize the yield. An important factor affecting the yield is the manufacturer's process control. Therefore, it is important to ensure that the manufacturing equipment is consistent and operating with the proper operating parameters. Eliminating process variations can greatly improve and theoretically maximize yield. In the case of ion implantation equipment, there are typically four device parameters that semiconductor manufacturers need to adjust for their application: ion beam angle, ion dose, ion species. And ion energy. In addition to these tunable parameters, there are also implantable device settings that can be adjusted, all of which affect the performance of the semiconductor device and can vary from implanted tool to implant tool&lt; Current technologies include calibrating various settings for each implant, measuring system settings, or using non-device blanket wafef. Using these techniques that focus on calibrating the implants one at a time, precise calibration is not possible with cones. In addition, calibrating the implants one at a time is time consuming 'requires a south cost wafer and is difficult to correlate with device yield. In view of the foregoing, it is desirable to provide a technique for overcoming some or all of the above-mentioned deficiencies and shortcomings of conventional systems to reduce the variation in tool-to-tool performance. SUMMARY OF THE INVENTION A technique for matching the performance of an ion implantation device using a field mask. In a particular embodiment, the technique &lt; </ RTI> achieves a method of reducing process variation between tools by processing only a portion of a single substrate with a single ion implantation state by licking the remaining wafers Using another ion implanter 200919555 ZU\JIU|J11 ^ crystal weight replication multi-scorpion implanter, each processing crystal_single-part; and then processing the crystals of each implanter = performing a recording test to determine The existence efficiency of different implanters. &amp; </ RTI> </ RTI> </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt;栌轳 楚 七 七 七 : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : a second portion of the substrate; associated with the first and second devices; and comparing one or more of the members of the second portion. , - $- or more corresponding genus According to another aspect of this particular embodiment, a method of matching ions = tools is provided. The method according to the aspect comprises: using the second implanter 11 to perform (four) a sub-plant on the first part of the silk, wherein the first mask of the first opening of the first portion is applied Performing an ion on the second portion of the substrate on the second portion of the substrate using the second ion implanter to a second mask having a second opening exposing the second portion onto the substrate; measuring - performing at least one of the second and the second partial de-feature comparisons, and the base-to-family result determines to adjust the tunable parameters of the η second implanter to eight. Semi-conducting = other aspects of the present invention provide a reduction in tooling and energy variation in a manufacturing plant composed of a plurality of ion implanters. The method according to these aspects includes applying a first 200919555 reticle to the cast substrate, the first reticle having a hole for exposing the substrate; and performing, by the first implanter, performing a first opening plate of 111 copies on the substrate to move to the second Implanting a device; applying a second pass to the substrate, performing a second opening of the second portion of the substrate - performing at least one of each of the ion implantation process-implantation on the edge substrate Characteristic value; ratio 4:, -!: the measured value of each part of the second part, based on the comparison result: the whole: at least one of the adjustable operating parameters. Or a multi-skin towel of the 7th implanter, which will include the __ as disclosed in the commonly assigned U.S. Patent Application: 丄=ϊ61 (hereinafter referred to as the '761 application)- The 4th% method performs masking, and the application is incorporated into the present application for reference. In the embodiment, the mask process 1 described in 'Up 4'7611 is used to experimentally design an earlier tool (Design of E邛eriment, "j in order to establish the optimal parameters of the implant tool. Subsequently, The established &master (master) settings can be used to match each tool and will be recalibrated. In various embodiments, when attempting to match multiple tools, the mask described in the 761 application The process is the most efficient because it saves more cost and the complexity of the alternative method is worse. In various embodiments, 'this masking process can be used for device-based, optimal, and optimal execution tools. In order to match those tools (either empirically to match the "main" setting) or to select "best, tools for specific applications. In various embodiments, the mask process can be used in the absence of Figure 3 In the case of optimization discussed in the case of checking all tools under control, 200919555 is to make assumptions, but because "the wire wafer may be processed by multiple tools. This method _ establish "normal, change ^There is no change between the cookware = take action. Hey, this can also drift (dirty). The electrostatic method, the magnetic square sweep, and the case of the reticle - the part of the mobile wafer, only Moving over the wafer or not being able to fine-tune the wafer's cost, because of the difficult (NiSi) process, etc., the slab inclusions in order to improve the nickel bismuth, for example, allow optimization of non-semiconductor implant applications, Magnetoresistive magnetic heads, etc.. Especially for hard disk drives, it should be used in applications other than _ implants, followed by the use of reticle, processing of partial wafers to different implants, and matching between parallel tools. For example, This is a small part of the round, but also; the human tool is similar to the sub-only exposed crystal, and his method _ to the crystal_solid reticle replication. Although the embodiment describes the invention in more detail. Others are well-known in the art, and the art, the method, the (4) and the examples, and the descriptions of the 200919555, which are described in the present application, and the other methods of use,参,]' Ageing can be a block diagram of the Lt system 100 of various embodiments. Into the system] (8) generator (be_&amp;e view i〇r_. Ben, beam of beam 102

If any type of charged particle beam is used, for example, for a +conductor wafer, a seeded ion beam can be used for each of the implanted silicon wafers 1〇3. The semicircular shape is a common round dish. Semiconductor round: J has a + face geometry - a . - mouth 1Cb can include any type of half; any other material to be implanted. With the grasp of 1 "in the picture! There is no discussion in the figure, the system 100 can also be white private _ a θ under the moonlight of 0 3 is more limited in the semiconductor 1 () 3 touch ir multiple designs for ion implantation. One or more masks of the beam area in the area of the clothing area, that is, by Gu Tai, the amount of charge can be detected by the detector; · 〇 4 2 隹 = ion band to (four) circle, the electric detector 104 can be Measure, in order to maintain dose control. For example, any device that detects the current level of the beam. Other devices known in the field. The 秘, kiss c secret body moves, and can be fixed by _ long, 104 can be fixed Positioning in place or on the wafer (10), for example, behind the beam 103, etc. If the right gate 1 is not adjacent to the wafer 103 and is on the wafer, other beam currents can be used. A type 200919555 device is used as the detector 104, such as a device that uses a calorimeter or a beam-induced magnetic field measurement method. In various embodiments, the detector 104 outputs a signal representative of the detected beam current to Control benefit 105. The controller 1〇5 can be or include a program A general-purpose S-machine network for performing the desired round-in/output and other functions. In various embodiments, the controller 1 can perform data processing of the instruction code of the semiconductor process by using a private name. In various embodiments, the controller 105 can include power and/or data connections to various system elements: including a beam generator 10, a detector 104, a wafer actuator 106, a vacuum system 107, and a gas source. 1. The controller 105 can also package #other electronic circuits or components, such as dedicated integrated circuits (ASIC), other hard-wired or programmable electronic devices, m pieces of circuits (discrete d (10) gamma drcmt ), on-site programmable gate array (Fidd 〇 〇 _

Gat~, off) and so on. The controller 1〇5 may further include, for example, an in/out device (keyboard, touch screen, user pointing device, display crying, _, etc.), a communication device, a (four) material device, a crane device, etc., in order to perform a desired function. . The light can now communicate with the wafer driver 106, which is capable of moving the wafer 1〇3 with π(10). For example, the wafer driver 06 can implant the scanned beam onto the surface of the wafer (10). ::==06 can include a variety of different devices or systems. For example, the wafer driver can be: gamma drive motor, solenoid, screw driver, one or more * 13 200919555 gas bearing, position coding device, mechanical linkage, machine ^ 丄, the well-known mobile crystal Any other element of circle 103. The 4g beam 102 is transmitted from the light to the wafer (8) in a relatively high vacuum environment generated by the vacuum system 1〇7 in the processing chamber h〇USing)1〇9. High vacuum means two in the processing chamber, two 低压1 low pressure. Conversely, a low vacuum means that the outer casing 1 〇 9 _ relatively high pressure two uses a well-known system such as a vacuum pump, vacuum isolation, etc. to maintain the vacuum in the outer casing (10). The vacuum system can communicate with the blood 105, for example, to provide the controller 〇5 with a current vacuum level within the enclosure (10) = solid or multiple sections. The vacuum system iQ $ includes - or more of the cover (10) (10) pressure = , : _ pressure transmission. Or, _ should = 2 π with two music system 107 ya and controller 1 〇 5 direct communication. Light + is shown in Figure 1 as a straight line along the beam generator 1〇1 to the crystal 103. However, as shown in the implant system of Figure 2, two: the stone advances within the light: generator 101 and/or with a curved path of four or more deflections between the beam generator 101 and the crystallizer. The light &gt; 102 can be deflected, for example, by a plurality of road carvings. Called, a rhyme, Wei "he beam shaping device, before the implantation, the wafer driver, as above. The beam produces Λ% / 吏;: The beam 1〇2 will not be incident on the wafer to detect the beam current and the location of the inspection will be as follows: 请 χ 冋 冋 冋 冋 外 外 外 外 外 108 108 108 108 108 108 108 108 108 Or stable. Lifting the side to determine the vacuum level of the reference level of 200919555 can be the highest vacuum level produced by the real cover 109. Of course, the beam current reference level can also be determined under other vacuum levels. In various embodiments, the detector 〇4 will be benzyl 1 〇5, and the controller 〇5 outputs it as a beam current reference bit to the controller tamper 105 to process the signal to generate a well. Use, or control. For example, detector 1〇4 can output a representative = current reference bit ratio signal, and controller 105 digitizes the number within the class 1〇5 of the analog signal number. The stored digits are digitized into reference levels that are erroneous in controlling the beam current.卞 is used as a calculation during the implantation process, the beam 1 〇 2 is incident on the wafer] and/or the wafer 1 〇 3 to the ' ′′ light, or both can appear: ^ Li Wan Move up. The surface of the rice 102 and the wafer 1〇3 or in different planes. The private motion of the 曰® 103 can be in the same-flat wafer 103 or on the surface of the anode 1 on the surface of the wafer 103. For example, the beam line (b_ne) of the wafer 103 is lowered to the level near the wafer 103 and along the light 103. The reduction of the beam 102 (10) granules can cause travel to the wafer as discussed above, charge exchange = = amount f plus. With the venting or volatilization of _: == granules: 15 The lightning charge of each particle in the beam 102 can be changed by burning along the light two: for example, the band J of the beam 1 〇 2 can double Positive. Although the ions are neutralized, or the positive ionization is substantially unchanged. Therefore, the charge and charge change, but the energy detector 104 of the particle cannot detect that the charge of the sum can be changed so that the wafer 103 is struck and crystallized, but the particles can still flush the wafer 103. Do not ~_, 'contribute. Thus, the output indicates that the beam current reduction detector 104 can 缉 during the implantation process - the vacuum fluctuation has caused ^, that is, based on the hypothetical operation, the beam current decreases during the implantation process, but the photocurrent is reduced or - Partial inspection Therefore, the amount of controller ω5 103 is not affected. Empty fluctuations. It should be understood that the measured beam current is reduced to detect changes in the real process, such as separation, =1, which may be implanted by other factors, and re-converted, and in this case, the controller is caused by the same Part of the reduction in beam current is caused by the green of the vacuum source or another part of the ί, which is caused by other factors, such as deuteration. As is known in the art, the controller 105 can adjust a certain number of plants to correct the change of the beam current that is not caused by the vacuum fluctuations. The milk can be changed over time, and the controller 105 can be in, * P owing determines the contribution of vacuum fluctuations to the detected beam electrical t low over time compared to other factors. In this case, the controller K)5 can control the implantation by modulating the beam current without contributing to the contribution of other factors. The control state 105 can sense the decrease in beam current, but it is not necessary to adjust the implantation parameters, such as the velocity of the beam 102, etc. Instead, the scan of controller 105 G: Straight F indicates that the vacuum pressure has been detected and is followed by r = 107 rounds of vacancy. In addition to the pressure sensor:: straight;]: inside the real 07 mouth, based on the /1 from the controller 1 /, the work is not: ο in the pressure sensing with the vacuum system 107_ 丄:: curry Before the system 107 is low, the vacuum pressure of the straight space in the outer cover 108 and the vacancy level is adjusted. The sputum sputum remains stable or the controller 105 can compare the detected beam current level provided by the implant with the stored 1 〇 4 line and use the difference between the two values to control the it aligner (10) or both . For example, the controller 105 can "determine 5fl" in the implanting process towel reading y. The y is caused by the vacuum fluctuation along the beam line. (2) The portion of the detected light generated by the charge exchange collision is reduced by two. Dose, simultaneous detection of the first: contribution. For example, the total dose reduction of the sheep j wafer 1G3 is made to the lower neutral beam granule collision #% without affecting the kinetic energy of the particles. The particles still implanted will not be detected by the detector 1G4. Detecting the ray beam of the wafer, the progress of the 103. The subsequent reduction of the slave 5 causes a decrease in the total agent gas 200919555 implanted in the wafer 103. The controller 105 can amplify the detected beam current and "reference" The difference between the values is such that the beam current delivered to the wafer 1〇3 is at the desired level. It is also possible to normalize the difference by, for example, dividing the difference by two two two. For example, the controller 1〇5 can positively drive the driver 106 to move the beam path more slowly over the enlarged and normalized magnifying circle 103. The controller 1〇5 ^ causes a value of 1 to crystallize the crystal coefficient in an empirical manner and store it in the controller]. Since the amplification Γ controller 105 determines a particular difference, the corresponding ^^ can be retrieved and used to adjust the difference to properly control the beam 1, 2, or both. - The movement of W 1〇3 on the following day is shown in Fig. 2, which shows a block diagram of the block that can be used to invent the other-ion implant system: I of Fig. 2: 2 of the example (take (four)_ beamlet) (Detailed) (4), Cai: In the system of the system diagram 2, the ion beam generator 21Q generates the ion beam of the gas source type, and the energy of the ^= in the ion beam. Perform ion beam mass/energy analysis ^^H dyes and supply low energy and mass contaminants II? (The scanning system 216 of Fig. 4 does not deflect the ion I 2 ΐ 2 row or the approximately parallel ion ray _ sweep ion 朿 23G.,, the flat station (_ station) 232 includes a semiconductor wafer piece (work piece); Force broadcasts a 7 乂 other work (platenP36, the road of the Wei-Fantasian ion beam 230 is within the 36n of the platen, so that it can be changed to the right 谏 s * 卞 收 收 日 日 1] 234 The material properties of the unmasked portion are also provided. End station 232 200919555 may also include a Faraday cup 238 or other dose detector that detects ion beam dose and dose uniformity. The ion beam generator 210 of FIG. 2 includes ions. The beam source 260, the source filter 262, the acceleration/deceleration cylinder 264, and the mass analyzer. The source filter 262 is preferentially positioned in the vicinity of the ion beam source 260. The acceleration/deceleration cylinder 264 is positioned at the source thief n 262 and the f amount analysis Between 27G.

= 偶 includes a dipole analysis magnet 272 and a reticle 274 having an analytical aperture. The 6+ Γ-trace 220 (which may be an electrostatic scanner) deflects the ion beam 212 so that the ion trajectory scans the source, the head 28 〇% of the scanned ion beam. The scanner r cries the scan board connected to the off of the scan generation 11. Scanning 5:::7 A voltage waveform, such as a triangular wave, is used to scan the ion beam based on the scanning plate. The ion beam is typically scanned in a horizontal plane. The ions in the deflected scanning ion beam are generated for beaming. Specifically, the current of the magnetic coil 丄 ==: = is adjusted by focusing the scanning ion. The ion beam 212 is placed in the horizontal direction 7 &gt; ten private plates 236 and 234 by the scanning system 216. The combination of the work-mechanical translation with the wafer 234 causes the ion beam to be split on the surface of 19 200919555 234. As above, the Faraday Cup 2 3 8 * Qing Day 2 M board 23 6 is in the reduced position signal indicating the supply to the system and the lining beam current as the horizontal beam position (four) number;; #®^) ° 0 scanning speed can be despite the figure ! And the figure shows the uniformity of the dose.知道 Knowing each of the implant devices according to the present invention, but the device or the other cups can be combined with the implants 1 and 2 of Figure 1 and Figure 2: The substrate processing apparatus is used. Thus, the figures are illustrative and should not be construed as a transmission parameter such as an &lt;&gt; ion implanting device typically having at least four adjustable levels, ion doses, ion species, and ion energy. "The prescription (4) (four)" of the manufacture of the semiconductor skirts is also based on the number of the prescriptions, and the ions in the implant step = timing ^ ^ wear | Ming people have observed two seemingly - like ion implantation Different performance characteristics are presented in the system. That is, although the system: two or more implanters of the factory ^ run the same "prescription, and can set the weekly parameters (angle, dose, type, energy) to the same value, = number of - or The actual values of multiple may be different. For example, implant (4) is higher than required by the prescription, and the test does not read the dose. This type of change may result in inaccurate implanted semiconductor devices. The performance parameters are different from other implanted states in the same manufacturing plant. The most practical measurement method for implant efficiency is to measure the performance of the wafers that are formed on the wafer. The same "prescription, manufacture of special 200919555 ζουιομπ 定 semiconductor devices such as 'flash memory chips') The performance of the wafers produced on substrates processed by inaccurate implanters is different from those produced on other implants. . A given wafer should start switching at a specific threshold voltage and should switch at a specific speed. These parameters of the wafer produced by the implanter described above are different, some are below an acceptable deviation threshold, thus causing grain waste and reduced yield. Referring now to Figure 3, in the drawings, a flow chart of a method of reducing variations in inter-tool performance of a substrate implant tool in accordance with various embodiments of the present invention is described in detail. The method begins in step 300 and proceeds to step 305 where the target substrate is masked. In various embodiments, the wafer is inserted into the first implanter device and the wafer is masked with a masking device such as that shown in Figure 4 having only a portion of the crystalline opening exposed. In various embodiments, the wafer is held mechanically or by electrostatic force on a holding mechanism such as a platen. The mask is then positioned between the wafer being held and the ion beam. The reticle has openings or openings that allow the ion beam to reach the exposed portion of the substrate surface while protecting the remaining portion. In various embodiments, the reticle can be moved between a mask position and a non-mask position above the wafer. The unmasked position can be a storage location inside or outside the processing chamber of the implanter. In various embodiments, the implanter employs an automated reticle loading and unloading mechanism. In other embodiments, the reticle can be manually installed in the mask position by an operator of the implanter. In various embodiments, the masking is performed in accordance with one or more of the methods disclosed in the '761 application, which is incorporated herein by reference. In various embodiments, the substrate is with 7 wafers. With continued reference to the flow chart of Figure 4, after step 305, operation proceeds to step 310 where the implant 200919555 - iOUlOpli process is performed on the mask substrate using the first implanter tool. In various kinds of real towel m clock = ion implant process. In various embodiments, the use case &quot;il:f 2005/0260354&apos; is incorporated herein by reference. In various embodiments, the normal implantation process can be performed on the substrate when ° σ, that is, the sub-process of the process manufacturing process is performed. In all kinds of blessings:: 'plants' will be designed to show only the two performances under typical process conditions and not as part of the device process. After the ion implantation is completed, the substrate is transferred in the step yang 1 == implanted. In various embodiments, this may be done using a machine, such as by a wafer drive capable of taking the substrate away from one implanter tool and moving it to another implanter tool. In various other examples, this step requires the operator's county board to be from the first-planter entity to the illusion-planting V-based tool's wafer drive system. Then, in the dream board. I. Cover the substrate with a masking device. As with step 305, the mask base I is masked using a method or apparatus that utilizes the commonly assigned U.S. Application Serial No. 11/ΧΧΧ, nickname, or various methods and/or apparatus. Next, in the example, . The substrate is implanted using the Le Er tool. The same process is performed in various implementations, including the use of a second implanter tool, in different portions of the substrate. In various embodiments, this may include a D or a process, such as a subsequent or additional sub-process step in the process of the device. In other words, in various embodiments, the process described can be performed without masking the substrate. For example, in an ion implanter that uses a scanning beam (that is, the surface of the beam), the action of the beam can be programmed into 200919555. The zoutopu only processes the wafer, and moves it to create the first sum. The second processing part. Or on the 4th yen, the beam remains fixed at the same time as the implanted cry or the kinetic system can fight / °. The next day, the yen drives the wafer to move the wafer in front of the ion beam so that it is only partially converted into a beam. "Cong: In the ion beam. You can use the implant (4) type of implanter. Two separate processing sections on the yen. The love compartment is compatible with the various embodiments of the present invention that are adapted to handle different portions of the wafer.

Referring to the method of FIG. 3, in step 33, in the implant process, the substrate is etched to measure two portions, one or more processed by the two implanters. Performance characteristics. In various embodiments, === ί is used to test the parameters of the i's formed in the respective first and second portions. Parametric testing can include testing threshold voltages, required = current, switching speed, and the like. In various embodiments, this may include performing a wafer-quasi-test using the wafer = pin' or a material property of the device produced thereon. Alternatively, a destructive cross-sectional analysis of the device can be performed to use, for example, a Scanning Electron Microscopy (SEM), a Transmission Electron Microscopy (TEM), and a Secondary Ion Mass Spectrometer (Secondary I〇n Mass).

Spectrometry, SIMS) and other techniques observe the effects of parameter changes, such as the actual position and geometry of the dopant, the dose level, and so on. Various process control and test methods and equipment are well known in the semiconductor fabrication art. For example, in device fabrication, one or more of the following features can be measured:

Ion (or Idsat) - "the drive current" when the device is "on" (in the absence of 200919555)

ίMeasurement; iGn's “skew” _ ie the forward and backward ίοη of the device structure is left 2 〇抒 (or Isubtheshold or Ileak) - that is, the device is at "〇ff, the leakage current (at the drain contact) Measurement); ratio of 1〇11 to 1〇; vu J voltage 2' (four)w gate is fully conductive (eg, luA) gate barrier, when its opposite well region (substrate) is reverse biased in the bungee Measured "diode reverse bias current"'; Cov- is the "overlap" between the bungee and the gate, the Thunder's life, the physical overlap of the interpole edge on the bungee and the bungee The lateraljunction abruptness is very sensitive; Cd_ is even sensitive to the drain capacitance of the region - the capacitance is very sensitive to the vertical doping profile in the drain structure; St_ is the "reverse inter-value slope, - a measure of the sharpness of the open feature of the wearer; and a ring oscillating delay (usually a few picoseconds) - ie a device loop time delay for continuously turning on and off each device in a repetitive order - It integrates the effects of Ion, C0V, and Cd parameters into parameters that are meaningful to the circuit level. In a preferred embodiment, the parameter test is performed because, as mentioned above, the actual device performance is the most important verification that can be provided to the manufacturer since the product produced by the tool is displayed rather than the theoretical product. Next, in step 335, after the performance test is completed, it is determined whether one or more of the two processed portions of the substrate can recognize the parameter change, and the port is between the first and the first implant. Performance changes. If, in step 335, it is determined that the change exceeds an acceptable threshold, operation proceeds to block 340' where one or more adjustable parameters of one or both implanter tools are adjusted. In various embodiments, this is done automatically. For example, in various embodiments, the test device can be kept in communication with the first and second implanter devices to enable automatic adjustment. In various other embodiments, the device can be provided with a list of messages, a printed output, or other clues that identify recommended adjustments to one or more tunable parameters of the implanter tool. In such an embodiment, the adjustment is made by the tool operator. In various embodiments, after step 340, the operation returns to step 3〇5 and returns to continue until the step determines that there is no change in the towel. After confirming the state, the operation proceeds to step 345, and the method stops.

It should be understood that although disclosed in the context of an ion implanter, the flow diagram of Figure 3 illustrates the (four) method steps as well as reducing the tooling variations of other semiconductor processing equipment, including for deposition process, removal of subsystems. In the same manner as the change in the electrical properties of the substrate material, it should be understood that although the example of FIG. 3 is used to process only the substrate using only two implanted cookware, the various disclosed in the present application are used. The technology can calibrate the two mosquitoes on the implanter. Simultaneous calibration of different implants crying == is limited to whether the different parts of the target substrate can be defined on the surface of the target substrate so that each tool is different from the target substrate. Figure 4 shows the mask according to the present hair plate. Device_. The basic example of the above-mentioned coffee application is based on the Xiaqi Liwen W, and the various implementations of the present invention simultaneously cover the remaining portions so that two different implanters can be utilized | at f(10) Benefits on a single substrate. Depending on the number of wafers used in the mask. In the case of 4, the sample is lowered by the required 200919555. The substrate mask device 4 shown in FIG. 4 includes the support substrate (for example, the body wafer 412) by ion implantation as shown in FIG. 1 and FIG. The pressure plate assembly at the place where the device is made is Yang. The platen assembly is further comprised of a substrate masking device 4 (8) of the scanning system, and further includes a reticle loading mechanism 430 having an opening 422 and a relative positioning mechanism 432 for changing the imaginary grass and the hood 420 from the wafer 412. In the case of at least the member i of the position i, the clamp mechanism 432 is a wafer director which is, for example, a wafer-driven crying component which is not considered in every example of the case shown in Fig. 1. The platen assembly 41 () of Fig. 4 is used to pull the substrate wafer 4! 2 of the reduced plate 440 with the U leg to the surface of the platen 440. The platen halogenation further includes a cooling system for injecting &amp; day m AA y earth plate, a core 41 怔 怔 怔 middle cold part crystal 0 412, and a mechanism for 中心:, center rotation to twist (four) 412. In the embodiment of @4, the two platen assembly ϋ includes a photomask element 442. As shown, the object may be provided with a finger butterfly for the fascia retaining element. The platen assembly system 410 is supported by a scanning system 414. The scanning system 41 can tilt the platen assembly 410 relative to the ion beam for angle implant and can rotate the platen assembly 4 to the substrate 2 round force loading/unloading position. Additionally, scanning system 414 can vertically translate the platen assembly 41 在 during ion implantation. In the embodiment illustrated in FIG. 4, the reticle loading mechanism 430 includes a transfer arm 450 having an element 452 for engaging the reticle 420 and a drive system 454 for moving the transfer arm 450 between the loading position and the storage position. During operation of the system 400, the reticle loading mechanism 430 moves the reticle 42 to the substrate wafer 4 by the operation of the swaying system 454. The 2009 mask is placed in the mask position to remove it from the seam. In the mask position, the reticle opportunistic reticle holds the 7G member 442. The mask loading mechanism 430 then retracts and the scanning system 414 moves the platen assembly 4] to the wafer loading/unloading position. The plate wafer 412 is loaded under the reticle 42 by a wafer handling system.曰 = • 412, ready for implantation or other processing. Wafer 412 is implanted in a first region defined by openings 422 in reticle 42G. After the wafer is implanted, it is removed by a wafer handling system. At this point, the operator can remove the wafer and insert it into the wafer handling system of another implanter tool. Alternatively, the wafer handling system is coupled to a conveyor or automaton (9) (4) or other device capable of transferring wafer 412 to a second implanter tool for processing similar to that described above. In the second implanter, the mask position will = align the crystal to expose a different portion than the portion implanted by the first device. (Thus, with the various embodiments of the present invention, process variations between tools can be effectively identified and reduced by lower cost than possible conventional methods. Similarly, devices that are processed by the same implant on the same wafer ^ ** The number performance is possible, thereby allowing the manufacturer to quickly identify process changes before many dies must be discarded and/or before the entire wafer retirement event occurs. By measuring actual parameter performance, due to micron and sub-micron Width Electron Crystal = • Sensitivity to process variations can detect more precise process variations. = This, knowing to reduce the performance variation between implanter tools will increase the yield of the sound product and thereby increase the yield. The invention is not limited to the scope of the specific embodiments described herein. In fact, in addition to the description of the present application, it is well known in the art that the above-mentioned 浐= 27 200919555 -iouiopil by the above Other various embodiments and modifications of the present invention are readily apparent from the description and accompanying drawings. Further, although the invention has been described in the context of a particular embodiment in a particular context for a particular purpose, those skilled in the art will appreciate that their usefulness is not limited thereto, and The present invention may be embodied in a number of environments for a number of purposes. Accordingly, the scope of the invention as set forth below is intended to be construed as the meaning of the invention described herein. The present invention is generally understood by reference to the accompanying drawings, in which the like The block of the first ion implantation system of the embodiment is not intended. Figure 2 is a block diagram of another ion implantation system that can be used in various embodiments of the present invention. Figure 3 is a representation of various embodiments in accordance with the present invention. A flow chart of detailed method steps for reducing the change in performance between tools of a substrate implant tool. Figure 4 is a perspective view of a substrate masking device in accordance with various embodiments of the present invention. [Main Element Symbol Description] 100: Ion Implantation System 101: Beam Generator 28 200919555 ZOLMOpii ]02: Beam 103 · Wafer 104: Detector. 105: Controller 106: Wafer Driver 107: Vacuum System] 8: gas source /, 109: housing \ - 200 · ion implantation system 210: ion beam generator 212: ion beam 216: scanning system 220: scanner 224: angle corrector 230: scanning ion beam 232: end station I'.234: Semiconductor Wafer 236: Platen. 238: Faraday Cup. 260: Ion Beam Source 262: Source Filter _264: Acceleration/Deceleration Cylinder 270: Mass Analyzer 272: Dipole Analysis Magnet Mask 29 200919555 - Ϊ́υυ 1 υριι 274 : Photomask 276 : Analytical opening 280 • Scanning source 300 : Start

305: masking the substrate to expose the first portion 310: processing the substrate 315 with the first tool: moving the substrate to the second tool 3.20: masking the substrate to expose the second portion 325: processing the substrate 330 with the second tool: measuring Performance Feature 335: Is there a change? 340: adjustment two sets 345: stop 400: substrate masking device 410: pressure plate assembly 414. scanning system 420: reticle 422: opening 430: reticle loading mechanism 432: positioning mechanism 440: pressure plate 442: reticle retention Element 444 ·· Finger 450 : Transfer arm 30 200919555 /OU〗 〇pii 452 : Engagement element 454 : Drive system

Claims (1)

200919555 2t) UJ〇piI X. Patent Application Range: 1. A method for matching the performance between semiconductor manufacturing devices, comprising: processing a first portion of a substrate with a first device; Moving the device to a second device; processing the second portion of the substrate with the second device; associating the first and second portions with the respective first and second devices; Comparing one or more attributes of the first portion to one or more corresponding attributes of the second portion. 2. A method of matching the performance of a semiconductor fabrication apparatus as recited in claim 1, wherein processing the first portion comprises performing ion implantation on a first portion of the substrate. 3. A method of matching the performance between semiconductor fabrication devices as described in claim 2, wherein performing ion implantation on a first portion of a substrate comprises a first portion of a wafer Perform ion implantation. 4. The method of matching the performance between semiconductor fabrication devices of claim 2, wherein processing the first and second portions of the substrate comprises applying a mask between the substrate and an ion source Cover device. 5. The method of matching the performance between semiconductor manufacturing devices according to claim 4, wherein applying the mask II comprises applying the masking device having an opening, the opening exposing the corresponding portion Simultaneously with the second portion, the remaining portion of the substrate is protected. 6. The method of matching the performance between semiconductor manufacturing devices according to claim 2, wherein processing the respective first and second portions comprises 32 200919555 zov ι ο οιι The first and second parts. 7. A method of matching performance between semiconductor fabrication devices as recited in claim 2, wherein processing said respective first and second portions comprises a fixed ion at said respective first and second devices The first and second portions are moved in front of the bundle. 8. The method of matching performance between semiconductor manufacturing devices according to claim 1, wherein the associating the first and second portions with the respective first and second devices comprises to a data processor Confirming that the first portion is implanted using the first device and the second portion is implanted using the second device. 9. The method of matching the performance of a semiconductor manufacturing apparatus according to claim 8 of the patent application, further comprising supplying one or more operational parameters of both the first and second devices to the data processor. 10. A method of matching performance between semiconductor fabrication devices as described in claim 8 wherein the one or more attributes of the first portion are associated with one or more corresponding attributes of the second portion Comparing includes performing a parametric test on at least one semiconductor device formed in both the first and second portions of the substrate. 11. A method of matching performance between semiconductor fabrication devices as recited in claim 9 wherein performing the parametric test comprises performing at least one of the first and second portions selected from the group consisting of: A test and comparison of measured values: (1) Ion or Idsat, (2) Skew in Ion, (3) Ioff, (4) ratio of Ion to Ioff, (5) threshold voltage Vt, (6) when relative 200919555 ZOU I opii Diode reverse bias current measured at the drain of the well region during reverse bias, (7) Cov, (8) Cd, (9) St, (10) ring oscillator delay and (11 ) A combination of these tests. 12. The method of matching performance between semiconductor fabrication devices as recited in claim 10, further comprising comparing results of said parameter test between said semiconductor devices fabricated on said first and second portions . 13. The method of matching performance between semiconductor manufacturing devices according to claim 12, further comprising identifying, by the data processor, one of the first or second devices based on a comparison result of the measured values The operating parameters are adjusted at least once. 14. A method of matching the performance of a semiconductor manufacturing apparatus as described in claim 1, wherein moving the substrate comprises automatically moving the substrate using an automated substrate handling device. The method of matching the performance between semiconductor manufacturing devices as described in claim 1, wherein moving the substrate comprises manually moving the substrate from the first device to the second device. 16. A method for matching the effectiveness of an ion implantation tool, comprising: performing ion implantation on a first portion of a substrate using a first ion implanter, wherein applying the first to the substrate is exposed a first photomask of a first opening; performing ion implantation on a second portion of the substrate using a second ion implanter, wherein applying the substrate to the substrate a second mask of a second opening; measuring at least one characteristic value of the first and second portions; 34 200919555 j wpi j performing the first and second portions Comparing the respective characteristic values; and determining, based on the comparison result, at least one adjustment of the adjustable parameter of the first or second implanter. 17. The method of matching field ion implantation tool performance according to claim 16, wherein determining to make at least one adjustment to the tunable parameter comprises determining at least a parameter selected from the group consisting of the following parameters; One adjustment: ion beam incident angle, ion dose, and ion energy. 18 - A method for reducing performance variation between tools, applied to a semiconductor manufacturing plant environment comprising a plurality of ion implanters, the method comprising: applying a first reticle to a semiconductor substrate, the first reticle having Exposing a first opening of a first portion of the substrate: performing an ion implantation process on the substrate by using a first implanter; moving the substrate to a second implanter; Applying a second mask to the substrate, the second mask having a second opening exposing a second portion of the substrate; performing ion implantation on the substrate by using the second implanter Entering a process; measuring at least one characteristic value of both the first and second portions; comparing the measured values of both the first and second portions; and adjusting the first based on the comparison result Or at least one adjustable operating parameter of the second implanter. 35