TWI450006B - Method for fabricating and repairing pixel structure and repaired pixel structure - Google Patents

Method for fabricating and repairing pixel structure and repaired pixel structure Download PDF

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TWI450006B
TWI450006B TW100107554A TW100107554A TWI450006B TW I450006 B TWI450006 B TW I450006B TW 100107554 A TW100107554 A TW 100107554A TW 100107554 A TW100107554 A TW 100107554A TW I450006 B TWI450006 B TW I450006B
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layer
block
drain block
drain
pixel structure
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TW201237522A (en
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Hsiao Shan Hu
Te Yu Chen
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Chunghwa Picture Tubes Ltd
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Description

畫素結構的製作方法及修補方法與修補後的畫素結構 Pseudo element structure manufacturing method and repairing method and repaired pixel structure

本發明是有關於一種修補方法、修補後的結構以及畫素結構的製作方法,且特別是有關於一種畫素結構的修補方法、修補後的畫素結構以及一種使用較少光罩之畫素結構的製作方法。 The present invention relates to a repairing method, a repaired structure, and a method for fabricating a pixel structure, and particularly relates to a repair method of a pixel structure, a repaired pixel structure, and a pixel using a less photomask. The method of making the structure.

液晶顯示器主要由薄膜電晶體陣列基板、彩色濾光陣列基板和液晶層所構成,其中薄膜電晶體陣列基板是由多個陣列排列之畫素結構所構成。一般來說,畫素結構的製作方法包括下述步驟。首先,在一基板上形成一閘極。接著,在基板上形成一閘絕緣層以覆蓋閘極。然後,在閘絕緣層上形成一半導體通道層。之後,於半導體通道層上方形成一源極以及一汲極。接著,在基板上形成一保護層以覆蓋半導體通道層、源極以及汲極。然後,在保護層上製作一接觸窗口。之後,於保護層上形成一畫素電極,此畫素電極是部分填入接觸窗口中而與汲極電性連接。如此,畫素結構的製作便大致完成。 The liquid crystal display is mainly composed of a thin film transistor array substrate, a color filter array substrate and a liquid crystal layer, wherein the thin film transistor array substrate is composed of a plurality of arrayed pixel structures. In general, the method of fabricating the pixel structure includes the following steps. First, a gate is formed on a substrate. Next, a gate insulating layer is formed on the substrate to cover the gate. Then, a semiconductor channel layer is formed on the gate insulating layer. Thereafter, a source and a drain are formed over the semiconductor channel layer. Next, a protective layer is formed on the substrate to cover the semiconductor channel layer, the source, and the drain. Then, a contact window is made on the protective layer. Thereafter, a pixel electrode is formed on the protective layer, and the pixel electrode is partially filled in the contact window to be electrically connected to the drain. In this way, the production of the pixel structure is roughly completed.

如上所述,習知之畫素結構的製作主要是藉由第一光罩形成閘極,第二光罩形成半導體通道層,第三光罩形成源極及汲極,第四光罩形成接觸窗口,而第五光罩形成畫素電極。因此,習知之畫素結構的製作是採用五道光罩的製程,因此製作步驟較多,製作時間較長。當製作步驟較繁複時,畫素結構產生缺陷的機會較高,生產良率也較低。然而,隨著薄膜電晶體液晶顯示器朝大尺寸製作的發展趨勢,薄膜電晶體陣列基板的製作將會面臨許多的問題與挑戰,例如良率降低以及產能下降等 等。因此若是能減少畫素結構的光罩數,即降低薄膜電晶體元件製作之曝光製程次數,即可以減少製造時間、增加產能,進而降低製造成本且亦可提高製作良率。 As described above, the conventional pixel structure is mainly formed by forming a gate by a first mask, a second mask forming a semiconductor channel layer, a third mask forming a source and a drain, and a fourth mask forming a contact window. And the fifth mask forms a pixel electrode. Therefore, the fabrication of the conventional pixel structure is a process using a five-mask, so that the production steps are more and the production time is longer. When the production steps are complicated, the pixel structure has a higher chance of producing defects and a lower production yield. However, with the development trend of thin film transistor liquid crystal displays toward large-scale fabrication, the fabrication of thin film transistor array substrates will face many problems and challenges, such as yield reduction and capacity reduction. Wait. Therefore, if the number of masks capable of reducing the pixel structure is reduced, that is, the number of exposure processes for fabricating the thin film transistor component is reduced, the manufacturing time can be reduced, the throughput can be increased, the manufacturing cost can be reduced, and the yield can be improved.

目前業界已提出多種方法,以降低光罩的數目。其中一種方式是使用半調式光罩(half tone mask,HTM)或灰調式光罩(gray tone mask,GTM),來達到減少光罩數目之目的。此方法主要是以一個半調式或灰調式光罩當做兩個光罩來使用,在半調曝光與顯影後,蝕刻出閘極區,再接著繼續蝕刻出源極與汲極區。但是,使用半調式或灰調式光罩時在光阻受到光學曝光的控制較為不易,因此所製作出的畫素結構易有短路或點瑕疵(dot defect)的問題。然而,若直接報廢丟棄這些有瑕疵的液晶顯示面板,將會使得製造成本大幅增加。一般來說,只依賴改善製程技術來實現零瑕疵率是非常困難的,因此畫素結構的瑕疵修補技術變得相當地重要。 Various methods have been proposed in the industry to reduce the number of masks. One way is to use a half tone mask (HTM) or a gray tone mask (GTM) to reduce the number of masks. This method is mainly used as a half-tone or gray-tone mask as two masks. After half-tone exposure and development, the gate region is etched, and then the source and drain regions are further etched. However, when a half-tone or gray-tone mask is used, it is difficult to control the optical exposure of the photoresist, and thus the pixel structure produced is liable to have a short circuit or a dot defect. However, if these defective liquid crystal display panels are directly discarded, the manufacturing cost will be greatly increased. In general, it is very difficult to rely solely on improved process technology to achieve zero defect rate, so the patching technique of the pixel structure becomes quite important.

本發明提供一種畫素結構的修補方法,用以修補有瑕疵的畫素結構,以提高產品的良率。 The invention provides a repairing method for a pixel structure for repairing a defective pixel structure to improve product yield.

本發明提供一種修補後的畫素結構,其是利用上述之修補方式所形成之畫素結構。 The present invention provides a repaired pixel structure which is a pixel structure formed by the above-described repairing method.

本發明提供一種畫素結構的製作方法,可以減少所使用的光罩數且具有較佳的產品可靠度。 The invention provides a method for fabricating a pixel structure, which can reduce the number of masks used and has better product reliability.

本發明提出一種畫素結構的修補方法,其適於修補一畫素結構。畫素結構配置於一基板,且畫素結構包括一主動元件、一保護層以及一畫素電極。主動元件包括一閘極、一閘絕緣層、一半導體層以及一金屬層。閘極配置於基板上。閘絕緣層 位於半導體層與閘極之間。半導體層具有一通道區以及一暴露出部分閘絕緣層的開口。金屬層具有一第一汲極區塊、一第二汲極區塊以及一源極區塊。源極區塊與第二汲極區塊位於通道區的兩側上。源極區塊位於第一汲極區塊與第二汲極區塊之間。源極區塊與第一汲極區塊位於開口的兩側上。保護層覆蓋主動元件並與被開口所暴露出的部分閘絕緣層直接接觸。保護層具有一第一接觸窗口。畫素電極配置於保護層上且透過第一接觸窗口與第一汲極區塊電性連接。修補方法包括:形成一貫穿畫素電極與保護層的第二接觸窗口,其中第二接觸窗口暴露出部分第二汲極區塊;以及形成一導電層於第二接觸窗口內,畫素電極透過導電層與第二汲極區塊電性連接。 The present invention proposes a repair method for a pixel structure suitable for repairing a pixel structure. The pixel structure is disposed on a substrate, and the pixel structure includes an active component, a protective layer, and a pixel electrode. The active device includes a gate, a gate insulating layer, a semiconductor layer, and a metal layer. The gate is disposed on the substrate. Brake insulation Located between the semiconductor layer and the gate. The semiconductor layer has a channel region and an opening exposing a portion of the gate insulating layer. The metal layer has a first drain block, a second drain block, and a source block. The source block and the second drain block are located on both sides of the channel area. The source block is located between the first drain block and the second drain block. The source block and the first drain block are located on both sides of the opening. The protective layer covers the active component and is in direct contact with a portion of the gate insulating layer exposed by the opening. The protective layer has a first contact window. The pixel electrode is disposed on the protective layer and electrically connected to the first drain block through the first contact window. The repairing method includes: forming a second contact window penetrating the pixel electrode and the protective layer, wherein the second contact window exposes a portion of the second drain block; and forming a conductive layer in the second contact window, and the pixel electrode is transparent The conductive layer is electrically connected to the second drain block.

在本發明之一實施例中,上述之形成第二接觸窗口的方法包括雷射切除製程。 In an embodiment of the invention, the method of forming the second contact window comprises a laser ablation process.

在本發明之一實施例中,上述之形成導電層的方法包括局部化學氣相沉積(chemical vapor deposition,CVD)成膜法。 In an embodiment of the invention, the method for forming a conductive layer comprises a local chemical vapor deposition (CVD) film formation method.

在本發明之一實施例中,上述之導電層的材質包括鎢。 In an embodiment of the invention, the material of the conductive layer comprises tungsten.

在本發明之一實施例中,上述之形成導電層的方法包括透過一熔接步驟熔接第二汲極區塊。 In one embodiment of the invention, the method of forming a conductive layer includes fusing a second drain block through a fusing step.

在本發明之一實施例中,上述之熔接步驟包括一雷射熔接製程(laser welding)。 In one embodiment of the invention, the fusing step includes a laser welding process.

本發明還提出一種修補後的畫素結構,其包括一主動元件、一保護層、一畫素電極以及一導電層。主動元件配置於一基板上,其包括一閘極、一閘絕緣層、一半導體層以及一金屬層。閘極位於基板上。閘絕緣層配置於基板上且覆蓋閘極。半導體層配置於閘絕緣層上,且具有一通道區以及一暴露出部分閘絕緣層的開口。金屬層配置於半導體層上,且具有一第一汲 極區塊、一第二汲極區塊以及一源極區塊。源極區塊與第二汲極區塊位於通道區的兩側上。源極區塊位於第一汲極區塊與第二汲極區塊之間,且源極區塊與第一汲極區塊位於開口的兩側上。保護層覆蓋主動元件並與被開口所暴露出的部分閘絕緣層直接接觸。保護層具有一第一接觸窗口。畫素電極配置於保護層上,且具有一貫穿畫素電極與保護層的第二接觸窗口。畫素電極透過第一接觸窗口與第一汲極區塊電性連接,而第二接觸窗口暴露出部分第二汲極區塊。導電層配置於第二接觸窗口內,且畫素電極透過導電層與第二汲極區塊電性連接。 The invention also provides a repaired pixel structure comprising an active component, a protective layer, a pixel electrode and a conductive layer. The active component is disposed on a substrate and includes a gate, a gate insulating layer, a semiconductor layer, and a metal layer. The gate is located on the substrate. The gate insulating layer is disposed on the substrate and covers the gate. The semiconductor layer is disposed on the gate insulating layer and has a channel region and an opening exposing a portion of the gate insulating layer. The metal layer is disposed on the semiconductor layer and has a first layer a pole block, a second bungee block, and a source block. The source block and the second drain block are located on both sides of the channel area. The source block is located between the first drain block and the second drain block, and the source block and the first drain block are located on both sides of the opening. The protective layer covers the active component and is in direct contact with a portion of the gate insulating layer exposed by the opening. The protective layer has a first contact window. The pixel electrode is disposed on the protective layer and has a second contact window penetrating the pixel electrode and the protective layer. The pixel electrode is electrically connected to the first drain block through the first contact window, and the second contact window exposes a portion of the second drain block. The conductive layer is disposed in the second contact window, and the pixel electrode is electrically connected to the second drain block through the conductive layer.

在本發明之一實施例中,上述之導電層的材質包括鎢。 In an embodiment of the invention, the material of the conductive layer comprises tungsten.

在本發明之一實施例中,上述之導電層的材質與第二汲極區塊的材質實質上相同。 In an embodiment of the invention, the material of the conductive layer is substantially the same as the material of the second drain block.

本發明另提出一種畫素結構的製作方法,其包括下述步驟。依序形成一閘極、一閘絕緣層、一半導體層以及一金屬層於一基板上。形成一光阻層於金屬層上。以一灰階光罩對光阻層進行曝光,其中灰階光罩具有一透光區、一半透光區以及一遮光區,其中透光區位於半透光區與遮光區之間。對曝光後的光阻層進行一顯影,以形成一圖案化光阻層,其中圖案化光阻層具有一暴露出部分金屬層的貫口以及一盲孔。以圖案化光阻層為一蝕刻罩幕,移除貫口所暴露出的部分金屬層及其下方之部分半導體層,以及移除部分對應於盲孔下方之金屬層及其下方之部分半導體層,而於半導體層上形成一暴露出部分閘絕緣層的開口以及一通道區,且將金屬層劃分為一第一汲極區塊、一第二汲極區塊以及一源極區塊。源極區塊與第二汲極區塊位於通道區的兩側上。源極區塊位於第一汲極區塊與第二汲極區塊之間,且源極區塊與第一汲極區塊位於開口的兩側上。移除 圖案化光阻層。形成一保護層於基板上,其中保護層具有一第一接觸窗口,且保護層覆蓋金屬層並與被開口所部分閘絕緣層直接接觸。形成一畫素電極於保護層上,其中畫素電極透過第一接觸窗口與第一汲極區塊電性連接。形成一貫穿畫素電極與保護層的第二接觸窗口,其中第二接觸窗口暴露出部分第二汲極區塊。形成一導電層於第二接觸窗口內,畫素電極透過導電層與第二汲極區塊電性連接。 The invention further provides a method for fabricating a pixel structure, which comprises the following steps. A gate, a gate insulating layer, a semiconductor layer and a metal layer are sequentially formed on a substrate. A photoresist layer is formed on the metal layer. The photoresist layer is exposed by a gray scale mask, wherein the gray scale mask has a light transmitting region, a half light transmitting region and a light shielding region, wherein the light transmitting region is located between the semi-light transmitting region and the light shielding region. The exposed photoresist layer is developed to form a patterned photoresist layer, wherein the patterned photoresist layer has a via exposing a portion of the metal layer and a blind via. The patterned photoresist layer is an etch mask, and a portion of the metal layer exposed by the via and a portion of the semiconductor layer underneath the via are removed, and the removed portion corresponds to a metal layer under the blind via and a portion of the semiconductor layer underneath And forming an opening and a channel region exposing a portion of the gate insulating layer on the semiconductor layer, and dividing the metal layer into a first drain block, a second drain block, and a source block. The source block and the second drain block are located on both sides of the channel area. The source block is located between the first drain block and the second drain block, and the source block and the first drain block are located on both sides of the opening. Remove Patterned photoresist layer. Forming a protective layer on the substrate, wherein the protective layer has a first contact window, and the protective layer covers the metal layer and is in direct contact with the portion of the gate insulating layer that is opened. A pixel electrode is formed on the protective layer, wherein the pixel electrode is electrically connected to the first drain block through the first contact window. A second contact window is formed through the pixel electrode and the protective layer, wherein the second contact window exposes a portion of the second drain block. A conductive layer is formed in the second contact window, and the pixel electrode is electrically connected to the second drain block through the conductive layer.

基於上述,由於本發明是採用灰階光罩製作出具有第一汲極區塊、第二汲極區塊以及源極區塊的金屬層,因此當對光阻過度曝光而導致半導體層具有暴露出閘絕緣層的開口,而導致第一汲極區塊失去功能時,可以透過形成第二接觸窗口以使導電層電性連接畫素電極與第二汲極區塊的方式來修補畫素結構。如此一來,可將原本需要報廢的畫素結構經過修補重新再利用。所以,本發明可以之畫素結構的修補方法可提高生產的良率以及降低整體的製造成本,而修補後的畫素結構具有較佳的可靠度。 Based on the above, since the present invention uses a gray scale mask to fabricate a metal layer having a first drain block, a second drain block, and a source block, the semiconductor layer is exposed when the photoresist is overexposed. When the opening of the insulating layer is opened, and the first drain block loses its function, the pixel structure can be repaired by forming a second contact window to electrically connect the conductive layer to the pixel electrode and the second drain block. . In this way, the pixel structure that needs to be scrapped can be repaired and reused. Therefore, the repair method of the pixel structure of the present invention can improve the yield of production and reduce the overall manufacturing cost, and the repaired pixel structure has better reliability.

為讓本發明之上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。 The above described features and advantages of the present invention will be more apparent from the following description.

圖1A至圖1K為本發明之一實施例之一種畫素結構的製作方法的剖面示意圖。請先參考圖1A,本實施例的畫素結構的製作方法包括以下步驟。首先,依序形成一閘極112、一閘絕緣層114、一半導體層116以及一金屬層118於一基板10上。其中,基板10例如是一玻璃基板、一可撓性基板或其他適當材質之基板。 1A to 1K are schematic cross-sectional views showing a method of fabricating a pixel structure according to an embodiment of the present invention. Referring to FIG. 1A first, the method for fabricating the pixel structure of the embodiment includes the following steps. First, a gate 112, a gate insulating layer 114, a semiconductor layer 116, and a metal layer 118 are sequentially formed on a substrate 10. The substrate 10 is, for example, a glass substrate, a flexible substrate, or a substrate of another suitable material.

形成閘極112之方法例如是先沈積一層導電層(未繪示),之後再以微影以及蝕刻程序圖案化所述導電層,以形成閘極112。閘絕緣層114的材質例如是氧化矽或氮化矽或其疊層,而形成閘絕緣層114之方法例如是化學氣相沈積法(chemical vapor deposition,CVD)。半導體層116的材質例如是非晶矽或多晶矽。基於導電性的考量,閘極112以及金屬層118一般是使用金屬材料。然而,本發明不限於此,於其他實施例中,閘極112以及金屬層118亦可以使用其他導電材料,例如是合金、金屬材料的氮化物、金屬材料的氧化物、金屬材料的氮氧化物或是金屬材料與其它導材料的堆疊層。 The method of forming the gate 112 is, for example, first depositing a conductive layer (not shown), and then patterning the conductive layer by lithography and an etch process to form the gate 112. The material of the gate insulating layer 114 is, for example, tantalum oxide or tantalum nitride or a laminate thereof, and the method of forming the gate insulating layer 114 is, for example, chemical vapor deposition (CVD). The material of the semiconductor layer 116 is, for example, amorphous germanium or polycrystalline germanium. The gate 112 and the metal layer 118 are generally made of a metal material based on conductivity considerations. However, the present invention is not limited thereto. In other embodiments, the gate 112 and the metal layer 118 may also use other conductive materials, such as alloys, nitrides of metal materials, oxides of metal materials, and oxynitrides of metal materials. Or a stack of metallic materials and other conductive materials.

接著,請再參考圖1A,形成一光阻層20於金屬層118上,其中光阻層20覆蓋部分金屬層118。 Next, referring again to FIG. 1A, a photoresist layer 20 is formed on the metal layer 118, wherein the photoresist layer 20 covers a portion of the metal layer 118.

接著,請參考圖1B,以一灰階光罩30對光阻層20進行曝光,其中灰階光罩30具有一透光區32、一半透光區34以及一遮光區36,其中透光區32位於半透光區34與遮光區36之間。 Next, referring to FIG. 1B, the photoresist layer 20 is exposed by a gray scale mask 30. The gray scale mask 30 has a light transmitting region 32, a half light transmitting region 34, and a light shielding region 36, wherein the light transmitting region 32 is located between the semi-transmissive region 34 and the light-shielding region 36.

接著,請再參考圖1B,對曝光後的光阻層20進行一顯影,以形成一圖案化光阻層20a,其中由於製成差異而導致過度曝光,因而造成圖案化光阻層20a具有一暴露出部分金屬層118的貫口22以及一盲孔24。其中,正常的曝光值是在46mJ/cm2至54mJ/cm2,而異常曝光的曝光值是在54mJ/cm2至62mJ/cm2之間。 Next, referring back to FIG. 1B, the exposed photoresist layer 20 is developed to form a patterned photoresist layer 20a, wherein overexposure is caused due to the difference in fabrication, thereby causing the patterned photoresist layer 20a to have a A portion 22 of the portion of the metal layer 118 and a blind hole 24 are exposed. Among them, the normal exposure value is from 46 mJ/cm 2 to 54 mJ/cm 2 , and the abnormal exposure exposure value is between 54 mJ/cm 2 and 62 mJ/cm 2 .

接著,請依序參考圖1C與圖1D,以圖案化光阻層20a為一蝕刻罩幕,移除貫口22所暴露出的部分金屬層118及其下方之部分半導體層116,而於半導體層116上形成一暴露出部分閘絕緣層114的開口S。於此,此開口S為一斷路瑕疵(open defect)。此外,移除貫口22所暴露出的部分金屬層118及其下方之部分半導體層116的方法例如是蝕刻製程。 Next, referring to FIG. 1C and FIG. 1D in sequence, the photoresist layer 20a is patterned as an etching mask, and a portion of the metal layer 118 exposed by the via 22 and a portion of the semiconductor layer 116 under the via 22 are removed. An opening S exposing a portion of the gate insulating layer 114 is formed on the layer 116. Here, the opening S is a broken circuit (open Defect). Further, a method of removing a portion of the metal layer 118 exposed by the via 22 and a portion of the semiconductor layer 116 thereunder is, for example, an etching process.

接著,請依序參考圖1E與圖1F,以圖案化光阻層20a為一蝕刻罩幕,移除部分對應於盲孔24下方之金屬層118及其下方之部分半導體層116,而於半導體層116上形成一通道區116a。其中,移除部分對應於盲孔24下方之金屬層118及其下方之部分半導體層116的方法例如是蝕刻製程。此時,蝕刻製程以將金屬層118劃分為一第一汲極區塊118a、一第二汲極區塊118b以及一源極區塊118c。其中,源極區塊118c與第二汲極區塊118b位於通道區116a的兩側上,而源極區塊118c位於第一汲極區塊118a與第二汲極區塊118b之間,且源極區塊118c與第一汲極區塊118a位於開口S的兩側上。 Next, referring to FIG. 1E and FIG. 1F in sequence, the photoresist layer 20a is patterned as an etching mask, and a portion of the semiconductor layer 116 corresponding to the underside of the blind via 24 and a portion of the semiconductor layer 116 underneath the blind via 24 are removed. A channel region 116a is formed on layer 116. The method of removing the portion corresponding to the metal layer 118 under the blind via 24 and the portion of the semiconductor layer 116 under it is, for example, an etching process. At this time, the etching process divides the metal layer 118 into a first drain block 118a, a second drain block 118b, and a source block 118c. The source block 118c and the second drain block 118b are located on both sides of the channel region 116a, and the source block 118c is located between the first drain block 118a and the second drain block 118b, and The source block 118c and the first drain block 118a are located on both sides of the opening S.

接著,請參考圖1G,移除圖案化光阻層20a,而暴露出第一汲極區塊118a、第二汲極區塊118b以及源極區塊118c。 Next, referring to FIG. 1G, the patterned photoresist layer 20a is removed to expose the first drain block 118a, the second drain block 118b, and the source block 118c.

然後,請參考圖1H,形成一保護層120於基板10上,其中保護層120具有一第一接觸窗口C1,且保護層120覆蓋金屬層118並與被開口S所部分閘絕緣層114直接接觸。 Then, referring to FIG. 1H, a protective layer 120 is formed on the substrate 10, wherein the protective layer 120 has a first contact window C1, and the protective layer 120 covers the metal layer 118 and is in direct contact with a portion of the gate insulating layer 114 of the opening S. .

之後,請參考圖1I,形成一畫素電極130於保護層120上,其中畫素電極130透過第一接觸窗口C1與第一汲極區塊118a電性連接。至此,已大致完成畫素結構100的製作。 Then, referring to FIG. 1I, a pixel electrode 130 is formed on the protective layer 120, wherein the pixel electrode 130 is electrically connected to the first drain block 118a through the first contact window C1. So far, the fabrication of the pixel structure 100 has been substantially completed.

由於本實施例之光阻層20因過度曝光的關係,而造成後續製程時,半導體層140產生一斷路瑕疵(open defect),意即暴露出部分閘絕緣層114的開口116a。如此一來,畫素結構100會因為此開口S而產生亮點。針對上述之斷路瑕疵,下文將說明如何利用本發明之修補方法,來對具有斷路瑕疵之畫素結構100進行修補。 Since the photoresist layer 20 of the present embodiment is caused by overexposure, the semiconductor layer 140 generates an open defect, which means that the opening 116a of the portion of the gate insulating layer 114 is exposed. As a result, the pixel structure 100 will produce a bright spot due to the opening S. With respect to the above-described circuit breaker, it will be explained below how to repair the pixel structure 100 having the circuit breaker by using the repairing method of the present invention.

接著,請參考圖1J,形成一貫穿畫素電極130與保護層120的第二接觸窗口C2,其中第二接觸窗口C2暴露出部分第二汲極區塊118b。在本實施例中,形成第二接觸窗口C1的方法例如是雷射切除製程。 Next, referring to FIG. 1J, a second contact window C2 is formed through the pixel electrode 130 and the protective layer 120, wherein the second contact window C2 exposes a portion of the second drain block 118b. In the present embodiment, the method of forming the second contact window C1 is, for example, a laser cutting process.

最後,請參考圖1K,形成一導電層140於第二接觸窗口C2內,其中畫素電極130透過導電層140與第二汲極區塊118b電性連接。在本實施例中,導電層140的材質例如是鎢,且形成導電層140的方法局部化學氣相沉積(CVD)成膜法。於此必須說明的是,本發明並不限定形成導電層140與第二接觸窗口C2的方法,於其他實施例中,形成導電層140與第二接觸窗口C2的方法亦可透過雷射熔接製程(laser welding),以同時形成第二接觸窗口C2以及熔接部分第二汲極區塊118b來作為導電層140。也就是說,於其他實施例中,導電層140的材質與第二汲極區塊118b的材質實質上相同。至此,已完成對具有斷路瑕疵之畫素結構100的修補,而形成一修補後的畫素結構100a。 Finally, referring to FIG. 1K, a conductive layer 140 is formed in the second contact window C2, wherein the pixel electrode 130 is electrically connected to the second drain block 118b through the conductive layer 140. In the present embodiment, the material of the conductive layer 140 is, for example, tungsten, and a method of forming the conductive layer 140 is a local chemical vapor deposition (CVD) film formation method. It should be noted that the present invention does not limit the method of forming the conductive layer 140 and the second contact window C2. In other embodiments, the method of forming the conductive layer 140 and the second contact window C2 may also be through a laser welding process. (laser welding) to simultaneously form the second contact window C2 and the welded portion second drain block 118b as the conductive layer 140. That is to say, in other embodiments, the material of the conductive layer 140 is substantially the same as the material of the second drain block 118b. So far, the repair of the pixel structure 100 having the broken circuit has been completed, and a repaired pixel structure 100a is formed.

結構上,請再參考圖1K,修補後的畫素結構100a包括閘極112、閘絕緣層114、半導體層116、金屬層118、保護層120、畫素電極130以及導電層140,其中閘極112、閘絕緣層114、半導體層116以及金屬層118構成一主動元件110,且此主動元件110配置於基板10上。詳細來說,閘極112位於基板10上,閘絕緣層114配置於基板10上且覆蓋閘極112。半導體層116配置於閘絕緣層114上,且具有通道區116a以及暴露出部分閘絕緣層114的開口S。金屬層118配置於半導體層116上,且具有第一汲極區塊118a、第二汲極區塊118b以及源極區塊118c。源極區塊118c與第二汲極區塊118b位於 通道區116a的兩側上。源極區塊118c位於第一汲極區塊118a與第二汲極區塊118b之間,且源極區塊118c與第一汲極區塊118a位於開口S的兩側上。保護層120覆蓋主動元件110並與被開口S所暴露出的部分閘絕緣層114直接接觸,其中保護層120具有第一接觸窗口C1。畫素電極130配置於保護層120上,且具有貫穿畫素電極130與保護層120的第二接觸窗口C2。畫素電極130透過第一接觸窗口C1與第一汲極區塊118a電性連接,而第二接觸窗口C2暴露出部分第二汲極區塊118b。導電層140配置於第二接觸窗口C2內,且畫素電極130透過導電層140與第二汲極區塊118b電性連接。 Structurally, referring again to FIG. 1K, the repaired pixel structure 100a includes a gate 112, a gate insulating layer 114, a semiconductor layer 116, a metal layer 118, a protective layer 120, a pixel electrode 130, and a conductive layer 140, wherein the gate electrode The gate insulating layer 114 , the semiconductor layer 116 , and the metal layer 118 form an active device 110 , and the active device 110 is disposed on the substrate 10 . In detail, the gate 112 is located on the substrate 10, and the gate insulating layer 114 is disposed on the substrate 10 and covers the gate 112. The semiconductor layer 116 is disposed on the gate insulating layer 114 and has a via region 116a and an opening S exposing a portion of the gate insulating layer 114. The metal layer 118 is disposed on the semiconductor layer 116 and has a first drain block 118a, a second drain block 118b, and a source block 118c. The source block 118c is located at the second drain block 118b On both sides of the channel area 116a. The source block 118c is located between the first drain block 118a and the second drain block 118b, and the source block 118c and the first drain block 118a are located on both sides of the opening S. The protective layer 120 covers the active device 110 and is in direct contact with a portion of the gate insulating layer 114 exposed by the opening S, wherein the protective layer 120 has a first contact window C1. The pixel electrode 130 is disposed on the protective layer 120 and has a second contact window C2 penetrating the pixel electrode 130 and the protective layer 120. The pixel electrode 130 is electrically connected to the first drain block 118a through the first contact window C1, and the second contact window C2 exposes a portion of the second drain block 118b. The conductive layer 140 is disposed in the second contact window C2, and the pixel electrode 130 is electrically connected to the second drain block 118b through the conductive layer 140.

簡言之,本實施例是透過形成貫穿畫素電極130與保護層120以暴露出部分第二汲極區塊118b的第二接觸窗口C2,並於第二接觸窗口C2內形成導電層140以使畫素電極130與第二汲極區塊118b電性連接的方式,來修補具有斷路瑕疵的畫素結構100。此修補方式除了可以將原本需要報廢的畫素結構100經過修補後形成修補後之畫素結構100a而重新再利用,亦可提高畫素結構100a的生產的良率並降低整體的製造成本。再者,由於本實施例是採用四道光罩的方式來製作畫素結構100,因此於製程上相對於五道光罩製程,本實施例可使用較少的光罩數,以降低製造成本與製程時間。 In short, in this embodiment, the second contact window C2 is formed through the pixel electrode 130 and the protective layer 120 to expose a portion of the second drain block 118b, and the conductive layer 140 is formed in the second contact window C2. The pixel structure 100 having the open circuit is repaired by electrically connecting the pixel electrode 130 and the second drain block 118b. In addition to repairing the pixel structure 100 that has to be scrapped to form a repaired pixel structure 100a, the repair method can re-use the repaired pixel structure 100a, thereby improving the yield of the pixel structure 100a and reducing the overall manufacturing cost. Moreover, since the pixel structure is formed by using four masks in this embodiment, the number of masks can be used in this embodiment relative to the five mask processes to reduce manufacturing cost and process. time.

綜上所述,由於本發明是採用灰階光罩製作出具有第一汲極區塊、第二汲極區塊以及源極區塊的金屬層,因此當對光阻過度曝光而導致半導體層具有暴露出閘絕緣層的開口,而導致第一汲極區塊失去功能時,可以透過形成第二接觸窗口以使導電層電性連接畫素電極與第二汲極區塊的方式來修補畫素結構。如此一來,可將原本需要報廢的畫素結構經過修補重新再 利用。所以,本發明可以之畫素結構的修補方法提高生產的良率以及降低整體的製造成本,而修補後的畫素結構具有較佳的可靠度。此外,由於本發明採用灰階光罩來製作畫素結構,因此可減少光罩的使用數,以提升製程良率。 In summary, since the present invention uses a gray scale mask to fabricate a metal layer having a first drain block, a second drain block, and a source block, the semiconductor layer is overexposed when the photoresist is overexposed. When the opening of the gate insulating layer is exposed, and the first drain block loses its function, the second contact window can be formed to repair the conductive layer to electrically connect the pixel electrode to the second drain block. Prime structure. In this way, the pixel structure that needs to be scrapped can be repaired again. use. Therefore, the repair method of the pixel structure of the present invention can improve the yield of production and reduce the overall manufacturing cost, and the repaired pixel structure has better reliability. In addition, since the present invention uses a gray scale mask to fabricate a pixel structure, the number of use of the mask can be reduced to improve the process yield.

雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可作些許之更動與潤飾,故本發明之保護範圍當視後附之申請專利範圍所界定者為準。 Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.

10‧‧‧基板 10‧‧‧Substrate

20‧‧‧光阻層 20‧‧‧ photoresist layer

20a‧‧‧圖案化光阻層 20a‧‧‧ patterned photoresist layer

22‧‧‧貫孔 22‧‧‧through holes

24‧‧‧盲孔 24‧‧‧Blind hole

30‧‧‧灰階光罩 30‧‧‧ Grayscale mask

32‧‧‧透光區 32‧‧‧Light transmission area

34‧‧‧半透光區 34‧‧‧ semi-transparent area

36‧‧‧遮光區 36‧‧‧ shading area

100‧‧‧畫素結構 100‧‧‧ pixel structure

100a‧‧‧修補後的畫素結構 100a‧‧‧Repaired pixel structure

110‧‧‧主動元件 110‧‧‧Active components

112‧‧‧閘極 112‧‧‧ gate

114‧‧‧閘絕緣層 114‧‧‧Brake insulation

116‧‧‧半導體層 116‧‧‧Semiconductor layer

116a‧‧‧通道層 116a‧‧‧Channel layer

118‧‧‧金屬層 118‧‧‧metal layer

118a‧‧‧第一汲極區塊 118a‧‧‧ First bungee block

118b‧‧‧第二汲極區塊 118b‧‧‧Second bungee block

118c‧‧‧源極區塊 118c‧‧‧ source block

120‧‧‧保護層 120‧‧‧Protective layer

130‧‧‧畫素電極 130‧‧‧pixel electrodes

140‧‧‧導電層 140‧‧‧ Conductive layer

C1‧‧‧第一接觸窗口 C1‧‧‧ first contact window

C2‧‧‧第二接觸窗口 C2‧‧‧ second contact window

S‧‧‧開口 S‧‧‧ openings

圖1A至圖1K為本發明之一實施例之一種畫素結構的製作方法的剖面示意圖。 1A to 1K are schematic cross-sectional views showing a method of fabricating a pixel structure according to an embodiment of the present invention.

10‧‧‧基板 10‧‧‧Substrate

100a‧‧‧畫素結構 100a‧‧‧ pixel structure

110‧‧‧主動元件 110‧‧‧Active components

112‧‧‧閘極 112‧‧‧ gate

114‧‧‧閘絕緣層 114‧‧‧Brake insulation

116‧‧‧半導體層 116‧‧‧Semiconductor layer

116a‧‧‧通道層 116a‧‧‧Channel layer

118‧‧‧金屬層 118‧‧‧metal layer

118a‧‧‧第一汲極區塊 118a‧‧‧ First bungee block

118b‧‧‧第二汲極區塊 118b‧‧‧Second bungee block

118c‧‧‧源極區塊 118c‧‧‧ source block

120‧‧‧保護層 120‧‧‧Protective layer

130‧‧‧畫素電極 130‧‧‧pixel electrodes

140‧‧‧導電層 140‧‧‧ Conductive layer

C1‧‧‧第一接觸窗口 C1‧‧‧ first contact window

C2‧‧‧第二接觸窗口 C2‧‧‧ second contact window

S‧‧‧開口 S‧‧‧ openings

Claims (10)

一種畫素結構的修補方法,適於修補一畫素結構,該畫素結構配置於一基板,且該畫素結構包括一主動元件、一保護層以及一畫素電極,該主動元件包括一閘極、一閘絕緣層、一半導體層以及一金屬層,其中該閘極配置於該基板上,該閘絕緣層位於該半導體層與該閘極之間,該半導體層具有一通道區以及一暴露出部分該閘絕緣層的開口,該金屬層具有一第一汲極區塊、一第二汲極區塊以及一源極區塊,該源極區塊與該第二汲極區塊位於該通道區的兩側上,該源極區塊位於該第一汲極區塊與該第二汲極區塊之間,且該源極區塊與該第一汲極區塊位於該開口的兩側上,該保護層覆蓋該主動元件並與被該開口所暴露出的部分該閘絕緣層直接接觸,該保護層具有一第一接觸窗口,該畫素電極配置於該保護層上且透過該第一接觸窗口與該第一汲極區塊電性連接,該修補方法包括:形成一貫穿該畫素電極與該保護層的第二接觸窗口,其中該第二接觸窗口暴露出部分該第二汲極區塊;以及形成一導電層於該第二接觸窗口內,該畫素電極透過該導電層與該第二汲極區塊電性連接。 A pixel structure repairing method is suitable for repairing a pixel structure, the pixel structure is disposed on a substrate, and the pixel structure comprises an active component, a protective layer and a pixel electrode, and the active component comprises a gate a gate, an insulating layer, a semiconductor layer and a metal layer, wherein the gate is disposed on the substrate, the gate insulating layer is located between the semiconductor layer and the gate, the semiconductor layer has a channel region and an exposed Opening a portion of the opening of the gate insulating layer, the metal layer having a first drain block, a second drain block, and a source block, wherein the source block and the second drain block are located On both sides of the channel region, the source block is located between the first drain block and the second drain block, and the source block and the first drain block are located at the opening On the side, the protective layer covers the active component and is in direct contact with a portion of the gate insulating layer exposed by the opening, the protective layer has a first contact window, and the pixel electrode is disposed on the protective layer and transmits the The first contact window is electrically connected to the first drain block The repairing method includes: forming a second contact window penetrating the pixel electrode and the protective layer, wherein the second contact window exposes a portion of the second drain block; and forming a conductive layer on the second contact In the window, the pixel electrode is electrically connected to the second drain block through the conductive layer. 如申請專利範圍第1項所述之畫素結構的修補方法,其中形成該第二接觸窗口的方法包括雷射切除製程。 The method for repairing a pixel structure according to claim 1, wherein the method of forming the second contact window comprises a laser cutting process. 如申請專利範圍第1項所述之畫素結構的修補方法,其中形成該導電層的方法包括局部化學氣相沉積成膜法。 The method for repairing a pixel structure according to claim 1, wherein the method of forming the conductive layer comprises a local chemical vapor deposition film forming method. 如申請專利範圍第3項所述之畫素結構的修補方法,其中該導電層的材質包括鎢。 The method for repairing a pixel structure according to claim 3, wherein the material of the conductive layer comprises tungsten. 如申請專利範圍第1項所述畫素結構的修補方法,其中形成該導電層的方法包括透過一熔接步驟熔接該第二汲極 區塊。 The method for repairing a pixel structure according to claim 1, wherein the method of forming the conductive layer comprises welding the second drain through a fusion step Block. 如申請專利範圍第5項所述之畫素結構的修補方法,其中該熔接步驟包括一雷射熔接製程(laser welding)。 The method of repairing a pixel structure according to claim 5, wherein the fusing step comprises a laser welding process. 一種修補後的畫素結構,包括:一主動元件,配置於一基板上,包括:一閘極,位於該基板上;一閘絕緣層,配置於該基板上且覆蓋該閘極;一半導體層,配置於該閘絕緣層上,且具有一通道區以及一暴露出部分該閘絕緣層的開口;以及一金屬層,配置於該半導體層上,且具有一第一汲極區塊、一第二汲極區塊以及一源極區塊,其中該源極區塊與該第二汲極區塊位於該通道區的兩側上,該源極區塊位於該第一汲極區塊與該第二汲極區塊之間,且該源極區塊與該第一汲極區塊位於該開口的兩側上;一保護層,覆蓋該主動元件並與被該開口所暴露出的部分該閘絕緣層直接接觸,該保護層具有一第一接觸窗口;一畫素電極,配置於該保護層上,且具有一貫穿該畫素電極與該保護層的第二接觸窗口,其中該畫素電極透過該第一接觸窗口與該第一汲極區塊電性連接,而該第二接觸窗口暴露出部分該第二汲極區塊;以及一導電層,配置於該第二接觸窗口內,且該畫素電極透過該導電層與該第二汲極區塊電性連接。 A repaired pixel structure includes: an active device disposed on a substrate, comprising: a gate on the substrate; a gate insulating layer disposed on the substrate and covering the gate; a semiconductor layer Disposed on the gate insulating layer, and having a channel region and an opening exposing a portion of the gate insulating layer; and a metal layer disposed on the semiconductor layer and having a first drain block and a first a second drain block and a source block, wherein the source block and the second drain block are located on both sides of the channel region, and the source block is located in the first drain block and the Between the second drain blocks, the source block and the first drain block are located on both sides of the opening; a protective layer covering the active component and the portion exposed by the opening The gate insulating layer is in direct contact, the protective layer has a first contact window; a pixel electrode is disposed on the protective layer and has a second contact window penetrating the pixel electrode and the protective layer, wherein the pixel The electrode passes through the first contact window and the first drain block Connecting, the second contact window exposing a portion of the second drain block; and a conductive layer disposed in the second contact window, and the pixel electrode passes through the conductive layer and the second drain block Electrical connection. 如申請專利範圍第7項所述之修補後的畫素結構,其中該導電層的材質包括鎢。 The repaired pixel structure as described in claim 7, wherein the conductive layer is made of tungsten. 如申請專利範圍第7項所述之修補後的畫素結構,其中該導電層的材質與該第二汲極區塊的材質實質上相同。 The repaired pixel structure according to claim 7, wherein the conductive layer is substantially the same material as the second drain block. 一種畫素結構的製作方法,包括:依序形成一閘極、一閘絕緣層、一半導體層以及一金屬層於一基板上;形成一光阻層於該金屬層上;以一灰階光罩對該光阻層進行曝光,其中該灰階光罩具有一透光區、一半透光區以及一遮光區,其中該透光區位於該半透光區與該遮光區之間;對曝光後的該光阻層進行一顯影,以形成一圖案化光阻層,其中該圖案化光阻層具有一暴露出部分該金屬層的貫口以及一盲孔;以該圖案化光阻層為一蝕刻罩幕,移除該貫口所暴露出的部分該金屬層及其下方之部分該半導體層,以及移除部分對應於該盲孔下方之該金屬層及其下方之部分該半導體層,而於該半導體層上形成一暴露出部分該閘絕緣層的開口以及一通道區,且將該金屬層劃分為一第一汲極區塊、一第二汲極區塊以及一源極區塊,其中該源極區塊與該第二汲極區塊位於該通道區的兩側上,該源極區塊位於該第一汲極區塊與該第二汲極區塊之間,且該源極區塊與該第一汲極區塊位於該開口的兩側上;移除該圖案化光阻層;形成一保護層於該基板上,其中該保護層具有一第一接觸窗口,且該保護層覆蓋該金屬層並與被該開口所暴露出的部分該閘絕緣層直接接觸;形成一畫素電極於該保護層上,其中該畫素電極透過該第一接觸窗口與該第一汲極區塊電性連接;形成一貫穿該畫素電極與該保護層的第二接觸窗口,其中 該第二接觸窗口暴露出部分該第二汲極區塊;以及形成一導電層於該第二接觸窗口內,該畫素電極透過該導電層與該第二汲極區塊電性連接。 A method for fabricating a pixel structure includes: sequentially forming a gate, a gate insulating layer, a semiconductor layer, and a metal layer on a substrate; forming a photoresist layer on the metal layer; and using a gray scale light Exposing the photoresist layer to the photoresist layer, wherein the gray scale mask has a light transmissive region, a half light transmissive region, and a light shielding region, wherein the light transmissive region is located between the semi-transmissive region and the light shielding region; The photoresist layer is then developed to form a patterned photoresist layer, wherein the patterned photoresist layer has a via exposing a portion of the metal layer and a blind via; the patterned photoresist layer is An etching mask removes a portion of the metal layer and a portion of the semiconductor layer exposed by the via, and the removed portion corresponds to the metal layer under the blind via and a portion of the semiconductor layer underneath the blind via, Forming an opening and a channel region exposing a portion of the gate insulating layer on the semiconductor layer, and dividing the metal layer into a first drain block, a second drain block, and a source block Where the source block and the second drain block are On both sides of the channel region, the source block is located between the first drain block and the second drain block, and the source block and the first drain block are located at the opening On both sides; removing the patterned photoresist layer; forming a protective layer on the substrate, wherein the protective layer has a first contact window, and the protective layer covers the metal layer and is exposed by the opening a portion of the gate insulating layer is in direct contact with each other; a pixel electrode is formed on the protective layer, wherein the pixel electrode is electrically connected to the first drain block through the first contact window; forming a through-pixel electrode and a second contact window of the protective layer, wherein The second contact window exposes a portion of the second drain block; and a conductive layer is formed in the second contact window, and the pixel electrode is electrically connected to the second drain block through the conductive layer.
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TW565813B (en) * 2000-03-29 2003-12-11 Fujitsu Display Tech Liquid crystal display device and fault repairing method for the liquid crystal display device
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