TWI449658B - Method for making 3-d nano-structured array - Google Patents

Method for making 3-d nano-structured array Download PDF

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TWI449658B
TWI449658B TW099118349A TW99118349A TWI449658B TW I449658 B TWI449658 B TW I449658B TW 099118349 A TW099118349 A TW 099118349A TW 99118349 A TW99118349 A TW 99118349A TW I449658 B TWI449658 B TW I449658B
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substrate
dimensional nanostructure
nanostructure array
preparing
nanospheres
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TW201144210A (en
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Zheng-Dong Zhu
Qun-Qing Li
Shou-Shan Fan
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Hon Hai Prec Ind Co Ltd
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三維奈米結構陣列之製備方法 Method for preparing three-dimensional nanostructure array

本發明涉及一種奈米材料之製備方法,尤其涉及一種三維奈米結構陣列之製備方法。 The invention relates to a preparation method of a nano material, in particular to a preparation method of a three-dimensional nano structure array.

奈米材料自問世以來,受到科學界追捧,成為材料科學現今最為活躍之研究領域。奈米材料根據不同尺寸及性質,在電子行業、生物醫藥、環保、光學等領域都有開發之巨大潛能。在將奈米材料應用到各行各業之同時,對奈米材料本身之製備方法及性質之研究也係目前國際上非常重視及爭相探索之方向。 Since its inception, nanomaterials have been sought after by the scientific community and become the most active research field in materials science today. Nano materials have great potential for development in the electronics industry, biomedicine, environmental protection, optics, etc. according to different sizes and properties. While applying nanomaterials to various industries, the research on the preparation methods and properties of nanomaterials is also the focus of international attention and exploration.

奈米材料按維度分類,大致可分為四類:零維、一維、二維及三維奈米材料。如果一奈米材料之尺度在X、Y及Z三維空間受限,則稱為零維,如奈米粒子;如果材料只在二空間方向上受限,則稱為一維,如奈米線及奈米管;如果係在一個空間方向上受限,則稱為二維奈米材料,如石墨烯;如果在X、Y及Z三個方向上都不受限,但材料之組成部分係奈米孔、奈米粒子或奈米線,就被稱為三維奈米結構材料。 Nanomaterials are classified into four categories: zero-dimensional, one-dimensional, two-dimensional, and three-dimensional nanomaterials. If the scale of a nanomaterial is limited in the three-dimensional space of X, Y and Z, it is called zero-dimensional, such as nanoparticle; if the material is limited only in the two spatial directions, it is called one-dimensional, such as nanowire And nanotubes; if the system is limited in a spatial direction, it is called a two-dimensional nanomaterial, such as graphene; if it is not limited in the three directions of X, Y and Z, but the components of the material are Nanopores, nanoparticles or nanowires are called three-dimensional nanostructured materials.

奈米材料作為新興之材料,目前最大問題係如何製備批量、均勻、純淨的此微型物質,從而進一步研究這類材料之實際性能及其機理。從目前之研究情況來看,在諸多奈米材料中,一維碳奈米管及二維石墨烯材料之研究熱度最高,而三維奈米結構之報導比 較少,通常為奈米球、奈米柱等結構簡單之三維奈米結構。 Nanomaterials as an emerging material, the biggest problem at present is how to prepare bulk, uniform and pure micro-materials, so as to further study the actual properties and mechanisms of such materials. From the current research situation, among the many nanomaterials, one-dimensional carbon nanotubes and two-dimensional graphene materials have the highest research heat, while the three-dimensional nanostructures report ratio Less, usually a three-dimensional nanostructure with a simple structure such as a nanosphere or a nanocolumn.

有鑒於此,提供一種結構複雜的三維奈米結構陣列之製備方法實為必要。 In view of this, it is necessary to provide a method for preparing a three-dimensional nanostructure array having a complicated structure.

一種三維奈米結構陣列之製備方法,其包括以下步驟:提供一基底;在該基底一表面形成掩膜層;採用反應性蝕刻氣氛對基底進行蝕刻同時對所述掩膜層進行裁剪,形成階梯狀結構之三維奈米結構陣列;及去除掩膜層。 A method for preparing a three-dimensional nanostructure array, comprising the steps of: providing a substrate; forming a mask layer on a surface of the substrate; etching the substrate with a reactive etching atmosphere while cutting the mask layer to form a ladder a three-dimensional array of nanostructures; and a mask layer.

一種三維奈米結構陣列之製備方法,其包括以下步驟:提供一基底;對該基底進行親水處理;在基底表面形成單層奈米微球作為掩膜層;採用反應性蝕刻氣氛對基底進行蝕刻同時對所述掩膜層進行裁剪,形成階梯狀結構的三維奈米結構陣列;及去除掩膜層。 A method for preparing a three-dimensional nanostructure array, comprising the steps of: providing a substrate; performing hydrophilic treatment on the substrate; forming a single layer of nanospheres as a mask layer on the surface of the substrate; and etching the substrate by using a reactive etching atmosphere At the same time, the mask layer is cut to form a three-dimensional nanostructure array with a stepped structure; and the mask layer is removed.

與先前技術相比較,本發明通過掩膜層和反應性蝕刻氣氛蝕刻相結合之方法可以製備階梯狀結構之三維奈米結構陣列,且該方法工藝簡單,成本低廉。 Compared with the prior art, the present invention can prepare a three-dimensional nanostructure array of a stepped structure by a combination of a mask layer and a reactive etching atmosphere etching, and the method is simple in process and low in cost.

10,20,30,40‧‧‧三維奈米結構陣列 10,20,30,40‧‧‧Three-dimensional nanostructure array

100,200,300,400‧‧‧基底 100,200,300,400‧‧‧Base

102,202,302,402‧‧‧三維奈米結構 102,202,302,402‧‧‧Three-dimensional nanostructure

104,204,304‧‧‧第一圓台 104,204,304‧‧‧First round table

106,206,306‧‧‧第二圓台 106,206,306‧‧‧Second round table

108‧‧‧掩膜層 108‧‧‧ mask layer

110‧‧‧反應性蝕刻氣氛 110‧‧‧Reactive etching atmosphere

308‧‧‧第三圓台 308‧‧‧ Third round table

404‧‧‧第一圓台狀空間 404‧‧‧First round table space

406‧‧‧第二圓台狀空間 406‧‧‧Second round table space

圖1為本發明第一實施例提供之三維奈米結構陣列之結構示意圖。 1 is a schematic structural view of a three-dimensional nanostructure array according to a first embodiment of the present invention.

圖2為圖1之三維奈米結構陣列沿II-II線之剖視圖。 2 is a cross-sectional view of the three-dimensional nanostructure array of FIG. 1 taken along line II-II.

圖3為本發明第一實施例提供之包括複數圖案之三維奈米結構陣列之結構示意圖。 FIG. 3 is a schematic structural diagram of a three-dimensional nanostructure array including a plurality of patterns according to a first embodiment of the present invention.

圖4為本發明第一實施例提供之三維奈米結構陣列之製備方法之 工藝流程圖。 4 is a method for preparing a three-dimensional nanostructure array according to a first embodiment of the present invention; Flow chart.

圖5為在基底表面六角形密堆排布之單層奈米微球之掃描電鏡照片。 Figure 5 is a scanning electron micrograph of a single layer of nanospheres arranged in a hexagonal close-packed surface on the surface of the substrate.

圖6為在基底表面等間距行列式排布之單層奈米微球之掃描電鏡照片。 Figure 6 is a scanning electron micrograph of a single layer of nanospheres arranged in an equidistant arrangement on the surface of the substrate.

圖7為本發明第一實施例製備之三維奈米結構陣列之掃描電鏡照片。 Figure 7 is a scanning electron micrograph of a three-dimensional nanostructure array prepared in accordance with a first embodiment of the present invention.

圖8為本發明第二實施例提供之三維奈米結構陣列之結構示意圖。 FIG. 8 is a schematic structural diagram of a three-dimensional nanostructure array according to a second embodiment of the present invention.

圖9為本發明第三實施例提供之三維奈米結構陣列之結構示意圖。 FIG. 9 is a schematic structural view of a three-dimensional nanostructure array according to a third embodiment of the present invention.

圖10為本發明第四實施例提供之三維奈米結構陣列之結構示意圖。 FIG. 10 is a schematic structural diagram of a three-dimensional nanostructure array according to a fourth embodiment of the present invention.

以下將結合附圖詳細說明本發明實施例之三維奈米結構陣列及其製備方法。 The three-dimensional nanostructure array of the embodiment of the present invention and a preparation method thereof will be described in detail below with reference to the accompanying drawings.

請參閱圖1及圖2,本發明第一實施例提供之三維奈米結構陣列10包括一基底100及複數設置於該基底100至少一表面之三維奈米結構102。所述三維奈米結構102為一階梯狀結構。 Referring to FIG. 1 and FIG. 2 , the three-dimensional nanostructure array 10 according to the first embodiment of the present invention includes a substrate 100 and a plurality of three-dimensional nanostructures 102 disposed on at least one surface of the substrate 100 . The three-dimensional nanostructure 102 is a stepped structure.

所述基底100可為矽基基底或半導體基底。具體地,所述基底100之材料可為矽、二氧化矽、氮化矽、石英、玻璃、氮化鎵、砷化鎵、藍寶石、氧化鋁或氧化鎂等。優選地,所述基底100為一半 導體層。所述基底100之大小、厚度及形狀不限,可根據實際需要選擇。本實施例中,所述基底100為一表面形成有一氮化鎵半導體層之藍寶石基底,且該基底100被切成一邊長為2釐米之方形。 The substrate 100 can be a germanium based substrate or a semiconductor substrate. Specifically, the material of the substrate 100 may be tantalum, cerium oxide, tantalum nitride, quartz, glass, gallium nitride, gallium arsenide, sapphire, aluminum oxide or magnesium oxide. Preferably, the substrate 100 is half Conductor layer. The size, thickness and shape of the substrate 100 are not limited and can be selected according to actual needs. In this embodiment, the substrate 100 is a sapphire substrate having a gallium nitride semiconductor layer formed on its surface, and the substrate 100 is cut into a square having a length of 2 cm.

所述三維奈米結構102為設置在所述基底100表面之階梯狀凸起結構或階梯狀凹陷結構。所述階梯狀凸起結構為從所述基底100表面向外延伸出之階梯狀突起之實體。所述階梯狀凹陷結構為從基底100表面向基底100內凹陷形成之階梯狀凹陷之空間。所述階梯狀凸起結構或階梯狀凹陷結構可為一複數層台狀結構,如複數層三棱台、複數層四棱台、複數層六棱台或複數層圓台等。優選地,所述階梯狀凸起結構或階梯狀凹陷結構為複數層圓台結構。所謂階梯狀凹陷結構為複數層圓台結構係指所述階梯狀凹陷之空間為複數層圓台形狀。所述階梯狀凸起結構或階梯狀凹陷結構之最大尺度為小於等於1000奈米,即其長度、寬度及高度均小於等於1000奈米。優選地,所述階梯狀凸起結構或階梯狀凹陷結構長度、寬度及高度範圍為10奈米~500奈米。 The three-dimensional nanostructure 102 is a stepped convex structure or a stepped concave structure provided on the surface of the substrate 100. The stepped raised structure is an entity of a stepped protrusion extending outward from the surface of the substrate 100. The stepped recessed structure is a space of a stepped recess formed by recessing from the surface of the substrate 100 into the substrate 100. The stepped protrusion structure or the stepped recess structure may be a plurality of layered structures, such as a plurality of layers of triangular prisms, a plurality of layers of quadrangular prisms, a plurality of layers of hexagonal prisms or a plurality of layers of circular tables. Preferably, the stepped protrusion structure or the stepped recess structure is a plurality of layered truncated cone structures. The stepped recessed structure is a plurality of layers of the truncated cone structure, and the space of the stepped recess is a plurality of truncated cone shapes. The maximum dimension of the stepped convex structure or the stepped concave structure is 1000 nm or less, that is, the length, the width and the height are less than or equal to 1000 nm. Preferably, the stepped protrusion structure or the stepped recess structure has a length, a width and a height ranging from 10 nm to 500 nm.

本實施例中,所述三維奈米結構102設置於基底100之氮化鎵半導體層表面。所述三維奈米結構102為一階梯狀凸起之雙層圓台結構。具體地,所述三維奈米結構102包括一第一圓台104及一設置於該第一圓台104表面之第二圓台106。所述第一圓台104靠近基底100設置。所述第一圓台104之側面垂直於基底100之表面。所述第二圓台106之側面垂直於第一圓台104之底面。所述第一圓台104與第二圓台106形成一階梯狀凸起結構,所述第二圓台106設置在所述第一圓台104之範圍內。優選地,所述第一圓台104與第 二圓台106同軸設置。所述第一圓台104與第二圓台106為一體結構,即所述第二圓台106為第一圓台104之頂面延伸出之圓台狀結構。 In this embodiment, the three-dimensional nanostructures 102 are disposed on the surface of the gallium nitride semiconductor layer of the substrate 100. The three-dimensional nanostructure 102 is a double-layered truncated cone structure with a stepped protrusion. Specifically, the three-dimensional nanostructure 102 includes a first circular table 104 and a second circular table 106 disposed on the surface of the first circular table 104. The first truncated cone 104 is disposed adjacent to the substrate 100. The side of the first truncated cone 104 is perpendicular to the surface of the substrate 100. The side of the second truncated cone 106 is perpendicular to the bottom surface of the first truncated cone 104. The first circular table 104 and the second circular table 106 form a stepped convex structure, and the second circular table 106 is disposed within the range of the first circular table 104. Preferably, the first round table 104 and the first The two circular tables 106 are coaxially arranged. The first circular table 104 and the second circular table 106 are of a unitary structure, that is, the second circular table 106 is a truncated cone structure extending from the top surface of the first circular table 104.

所述第一圓台104之底面直徑大於第二圓台106之底面直徑。所述第一圓台104之底面直徑為30奈米~1000奈米,高度為50奈米~1000奈米。優選地,所述第一圓台104之底面直徑為50奈米~200奈米,高度為100奈米~500奈米。所述第二圓台106之底面直徑為10奈米~500奈米,高度為20奈米~500奈米。優選地,所述第二圓台106之底面直徑為20奈米~200奈米,高度為100奈米~300奈米。本實施例中,所述第一圓台104與第二圓台106同軸設置。所述第一圓台104之底面直徑為380奈米,高度為105奈米。所述第二圓台106之底面直徑為280奈米,高度為55奈米。 The diameter of the bottom surface of the first circular table 104 is larger than the diameter of the bottom surface of the second circular table 106. The bottom surface of the first truncated cone 104 has a diameter of 30 nm to 1000 nm and a height of 50 nm to 1000 nm. Preferably, the bottom surface of the first truncated cone 104 has a diameter of 50 nm to 200 nm and a height of 100 nm to 500 nm. The bottom surface of the second truncated cone 106 has a diameter of 10 nm to 500 nm and a height of 20 nm to 500 nm. Preferably, the bottom surface of the second truncated cone 106 has a diameter of 20 nm to 200 nm and a height of 100 nm to 300 nm. In this embodiment, the first circular table 104 and the second circular table 106 are coaxially disposed. The bottom surface of the first truncated cone 104 has a diameter of 380 nm and a height of 105 nm. The bottom surface of the second truncated cone 106 has a diameter of 280 nm and a height of 55 nm.

所述三維奈米結構102之材料或定義該三維奈米結構102之材料可與基底100之材料相同以形成一體結構,或與基底100之材料不同。所述複數三維奈米結構102在基底100表面以陣列形式設置。所述陣列形式設置係指所述複數三維奈米結構102可按照等間距行列式排布、同心圓環排布或六角形密堆排布等方式排列。而且,所述以陣列形式設置之三維奈米結構102可形成單一圖案或複數圖案。所述單一圖案可為三角形、平行四邊形、體形、菱形、方形、矩形或圓形等。如圖3所示,所述複數圖案可包括複數相同或不同之上述單一圖案所形成之圖案化陣列。所述相鄰二個維奈米結構102之間距離相等,即相鄰二第一圓台104之間距離相等,為10奈米~1000奈米,優選為10奈米~30奈米。本實施例中,所述複數三維奈米結構102呈六角形密堆排布形成一單一正方形圖案 ,且相鄰二個維奈米結構102之間之距離約為30奈米。 The material of the three-dimensional nanostructure 102 or the material defining the three-dimensional nanostructure 102 may be the same as the material of the substrate 100 to form a unitary structure or different from the material of the substrate 100. The plurality of three-dimensional nanostructures 102 are disposed in an array on the surface of the substrate 100. The array form arrangement means that the plurality of three-dimensional nanostructures 102 can be arranged in an equidistant determinant arrangement, a concentric annular arrangement or a hexagonal dense arrangement. Moreover, the three-dimensional nanostructures 102 arranged in an array may form a single pattern or a plurality of patterns. The single pattern may be a triangle, a parallelogram, a body, a diamond, a square, a rectangle, or a circle. As shown in FIG. 3, the plurality of patterns may include a patterned array formed by a plurality of the plurality of identical or different single patterns. The distance between the two adjacent Venn structures 102 is equal, that is, the distance between the adjacent two first circular stages 104 is equal, ranging from 10 nm to 1000 nm, preferably 10 nm to 30 nm. In this embodiment, the plurality of three-dimensional nanostructures 102 are arranged in a hexagonal densely packed pattern to form a single square pattern. And the distance between two adjacent Venom structures 102 is about 30 nm.

由於本發明之三維奈米結構陣列10之三維奈米結構102為階梯狀結構,相當於包括至少兩層陣列狀設置之三維奈米結構,使得該三維奈米結構陣列10具有廣闊之應用前景。該三維奈米結構陣列10可應用在奈米光學、奈米積體電路及奈米集成光學等領域。 Since the three-dimensional nanostructure 102 of the three-dimensional nanostructure array 10 of the present invention has a stepped structure, which corresponds to a three-dimensional nanostructure including at least two layers arranged in an array, the three-dimensional nanostructure array 10 has broad application prospects. The three-dimensional nanostructure array 10 can be applied to fields such as nano optics, nano-integrated circuits, and nano-integrated optics.

請參閱圖4,本發明第一實施例提供一種三維奈米結構陣列10之製備方法,其包括以下步驟:步驟S10,提供一基底100;步驟S11,在該基底100表面形成掩膜層108;步驟S12,採用反應性蝕刻氣氛110對基底100進行蝕刻同時對所述掩膜層108進行裁剪,形成階梯狀結構之三維奈米結構陣列10;步驟S13,去除掩膜層108。 Referring to FIG. 4, a first embodiment of the present invention provides a method for fabricating a three-dimensional nanostructure array 10, which includes the following steps: step S10, providing a substrate 100; step S11, forming a mask layer 108 on the surface of the substrate 100; In step S12, the substrate 100 is etched by using the reactive etching atmosphere 110 while the mask layer 108 is cut to form a three-dimensional nanostructure array 10 having a stepped structure; and in step S13, the mask layer 108 is removed.

步驟S10,提供一基底100。 In step S10, a substrate 100 is provided.

所述基底100可為矽基基底或半導體基底。具體地,所述基底100之材料可為矽、二氧化矽、氮化矽、石英、玻璃、氮化鎵、砷化鎵、藍寶石、氧化鋁或氧化鎂等。優選地,所述基底100為一半導體層。所述基底100之大小、厚度及形狀不限,可根據實際需要選擇。 The substrate 100 can be a germanium based substrate or a semiconductor substrate. Specifically, the material of the substrate 100 may be tantalum, cerium oxide, tantalum nitride, quartz, glass, gallium nitride, gallium arsenide, sapphire, aluminum oxide or magnesium oxide. Preferably, the substrate 100 is a semiconductor layer. The size, thickness and shape of the substrate 100 are not limited and can be selected according to actual needs.

本實施例中,先通過金屬有機化學氣相沈積法(MOCVD)在一藍寶石基底表面生長一氮化鎵半導體層得到一基底100,再將該基底100切成邊長為2釐米之方形。進一步,本實施例中,還可對該氮化鎵半導體層進行摻雜以形成N型或P型半導體層。 In this embodiment, a substrate 100 is first grown on a surface of a sapphire substrate by metal organic chemical vapor deposition (MOCVD) to obtain a substrate 100, and the substrate 100 is then cut into a square having a side length of 2 cm. Further, in this embodiment, the gallium nitride semiconductor layer may be doped to form an N-type or P-type semiconductor layer.

進一步,本實施例可對該基底100進行親水處理。 Further, this embodiment can perform hydrophilic treatment on the substrate 100.

當所述基底100之材料為矽或二氧化矽時,首先,清洗基底100, 清洗時採用超淨間標準工藝清洗。然後,在溫度為30℃~100℃,體積比為NH3‧H2O:H2O2:H2O=x:y:z之溶液中溫浴30分鐘~60分鐘,進行親水處理,之後用去離子水沖洗2次~3次。其中,x之取值為0.2~2,y之取值為0.2~2,z之取值為1~20。最後,用氮氣吹幹。 When the material of the substrate 100 is tantalum or niobium dioxide, first, the substrate 100 is cleaned and cleaned using a clean room standard process. Then, at a temperature of 30 ° C to 100 ° C, a volume ratio of NH 3 ‧ H 2 O: H 2 O 2 : H 2 O = x: y: z in a bath for 30 minutes to 60 minutes, for hydrophilic treatment, Rinse twice with deionized water for 2 to 3 times. Among them, the value of x is 0.2~2, the value of y is 0.2~2, and the value of z is 1~20. Finally, it was blown dry with nitrogen.

本實施例中,所述基底100之材料為氮化鎵,對該基底100進行親水處理之方法包括以下步驟:首先,清洗基底100,清洗時採用超淨間標準工藝清洗。然後,採用微波電漿處理上述基底100。具體地,可將所述基底100放置于微波電漿系統中,該微波電漿系統之一感應功率源可產生氧電漿、氯電漿或氬電漿。電漿以較低之離子能量從產生區域擴散並漂移至所述基底100表面,進而改善基底100之親水性。 In this embodiment, the material of the substrate 100 is gallium nitride, and the method for performing the hydrophilic treatment on the substrate 100 includes the following steps: First, the substrate 100 is cleaned and cleaned by a standard process using a clean room. The substrate 100 is then treated with microwave plasma. Specifically, the substrate 100 can be placed in a microwave plasma system, and one of the microwave plasma systems can generate an oxygen plasma, a chlorine plasma, or an argon plasma. The plasma diffuses from the generation region and drifts to the surface of the substrate 100 at a lower ion energy, thereby improving the hydrophilicity of the substrate 100.

當採用氧電漿處理上述基底100時,氧電漿系統之功率為10瓦~150瓦,氧電漿之通入速率為10標況毫升每分(standard-state cubic centimeter per minute,sccm)~20標況毫升每分,形成之氣壓為2帕~3帕,採用氧電漿處理時間為1秒~30秒,優選之為5秒~10秒。通過上述方法,改善基底100之親水性。 When the above substrate 100 is treated with oxygen plasma, the power of the oxygen plasma system is 10 watts to 150 watts, and the rate of oxygen plasma is 10 standard milli cents per minute (sccm). 20 standard conditions per minute, the formation of the pressure is 2 Pa ~ 3 Pa, oxygen treatment time is 1 second ~ 30 seconds, preferably 5 seconds ~ 10 seconds. The hydrophilicity of the substrate 100 is improved by the above method.

當採用氯電漿處理上述基底100時,氯電漿系統之功率係50瓦~100瓦,氯電漿之通入速率為10標況毫升每分~30標況毫升每分,形成之氣壓為2帕~10帕,採用氯電漿蝕刻時間為3秒~5秒。通過上述方法,改善基底100之親水性。 When the above substrate 100 is treated with chlorine plasma, the power of the chlorine plasma system is 50 watts to 100 watts, and the access rate of the chlorine plasma is 10 standard milliliters per minute to 30 standard milliliters per minute, and the gas pressure is formed. 2 Pa ~ 10 Pa, using chlorine plasma etching time is 3 seconds ~ 5 seconds. The hydrophilicity of the substrate 100 is improved by the above method.

當採用氬電漿處理上述基底100時,氬電漿系統之功率係50瓦~100瓦,氬電漿之通入速率為2標況毫升每分~10標況毫升每分,形成之氣壓為2帕~10帕,採用氬電漿蝕刻時間為10秒~30秒。通 過上述方法,改善基底100之親水性。 When the argon plasma is used to treat the substrate 100, the power of the argon plasma system is 50 watts to 100 watts, and the inlet rate of the argon plasma is 2 standard milliliters per minute to 10 standard milliliters per minute, and the gas pressure is formed. 2 Pa ~ 10 Pa, argon plasma etching time is 10 seconds ~ 30 seconds. through Through the above method, the hydrophilicity of the substrate 100 is improved.

進一步,還可對該基底100進行二次親水處理,其方式如下:將親水處理過後之所述基底100在2wt%~5wt%之十二烷基硫酸鈉溶液(SDS)中浸泡2小時~24小時,以使基底100有利於後續之工序。即,在SDS中浸泡過後之基底100有利於後續奈米微球之鋪展一形成長城有序排列之大面積奈米微球。 Further, the substrate 100 may be subjected to a second hydrophilic treatment in the following manner: the substrate 100 after the hydrophilic treatment is immersed in a 2 wt% to 5 wt% sodium dodecyl sulfate solution (SDS) for 2 hours to 24 hours. The hour is such that the substrate 100 facilitates the subsequent process. That is, the substrate 100 after being soaked in the SDS is advantageous for spreading the subsequent nanospheres to form a large-area nanosphere in which the Great Wall is arranged in an orderly manner.

步驟S11,在該基底100表面形成掩膜層108。 In step S11, a mask layer 108 is formed on the surface of the substrate 100.

所述在該基底100表面形成掩膜層108之方法可為在基底100表面形成單層奈米微球或形成具有複數開孔之連續膜。可理解,採用單層奈米微球作為掩膜層108,可在奈米微球對應之位置製備得到階梯狀凸起結構,而採用具有複數開孔之連續膜作為掩膜層108,可在開孔對應之位置製備得到階梯狀凹陷結構。所述具有複數開孔之連續膜可通過奈米壓印、範本沉積等方式製備。 The method of forming the mask layer 108 on the surface of the substrate 100 may be to form a single layer of nanospheres on the surface of the substrate 100 or to form a continuous film having a plurality of openings. It can be understood that, by using a single-layer nano microsphere as the mask layer 108, a stepped convex structure can be prepared at a position corresponding to the nano microsphere, and a continuous film having a plurality of openings can be used as the mask layer 108. A stepped recessed structure is prepared at a position corresponding to the opening. The continuous film having a plurality of openings can be prepared by nanoimprinting, template deposition, or the like.

本實施例中,在基底100表面形成單層奈米微球作為掩膜層108,其具體包括以下步驟:步驟S111,製備一奈米微球之溶液。 In this embodiment, a single layer of nanospheres is formed on the surface of the substrate 100 as a mask layer 108, which specifically includes the following steps: Step S111, preparing a solution of nanospheres.

本實施例中,在直徑為15毫米之表面皿中依序加入150毫升之純水、3微升~5微升之0.01wt%210wt%之奈米微球、及當量之0.1wt%~3wt%之SDS後形成混合物,將上述混合物靜置分鐘30~60分鐘。待奈米微球充分分散於混合物中後,再加入1微升~3微升之4wt%之SDS,以調節奈米微球之表面張力,有利於形成單層奈米微球陣列。其中,奈米微球之直徑可為60奈米~500奈米,具體地,奈米微球之直徑可為100奈米、200奈米、300奈米或400奈 米,上述直徑偏差為3奈米~5奈米。優選之奈米微球之直徑為200奈米或400奈米。所述奈米微球可為聚合物奈米微球或矽奈米微球等。所述聚合物奈米微球之材料可為聚苯乙烯(PS)或聚甲基丙烯酸甲酯(PMMA)。可理解額,依實際需求表面皿也可採用直徑為15毫米~38毫米之表面皿,所述表面皿中之混合物也可依實際需求而按比例調製。 In this embodiment, 150 ml of pure water, 3 μl to 5 μl of 0.01 wt% of 210 wt% of nanospheres, and an equivalent of 0.1 wt% to 3 wt are sequentially added to a 15 mm diameter watch glass. After the % SDS was formed, the mixture was allowed to stand for 30 to 60 minutes. After the nanospheres are sufficiently dispersed in the mixture, 1 microliter to 3 microliters of 4% by weight of SDS is added to adjust the surface tension of the nanospheres, which is advantageous for forming a single layer of nanosphere arrays. The diameter of the nanospheres may range from 60 nm to 500 nm. Specifically, the diameter of the nanospheres may be 100 nm, 200 nm, 300 nm or 400 N. Meters, the above diameter deviation is 3 nm ~ 5 nm. Preferred nanospheres have a diameter of 200 nm or 400 nm. The nanospheres may be polymer nanospheres or nanobelt microspheres or the like. The material of the polymer nanospheres may be polystyrene (PS) or polymethyl methacrylate (PMMA). It can be understood that, depending on the actual demand, the watch glass can also be used as a surface dish having a diameter of 15 mm to 38 mm, and the mixture in the watch glass can also be proportioned according to actual needs.

步驟S112,在基底100表面形成單層奈米微球溶液,在基底100上形成之單層奈米微球以陣列形式設置。 In step S112, a single layer of nanosphere solution is formed on the surface of the substrate 100, and the single layer of nanospheres formed on the substrate 100 are arranged in an array.

所述在基底100表面形成單層奈米微球溶液之方法可為提拉法或旋塗法。所述單層奈米微球可呈六角密堆排布、等間距行列式排布或同心圓環排布等。 The method of forming a single layer of nanosphere solution on the surface of the substrate 100 may be a pulling method or a spin coating method. The single-layer nano microspheres may be arranged in a hexagonal close-packed arrangement, in an equidistant arrangement, or in a concentric annular arrangement.

所述採用提拉法在基底100表面形成單層奈米微球溶液之方法包括以下步驟:首先,將經親水處理後之所述基底100緩慢之傾斜之沿著表面皿之側壁滑入表面皿之混合物中,所述基底100之傾斜角度為9°~15°。然後,將所述基底100由表面皿之混合物中緩慢之提取。其中,上述滑下及提起速度相當均為5毫米/小時~10毫米/小時之速度緩慢進行。該過程中,所述奈米微球之溶液中的奈米微球通過自組裝形成呈六角密堆排布之單層奈米微球。所得到之複數三維奈米結構102之排列方式與奈米微球的排列方式有關。 The method for forming a single-layer nano microsphere solution on the surface of the substrate 100 by using the pulling method comprises the following steps: first, the hydrophilically treated substrate 100 is slowly tilted and sliding along the side wall of the surface dish into the surface dish. In the mixture, the substrate 100 has an inclination angle of 9° to 15°. The substrate 100 is then slowly extracted from the mixture of watch glasses. Among them, the above-mentioned sliding down and lifting speed are relatively slow at a speed of 5 mm / hour to 10 mm / hour. In the process, the nanospheres in the solution of the nanospheres are self-assembled to form a single layer of nanospheres arranged in a hexagonal close-pack. The arrangement of the plurality of three-dimensional nanostructures 102 is related to the arrangement of the nanospheres.

本實施例中,採用旋塗法在基底100表面形成單層奈米微球溶液,其包括以下步驟:首先,在基底100上形成單層奈米微球前,將親水處理過後之所述基底100在2wt%之十二烷基硫酸鈉溶液中浸泡2小時~24小時,在十二烷基硫酸鈉溶液中浸泡過之基底100 之一個表面旋塗3微升~5微升之聚苯乙烯。其次,以旋塗轉速為400轉/分鐘~500轉/分鐘之速度旋塗5秒~30秒。然後,以旋塗轉速為800轉/分鐘~1000轉/分鐘之速度旋塗30秒~2分鐘後。最後將旋塗轉速提高至1400轉/分鐘~1500轉/分鐘,旋塗10秒~20秒,除去邊緣多餘之微球,在基底100上形成呈六角密堆排布之單層奈米微球。 In this embodiment, a single layer of nanosphere solution is formed on the surface of the substrate 100 by spin coating, which comprises the following steps: First, the substrate after the hydrophilic treatment is formed before the single layer of nanospheres are formed on the substrate 100. 100 soaked in 2 wt% sodium lauryl sulfate solution for 2 hours to 24 hours, soaked in the substrate 100 in sodium lauryl sulfate solution One surface is spin-coated with 3 microliters to 5 microliters of polystyrene. Next, spin-coat at a speed of 400 rpm to 500 rpm for 5 seconds to 30 seconds. Then, spin-coat at a speed of 800 rpm to 1000 rpm for 30 seconds to 2 minutes. Finally, the spin coating speed is increased to 1400 rpm to 1500 rpm, spin coating for 10 seconds to 20 seconds, and the excess microspheres are removed to form a single layer of nanospheres in a hexagonal close-packed arrangement on the substrate 100. .

步驟S113,將混合物中提取之分佈有奈米微球之基底100進行乾燥後即可得到單層奈米微球。 In step S113, the substrate 100 having the nanospheres extracted in the mixture is dried to obtain a single layer of nanospheres.

本實施例中,所述奈米微球之直徑可為400奈米。請參閱圖5,所述單層奈米微球中之奈米微球以能量最低之排布方式排布,即六角密堆排布。所述單層奈米微球排布最密集,佔空比最大。所述單層奈米微球中任意三個相鄰之奈米微球呈一等邊三角形。請參閱圖6,通過控制奈米微球溶液之表面張力,可使單層奈米微球中之奈米微球呈等間距行列式排布。 In this embodiment, the diameter of the nanospheres may be 400 nm. Referring to FIG. 5, the nanospheres in the single-layer nanospheres are arranged in the lowest energy arrangement, that is, the hexagonal close-packed arrangement. The single-layer nanospheres are densely packed and have the largest duty ratio. Any three adjacent nanospheres in the single-layer nanospheres are in an equilateral triangle. Referring to Figure 6, by controlling the surface tension of the nanosphere solution, the nanospheres in the single-layer nanospheres can be arranged in an equidistant arrangement.

進一步,在基底100表面形成單層奈米微球之後還可包括一對基底100進行烘烤之步驟。所述烘烤之溫度為50℃~100℃,烘烤之時間為1分鐘~5分鐘。 Further, a step of baking the pair of substrates 100 may be further included after forming a single layer of nanospheres on the surface of the substrate 100. The baking temperature is 50 ° C ~ 100 ° C, and the baking time is 1 minute ~ 5 minutes.

步驟S12,採用反應性蝕刻氣氛110對基底100進行蝕刻同時對所述掩膜層108進行裁剪,形成階梯狀結構之三維奈米結構陣列10。 In step S12, the substrate 100 is etched by the reactive etching atmosphere 110 while the mask layer 108 is cut to form a three-dimensional nanostructure array 10 having a stepped structure.

所述採用反應性蝕刻氣氛110對基底100進行蝕刻之步驟在一微波電漿系統中進行。所述微波電漿系統為反應離子蝕刻(Reaction-Ion-Etching,RIE)模式。所述採用反應性蝕刻氣氛 110對基底100進行蝕刻之同時,可對所述掩膜層108進行裁剪。當所述掩膜層108為單層奈米微球時,奈米微球之直徑會在蝕刻之過程中縮小,當掩膜層108為具有複數開孔之連續膜時,所述開孔之直徑會在蝕刻之過程中變大。由於反應性蝕刻氣氛110對基底100進行蝕刻之同時,可對所述掩膜層108進行裁剪,所以可形成階梯狀結構之三維奈米結構102。 The step of etching the substrate 100 using the reactive etching atmosphere 110 is performed in a microwave plasma system. The microwave plasma system is a Reaction-Ion-Etching (RIE) mode. Reactive etching atmosphere The mask layer 108 can be trimmed while the substrate 100 is being etched by 110. When the mask layer 108 is a single layer of nanospheres, the diameter of the nanospheres is reduced during etching. When the mask layer 108 is a continuous film having a plurality of openings, the opening is The diameter will become larger during the etching process. Since the reactive etching atmosphere 110 etches the substrate 100, the mask layer 108 can be cut, so that the three-dimensional nanostructure 102 having a stepped structure can be formed.

本實施例中,將形成有單層奈米微球之基底100放置于微波電漿系統中,且該微波電漿系統之一感應功率源產生反應性蝕刻氣氛110。該反應性蝕刻氣氛110以較低之離子能量從產生區域擴散並漂移至所述基底100之單層奈米微球表面,此時該單層奈米微球被所述反應性蝕刻氣氛110蝕刻,形成更小直徑之奈米微球,即單層奈米微球中之每一奈米微球被蝕刻削減為更小直徑之奈米微球,進而增大相鄰奈米微球之間的間隙。與此同時,反應性蝕刻氣氛110對基底100同時進行蝕刻。由於裁剪及蝕刻之步驟同時進行,所以鄰奈米微球之間之間隙增大之同時,反應性蝕刻氣氛110與基底100開始反應,並隨著鄰奈米微球之間的間隙增大,蝕刻之範圍也增大,從而形成台階狀三維奈米結構102。 In this embodiment, the substrate 100 on which the single layer of nanospheres are formed is placed in a microwave plasma system, and one of the microwave plasma systems induces a reactive source to generate a reactive etching atmosphere 110. The reactive etching atmosphere 110 diffuses from the generation region and drifts to the surface of the single-layer nanosphere of the substrate 100 with a lower ion energy, at which time the single-layer nanosphere is etched by the reactive etching atmosphere 110. Forming smaller diameter nanospheres, that is, each nanosphere of the single layer of nanospheres is etched and cut into smaller diameter nanospheres, thereby increasing the distance between adjacent nanospheres Clearance. At the same time, the reactive etching atmosphere 110 simultaneously etches the substrate 100. Since the steps of cutting and etching are performed simultaneously, the gap between the adjacent nanospheres is increased, and the reactive etching atmosphere 110 starts to react with the substrate 100, and as the gap between the adjacent nanospheres increases, The range of etching also increases to form a stepped three-dimensional nanostructure 102.

本實施例中,所述微波電漿系統之工作氣體包括氯氣(Cl2)及氬氣(Ar)。其中,氯氣之通入速率為10標況毫升每分~60標況毫升每分,氬氣之通入速率為4標況毫升每分~20標況毫升每分。所述工作氣體形成之氣壓為2帕~10帕。所述電漿系統之功率為40瓦~70瓦。所述採用反應性蝕刻氣氛110蝕刻時間為1分鐘~2.5分鐘。優選地,所述微波電漿系統之功率與微波電漿系統之工作氣體的氣壓數值比小於20:1。可理解,本實施例中,通過控制採用 反應性蝕刻氣氛110蝕刻時間可控制三維奈米結構102之間的間距,即相鄰圓台側面之間的最小距離。 In this embodiment, the working gas of the microwave plasma system includes chlorine gas (Cl 2 ) and argon gas (Ar). Among them, the access rate of chlorine gas is 10 standard conditions, milliliters per minute, ~60 standard conditions, milliliters per minute, and the access rate of argon gas is 4 standard conditions, milliliters per minute, ~20 standard milliliters per minute. The working gas is formed at a gas pressure of 2 Pa to 10 Pa. The power of the plasma system is 40 watts to 70 watts. The etching time using the reactive etching atmosphere 110 is 1 minute to 2.5 minutes. Preferably, the ratio of the power of the microwave plasma system to the gas pressure of the working gas of the microwave plasma system is less than 20:1. It can be understood that, in this embodiment, the spacing between the three-dimensional nanostructures 102, that is, the minimum distance between the sides of adjacent truncated cones, can be controlled by controlling the etching time using the reactive etching atmosphere 110.

進一步,所述反應性蝕刻氣氛110中還可加入四氟化硫(SF4)、三氯化硼(BCl3)或其混合氣體等其他氣體以調節蝕刻速率。所述四氟化硫(SF4)、三氯化硼(BCl3)或其混合氣體之流量可為20標況毫升每分~40標況毫升每分。 Further, other gases such as sulfur tetrafluoride (SF 4 ), boron trichloride (BCl 3 ) or a mixed gas thereof may be added to the reactive etching atmosphere 110 to adjust the etching rate. The flow rate of the sulfur tetrafluoride (SF 4 ), boron trichloride (BCl 3 ) or a mixed gas thereof may be 20 standard milliliters per minute to 40 standard milliliters per minute.

步驟S13,去除奈米微球。 In step S13, the nanospheres are removed.

採用四氫呋喃(THF)、丙酮、丁酮、環己烷、正己烷、甲醇或無水乙醇等無毒或低毒環保溶劑作為剝離劑,溶解奈米微球,可去掉奈米微球,保留形成在基底100表面之三維奈米結構102。本實施例中,通過丁酮中超聲清洗去除聚苯乙烯奈米微球。請參見圖7為本發明第一實施例製備之三維奈米結構陣列的掃描電鏡照片。 A non-toxic or low-toxic environmentally friendly solvent such as tetrahydrofuran (THF), acetone, methyl ethyl ketone, cyclohexane, n-hexane, methanol or absolute ethanol is used as a stripping agent to dissolve the nanospheres, and the nanospheres can be removed and retained on the substrate. A three-dimensional nanostructure 102 of 100 surface. In this example, the polystyrene nanospheres were removed by ultrasonic cleaning in butanone. Please refer to FIG. 7 for a scanning electron micrograph of a three-dimensional nanostructure array prepared according to a first embodiment of the present invention.

本發明通過掩膜層108及反應性蝕刻氣氛110蝕刻相結合之方法可製備階梯狀結構之三維奈米結構陣列10,且該方法工藝簡單,成本低廉。 The three-dimensional nanostructure array 10 of the stepped structure can be prepared by the method of combining the mask layer 108 and the reactive etching atmosphere 110, and the method is simple in process and low in cost.

請參閱圖8,本發明第二實施例提供之三維奈米結構陣列20包括一基底200及複數設置於該基底200相對二表面之三維奈米結構202。所述三維奈米結構202包括一第一圓台204及設置於第一圓台204表面之第二圓台206。本發明第二實施例提供之三維奈米結構陣列20與第一實施例提供之三維奈米結構陣列10之結構基本相同,其區別為第二實施例之基底200相對二表面均設置有複數三維奈米結構202。 Referring to FIG. 8, a three-dimensional nanostructure array 20 according to a second embodiment of the present invention includes a substrate 200 and a plurality of three-dimensional nanostructures 202 disposed on opposite surfaces of the substrate 200. The three-dimensional nanostructure 202 includes a first circular table 204 and a second circular table 206 disposed on the surface of the first circular table 204. The three-dimensional nanostructure array 20 provided by the second embodiment of the present invention has substantially the same structure as the three-dimensional nanostructure array 10 provided in the first embodiment, and the difference is that the substrate 200 of the second embodiment is provided with a plurality of three dimensions on opposite surfaces. Nanostructure 202.

請參閱圖9,本發明第三實施例提供之三維奈米結構陣列30包括一基底300及複數設置於該基底300一表面之三維奈米結構302。所述三維奈米結構302包括一第一圓台304,一設置於第一圓台304表面之第二圓台306及一設置於第二圓台306表面之第三圓台308。本發明第三實施例提供之三維奈米結構陣列30與第一實施例提供之三維奈米結構陣列10之結構基本相同,其區別為第三實施例之三維奈米結構302為三層圓台結構。 Referring to FIG. 9, a three-dimensional nanostructure array 30 according to a third embodiment of the present invention includes a substrate 300 and a plurality of three-dimensional nanostructures 302 disposed on a surface of the substrate 300. The three-dimensional nanostructure 302 includes a first circular table 304, a second circular table 306 disposed on the surface of the first circular table 304, and a third circular table 308 disposed on the surface of the second circular table 306. The three-dimensional nanostructure array 30 provided by the third embodiment of the present invention has substantially the same structure as the three-dimensional nanostructure array 10 provided in the first embodiment, and the difference is that the three-dimensional nanostructure 302 of the third embodiment is a three-layer circular table. structure.

請參閱圖10,本發明第四實施例提供之三維奈米結構陣列40包括一基底400及複數設置於該基底400一表面之三維奈米結構402。本發明第四實施例提供之三維奈米結構陣列40與第一實施例提供之三維奈米結構陣列10之結構基本相同,其區別為第三實施例之三維奈米結構402為一階梯狀凹陷結構,即由基底400定義之凹陷空間。所述三維奈米結構402之形狀為一雙層圓台狀空間,具體包括一第一圓台狀空間404,及與第一圓台狀空間404連通之第二圓台狀空間406。所述第一圓台狀空間404與第二圓台狀空間406同軸設置。所述第一圓台狀空間404與第二圓台狀空間406同軸設置。所述第二圓台狀空間406靠近基底400表面設置。所述第二圓台狀空間406之直徑大於第一圓台狀空間404之直徑。 Referring to FIG. 10, a three-dimensional nanostructure array 40 according to a fourth embodiment of the present invention includes a substrate 400 and a plurality of three-dimensional nanostructures 402 disposed on a surface of the substrate 400. The three-dimensional nanostructure array 40 provided by the fourth embodiment of the present invention has substantially the same structure as the three-dimensional nanostructure array 10 provided in the first embodiment, and the difference is that the three-dimensional nanostructure 402 of the third embodiment is a stepped depression. The structure, that is, the recessed space defined by the substrate 400. The shape of the three-dimensional nanostructure 402 is a double-decked space, specifically including a first circular-shaped space 404 and a second circular-shaped space 406 communicating with the first circular-shaped space 404. The first truncated cone shaped space 404 is disposed coaxially with the second truncated cone shaped space 406. The first truncated cone shaped space 404 is disposed coaxially with the second truncated cone shaped space 406. The second frustum-shaped space 406 is disposed near the surface of the substrate 400. The diameter of the second truncated cone shaped space 406 is greater than the diameter of the first truncated cone shaped space 404.

綜上所述,本發明確已符合發明專利之要件,遂依法提出專利申請。惟,以上所述者僅為本發明之較佳實施例,自不能以此限制本案之申請專利範圍。舉凡習知本案技藝之人士援依本發明之精神所作之等效修飾或變化,皆應涵蓋於以下申請專利範圍內。 In summary, the present invention has indeed met the requirements of the invention patent, and has filed a patent application according to law. However, the above description is only a preferred embodiment of the present invention, and it is not possible to limit the scope of the patent application of the present invention. Equivalent modifications or variations made by those skilled in the art in light of the spirit of the invention are intended to be included within the scope of the following claims.

10,20,30,40‧‧‧三維奈米結構陣列 10,20,30,40‧‧‧Three-dimensional nanostructure array

100,200,300,400‧‧‧基底 100,200,300,400‧‧‧Base

102,202,302,402‧‧‧三維奈米結構 102,202,302,402‧‧‧Three-dimensional nanostructure

104,204,304‧‧‧第一圓台 104,204,304‧‧‧First round table

106,206,306‧‧‧第二圓台 106,206,306‧‧‧Second round table

108‧‧‧掩膜層 108‧‧‧ mask layer

110‧‧‧反應性蝕刻氣氛 110‧‧‧Reactive etching atmosphere

308‧‧‧第三圓台 308‧‧‧ Third round table

404‧‧‧第一圓台狀空間 404‧‧‧First round table space

406‧‧‧第二圓台狀空間 406‧‧‧Second round table space

Claims (13)

一種三維奈米結構陣列之製備方法,其包括以下步驟:提供一基底;在該基底一表面形成掩膜層;採用反應性蝕刻氣氛對基底進行蝕刻同時對所述掩膜層進行裁剪,形成階梯狀結構之三維奈米結構陣列,所述採用反應性蝕刻氣氛對基底進行蝕刻之步驟在一微波電漿系統中進行,所述微波電漿系統之功率與微波電漿系統之氣氛之氣壓數值比小於20:1;及去除掩膜層。 A method for preparing a three-dimensional nanostructure array, comprising the steps of: providing a substrate; forming a mask layer on a surface of the substrate; etching the substrate with a reactive etching atmosphere while cutting the mask layer to form a ladder a three-dimensional nanostructure array of a structure, wherein the step of etching the substrate using a reactive etching atmosphere is performed in a microwave plasma system, the ratio of the power of the microwave plasma system to the gas pressure of the atmosphere of the microwave plasma system Less than 20:1; and remove the mask layer. 如請求項第1項所述的三維奈米結構陣列之製備方法,其中,所述在該基底表面形成掩膜層之方法為在基底表面形成單層奈米微球,從而在奈米微球對應之位置製備得到階梯狀凸起結構。 The method for preparing a three-dimensional nanostructure array according to Item 1, wherein the method of forming a mask layer on the surface of the substrate is to form a single layer of nanospheres on the surface of the substrate, thereby forming a nanosphere in the nanosphere. A stepped convex structure is prepared at the corresponding position. 如請求項第2項所述的三維奈米結構陣列之製備方法,其中,所述單層奈米微球包括複數呈陣列排布之奈米微球。 The method for preparing a three-dimensional nanostructure array according to claim 2, wherein the single-layer nanospheres comprise a plurality of nanospheres arranged in an array. 如請求項第3項所述的三維奈米結構陣列之製備方法,其中,所述單層奈米微球包括複數呈六角密堆排布、等間距行列式排布或同心圓環排布之奈米微球。 The method for preparing a three-dimensional nanostructure array according to Item 3, wherein the single-layer nanospheres comprise a plurality of hexagonal dense packed rows, equidistant determinant arrangements or concentric annular rows. Nano microspheres. 如請求項第2項所述的三維奈米結構陣列之製備方法,其中,所述在所述基底表面形成單層奈米微球之方法為提拉法或旋塗法。 The method for preparing a three-dimensional nanostructure array according to claim 2, wherein the method of forming a single layer of nanospheres on the surface of the substrate is a pulling method or a spin coating method. 如請求項第2項所述的三維奈米結構陣列之製備方法,其中,在所述基底表面形成單層奈米微球之前進一步包括一對基底進行親水處理之步驟。 The method for preparing a three-dimensional nanostructure array according to claim 2, further comprising the step of performing hydrophilic treatment on a pair of substrates before forming a single layer of nanospheres on the surface of the substrate. 如請求項第1項所述的三維奈米結構陣列之製備方法,其中,所述微波電漿系統之工作氣體包括氯氣和氬氣。 The method for preparing a three-dimensional nanostructure array according to claim 1, wherein the working gas of the microwave plasma system comprises chlorine gas and argon gas. 如請求項第7項所述的三維奈米結構陣列之製備方法,其中,所述氯氣之通入速率為10標況毫升每分~60標況毫升每分,所述氬氣之通入速率為4標況毫升每分~20標況毫升每分。 The method for preparing a three-dimensional nanostructure array according to Item 7, wherein the chlorine gas inlet rate is 10 standard milliliters per minute to ~60 standard milliliters per minute, and the argon gas inlet rate is For 4 standard conditions, the milliliters per minute ~ 20 standard conditions per minute. 如請求項第7項所述的三維奈米結構陣列之製備方法,其中,所述工作氣體之氣壓為2帕~10帕。 The method for preparing a three-dimensional nanostructure array according to claim 7, wherein the working gas has a gas pressure of 2 Pa to 10 Pa. 如請求項第1項所述的三維奈米結構陣列之製備方法,其中,所述微波電漿系統之功率為40瓦~70瓦。 The method for preparing a three-dimensional nanostructure array according to claim 1, wherein the microwave plasma system has a power of 40 watts to 70 watts. 如請求項第1項所述的三維奈米結構陣列之製備方法,其中,所述採用反應性蝕刻氣氛對基底進行蝕刻之時間為1分鐘~2.5分鐘。 The method for preparing a three-dimensional nanostructure array according to claim 1, wherein the substrate is etched by a reactive etching atmosphere for a period of from 1 minute to 2.5 minutes. 如請求項第1項所述的三維奈米結構陣列之製備方法,其中,所述在該基底表面形成掩膜層之方法為在基底表面形成具有複數開孔之連續膜,從而在開孔對應之位置製備得到階梯狀凹陷結構。 The method for preparing a three-dimensional nanostructure array according to Item 1, wherein the method of forming a mask layer on the surface of the substrate is to form a continuous film having a plurality of openings on the surface of the substrate, thereby corresponding to the opening. The position is prepared to obtain a stepped depression structure. 一種三維奈米結構陣列的製備方法,其包括以下步驟:提供一基底;對該基底進行親水處理;在基底表面形成單層奈米微球作為掩膜層;採用反應性蝕刻氣氛對基底進行蝕刻同時對所述掩膜層進行裁剪,形成階梯狀結構之三維奈米結構陣列,所述採用反應性蝕刻氣氛對基底進行蝕刻之步驟在一微波電漿系統中進行,所述微波電漿系統之功率與微波電漿系統之氣氛之氣壓數值比小於20:1;及去除掩膜層。 A method for preparing a three-dimensional nanostructure array, comprising the steps of: providing a substrate; performing hydrophilic treatment on the substrate; forming a single layer of nanospheres as a mask layer on the surface of the substrate; and etching the substrate by using a reactive etching atmosphere Simultaneously cutting the mask layer to form a three-dimensional nanostructure array having a stepped structure, and the step of etching the substrate by using a reactive etching atmosphere is performed in a microwave plasma system, wherein the microwave plasma system The ratio of the pressure of the power to the atmosphere of the microwave plasma system is less than 20:1; and the mask layer is removed.
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