TWI449219B - Light emitting diode device, and method for fabricating the same - Google Patents
Light emitting diode device, and method for fabricating the same Download PDFInfo
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本發明係關於一種發光二極體裝置及其製造方法,特別關於一種具有垂直電極結構之發光二極體裝置及其製造方法。The present invention relates to a light emitting diode device and a method of fabricating the same, and more particularly to a light emitting diode device having a vertical electrode structure and a method of fabricating the same.
發光二極體(Light Emitting Diode,簡稱LED)因其具有高亮度、體積小、重量輕、不易破損、低耗電量和壽命長等優點,所以被廣泛地應用各式顯示產品中,其發光原理如下:施加一電壓於二極體上,驅使二極體裡的電子與電洞結合,此結合所產生的能量是以光的形式釋放出來。Light Emitting Diode (LED) is widely used in various display products because of its high brightness, small size, light weight, low damage, low power consumption and long life. The principle is as follows: Apply a voltage to the diode to drive the electrons in the diode to combine with the hole, and the energy generated by the combination is released in the form of light.
第1圖為一習知具有藍寶石(sapphire)基底之發光二極體10的剖面結構示意圖。該發光二極體10包括一藍寶石基底12、一緩衝層13、一半導體元件層15、一第一電極20以及第二電極22。半導體元件層15包括一N型半導體層14、一發光層16以及一P型半導體層18。該發光二極體10的形成方式係在藍寶石基底12上依序形成該緩衝層13、N型半導體層14、發光層16、以及P型半導體層18,然後再其一側蝕刻一凹槽露出部份之N型半導體層14,最後鍍上金屬層後以光罩微影蝕刻,以分別在N型半導體層14及P型半導體層18形成第一電極20及第二電極22。該第一電極20及第二電極22皆在同一側(基底的反側),如此安排的原因係為藍寶石基底不導電,無法在晶片之反面製造電極。如此一來,除了必需犧牲部份發光面積來形成N型半導體層14的接觸電極使得該發光二極體10之有效發光面積減少外,如此結構亦會造成電流集中於兩電極20、22之間的最短路徑25而無法均勻分佈至整個發光二極體10,使得發光二極體10的整體發光效率不佳而且發光不均勻。Fig. 1 is a schematic cross-sectional view showing a conventional light-emitting diode 10 having a sapphire substrate. The light emitting diode 10 includes a sapphire substrate 12, a buffer layer 13, a semiconductor device layer 15, a first electrode 20, and a second electrode 22. The semiconductor device layer 15 includes an N-type semiconductor layer 14, a light-emitting layer 16, and a P-type semiconductor layer 18. The light-emitting diode 10 is formed by sequentially forming the buffer layer 13, the N-type semiconductor layer 14, the light-emitting layer 16, and the P-type semiconductor layer 18 on the sapphire substrate 12, and then etching a groove on one side thereof to expose A part of the N-type semiconductor layer 14 is finally plated with a metal layer and then etched by a photomask to form the first electrode 20 and the second electrode 22 in the N-type semiconductor layer 14 and the P-type semiconductor layer 18, respectively. The first electrode 20 and the second electrode 22 are all on the same side (the opposite side of the substrate). The reason for this arrangement is that the sapphire substrate is not electrically conductive, and the electrodes cannot be fabricated on the reverse side of the wafer. In this way, in addition to the need to sacrifice part of the light-emitting area to form the contact electrode of the N-type semiconductor layer 14 so that the effective light-emitting area of the light-emitting diode 10 is reduced, such a structure also causes current to concentrate between the two electrodes 20, 22. The shortest path 25 is not uniformly distributed to the entire light emitting diode 10, so that the overall luminous efficiency of the light emitting diode 10 is poor and the light emission is uneven.
為解決上述問題,一習知技術為達到垂直電極的設計,係先在藍寶石基底上形成所需的磊晶層,然後在藉由使用雷射剝離(laser lift-off)製程進一步將發光二極體晶片的藍寶石基底移除,並改以散熱較佳基板如矽基底取代。然而,上述作法之製造良率並不高,且使得製造成本大幅提高。In order to solve the above problems, a conventional technique for forming a vertical electrode is to first form a desired epitaxial layer on a sapphire substrate, and then further to emit a light-emitting diode by using a laser lift-off process. The sapphire substrate of the bulk wafer is removed and replaced with a heat-dissipating substrate such as a germanium substrate. However, the manufacturing yield of the above method is not high, and the manufacturing cost is greatly increased.
基於上述,業界亟需一種創新的發光二極體裝置來解決上述問題。Based on the above, there is an urgent need in the industry for an innovative light emitting diode device to solve the above problems.
本發明提供一種發光二極體裝置,包含一絕緣基底,具有一上表面及一下表面;一圖形化導電層,配置於該絕緣基底之部份上表面;一緩衝層,配置於該絕緣基底未被該圖形化導電層所覆蓋的上表面;一第一半導體層,配置於該緩衝層之上;一發光層,配置於該第一半導體層之上;一第二半導體層,配置於該發光層之上;以及,一電極,配置於該第二半導體層之上。The present invention provides a light emitting diode device comprising an insulating substrate having an upper surface and a lower surface; a patterned conductive layer disposed on a portion of the upper surface of the insulating substrate; a buffer layer disposed on the insulating substrate An upper surface covered by the patterned conductive layer; a first semiconductor layer disposed on the buffer layer; a light emitting layer disposed on the first semiconductor layer; and a second semiconductor layer disposed on the light emitting layer Above the layer; and an electrode disposed on the second semiconductor layer.
此外,本發明亦提供一種發光二極體裝置製造方法,包含:提供一絕緣基底,該絕緣基底具有一上表面及一下表面;形成一圖形化導電層於該絕緣基底之部份上表面;形成一緩衝層於該絕緣基底未被該圖形化導電層所覆蓋的上表面;形成一第一半導體層於該緩衝層之上;形成一發光層於該第一半導體層之上;形成一第二半導體層於該發光層之上;以及,形成一電極,配置於該第二半導體層之上。In addition, the present invention also provides a method for fabricating a light emitting diode device, comprising: providing an insulating substrate having an upper surface and a lower surface; forming a patterned conductive layer on a portion of the upper surface of the insulating substrate; forming a buffer layer on the upper surface of the insulating substrate not covered by the patterned conductive layer; forming a first semiconductor layer over the buffer layer; forming a light emitting layer over the first semiconductor layer; forming a second a semiconductor layer over the light emitting layer; and an electrode formed over the second semiconductor layer.
為讓本發明之上述和其他目的、特徵、和優點能更明顯易懂,下文特舉出較佳實施例,並配合所附圖式,作詳細說明如下:The above and other objects, features and advantages of the present invention will become more <RTIgt;
為解決先前技術所遭遇到的問題,本發明提供一種發光二極體裝置及其製造方法,使得具有絕緣基底的發光二極體裝置具有垂直電極的架構,除了不需犧牲部份發光區域(降低有效發光面積)外,可改善電子流有效注入發光層的均勻性(使電流流經途徑均勻分佈至整個發光二極體),提昇整體發光效率。In order to solve the problems encountered in the prior art, the present invention provides a light emitting diode device and a manufacturing method thereof, such that a light emitting diode device having an insulating substrate has a vertical electrode structure, except that a portion of the light emitting region is not sacrificed (reduced In addition to the effective light-emitting area, the uniformity of the effective injection of the electron flow into the light-emitting layer can be improved (the current is uniformly distributed through the path to the entire light-emitting diode), and the overall luminous efficiency is improved.
根據本發明一實施例,該發光二極體裝置可包含:一絕緣基底,具有一上表面及一下表面;一圖形化導電層,配置於該絕緣基底之部份上表面;一緩衝層,配置於該絕緣基底未被該圖形化導電層所覆蓋的上表面;一第一半導體層,配置於該緩衝層之上;一發光層,配置於該第一半導體層之上;一第二半導體層,配置於該發光層之上;以及,一電極,配置於該第二半導體層之上。根據本發明另一實施例,該圖形化導電層更可以進一步延伸至該絕緣基底之側壁。此外,該圖形化導電層亦可進一步延伸以覆蓋該絕緣基底之部份下表面。According to an embodiment of the invention, the light emitting diode device may include: an insulating substrate having an upper surface and a lower surface; a patterned conductive layer disposed on a portion of the upper surface of the insulating substrate; a buffer layer, configured An upper surface of the insulating substrate that is not covered by the patterned conductive layer; a first semiconductor layer disposed on the buffer layer; a light emitting layer disposed on the first semiconductor layer; and a second semiconductor layer And disposed on the light emitting layer; and an electrode disposed on the second semiconductor layer. According to another embodiment of the invention, the patterned conductive layer may further extend to the sidewall of the insulating substrate. In addition, the patterned conductive layer may further extend to cover a portion of the lower surface of the insulating substrate.
本發明所述之發光二極體裝置其絕緣基底之上表面,係被該圖形化導電層及該緩衝層完全覆蓋,而該緩衝層係可進一步坦覆性覆蓋該圖形化導電層。值得注意的是,形成於該基底上表面的圖形化導電層,至少一部份係緊鄰該上表面的邊界。此外,該圖形化導電層的設計重點在於,該形成於該基底上表面的圖形化導電層係佔該基板上表面面積的10-50%。若該圖形化導電層佔該基板上表面面積的比率係小於10%時,則會使得該發光二極體裝置之電流分布集中,導致電場均勻度降低;相反的,該圖形化導電層佔該基板上表面面積也不宜太大,否則會使得形成於基底上表面的緩衝層所佔的基板上表面面積過低,影響到後續膜層(發光層、第一半導體層、第二半導體層)的磊晶品質。該圖形化導電層之可配置於該基板上表面的周圍(緊鄰該上表面的邊界),或是具有格狀結構。該緩衝層之厚度可大於或等於該圖形化導電層,緩衝層較佳係坦覆性覆蓋該圖形化導電層。該電極係包含一透明電極、一金屬電極、或其組合。The upper surface of the insulating substrate of the LED device of the present invention is completely covered by the patterned conductive layer and the buffer layer, and the buffer layer can further cover the patterned conductive layer. It should be noted that at least a portion of the patterned conductive layer formed on the upper surface of the substrate is adjacent to the boundary of the upper surface. In addition, the patterned conductive layer is designed to focus on that the patterned conductive layer formed on the upper surface of the substrate accounts for 10-50% of the surface area of the substrate. If the ratio of the patterned conductive layer to the surface area of the substrate is less than 10%, the current distribution of the light emitting diode device is concentrated, resulting in a decrease in electric field uniformity; on the contrary, the patterned conductive layer accounts for The surface area of the substrate is not too large, otherwise the upper surface area of the substrate occupied by the buffer layer formed on the upper surface of the substrate is too low, which affects the subsequent film layers (the light emitting layer, the first semiconductor layer, the second semiconductor layer). Epitaxial quality. The patterned conductive layer may be disposed around the upper surface of the substrate (close to the boundary of the upper surface) or have a lattice structure. The buffer layer may have a thickness greater than or equal to the patterned conductive layer, and the buffer layer preferably covers the patterned conductive layer. The electrode comprises a transparent electrode, a metal electrode, or a combination thereof.
本發明所述之發光二極體裝置可更包含一導線架,該導線架可具有一第一電路及一第二電路,其中該絕緣基底係配置於該導線架上,且該圖形化導電層與該第一電路電性接觸。此外,該電極與該第二電路電可藉由一導線達到電性連結。The LED device of the present invention may further include a lead frame, the lead frame may have a first circuit and a second circuit, wherein the insulating substrate is disposed on the lead frame, and the patterned conductive layer Electrically contacting the first circuit. In addition, the electrode and the second circuit can be electrically connected by a wire.
以下將配合圖示,以說明根據本發明所提供之發光二極體裝置及其製造方法。Hereinafter, the illustration will be made to illustrate a light-emitting diode device and a method of manufacturing the same according to the present invention.
根據本發明一實施例,發光二極體裝置的製造方法包含以下步驟:According to an embodiment of the invention, a method of fabricating a light emitting diode device includes the following steps:
首先,請參照第2A圖,提供一絕緣基底102,該絕緣基底102具有一上表面101、一下表面103、及側壁104,請參照第2B圖,係為沿第2A圖A-A’切線之剖面結構。該絕緣基底102可為習知之絕緣基底,例如藍寶石(氧化鋁)基底、氮化鋁基底、或氧化鋅基底等。First, please refer to FIG. 2A to provide an insulating substrate 102 having an upper surface 101, a lower surface 103, and a sidewall 104. Referring to FIG. 2B, it is tangent to A-A' in FIG. 2A. Profile structure. The insulating substrate 102 can be a conventional insulating substrate such as a sapphire (alumina) substrate, an aluminum nitride substrate, or a zinc oxide substrate.
接著,請參照第3A圖,形成導電層於該絕緣基底102之上表面101,並進行圖形化,得到一圖形化導電層106。值得注意的是,該圖形化導電層106並未覆蓋該絕緣基底102之整個上表面101因此,在形成該圖形化導電層106於基板後,仍會露出未被覆蓋的絕緣基底102上表面101,請參照第3B圖,係為沿第3A圖A-A’切線之剖面結構。該圖形化導電層106可具有格狀、螺旋、圓環、指叉等、點狀或條狀結構,具體圖形並無限定,可視需要加以變化,如第4圖及第5圖所示。此外,該圖形化導電層亦可僅配置於該基板上表面的周圍(緊鄰該上表面的邊界),或再進一步的覆蓋該基板的側邊,如第6圖所示。該圖形化導電層106可包含透明或不透明之導電材料,例如:銦錫氧化物(ITO)、銦鋅氧化物(IZO)、鋅鋁氧化物(AZO)、氧化鋅(ZnO))、鈀、鉑、鎳、金、銀、鋁、鎢、銅、或其組合。此外,該圖形化導電層106亦可為一複合膜層,例如進一步包含歐姆接觸材料、擴散阻障層、金屬結合層(metal bonding layer)、反射層、或上述之組合。Next, referring to FIG. 3A, a conductive layer is formed on the upper surface 101 of the insulating substrate 102, and patterned to obtain a patterned conductive layer 106. It should be noted that the patterned conductive layer 106 does not cover the entire upper surface 101 of the insulating substrate 102. Therefore, after the patterned conductive layer 106 is formed on the substrate, the uncovered insulating substrate 102 upper surface 101 is still exposed. Please refer to Figure 3B for the cross-sectional structure along the line A-A' of Figure 3A. The patterned conductive layer 106 may have a lattice, a spiral, a ring, a finger, etc., a dot or a strip structure, and the specific pattern is not limited, and may be changed as needed, as shown in FIGS. 4 and 5. In addition, the patterned conductive layer may also be disposed only around the upper surface of the substrate (close to the boundary of the upper surface), or further cover the side of the substrate, as shown in FIG. The patterned conductive layer 106 may comprise a transparent or opaque conductive material such as: indium tin oxide (ITO), indium zinc oxide (IZO), zinc aluminum oxide (AZO), zinc oxide (ZnO), palladium, Platinum, nickel, gold, silver, aluminum, tungsten, copper, or a combination thereof. In addition, the patterned conductive layer 106 can also be a composite film layer, for example, further comprising an ohmic contact material, a diffusion barrier layer, a metal bonding layer, a reflective layer, or a combination thereof.
根據本發明另一實施例,請參照第7A圖,在形成該圖形化導電層106時,較佳可同時將該圖形化導電層106形成於該絕緣基底102之側壁104,以利後續發光二極體裝置的電性連結。請參照第7B圖,係為沿第7A圖A-A’切線之剖面結構,該圖形化導電層106係由該絕緣基底102上表面101的邊界處進一步延伸至該絕緣基底102之側壁104。該圖形化導電層106可在晶圓步驟(未進行切割前)或晶片步驟(將晶圓切割成數片晶片後)中形成,形成方式可為熱蒸鍍、濺射或電漿強化式化學氣相沉積方式。舉例來說,若為晶圓步驟中形成,請參照第8圖,可預先在該晶圓200上形成溝道或複數個貫孔150,當形成該導電層於晶圓200之時,該導電層材料除了會形成於基底102之上表面外,更可藉由該溝道或貫孔150而延伸並覆蓋該絕緣基底102之側壁104。再者,在形成該圖形化導電層106於該絕緣基底102之上表面101及側壁104的步驟後,可更包含形成一底導電層107於該絕緣基底102之部份下表面103並與形成於側壁的圖形化導電層106電性接觸,換言之,可使得該圖形化導電層106進一步延伸至覆蓋該絕緣基底102之部份下表面103,請參照第9圖。According to another embodiment of the present invention, referring to FIG. 7A, when the patterned conductive layer 106 is formed, the patterned conductive layer 106 is preferably formed on the sidewall 104 of the insulating substrate 102 to facilitate subsequent illumination. Electrical connection of the polar body device. Referring to FIG. 7B, which is a cross-sectional structure along the line A-A' of FIG. 7A, the patterned conductive layer 106 further extends from the boundary of the upper surface 101 of the insulating substrate 102 to the sidewall 104 of the insulating substrate 102. The patterned conductive layer 106 can be formed in a wafer step (before cutting) or a wafer step (after cutting the wafer into a plurality of wafers), which can be formed by thermal evaporation, sputtering or plasma-enhanced chemical gas. Phase deposition method. For example, if it is formed in the wafer step, please refer to FIG. 8 , a channel or a plurality of through holes 150 may be formed on the wafer 200 in advance. When the conductive layer is formed on the wafer 200 , the conductive layer is formed. The layer material may be formed on the upper surface of the substrate 102, and may extend through the channel or the through hole 150 and cover the sidewall 104 of the insulating substrate 102. Furthermore, after the step of forming the patterned conductive layer 106 on the upper surface 101 and the sidewalls 104 of the insulating substrate 102, the bottom conductive layer 107 may be further formed on a portion of the lower surface 103 of the insulating substrate 102 and formed. The patterned conductive layer 106 on the sidewall is electrically contacted, in other words, the patterned conductive layer 106 is further extended to cover a portion of the lower surface 103 of the insulating substrate 102. Please refer to FIG.
在此以第3A圖所示結構為例,接續描述本發明所述之該發光二極體裝置的製造。接著,請參照第10A圖,形成一緩衝層108於該絕緣基底102未被該圖形化導電層106所覆蓋的上表面101。該緩衝層108之厚度可大於或等於該圖形化導電層106,請參照第10B圖,係為沿第10A圖A-A’切線之剖面結構。此外,根據本發明另一實施例,該緩衝層108的厚度較佳係大於該圖形化導電層106,並坦覆性覆蓋該圖形化導電層106,請參照第11A圖及第11B圖(係為沿第11A圖A-A’切線之剖面結構)。本發明對所使用之緩衝層108材質並無限定,可為習知之任何用於發光二極體的緩衝材料,例如未摻雜的半導體層(可選自於Ⅲ-Ⅴ族之化學元素、Ⅱ-Ⅵ族之化學元素、Ⅳ族之化學元素、Ⅳ-Ⅳ族之化學元素之任意組合)。Here, the structure shown in FIG. 3A is taken as an example to describe the manufacture of the light-emitting diode device according to the present invention. Next, referring to FIG. 10A, a buffer layer 108 is formed on the upper surface 101 of the insulating substrate 102 that is not covered by the patterned conductive layer 106. The buffer layer 108 may have a thickness greater than or equal to the patterned conductive layer 106. Referring to FIG. 10B, it is a cross-sectional structure along the line AA' of FIG. 10A. In addition, according to another embodiment of the present invention, the thickness of the buffer layer 108 is preferably larger than the patterned conductive layer 106, and the patterned conductive layer 106 is covered satisfactorily. Please refer to FIG. 11A and FIG. 11B. It is a cross-sectional structure along the line A-A' of Figure 11A). The present invention is not limited to the material of the buffer layer 108 used, and may be any buffer material for a light-emitting diode, such as an undoped semiconductor layer (which may be selected from the group III-V chemical element, II). - any combination of chemical elements of Group VI, chemical elements of Group IV, and chemical elements of Group IV-IV).
在此以第11A圖所示結構為例,接續描述本發明所述之該發光二極體裝置的製造。接著,請參照第12A圖,形成一半導體元件複合層115於該緩衝層108,該半導體元件複合層115依序包含一第一半導體層110、一發光層112、及一第二半導體層114,請參照第12B圖(係為沿第12A圖A-A’切線之剖面結構)。該發光層112係為一半導體材料層,可具有為多重量子井(Multiple Quantun Well,MQW)結構,可選自於Ⅲ-Ⅴ族之化學元素、Ⅱ-Ⅵ族之化學元素、Ⅳ族之化學元素、Ⅳ-Ⅳ族之化學元素、或其組合,例如:AlN、GaN、AlGaN、InGaN、AlInGaN、GaP、GaAsP、GaInP、AlGaInP、或AlGaAs。該第一半導體層110及該第二半導體層114可分別為一N型磊晶層及一P型磊晶層,當然其亦可互換,於此並不加以限制,其材質同樣可分別選自於Ⅲ-Ⅴ族之化學元素、Ⅱ-Ⅵ族之化學元素、Ⅳ族之化學元素、Ⅳ-Ⅳ族之化學元素、或其組合。舉例來說,若第一半導體層110為N型氮化鎵系半導體,則第二半導體層114係為P型氮化鎵系半導體,若第一半導體層110係為P型氮化鎵系半導體,則第二半導體層114係為N型氮化鎵系半導體,且發光層112可為氮化鎵系半導體。在形成該半導體元件複合層115的步驟後,接著,形成一透明電極116於該第二半導體層114上,請參照第13A圖及第13B圖(係為沿第13A圖A-A’切線之剖面結構)。該透明電極116可為銦錫氧化物(ITO)、銦鋅氧化物(IZO)、鋅鋁氧化物(AZO)、氧化鋅(ZnO)或其結合,而其形成方式可為熱蒸鍍、濺射或電漿強化式化學氣相沉積方式。接著,形成一金屬電極118於該透明電極116之上,得到一發光二極體晶片300,請參照第14A圖及第14B圖(係為沿第13A圖A-A’切線之剖面結構)。該金屬電極1118可為鈀、鉑、鎳、金、銀、鋁、鎢、銅、或其組合,而其形成方式可為熱蒸鍍、濺射或電漿強化式化學氣相沉積方式。Here, the structure shown in FIG. 11A is taken as an example to describe the manufacture of the light-emitting diode device according to the present invention. Next, referring to FIG. 12A, a semiconductor device composite layer 115 is formed on the buffer layer 108. The semiconductor device composite layer 115 sequentially includes a first semiconductor layer 110, a light emitting layer 112, and a second semiconductor layer 114. Please refer to Fig. 12B (the cross-sectional structure along the line A-A' of Fig. 12A). The luminescent layer 112 is a semiconductor material layer and may have a multiple quantum well (MQW) structure, which may be selected from the group consisting of chemical elements of group III-V, chemical elements of group II-VI, and chemistry of group IV. Element, chemical element of group IV-IV, or a combination thereof, for example: AlN, GaN, AlGaN, InGaN, AlInGaN, GaP, GaAsP, GaInP, AlGaInP, or AlGaAs. The first semiconductor layer 110 and the second semiconductor layer 114 are respectively an N-type epitaxial layer and a P-type epitaxial layer. Of course, they may be interchanged, and are not limited thereto, and the materials may also be respectively selected from the same. a chemical element of Group III-V, a chemical element of Group II-VI, a chemical element of Group IV, a chemical element of Group IV-IV, or a combination thereof. For example, when the first semiconductor layer 110 is an N-type gallium nitride-based semiconductor, the second semiconductor layer 114 is a P-type gallium nitride-based semiconductor, and the first semiconductor layer 110 is a P-type gallium nitride-based semiconductor. The second semiconductor layer 114 is an N-type gallium nitride-based semiconductor, and the light-emitting layer 112 may be a gallium nitride-based semiconductor. After the step of forming the semiconductor device composite layer 115, a transparent electrode 116 is formed on the second semiconductor layer 114. Please refer to FIG. 13A and FIG. 13B (which is tangent to A-A' along FIG. 13A). Section structure). The transparent electrode 116 may be indium tin oxide (ITO), indium zinc oxide (IZO), zinc aluminum oxide (AZO), zinc oxide (ZnO) or a combination thereof, and may be formed by thermal evaporation or sputtering. Shot or plasma enhanced chemical vapor deposition. Next, a metal electrode 118 is formed on the transparent electrode 116 to obtain a light-emitting diode wafer 300. Please refer to FIGS. 14A and 14B (which are cross-sectional structures along the line A-A' of FIG. 13A). The metal electrode 1118 can be palladium, platinum, nickel, gold, silver, aluminum, tungsten, copper, or a combination thereof, and can be formed by thermal evaporation, sputtering, or plasma enhanced chemical vapor deposition.
在完成該發光二極體晶片300之製造後,本發明所述之該發光二極體裝置製造方法可更包含將該發光二極體晶片300固合於一導線架120上,請參照第15圖,該導線架上配置有已預先設計好之一第一電路125及一第二電路127。在將該發光二極體晶片300固合於該導線架120,需使該圖形化導電層106與該第一電路125的突出部接觸。再者,可利用一導線129將該金屬電極118與該第二電路127進行電性連結,請參照第16圖,如此一來,可達到驅動該發光二極體晶片300的目的,得到一發光二極體裝置400。After the fabrication of the LED substrate 300 is completed, the method for fabricating the LED device of the present invention may further include bonding the LED wafer 300 to a lead frame 120. The lead frame is provided with a first circuit 125 and a second circuit 127 which are pre-designed. When the LED array 300 is bonded to the lead frame 120, the patterned conductive layer 106 needs to be in contact with the protruding portion of the first circuit 125. Furthermore, the metal electrode 118 and the second circuit 127 can be electrically connected by a wire 129. Referring to FIG. 16, the LED chip 300 can be driven to obtain a light-emitting diode. Diode device 400.
此外,在本發明另一實施例中,係利用第7A圖所示結構(圖形化導電層延伸至該絕緣基底102的側壁104)經由第11A圖至14A圖所示之製造流程(依續成長緩衝層、N型半導體層、發光層、P型半導體層、及電極層),得到一發光二極體晶片300。接著,將該發光二極體晶片300固合於一導線架120上,該導線架上配置有已預先設計好之一第一電路125及一第二電路127。在將該發光二極體晶片300固合於該導線架120,該圖形化導電層覆蓋該絕緣基底102之部份下表面103與該第一電路125接觸。再者,可利用一導線129將該金屬電極118與該第二電路127進行電性連結,請參照第17圖,得到一發光二極體裝置400。由於該發光二極體晶片300本身具有延伸至該絕緣基底102側壁104的圖形化導電層106,因此可直接與平坦的第一電路125接觸,達到電性連結。In addition, in another embodiment of the present invention, the structure shown in FIG. 7A (the patterned conductive layer extends to the sidewall 104 of the insulating substrate 102) is continued through the manufacturing process shown in FIGS. 11A to 14A. The buffer layer, the N-type semiconductor layer, the light-emitting layer, the P-type semiconductor layer, and the electrode layer) obtain a light-emitting diode wafer 300. Then, the LED chip 300 is fixed to a lead frame 120. The lead frame is provided with a first circuit 125 and a second circuit 127 which are pre-designed. The LED substrate 300 is bonded to the lead frame 120, and a portion of the lower surface 103 of the patterned conductive layer covering the insulating substrate 102 is in contact with the first circuit 125. Furthermore, the metal electrode 118 and the second circuit 127 can be electrically connected by a wire 129. Referring to FIG. 17, a light-emitting diode device 400 is obtained. Since the LED wafer 300 itself has a patterned conductive layer 106 extending to the sidewall 104 of the insulating substrate 102, it can be directly in contact with the flat first circuit 125 to achieve electrical connection.
根據本發明另一實施例,係利用第9圖所示結構(圖形化導電層106除延伸至該絕緣基底102的側壁104外,一形成於該絕緣基底102之部份下表面103的底導電層107係進一步與該圖形化導電層106電性連結)經由第11A圖至14A圖所示之製造流程,得到一發光二極體晶片300。接著,將該發光二極體晶片300固合於一導線架120上,該導線架上配置有已預先設計好之一第一電路125及一第二電路127。在將該發光二極體晶片300固合於該導線架120,該圖形化導電層覆蓋該絕緣基底102之部份下表面103與該第一電路125接觸。再者,可利用一導線129將該金屬電極118與該第二電路127進行電性連結,請參照第18圖,得到一發光二極體裝置400。由於該發光二極體晶片300本身具有延伸至該絕緣基底102側壁104及底部103的圖形化導電層106,因此可直接與平坦的第一電路125接觸,達到電性連結。According to another embodiment of the present invention, the structure shown in FIG. 9 is used (the patterned conductive layer 106 extends to the bottom surface of the insulating substrate 102, and a bottom conductive portion 102 is formed on the bottom surface 103 of the insulating substrate 102. The layer 107 is further electrically connected to the patterned conductive layer 106. A light-emitting diode wafer 300 is obtained through the manufacturing process shown in FIGS. 11A to 14A. Then, the LED chip 300 is fixed to a lead frame 120. The lead frame is provided with a first circuit 125 and a second circuit 127 which are pre-designed. The LED substrate 300 is bonded to the lead frame 120, and a portion of the lower surface 103 of the patterned conductive layer covering the insulating substrate 102 is in contact with the first circuit 125. Furthermore, the metal electrode 118 and the second circuit 127 can be electrically connected by a wire 129. Referring to FIG. 18, a light-emitting diode device 400 is obtained. Since the LED chip 300 itself has the patterned conductive layer 106 extending to the sidewall 104 and the bottom 103 of the insulating substrate 102, it can be directly in contact with the flat first circuit 125 to achieve electrical connection.
基於上述,藉由本發明所提供之發光二極體裝置及其製造方法,可使得具有絕緣基底的發光二極體裝置具有垂直電極的架構,除了不需犧牲部份發光區域(降低有效發光面積)外,可改善電子流有效注入發光層的均勻性(使電流流經途徑均勻分佈至整個發光二極體),提昇整體發光效率。Based on the above, the light-emitting diode device and the method of manufacturing the same according to the present invention can enable the light-emitting diode device having an insulating substrate to have a vertical electrode structure, except that a portion of the light-emitting region is not sacrificed (the effective light-emitting area is reduced). In addition, the uniformity of the effective injection of the electron flow into the light-emitting layer can be improved (the current is uniformly distributed through the path to the entire light-emitting diode), and the overall luminous efficiency is improved.
雖然本發明已以數個較佳實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可作任意之更動與潤飾,因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。While the invention has been described above in terms of several preferred embodiments, it is not intended to limit the scope of the present invention, and any one of ordinary skill in the art can make any changes without departing from the spirit and scope of the invention. And the scope of the present invention is defined by the scope of the appended claims.
10...發光二極體10. . . Light-emitting diode
12...藍寶石基底12. . . Sapphire substrate
13...緩衝層13. . . The buffer layer
14...N型半導體層14. . . N-type semiconductor layer
15...半導體元件層15. . . Semiconductor component layer
16...發光層16. . . Luminous layer
18...P型半導體層18. . . P-type semiconductor layer
20...第一電極20. . . First electrode
22...第二電極twenty two. . . Second electrode
25...最短路徑25. . . Shortest path
101...上表面101. . . Upper surface
102...絕緣基底102. . . Insulating substrate
103...下表面103. . . lower surface
104‧‧‧側壁104‧‧‧ side wall
106‧‧‧圖形化導電層106‧‧‧Graphic conductive layer
108‧‧‧緩衝層108‧‧‧buffer layer
110‧‧‧第一半導體層110‧‧‧First semiconductor layer
112‧‧‧發光層112‧‧‧Lighting layer
114‧‧‧第二半導體層114‧‧‧Second semiconductor layer
115‧‧‧半導體元件複合層115‧‧‧Semiconductor component composite layer
116‧‧‧透明電極116‧‧‧Transparent electrode
118‧‧‧金屬電極118‧‧‧Metal electrode
120‧‧‧導線架120‧‧‧ lead frame
125‧‧‧第一電路125‧‧‧First circuit
127‧‧‧第二電路127‧‧‧second circuit
129‧‧‧導線129‧‧‧Wire
150‧‧‧貫孔150‧‧‧through holes
200‧‧‧晶圓200‧‧‧ wafer
300‧‧‧發光二極體晶片300‧‧‧Light Diode Wafer
400‧‧‧發光二極體裝置400‧‧‧Lighting diode device
A-A’‧‧‧切線A-A’‧‧‧ tangent
第1圖係一剖面結構圖,繪示習知技術所述之發光二極體結構。Figure 1 is a cross-sectional structural view showing the structure of a light-emitting diode according to the prior art.
第2A、3A、7A、10A、11A、12A、13A、及14A圖係為一系列的上示圖,用以說明本發明實施例之發光二極體裝置的製造流程。2A, 3A, 7A, 10A, 11A, 12A, 13A, and 14A are a series of above diagrams for explaining the manufacturing process of the light-emitting diode device of the embodiment of the present invention.
第2B、3B、7B、10B、11B、12B、13B、及14B圖係為第2A、3A、7A、10A、11A、12A、13A、及14A圖沿的A-A’切線的剖面結構圖。2B, 3B, 7B, 10B, 11B, 12B, 13B, and 14B are cross-sectional structural views of the A-A' tangent of the 2A, 3A, 7A, 10A, 11A, 12A, 13A, and 14A graphs.
第4、5、及6圖係為一系列的上示圖,用以說明本發明其他實施例所述之發光二極體裝置其圖形化導電層的設計。Figures 4, 5, and 6 are a series of above diagrams for illustrating the design of the patterned conductive layer of the light emitting diode device of other embodiments of the present invention.
第8圖係為一上示圖,用以說明本發明另一實施例所述之配置於絕緣基底側面的圖形化導電層之形成方式。Figure 8 is a top view for explaining the formation of a patterned conductive layer disposed on the side of an insulating substrate according to another embodiment of the present invention.
第9圖係為一剖面結構圖,用以說明本發明另一實施例所述之發光二極體裝置其圖形化導電層的設計。Figure 9 is a cross-sectional structural view for explaining the design of a patterned conductive layer of a light-emitting diode device according to another embodiment of the present invention.
第15及16圖係為一系列剖面結構圖,用以說明本發明另一實施例所述之發光二極體裝置的製造流程。15 and 16 are a series of cross-sectional structural views for explaining the manufacturing process of the light-emitting diode device according to another embodiment of the present invention.
第17圖係一剖面結構圖,繪示本發明另一實施例所述之發光二極體裝置。Figure 17 is a cross-sectional structural view showing a light-emitting diode device according to another embodiment of the present invention.
第18圖係一剖面結構圖,繪示本發明又一實施例所述之發光二極體裝置。Figure 18 is a cross-sectional structural view showing a light-emitting diode device according to still another embodiment of the present invention.
101...上表面101. . . Upper surface
102...絕緣基底102. . . Insulating substrate
104...側壁104. . . Side wall
106...圖形化導電層106. . . Graphical conductive layer
108...緩衝層108. . . The buffer layer
110...第一半導體層110. . . First semiconductor layer
112...發光層112. . . Luminous layer
114...第二半導體層114. . . Second semiconductor layer
115...半導體元件複合層115. . . Semiconductor component composite layer
116...透明電極116. . . Transparent electrode
118...金屬電極118. . . Metal electrode
120...導線架120. . . Lead frame
125...第一電路125. . . First circuit
127...第二電路127. . . Second circuit
129...導線129. . . wire
400...發光二極體裝置400. . . Light-emitting diode device
Claims (13)
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CN1881631A (en) * | 2005-06-16 | 2006-12-20 | Lg电子株式会社 | Method for manufacturing light emitting diodes |
TW200910638A (en) * | 2007-08-24 | 2009-03-01 | Sino American Silicon Prod Inc | Semiconductor light-emitting device and method of fabricating the same |
US20090309126A1 (en) * | 2008-06-16 | 2009-12-17 | Toyoda Gosei Co., Ltd. | Group III nitride-based compound semiconductor light-emitting device and production method therefor |
TW201031024A (en) * | 2009-02-11 | 2010-08-16 | Epistar Corp | Light-emitting device and manufacturing method thereof |
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KR100638819B1 (en) * | 2005-05-19 | 2006-10-27 | 삼성전기주식회사 | Vertical nitride based semiconductor light emitting device having improved light extraction efficiency |
KR101263934B1 (en) * | 2006-05-23 | 2013-05-10 | 엘지디스플레이 주식회사 | Light emitting diode and method of manufacturing thesame |
CN100578828C (en) * | 2006-12-29 | 2010-01-06 | 台达电子工业股份有限公司 | Electroluminescent device and method for production thereof |
KR101007133B1 (en) * | 2009-06-08 | 2011-01-10 | 엘지이노텍 주식회사 | Semiconductor light emitting device and fabrication method thereof |
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CN1881631A (en) * | 2005-06-16 | 2006-12-20 | Lg电子株式会社 | Method for manufacturing light emitting diodes |
TW200910638A (en) * | 2007-08-24 | 2009-03-01 | Sino American Silicon Prod Inc | Semiconductor light-emitting device and method of fabricating the same |
US20090309126A1 (en) * | 2008-06-16 | 2009-12-17 | Toyoda Gosei Co., Ltd. | Group III nitride-based compound semiconductor light-emitting device and production method therefor |
TW201031024A (en) * | 2009-02-11 | 2010-08-16 | Epistar Corp | Light-emitting device and manufacturing method thereof |
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