TWI447480B - Multi-domain vertical alignment liquid crystal displays using pixels having fringe field amplifying regions - Google Patents

Description

Multi-region vertical alignment liquid crystal display using pixel structure with discrete field amplification regions

The present invention relates to a liquid crystal display, and more particularly to a large pixel multi-region vertical alignment liquid crystal display that can be fabricated on a smooth substrate.

Liquid crystal displays (LCDs), which were originally used in simple monochrome displays such as computers and electronic watches, have become the most advantageous display technology. Liquid crystal displays are often used to replace the use of cathode ray tubes (CRTs) in computer displays and television displays. Various shortcomings of conventional liquid crystal displays have been overcome to improve the quality of liquid crystal displays. For example, active matrix displays that widely replace passive matrix displays have reduced ghosting and improved resolution, color gradation, viewing angle, contrast (relative to passive matrix displays). Contrast Ratio) and the response time (Response Time).

However, conventional twisted nematic LCDs still have a very narrow viewing angle and a major disadvantage of very low contrast. Even the perspective of the active matrix is narrower than the viewing angle of the cathode ray tube. Especially when the viewer directly views a high-quality image directly in front of the liquid crystal display, other high-quality images cannot be seen by other viewers on the side of the liquid crystal display. Multi-domain Vertical Alignment Liquid Crystal Display (MVA LCD) is developed to improve the viewing angle and contrast of conventional liquid crystal displays. Please refer to FIG. 1(a)-1(c) for showing the basic functions of the pixels of a vertical alignment liquid crystal display 100. For clarity of illustration, the liquid crystal display of Figure 1 uses only a single domain (Single Domain). Furthermore, for clarity of illustration, the liquid crystal display of Figures 1(a)-1(c) (and Figure 2) will be described in terms of grayscale operation.

The liquid crystal display 100 has a first polarizer 105, a first substrate 110, a first electrode 120, a first alignment layer 125, a plurality of liquid crystals 130, a second alignment layer 140, a second electrode 145, and a first Two substrates 150 and a second polarizer 155. In general, the first substrate 110 and the second substrate 150 are made of transparent glass. The first electrode 120 and the second electrode 145 are made of a transparent conductive material such as Indium Tin Oxide (ITO). The first alignment layer 125 and the second alignment layer 140 are made of polyimide (PI) and are aligned perpendicularly to the liquid crystal 130 in a stationary state. In operation, a light source (not shown) emits light from a first polarizer 105 attached to the underlying substrate 110. The first polarizer 105 is generally polarized in a first direction, and the second polarizer 155 attached to the second substrate 150 is vertically polarized with the first polarizer 104. Therefore, the light from the light source does not penetrate the first polarizer 105 and the second polarizer 155 at the same time unless the polarization of the light is rotated by 90 degrees between the first polarizer 105 and the second polarizer 155. For the sake of clarity, many liquid crystals are not shown. In practical displays, the liquid crystal is rod like molecules with a diameter of about 5 angstroms (Angstrom, ), about 20-25 angstroms in length. Therefore, there are more than 12 million liquid crystal molecules in one pixel, wherein the length, width and height of the pixels are 300 micrometers (micrometers), 120 micrometers, and 3 micrometers, respectively.

In Fig. 1, the liquid crystal 130 is vertically aligned. In the vertical alignment, the liquid crystal 130 does not divert the polarized aurora from the light source. Therefore, the light from the light source does not pass through the liquid crystal display 100, and provides a completely optical black state and a very high contrast for all colors and all cell gaps. (contrast ratio). Therefore, the multi-zone vertical alignment liquid crystal display provides a significant improvement in comparison with the conventional low contrast twisted nematic liquid crystal display. However, as shown in FIG. 1(b), when an electric field is applied between the first electrode 120 and the second electrode 145, the liquid crystal 130 is redirected to a tilted position. The liquid crystal in the tilted position turns the polarization of the polarized light from the first polarizer 105 by 90 degrees so that the light can pass through the second polarizer 155. The size of the tilt, that is, the amount of light that passes through the liquid crystal display (such as the brightness of the pixels), is proportional to the electric field strength. In general, a single thin film transistor is used on each pixel. For color displays, however, individual thin film electro-crystal systems are used in each color component (typically, green and blue).

However, for viewers of different angles, the light passing through the liquid crystal display 120 is not the same. As shown in FIG. 1(c), the viewer 172 on the left side of the center will see a bright pixel because the side of the liquid crystal display 130 that is wide (light turning) faces the viewer 172. The centrally located viewer 174 will see gray pixels because the wide side of the liquid crystal display 130 is only partially facing the viewer 174. The viewer 176 located on the right side of the center will see the dark pixel because the wide side of the liquid crystal display 130 barely faces the viewer 176.

Multi-region vertical alignment liquid crystal displays (MVA LCDs) have been developed to improve the viewing angle of single-domain vertical alignment LCDs. Referring to FIG. 2, a pixel of a multi-region vertical alignment liquid crystal display (MVA LCDs) 200 is shown. The multi-zone vertical alignment liquid crystal display 200 includes a first polarizer 205, a first substrate 210, a first electrode 220, a first alignment layer 225, a plurality of liquid crystals 235, 237, a plurality of protrusions 260, and a second alignment. The layer 240, a second electrode 245, a second substrate 250, and a second polarizer 255. The liquid crystal 235 forms a first domain of pixels, and the liquid crystal 237 forms a second domain of pixels. When an electric field is applied between the first electrode 220 and the second electrode 245, the protrusion 260 causes the liquid crystal 235 to be tilted in a different direction with respect to the liquid crystal 237. Therefore, the center-left viewer will see that the left area (liquid crystal 235) appears black and the right area (liquid crystal 237) appears white. Viewers in the center will see two areas at the same time and appear gray. The center-right viewer will see the left area appear white and the right area appear black. However, because the individual pixels are small, all three viewers consider the pixels to be gray. As described above, the magnitude of the tilt of the liquid crystal is controlled by the magnitude of the electric field between the electrodes 220 and 245. The gray level perceived by the viewer is related to the tilt of the liquid crystal. The multi-zone vertical alignment liquid crystal display can also be expanded to use four regions so that the liquid crystal direction in one pixel is divided into four main regions to provide a wide and symmetrical viewing angle in both the vertical and horizontal directions.

Therefore, the conventional multi-zone vertical alignment liquid crystal display can provide a wide and symmetrical viewing angle, and the cost is very high, which is due to the difficulty of adding protrusions to the upper and lower substrates in the process, and correctly aligning the protrusions to the upper side, Difficulties in the lower substrate. In particular, a protrusion on the lower substrate must be placed in the center of the two protrusions of the upper substrate; any alignment between the upper and lower substrates will result in a decrease in production yield. Techniques that use other physical configurations on the substrate, such as ITO slits that have been used to replace or bond protrusions, are very expensive to manufacture. Furthermore, the gap between the protrusions and the indium tin oxide interferes with light transmission, and thus reduces the brightness of the multi-region vertical alignment liquid crystal display. Therefore, other methods or systems are required to provide a multi-zone vertical alignment liquid crystal display, eliminating the need to fabricate physical structures such as protrusions and indium tin oxide gaps, and eliminating the need for extremely precise alignment on the upper and lower substrates.

It is an object of the present invention to provide an Amplified Intrinsic Fringe Field MVA LCD (AIFF MVA LCD) that is characterized by the absence of protrusions or indium tin oxide gaps. Therefore, the amplified intrinsic discrete electric field multi-region vertical alignment liquid crystal display fabricated in accordance with the present invention is less expensive than conventional multi-region vertical alignment liquid crystal displays and also provides higher process yield. In particular, embodiments of the present invention use a relatively novel pixel design that provides an amplified essentially discrete electric field to create multiple regions in a magnified intrinsic discrete electric field multi-region vertical alignment liquid crystal display. For example, in accordance with an embodiment of the present invention, a pixel is subdivided into color components having a plurality of color dots (CDs). Furthermore, the pixels include discrete field amplification regions extending along a first side and a second side of a color point. When the color point has a second polarity to amplify the discrete electric field of the color point, the discrete field amplification region is provided with a first polarity.

In an embodiment of the invention, a pixel includes a first color component having a first color point and a second color point. The second color point of the first color component is aligned with a first color point such as a vertical direction and the first color point of the first color component. The pixel also includes a first discrete field amplification region having a vertical amplification portion and a horizontal amplification portion, the first vertical amplification portion being perpendicular to a first side of the first color point of the first color component Extendingly, the first horizontal amplifying portion extends horizontally along a second side of the first color point of the first color component.

In an embodiment of the invention, the horizontal amplification portion of the first discrete field amplification region extends along a first side of the second color point of the first color component, and the vertical amplification portion of the first discrete field amplification region Extending along a second side of one of the second color points of the first color component.

Furthermore, in the embodiment of the present invention, the first discrete field amplification region may further include a second horizontal amplification portion and a third horizontal amplification portion, the second horizontal amplification portion being along the first color component. One of the first color points extends on a third side, and the third horizontal magnification portion extends along a third side of the second color point of the first color component.

The invention will be more fully understood from the following description and drawings.

As described above, the conventional multi-zone vertical alignment liquid crystal display is very expensive to manufacture because of the physical characteristics such as protrusions or indium tin oxide gaps, so that each pixel produces a plurality of regions. However, in accordance with the method of the present invention, a multi-region vertical alignment liquid crystal display uses discrete electric fields to create multiple regions without the need to use additional physical configurations (such as protrusions or indium tin oxide gaps) on the substrate. Furthermore, since no additional physical configuration is required, the difficulty of calibrating the physical properties of the upper and lower substrates can also be eliminated. Therefore, the multi-zone vertical alignment liquid crystal display according to the present invention has higher yield and is cheaper in manufacturing than a conventional multi-region vertical alignment liquid crystal display.

Referring to Figures 3(a) and 3(b), there is shown a schematic diagram of a multi-region vertical alignment liquid crystal display (MVA LCD) 300 in accordance with the basic concepts of the present invention without the need to use additional physical configurations on the substrate. 3(a) and 3(b) show pixels 310, 320 and 330 between a first substrate 305 and a second substrate 355. A first polarizer 302 is adhered to the first substrate 305, and a second polarizer 357 is adhered to the second substrate 355. The pixel 310 includes a first electrode 311, a plurality of liquid crystals 312, 313, and a second electrode 315. The pixel 320 includes a first electrode 321, a plurality of liquid crystals 322, 323, and a second electrode 325. Similarly, the pixel 330 includes a first electrode 331, a plurality of liquid crystals 332, 333, and a second electrode 335. All electrodes are generally constructed using a transparent conductive material such as indium tin oxide (ITO). Furthermore, a first alignment layer 307 is overlying the electrodes on the first substrate 305. Similarly, a second alignment layer 352 overlies the electrodes on the second substrate 355. The two liquid crystal alignment layers 307 and 352 provide a vertical liquid crystal alignment. For the more detailed description below, electrodes 315, 325, and 335 are maintained at a common voltage V_Com. Therefore, for ease of fabrication, the electrodes 315, 325, and 335 are of a single structure (as shown in Figures 3(a) and 3(b)). The multi-zone vertical alignment liquid crystal display 300 uses alternating polarization to operate the pixels 310, 320, and 330. For example, if the polarization of pixels 310 and 330 is positive, then the polarization of pixel 320 is negative. Conversely, if the polarization of pixels 310 and 330 is negative, the polarization of pixel 320 is positive. In general, the polarization of each pixel is switched between frames, but alternately patterned patterns are maintained in each page frame. In Fig. 3(a), pixels 310, 320, and 330 are in an "OFF" state, that is, an electric field between the first and second electrodes is turned off. In the off state, some residual electric field may exist between the first and second substrates. However, in general, the residual electric field is too small to tilt the liquid crystal.

In FIG. 3(b), the pixels 310, 320, and 330 are in an "ON" state. In Fig. 3(b), "+" and "-" are used to represent the voltage polarity of the electrode. Therefore, the electrodes 311 and 331 have a positive voltage polarity, and the electrode 321 has a negative voltage polarity. The substrate 355 and the electrodes 315, 325, and 335 are maintained at a common voltage V_Com. The voltage polarity is defined with respect to the common voltage V_Com, wherein a positive polarity is higher than the common voltage V_Com, and a negative polarity is lower than the common voltage V_Com. The electric field 327 (indicated by the power line) between the electrodes 321 and 325 causes the liquid crystals 322 and 323 to tilt. In general, without protrusions or other physical properties, the tilt direction of the liquid crystal is not fixed by the liquid crystals in a vertical liquid crystal alignment layer 307 and 352. However, the discrete electric field at the edge of the pixel affects the tilt direction of the liquid crystal. For example, the electric field 327 between the electrodes 321 and 325 is vertically centered around the pixel 320, but is tilted to the left of the left half of the pixel and to the right of the right half of the pixel. Therefore, the discrete electric field between the electrodes 321 and 325 causes the liquid crystal 323 to tilt to the right to form a first region, and causes the liquid crystal 322 to tilt to the left to form a second region. Therefore, the pixel 320 is a multi-region pixel having a symmetric wide viewing angle.

Similarly, the electric field between the electrodes 311 and 315 (not shown) has a discrete electric field that causes the liquid crystal 313 to reposition and tilt to the right of the right side of the pixel 310, causing the liquid crystal 312 to tilt to the pixel. 310 left to the left of the test. Similarly, the electric field (not shown) between electrodes 331 and 335 has a discrete electric field that causes liquid crystal 333 to reposition and tilt to the right of the right side of pixel 330, also causing liquid crystal 332 to tilt to the pixel. 330 left to the left of the test.

The alternating polarity of adjacent pixels amplifies the fringe field effect of each pixel. Therefore, by repeating the alternating polarity pattern between the pixels of each column (or the pixels of each column), a multi-region vertical alignment liquid crystal display can be achieved without an additional physical configuration. Furthermore, alternating polarity checkerboard patterns can be used to create four regions per pixel.

However, in general, the discrete field effect system is relatively small and weak. Therefore, when the pixels become larger, the discrete electric field at the edge of the pixel cannot be transmitted to all the liquid crystals in one pixel. Therefore, in the large pixel, the tilt direction of the liquid crystal far from the edge of the pixel is arbitrarily changed, and a multi-region pixel is not generated. In general, when the pixel becomes larger than 40-60 micrometers (micrometer, μm), the discrete field effect of the pixel does not affect the control liquid crystal tilt. Therefore, for large pixel liquid crystal displays, a novel pixel distinction method is used to achieve multi-region pixels. Especially for color liquid crystal displays, the pixels are distinguished by the color component. Each color component is controlled by a separate switching device such as a thin-film transistor (TFT). In general, the color components are red, green, and blue. According to the invention, the color component of a pixel is further distinguished by color dots.

The polarity of each pixel is switched between each successive page of the image to avoid degradation of image quality, and the quality of the image is reduced because the liquid crystal is distorted in the same direction in each page frame. However, if all of the switching elements are of the same polarity, the color point polarity pattern switching may cause other image quality problems such as flicker. In order to reduce flicker, switching elements (such as transistors) are arranged in a switching element drive mode, which includes positive and negative polarity. Furthermore, in order to reduce cross talk, the positive and negative polarities of the switching element are arranged in a fixed pattern which provides a more stable power distribution. Different switching element drive modes are used in embodiments of the present invention. There are three main switching element driving modes, which are switching element point inversion driving scheme, switching element row inversion driving scheme, and switching element row inversion driving mode. (switching element column inversion driving scheme). In the switching element dot inversion driving mode, the switching elements form a checkerboard pattern of alternating polarity. In the switching element column inversion driving mode, the switching elements in each column have the same polarity; however, one switching element in one column has opposite polarities with respect to the polarity of the switching elements of adjacent columns. In the switching element row inversion driving mode, the switching elements in each row have the same polarity; however, one switching element on one row has opposite polarities with respect to the polarity of the switching elements of adjacent rows. When the switching element dot inversion driving mode provides the most stable power distribution, the complexity of the switching element dot inversion driving mode and the additional cost are compared with the switching element column inversion driving mode and the switching element row inversion driving mode. It is not cost-effective. Therefore, when the switching element dot inversion driving mode is generally maintained in high performance applications, the switching element column inversion driving mode is used for the manufacture of liquid crystal displays for most low cost and low voltage applications.

The pixels according to the embodiments of the present invention include different main components in a novel configuration to achieve a high quality, low cost display unit. For example, pixels can include color components, color points, fringe field amplifying regions (FFARs), switching elements, device component areas, and associated dots. This device component area contains areas occupying switching elements and/or storage capacitors, and this area is used to fabricate switching elements and/or storage capacitors. For clarity of illustration, a different device component area is defined by each switching element.

The associated point and the discrete field amplification region are electrically polarized regions and are not part of the color component. In many embodiments of the invention, the associated points cover the device component area. For these embodiments, the associated points are made by depositing an insulating layer over the switching elements and/or storage capacitors. Next, the associated points are formed by depositing an electrically conductive layer. This associated point is electrically connected to a particular switching element and/or other polarizing element (eg, a color point). The storage capacitor is electrically connected to a specific switching element and color dot electrodes to compensate and offset the liquid crystal cell during the process of switching-on or switching off of the liquid crystal cell. The capacitance value on the change. Therefore, the storage capacitor is used to reduce the cross talk effect during the process of turning on or off the cell. A patterned mask is used when the associated point needs to form a patterned electrode. In general, a black matrix layer is attached to form a light shield to the associated points. However, in some embodiments of the invention, a color layer is attached to the associated point to improve color performance or to achieve a desired color pattern or color difference (color) Shading). In some embodiments of the invention, the color layer is fabricated above or below the switching element. Other embodiments may also place a color layer on top of the glass substrate of the display.

In other embodiments of the invention, the associated point is an area that is independent of the switching element. Moreover, certain embodiments of the present invention have additional points of association that are not directly related to the switching elements. In general, the associated points include an active electrode layer such as indium tin oxide (ITO) or other conductive layer and are connected to a nearby color point or powered by other means. For opaque associated points, a black matrix layer can be attached to the bottom of the conductive layer to form an opaque area. In some embodiments of the invention, a black matrix can be fabricated on the indium tin oxide (ITO) glass substrate side to simplify the fabrication process. Additional points of association improve the effective use of the display area, thereby improving the aperture ratio and forming a plurality of liquid crystal domains within the color point. Certain embodiments of the present invention use association points to improve color performance. For example, a careful placement of associated points may allow the colors of nearby color points to be modified from useful color patterns.

Discrete field amplification regions (FFARs) are more versatile than associated points. In particular, the discrete field magnifying region may have a non-rectangular shape, although in general the overall shape of the magenta field magnified region may be divided into a rectangular shape group. Furthermore, the discrete field amplification region extends along one side of more than one color point. Moreover, in some embodiments of the invention, discrete field amplification regions may be used in place of associated points. In particular, in these embodiments, the discrete field magnified region not only covers the device component region, but also extends along more than one color dot side of the adjacent device component region.

In general, the color point, the device component area, and the associated point are arranged in a lattice pattern and are separated from each other by a horizontal dot spacing HDS and a vertical dot spacing VDS. When the discrete field amplification region is used instead of the associated point, a portion of the discrete field amplification region is also placed in the lattice pattern. In some embodiments of the invention, multiple vertical dot pitches and multiple horizontal dot pitches may be used. Each color point, associated point, and device component area has two elements adjacent to each other (eg, a color point, an associated point, or a device component area) in a first dimension (eg, a vertical direction), and in a second dimension ( As in the horizontal direction, there are two adjacent neighbors. Furthermore, two adjacent elements can be aligned or moved. Each color point has a color point height CDH and a color point width CDW. Similarly, each associated point has an associated point height ADH and an associated point width ADW. Furthermore, each device component region has a device component region height DCAH and a device component region width DCAW. In some embodiments of the invention, the color points, associated points, and device component regions are the same size. However, in certain embodiments of the invention, the color points, associated points, and device component regions may be of different sizes or shapes. For example, in many embodiments of the invention, the associated points have a height that is less colored. In many applications, the height of the color point is increased to improve the stability of the multi-region vertical alignment (MVA) structure and to improve optical transmission to increase display brightness.

4(a) and 4(b) show different dot polarity patterns of a pixel design 410 (such as numbers 410+ and 410- described later), which is typically used in a row with a switching element. Turn the drive mode on the display. In actual operation, a pixel will switch between a first dot polarity pattern and a second dot polarity pattern between each image frame. For clarity, the first color point of the first color component has a positive polarity dot pattern, referring to a positive dot polarity pattern. Conversely, the first color point of the first color component has a negative polarity dot pattern, referring to a negative dot polarity pattern. In particular, in Figure 4(a), the pixel design 410 has a positive dot polarity pattern (labeled 410+) and the pixel design 410 has a negative dot polarity pattern (labeled 410-). Furthermore, in the different pixel designs, the polarity of each polarized element is represented by "+" for positive polarity and "-" for negative polarity.

The pixel design 410 has three color components CC_1, CC_2, and CC_3 (not shown in Figures 4(a)-4(b)). Each color component includes color dots. For clarity of explanation, the color point is represented as CD_X_Y, where X represents a color component (from 1 to 3 as shown in Figures 4(a)-4(b)), and Y represents a point number (Fig. 4(a)- 4(b) shows from 1 to 2). The pixel design 410 also includes a switching element (labeled SE_1, SE_2, and SE_3) as a component of each color and a discrete field amplification region (labeled FFAR_1, FFAR_2, and FFAR_3) as each color component. The switching elements SE_1, SE_2, and SE_3 are arranged in a column. The device component area surrounding each switching element is covered by the discrete field amplification region and is therefore not specifically labeled in Figures 4(a) and 4(b). The discrete field amplification areas FFAR_1, FFAR_2, and FFAR_3 are also arranged in a column, and are described in detail in FIG. 4(c).

The first color component CC_1 of the pixel design 410 has two color points CD_1_1 and CD_1_2. The color points CD_1_1 and CD_1_2 form a column and are separated by a vertical dot pitch VDS1. In other words, the color points CD_1_1 and CD_1_2 are horizontally aligned and vertically separated by the vertical dot pitch VDS1. Furthermore, the color points CD_1_1 and CD_1_2 are vertically offset by the vertical dot offset VDO1, and the vertical dot offset VDO1 is equal to the vertical dot pitch VDS1 plus the color point height CDH. The switching element SE_1 is disposed between the color points CD_1_1 and CD_1_2 such that the color point CD_1_1 is on a first side of the switching element column such that the color point CD_1_2 is on a second side of the switching element column. The switching element SE_1 is coupled to the electrodes of the color points CD_1_1 and CD_1_2 to control the voltage polarity and voltage amount of the color points CD_1_1 and CD_1_2.

Similarly, the second color component CC_2 of the pixel design 410 has two color points CD_2_1 and CD_2_2. The color points CD_2_1 and CD_2_2 form a second column and are separated by a vertical dot pitch VDS1. Therefore, the color points CD_2_1 and CD_2_2 are horizontally aligned and vertically separated by the vertical dot pitch VDS1. The switching element SE_2 is disposed between the color points CD_2_1 and CD_2_2 such that the color point CD_2_1 is on a first side of the switching element column such that the color point CD_2_2 is on a second side of the switching element column. The switching element SE_2 is coupled to the electrodes of the color points CD_2_1 and CD_2_2 to control the voltage polarity and voltage amount of the color points CD_2_1 and CD_2_2. The second color component CC_2 is vertically aligned with the first color component CC_1 and separated from the first color component CC_1 by a horizontal dot pitch HDS1, so the color components CC_2 and CC_1 are offset by a horizontal dot offset HDD1. The horizontal point offset HDD1 is equal to the horizontal point spacing HDS1 plus the color point width CDW. In particular, as far as the color point is concerned, the color point CD_2_1 is vertically aligned with the color point CD_1_1 and horizontally separated by the horizontal dot pitch HDS1. Similarly, the color point CD_2_2 is vertically aligned with the color point CD_2_1 and horizontally separated by the horizontal dot pitch HDS1. Therefore, the color point CD_1_1 and the color point CD_2_1 form a first row of color dots, and the color point CD_1_2 and the color point CD_2_2 form a second row of color dots.

Similarly, the third color component CC_3 of the pixel design 410 has two color points CD_3_1 and CD_3_2. The color points CD_3_1 and CD_3_2 form a third column and are separated by a vertical dot pitch VDS1. Therefore, the color points CD_3_1 and CD_3_2 are horizontally aligned and vertically separated by a vertical dot pitch VDS1. The switching element SE_3 is disposed between the color points CD_3_1 and CD_3_2 such that the color point CD_3_1 is on a first side of the switching element column such that the color point CD_3_2 is on a second side of the switching element column. The switching element SE_3 is coupled to the electrodes of the color points CD_3_1 and CD_3_2 to control the voltage polarity and voltage amount of the color points CD_3_1 and CD_3_2. The third color component CC_3 is vertically aligned with the second color component CC_2 and is separated by the horizontal dot pitch HDS1, so the color components CC_3 and CC_2 are vertically cancelled by a horizontal dot offset amount HDO1. In particular, as far as the color point is concerned, the color point CD_3_1 is vertically aligned with the color point CD_2_1 and horizontally separated by the horizontal dot pitch HDS1. Similarly, the color point CD_3_2 is vertically aligned with the color point CD_2_2 and horizontally separated by the horizontal dot pitch HDS1. Therefore, the color point CD_3_1 is on the first color point column, and the color point CD_3_2 is on the second color point column.

For clarity of illustration, the color point of the pixel design 410 is to illustrate that the color points have the same color point height CDH. However, some embodiments of the invention may have color points of different color point heights. For example, for a variant of the pixel design 410 in an embodiment of the invention, the color points CD_1_1, CD_2_1, and CD_3_1 have color point heights that are smaller than the color points CD_1_2, CD_2_2, and CD_3_2.

The pixel design 410 also includes discrete field amplification regions FFAR_1, FFAR_2, and FFAR_3. 4(c) is a more detailed view showing one of the discrete field magnified regions of the pixel design 410. For clarity of explanation, the discrete field amplification region FFAR_1 is conceptually divided into a vertical amplifying portion VAP and a horizontal amplifying portion HAP. In FIG. 4(c), the horizontal amplifying portion HAP is vertically placed at the center of the vertical amplifying portion VAP and extends to the left of the vertical amplifying portion VAP. The use of the horizontal amplifying portion and the vertical amplifying portion is a clearer description of the setting + of the discrete field magnifying region FFAR_1. In most embodiments of the invention, the electrodes of the discrete field amplification region are formed by a connected conductor. The horizontal amplifying portion HAP has a horizontal amplifying portion width HAP_W and a horizontal amplifying portion height HAP_H. Similarly, the vertical amplifying portion VAP has a vertical amplifying portion width VAP_W and a vertical amplifying portion height VAP_H. The discrete field amplification areas FFAR_2 and FFAR_3 have the same shape as the discrete field amplification area FFAR_1. In the embodiment of the present invention having color points of different sizes, the horizontal amplifying portion HAP is disposed between the color points instead of being placed on the center of the vertical amplifying portion VAP.

As shown in FIG. 4(a), the discrete field amplification areas FFAR_1, FFAR_2, and FFAR_3 are disposed between the color points of the pixel design 410. In particular, the discrete field amplification region FFAR_1 is configured such that the horizontally amplified portion of the discrete field amplification region FFAR_1 is between the color points CD_1_1 and CD_1_2, and is separated from the color points CD_1_1 and CD_1_2 by a vertical discrete field amplification region spacing VFFARS. Separate. The vertical amplification portion of the discrete field amplification region FFAR_1 is disposed to the right of the color points CD_1_1 and CD_1_2, and is separated from the color points CD_1_1 and CD_1_2 by a horizontal discrete field amplification region pitch HFFARS. Therefore, the discrete field amplification area FFAR_1 extends along the right bottom of the color point CD_1_1 and the top right side of the color point CD_1_2. Furthermore, this configuration also causes the vertical amplification portion of the discrete field amplification region FFAR_1 to be between the color points CD_1_1 and CD_2_1 and between the color points CD_1_2 and CD_2_2.

Similarly, the discrete field amplification area FFAR_2 is set such that the horizontal amplification portion of the discrete field amplification area FFAR_2 is between the color points CD_2_1 and CD_2_2, and is separated by a vertical discrete field amplification area spacing VFFARS. The vertical amplifying portion of the discrete field magnifying region FFAR_2 is disposed to the right of the color points CD_2_1 and CD_2_2, and is separated by a vertical discrete field magnifying region pitch VFFARS. Therefore, the discrete field amplification area FFAR_1 extends along the right bottom of the color point CD_2_1 and the top of the right side of the color point CD_2_2. This configuration also causes the vertical amplification portion of the discrete field amplification region FFAR_2 to be between the color points CD_2_1 and CD_3_1, and between the color points CD_2_2 and CD_3_2.

The discrete field amplification area FFAR_3 is set such that the horizontal amplification portion of the discrete field amplification area FFAR_3 is between the color points CD_3_1 and CD_3_2, and is separated by a vertical discrete field amplification area spacing VFFARS. The vertical amplification portion of the discrete field amplification region FFAR_3 is disposed to the right of the color points CD_3_1 and CD_3_2, and is separated from the color points CD_3_1 and CD_3_2 by a horizontal discrete field amplification region pitch HFFARS. Therefore, the discrete field amplification area FFAR_3 extends along the right bottom of the color point CD_3_1 and along the top right side of the color point CD_3_2.

The color point, the discrete field amplification area, and the polarity of the switching element are indicated by a positive sign "+" and a negative sign "-". Therefore, in FIG. 4(a), the punctual polarity of the pixel design 410+, all switching elements (such as switching elements SE_1, SE_2, and SE_3) and all color points (such as color points CD_1_1, CD_1_2, CD_2_1, CD_2_2, CD_3_1 and CD_3_2) have positive polarity. However, all discrete field amplification regions (eg, discrete field amplification regions FFAR_1, FFAR_2, and FFAR_3) have negative polarity.

Figure 4(b) shows a pixel design 410 having a negative dot polarity pattern. For the negative dot polarity pattern, all switching elements (such as switching elements SE_1, SE_2, and SE_3) and all color points (such as color points CD_1_1, CD_1_2, CD_2_1, CD_2_2, CD_3_1, and CD_3_2) have negative polarity. However, all of the discrete field amplification regions (for example, the discrete field amplification regions FFAR_1, FFAR_2, and FFAR_3) have positive polarity.

As noted above, if adjacent elements have opposite polarities, the discrete fields at each color point will be amplified. The pixel design 410 utilizes discrete field amplification regions to enhance and stabilize the formation of multiple regions in the liquid crystal structure. In general, the polarity of the biased component is specified such that a color point of a first polarity has a second polarized adjacent polarized component. For example, for the pixel design 410 (shown in Figure 4(a)), the color point CD_2_2 has a positive polarity. However, the adjacent polarized elements (the discrete field amplification areas FFAR_2 and FFAR_1) have a negative polarity. Therefore, the discrete field of the color point CD_2_2 is amplified. Furthermore, as described below, the polarity inversion mode is also implemented in the display level so that the color points of other pixels adjacent to the color point CD_1_2 have a negative polarity (refer to FIG. 4(d)).

Because all of the switching elements in the pixel design 410 have the same polarity and the discrete field amplification regions require opposite polarities, the discrete field amplification region is comprised of an external polarity source, such as a particular painting from the pixel design 410. A source of polarity outside the prime. Different sources of opposite polarity are used in different embodiments in accordance with the present invention. For example, a particular discrete field amplification region switching element can be used (as shown in Figure 4(d)), or a switching element having a pixel near the opposite polarity can also be used to drive the discrete field amplification region (as shown) 5(c))).

The pixels designed using the pixel elements of FIGS. 4(a) and 4(b) can be used in a display using the switching element column inversion mode. 4(d) shows a part of the display 420, and the display 420 uses the pixels P(0, 0), P(1, 0), P(0, 1), and P(1, 1) of the pixel design 410. The pixel design 410 has a switching element column inversion driving mode. Display 420 can have thousands of columns with thousands of pixels on each column. The columns and rows are continuous from the portion shown in Fig. 4(d) in the manner shown in Fig. 4(d). For clarity of explanation, the gate line, scan line, and source line, data line of the control switching element are omitted in FIG. 4(d). The gate line, the scan line, and the source line (data line) are shown in FIG. 4(e). Furthermore, in order to better illustrate each pixel, each region of the pixel is obscured. This masking is only for drawing purposes in Figure 4(d) and has no functional significance. In the display described herein, a pixel P(x, y) is in the xth row (from the left) and the yth column (from the bottom), that is, the pixel P(0, 0) is The bottom leftmost corner. In display 420, the pixels are configured such that all pixels in a column have the same dot polarity pattern (positive or negative), and each successive column should alternate between positive and negative dot polarity patterns. Therefore, the pixels P(0,0) and P(1,0) in the first column have a punctual polarity pattern, and the pixels P(0,1) and P(1,1) in the second column have negative points. Polar pattern. However, in the next page frame, the pixel will switch the dot polarity pattern. Thus, in general, a pixel P(x, y) has a first dot polarity pattern when y is even and a second dot polarity pattern when y is odd.

The pixels on each pixel column are vertically aligned and separated from the leftmost color point of a neighboring pixel by a vertical dot pitch HDS1. The pixels on a line of pixels are horizontally aligned and separated by a vertical dot pitch VDS2.

As described above, the discrete field amplification region of the pixel design pixel 410 receives the correct polarity from outside the pixel. Thus, in display 420, each column of pixels has a corresponding fringe field amplifying region switching element coupled to a fringe field amplifying electrode extending through display 420 ). The discrete field amplification region of the pixel corresponding to the pixel sequence is coupled to the corresponding discrete field amplification electrode to receive the voltage polarity and the voltage amount from the discrete field amplification region switching component. Especially for column 0, the discrete field amplification region switching element FFARSE_0 is above the right side of the display 420. The discrete field amplification region electrode FFARE_0 is coupled to the discrete field amplification region switching element FFARSE_0 and extends through the display 420. The discrete field amplification region on the pixel of column 0 is coupled to the discrete field amplification region switching element FFARSE_0. In particular, the discrete field amplification regions of the pixels P(0, 0) and the pixels P(1, 0) are coupled to the discrete field amplification region switching element FFARSE_0. For column 1, the discrete field amplification region switching element FFARSE_1 is above the right side of the display 420. The discrete field amplification area electrode FFARE_1 is coupled to the discrete field amplification area switching element FFARSE_1 and extends through the display 420. The discrete field amplification region on the pixel of column 1 is coupled to the discrete field amplification region electrode FFARE_1. In particular, the discrete field amplification regions of the pixels P(0, 1) and the pixels P(1, 1) are coupled to the discrete field amplification region electrode FFARE_1. In FIG. 4(d), the discrete field amplification area switching elements FFARSE_0 and FFARSE_1 have negative polarity and positive polarity, respectively. However, in the next page box, the polarity is reversed. All of the discrete field amplification area switching elements can be placed on the same side of the display in certain embodiments of the invention.

Due to the polarity switching on each column of display 420, if a color point has a first polarity, then any of the biased elements adjacent thereto have a second polarity. For example, when the discrete field amplification regions FFAR_2 and FFAR_3 of the pixel P(0, 1) have positive polarity, the color point CD_3_2 of the pixel P(0, 1) has a negative polarity. In a particular embodiment of the invention, each color point has a width of 40 microns and a height of 60 microns. Each discrete field amplification region has a vertical magnification width of 5 microns, a vertical magnification height of 145 microns, a horizontal magnification width of 45 microns, and a horizontal magnification height of 5 microns. The horizontal point spacing HDS1 is 15 microns, the vertical point spacing VDS1 is 25 microns, the horizontal discrete field amplification area spacing is HFFARS is 5 microns, and the vertical discrete field amplification area spacing VFFARS is 5 microns.

Figure 4(e) illustrates the same portion of the display 420 of Figure 4(d) (i.e., pixels P(0,0), P(1,0), P(0,1), P(1,1). And use a transistor as a switching element. However, FIG. 4(e) emphasizes the gate line and the source line, and thus (for clarity of explanation) some pixel details (such as the polarity shown in FIG. 4(d)) are omitted in FIG. 4(e). In order to better illustrate each pixel, the area of each pixel is masked; such masking in Figure 4(e) is for illustrative purposes only. 4(e) shows the source lines (S_0_1, S_0_2, S_0_3, S_1_1, S_1_2, and S_1_3) and the gate lines (G_0 and G_1). In general, the source line S_X_Y and the gate line G_Y are used in the color component CC_Y of the pixel P(X, Y). The source terminal of the transistor is coupled to the source line/data line, and the gate terminal of the transistor is coupled to the gate line/scan line. The drain terminal of the transistor is coupled to electrodes of different color points. For clarity of description, the transistor used as the switching element in the display 430 is referenced by the transistor T (S_X_Y, G_Y), wherein the S_X_Y source line is coupled to the transistor, and the G_Y system gate line is used. Coupled to the transistor. Since the source terminal of the transistor 451 is coupled to the source line S_1_3 and the gate terminal of the transistor 451 is coupled to the gate line G_1, the transistor 451 in FIG. 4(e) is a transistor T (S_1_3). , G_1) as a reference. In the pixel P(0,1) controlled by the gate line G_1 and the source lines S_0_1, S_0_2, S_0_3, the 汲 extreme of the transistor T(S_0_1, G_1) is coupled to the color component CC_1 (such as the color point CD_1_1) And the electrode of CD_1_2). Similarly, the 汲 extremes of the transistor T(S_0_2, G_1) are coupled to the electrodes of the color components CC_2 (such as the color points CD_2_1 and CD_2_2), and the 汲 extremes of the transistors T(S_0_3, G_1) are coupled to the color components. Electrodes for CC_3 (such as color points CD_3_1 and CD_3_2). Furthermore, the gate terminals of the transistors T(S_0_1, G_1), T(S_0_2, G_1) and T(S_0_3, G_1) are coupled to the gate line G_1, the transistors T(S_0_1, G_1), T(S_0_2). The source terminals of , G_1) and T(S_0_3, G_1) are respectively coupled to the source lines S_0_1, S_0_2, S_0_3. Similarly, the elements of the pixel P(1,1) are coupled to the gate line G_1 and the source lines S_1_1, S_1_2, S_1_3. The components of the pixel P(0, 0) are coupled to the gate line G_0 and the source lines S_0_1, S_0_2, S_0_3, and the elements of the pixel P(1, 0) are coupled to the gate line G_0 and the source. Lines S_1_1, S_1_2, S_1_3.

Each scan line extends from the left to the right of display 420 and controls all of the pixels on one of the columns of display 420. For each pixel list, display 420 has a gate line. Each source line extends from the top to the bottom of display 420. The number of source lines of display 420 is three times the number of pixels on each column (e.g., one source line for each color component of each pixel in a pixel column). During operation, only a single gate line is activated at a time. All of the transistors in the startup column are in a conducting state by stimulating the source line from the source. The electro-crystalline system in the other columns is blocked by the grounded non-activated gate line. All of the source lines are activated at the same time, and each source line provides video data to a transistor in the startup column (eg, by controlling the gate line). Due to the mode of operation of the gate line and the source line, the gate line is often referred to as a bus line, and the source line is commonly referred to as a data line. The voltage charges the electrodes of the color components to produce the desired gray level (the color is provided by the color light film). When not activated, the electrodes of the color point are electrically insulated, so the voltage can be maintained to control the liquid crystal. However, parasitic leakage is unavoidable, so charging is ultimately wasted. For small screens with fewer columns, this parasitic leakage is not a problem because the columns are usually refreshed quickly. However, for large screens with more columns, there is a longer period between refreshes. Thus, certain embodiments of the present invention include one or more storage capacitors at each color point. The storage capacitor is charged by the switching element of the color point and provides a sustain voltage ("maintenance" voltage) when the column is not activated. In general, data lines and bus bars are made using opaque conductors such as aluminum (Aluminum, Al) or chromium (Chromium, Cr).

As described above, the discrete field amplification region of one of the pixels in the pixel design 410 receives the correct polarity from the pixel. Thus, in display 420, each column of pixels has a corresponding discrete field amplification region transistor that is coupled to a discrete field amplification electrode that extends through display 420. The discrete field amplification region of the pixel of the corresponding pixel is coupled to the corresponding discrete field amplifying electrode to receive the voltage polarity and the voltage amount from the discrete field amplifying region transistor. In particular for column 0, the discrete field amplification region transistor FFAR_T_0 is above the left side of display 420. The discrete field amplification region electrode FFARE_0 is coupled to the 汲 terminal of the discrete field amplification region transistor FFAR_T_0 and extends through the display 420. The discrete field amplification region in the pixel of column 0 is coupled to the discrete field amplification region electrode FFARE_0. In particular, the pixels P(0, 0) and the pixels P(1, 0) are coupled to the discrete field amplification region electrode FFARE_0. The control terminal of the discrete field amplification region transistor FFAR_T_0 is coupled to the gate line G_0, and the source terminal of the discrete field amplification region transistor FFAR_T_0 is coupled to a discrete field amplification region even source line S_FFAR_E. The electrode system of the discrete field amplification region is set to the opposite polarity of the color point to enhance and stabilize the formation of multiple domains in the liquid crystal structure. Therefore, the polarity on the even source line S_FFAR_E in the discrete field amplification region is opposite to the source line on the transistor coupled to the color point. In general, the magnitude of the voltage on the even source line S_FFAR_E of the discrete field amplification region is set to a fixed voltage. In order to reduce power usage, the fixed voltage on the even source line S_FFAR_E of the discrete field amplification region is set to a low voltage. In some embodiments of the invention, the discrete field amplification region even source line S_FFAR_E is controlled by a transistor at the edge of the display. In other embodiments of the invention, the discrete field amplification region even source line S_FFAR_E is controlled by a drive circuit that controls other source lines.

For column 1, the discrete field amplification region transistor FFAR_T_1 is above the right side of display 420. The discrete field amplification region electrode FFARE_1 is coupled to the 汲 terminal of the discrete field amplification region transistor FFAR_T_1 and extends through the display 420. The discrete field amplification region in the pixel of column 1 is coupled to the discrete field amplification region electrode FFARE_1. In particular, the discrete field amplification regions of the pixels P(0, 1) and the pixels P(1, 1) are coupled to the discrete field amplification region electrode FFARE_1. The control terminal of the discrete field amplification region transistor FFAR_T_1 is coupled to the gate line G_1, and the source terminal of the discrete field amplification region transistor FFAR_T_1 is coupled to a discrete field amplification region odd source line S_FFAR_O. The electrode system of the discrete field amplification region is set to the opposite polarity of the color point to enhance and stabilize the formation of multiple domains in the liquid crystal structure. Therefore, the polarity on the odd source line S_FFAR_O in the discrete field amplification region is opposite to the source line on the transistor coupled to the color point. In general, the magnitude of the voltage on the odd source line S_FFAR_O in the discrete field amplification region is set to a fixed voltage. In order to reduce the power consumption, the fixed voltage on the odd source line S_FFAR_O in the discrete field amplification region is set to a low voltage. In some embodiments of the invention, the odd field amplification region odd source line S_FFAR_O is controlled by a transistor at the edge of the display. In other embodiments of the invention, the odd field amplification region odd source line S_FFAR_O is controlled by a drive circuit that controls other source lines.

In display 420, discrete field amplification region electro-crystal systems are placed simultaneously on the left and right sides of the display to improve power distribution in display 420. However, certain embodiments of the present invention may place all discrete field amplification area transistors on a single side of the display. In these embodiments, the source terminals of all of the discrete field amplification region transistors may be coupled to a single discrete field amplification region transistor S_FFAR.

4(f) and 4(g) show different dot polarity patterns of a pixel design 430 (labeled 430+ and 430-), and the pixel design 430 is a variation of the pixel design 410. Since the layout and polarity of the color point and the switching element extremely discrete field amplification region are the same in the pixel design 430 and the pixel design 410, the description will not be repeated. The main difference between the pixel design 430 and the pixel design 410 is that the discrete field amplification regions in the pixel design 430 are coupled together in a pixel by conductors. In particular, a conductor 432 couples the electrodes of the discrete field amplification region FFAR_1 to the electrodes of the discrete field amplification region FFAR_2. Similarly, a conductor 434 couples the electrodes of the discrete field amplification region FFAR_2 to the electrodes of the discrete field amplification region FFAR_3. Furthermore, a conductor 436 coupled to the discrete field amplification region FFAR_3 extends to the right of the discrete field amplification region FFAR_3. Conductor 436 is used to connect to a discrete field amplification region of a neighboring pixel (see Figure 4(h)). In other embodiments of the invention, instead of being coupled to the discrete field amplification region FFAR_3, the conductor 436 is coupled to the discrete field amplification region FFAR_1 and extends to the left of the discrete field amplification region FFAR_1. The inclusion of internal connections between the discrete field amplification regions simplifies the connection of the discrete field amplification regions to external polar sources.

4(h) shows a portion of display 440, which uses pixels P(0,0), P(1,0), P(0, of pixel design 430 having a switching element column inversion mode. 1) and P (1, 1). Display 440 can have thousands of columns and each column has thousands of pixels. The columns and rows are shown in Figure 4(h) as being continuous from the portion shown in Figure 4(h). For the sake of clarity, the gate line and the source line of the control switching element are omitted in FIG. 4(h). The gate line and source line of display 440 are the same as the gate line and source line of display 420 in Figure 4(e). Furthermore, in order to better illustrate each pixel in the figure, the area of each pixel is masked; this masking is only for illustrative purposes in Figure 4(h) and is not functional. Like display 420, the pixels of display 440 are configured such that all pixels in a column have the same dot polarity pattern (positive or negative), and each successive column alternates between positive and negative dot polarity patterns. Therefore, the pixels P(0,0) and the pixels P(1,0) in the first column (ie, column 0) have a punctual polarity pattern, and the pixels P(0 in the second column (ie, column 1). , 1) and the pixel P (1, 1) have a negative dot polarity pattern. However, in the next page box, the pixels will switch the dot polarity pattern. Therefore, in general, a pixel P(x, y) has a first dot polarity pattern when y is an even number and a second dot polarity pattern when y is an odd number. Because display 440 is very similar to display 420, only the differences between display 440 and display 420 are described. In particular, the inclusion of internal conductors 432, 434, 436 in pixel design 430 does not include discrete field amplification region electrodes. Instead, the discrete field amplification region switching element on the left side of display 440 is coupled to the first discrete field amplification region of the leftmost pixel. For example, in FIG. 4(h), the discrete field amplification area switching element FFARSE_0 is coupled to the discrete field amplification area FFAR_1 of the pixel P(0, 0). The inner conductor then provides a polarity to the discrete field amplification region of the pixels on the column. A discrete field amplification region switching element on the right side of display 400 is coupled to the third discrete field amplification region of the rightmost pixel. This is symbolically represented in FIG. 4 by the discrete field amplification region switching element FFARSE_1 coupled to the discrete field amplification region FFAR_3 of the pixel P(1, 1) via a series of pixels (not shown). h). In FIG. 4(c), the discrete field amplification area switching elements FFARSE_0 and FFARSE_1 have positive polarity and negative polarity, respectively. However, in the next page box, the polarity is reversed.

Due to the switching of the polarity on each column in display 440, if a color point has a first polarity, then any adjacent adjacent poles have a second polarity. For example, when the discrete field amplification regions FFAR_2 and FFAR_3 of the pixel P(0, 1) have a negative polarity, the color point CD_3_2 of the pixel P(0, 1) has a negative polarity. In a particular embodiment of the invention, each color point has a width of 40 microns and a height of 60 microns. Each discrete field amplification region has a vertical magnification width of 5 microns, a vertical magnification height of 145 microns, a horizontal magnification width of 45 microns, and a horizontal magnification height of 5 microns. The horizontal point spacing HDS1 is 15 microns, the vertical point spacing VDS1 is 25 microns, the horizontal discrete field amplification spacing HFFARS is 5 microns, and the vertical discrete field amplification spacing VFFARS is 5 microns.

In some embodiments of the present invention, the pixels on the edge of a display use edge pixel design, which is a variation in the pixel design of the non-edge pixels of the display. For example, FIG. 4(i) and FIG. 4(j) respectively illustrate a top-side pixel design 430_TE and a bottom-side pixel design 430_BE. The topside pixel design 430_TE and the bottom edge pixel design 430_BE are variations of the pixel design 430. For the sake of simplicity, the description is not repeated, and only the difference between the edge pixel design and the pixel design 430 is described.

In particular, the topside pixel design 430_TE uses a modified fringe field amplifying region FFAR. For the sake of clarity, the discrete field amplification regions in Figure 4(i) are represented as top edge discrete field amplification regions and are labeled FFAR_TE_1, FFAR_TE_2, and FFAR_TE_3. The top edge discrete field amplification region in the topside pixel design 430_TE is different from the discrete field amplification region by the pixel design 430 comprising a top horizontal amplifying portion HAP_T. The top horizontal magnifying portion HAP_T extends from above the top color dot to the left of the vertical magnifying portion of the top side discrete field magnifying region. In particular, as shown in FIG. 4(i), the top side discrete field amplification areas FFAR_TE_1, FFAR_TE_2, and FFAR_TE_3 include top horizontal amplification sections HAP_T_1, HAP_T_2, and HAP_T_3 extending through the color points CD_1_1, CD_2_1, and CD_3_1, respectively. The top horizontal amplifying parts HAP_T_1, HAP_T_2, and HAP_T_3 providing one of the opposite polarities on the color points CD_1_1, CD_2_1, and CD_3_1 are respectively added to the fringe fields of the color points CD_1_1, CD_2_1, and CD_3_1.

In Figure 4(j), the bottom edge pixel design 430_BE uses a modified discrete field amplification region FFAR. For the sake of clarity, the discrete field amplification regions in Figure 4(j) are, for example, bottom edge discrete field amplification regions and are labeled FFAR_BE_1, FFAR_BE_2, and FFAR_BE_3. The bottom-side discrete field amplification region in the bottom edge pixel design 430_BE is different from the discrete field amplification region of the pixel design 430 including a bottom horizontal amplification portion HAP_B. The bottom horizontal magnifying portion HAP_B extends from the bottom color point to the left side of the vertical magnifying portion of the discrete field magnifying region. In particular, as shown in FIG. 4(j), the bottom side discrete field amplification areas FFAR_BE_1, FFAR_BE_2, and FFAR_BE_3 include bottom horizontal amplification sections HAP_B_1, HAP_B_2, and HAP_B_3 extending below the color points CD_1_1, CD_2_1, and CD_3_1, respectively. The bottom horizontal amplification portions HAP_B_1, HAP_B_2, and HAP_B_3 of the regions of opposite polarity are provided under the color points CD_1_1, CD_2_1, and CD_3_1, respectively, and the discrete fields of the color points CD_1_1, CD_2_1, and CD_3_1 are respectively enhanced.

4(k)-4(m) are diagrams illustrating different portions of the display 450. The display 450 uses a pixel design 430 for most of the pixels, a top-side pixel design for the pixel at the top of the display 430_TE, and The bottom pixel of the pixel at the bottom of the display is 430_BE. In particular, display 450 includes 400 columns (numbered from 0 to 399). Figure 4(k) graphically illustrates the pixels on row 10 and row 11 and column 100 (the pixels on columns 1 through 398 are similar) (i.e., the general pixels of the display); Figure 4 ( l) illustrates the row 0 and column 1 of column 10 and column 1 (ie, the bottom edge of the display); and Figure 4 (m) illustrates the pixels on row 398 and column 399 of row 10 and row 399 (ie the top edge of the display).

In particular, FIG. 4(k) shows a portion of the display 450, and the display 450 uses pixels P(10, 99), P(11, 99) having a pixel design 430 of the switching element column inversion mode. P (10, 100) and P (11, 100). The column of pixels extends to the left and right. In a particular embodiment of display 450, each column contains 640 pixels. For the sake of clarity, the gate lines and source lines of the control switching elements are omitted in Figures 4(k), 4(l) and 4(m). The gate line and source line of display 450 are the same as the gate line and source line of display 420 shown in Figure 4(e). Furthermore, in order to better explain each pixel, each pixel area is masked; this masking is only for illustrative purposes in Figure 4(k) and has no functional significance. As in display 420, the pixels of display 450 are configured such that all pixels in a column have the same dot polarity pattern (positive or negative), and each successive column is between positive and negative patterns. alternately. Therefore, in the 100th column (ie, column 99, because the column number is counted from 0), the pixels P(10,99) and P(11,99) have a punctual polarity pattern, in the 101st column (ie, column 100). The pixels P (10, 100) and P (11, 100) have a negative dot polarity pattern. However, in the next page frame, the dot polarity pattern is switched. Therefore, in general, when y is an even number, a pixel P(x, y) has a first polarity, and when y is an odd number, it has a second dot polarity pattern.

Because display 450 is very similar to display 440, only the differences between display 450 and display 440 are described. In particular, the display 450 is different from the display 440, and the display 450 has a pixel using the bottom pixel design 430_BE of column 0 as shown in FIG. 4(1), and is shown in FIG. 4(k). The top edge of the 399 is designed with 430_TE. Therefore, the difference is not shown in FIG. 4(k), that is, the top or bottom edge of the display 450 is not shown.

Fig. 4(l) shows a part of the display 450, which uses the pixels P(10,0) and P(11,0) of the 430_BE of the bottom edge pixel design, and the pixel P of the pixel design (10,1). ) and P (11, 1). Each column of pixels extends to the right and to the left. In order to explain each pixel more graphically, an area of each pixel is masked; this shadow is shown in Figure 4(l) for illustrative purposes only and has no functional significance. As noted above, the pixels of display 450 are configured such that all of the pixels on a column have the same dot polarity pattern (positive or negative), and each successive column alternates between positive and negative patterns. Therefore, the pixels P(10,0) and P(11,0) on the first column (ie, column 0) have a punctual polarity pattern, and the pixel P on the second column (ie, column 1) (10) , 1) and P (11, 1) have a negative dot polarity pattern. However, in the next page frame, the pixel is switched to the polarity pattern. By using the bottom edge pixel design 430_BE of the bottommost column (ie, column 0) of the display 450, due to the magnification of the discrete field in the color point of the bottom horizontal amplification portion HAP_B (refer to FIG. 4(j)), To improve the performance of the color point at the bottom of the display 450.

4(m) shows a portion of the display 450, which uses the pixels P (10, 399) and P (11, 399) of the top pixel design 430_TE, and the pixel P of the pixel design 430 (10, 398) and P (11,398). Each column of pixels extends to the left and right. In order to explain each pixel more graphically, it masks an area of each pixel; this shadow is shown in Figure 4(m) for illustrative purposes only and has no functional significance. As noted above, the pixels of display 450 are configured such that all of the pixels on a column have the same dot polarity pattern (positive or negative), and each successive column alternates between positive and negative patterns. Thus, the pixels P (10, 398) and P (11, 398) on column 398 have a punctual polarity pattern, and the pixels P (10, 399) and P (11, 399) on column 399 have a negative Point polarity pattern. . However, in the next page frame, the pixel is switched to the polarity pattern. By using the top-side pixel design 430_TE of the topmost column (ie, column 399) of the display 450, due to the magnification of the discrete field in the color point by the top horizontal magnification HAP_T (please refer to FIG. 4(i)), To improve the performance of the color point at the bottom of the display 450.

In addition to the top pixel design and the bottom pixel design, certain embodiments of the present invention also include the use of a left edge pixel design that is used in the display of non-edge pixels. Variations in pixel design. For example, Figure 4(n) graphically illustrates a left pixel design 430_LE, which is a variation of the pixel design 430. For the sake of simplicity, the description is not repeated, and only the differences between the edge pixel design and the pixel design 430 are described.

In particular, the left pixel design 430_LE uses a modified discrete field amplification region FFAR of the first color component. For clarity, the discrete field amplification region of the first color component of Figure 4(n) is depicted as a left discrete field amplification region and is labeled FFAR_LE_1. The discrete field amplification region of the second color component and the third color component in FIG. 4(n) is described as a left discrete field amplification region, and is labeled as FFAR_LE_2 and FFAR_LE_3, respectively. The left discrete field amplification region in the left pixel design 430_LE is different from the discrete field amplification region of the pixel design 430 including a left vertical magnification VAP_L. The left vertical amplifying portion VAP_L extends from the left side of the horizontal amplifying portion HAP (please refer to FIG. 4(c)) and extends along the left side of the color point. In particular, as shown in FIG. 4(n), the left discrete field amplification area FFAR_LE_1 includes a left vertical amplification portion VAP_L_1 extending along the left side of the color points CD_1_1 and CD_1_2. A region of opposite polarity is provided to the left vertical portion of the left side of the color points CD_1_1 and CD_1_2 (which should be the left vertical magnification) VAP_L_1, which is a discrete field of the enhanced color points CD_1_1 and CD_1_2.

In some embodiments of the present invention, a display using a topside pixel design, a bottomside pixel design, and a pixel of the left pixel design further includes the use of a top left corner pixel design (top left corner pixel design). Design) and a bottom left corner pixel design pixel, which is used in the variation of the non-edge pixel of the display. For example, FIG. 4(o) and FIG. 4(p) respectively illustrate a top left corner pixel design 430_TLE and a bottom left corner pixel design 430_BLC. The top left corner pixel design 430_TLE and the bottom left corner pixel design 430_BLC are the variations of the topside pixel design 430_TE and the bottom edge pixel design 430_BE, respectively. For the sake of simplicity, the description is not repeated and only the differences between the corner pixel design and the edge pixel design are described.

In particular, the top left corner pixel design 430_TLE is a modified discrete field amplification area FFAR that uses the first color component. For clarity, the discrete field amplification region of the first color component of Figure 4(o) is depicted as a top left corner discrete field amplification region and is labeled FFAR_TLE_1. The discrete field amplification region of the second color component and the third color component in FIG. 4(o) is the same as the top edge discrete field amplification region in FIG. 4(i), and thus is described as a top edge discrete field amplification region, They are labeled as FFAR_TE_2 and FFAR_TE_3, respectively. The top left corner discrete field amplification area in the top left corner pixel design 430_TLC is different from the discrete field magnification area of the pixel design 430 including a left vertical magnification portion VAP_L and a top horizontal magnification portion HAP_T. The top horizontal magnification portion HAP_T extends leftward from the top of the vertical magnification area VAP (please refer to FIG. 4(c)) and extends over the top side of the color point CD_1_1. The left vertical magnification portion VAP_L extends downward from the left edge of the top horizontal magnification portion HAP_T and extends along the left side of the color point. In particular, as shown in FIG. 4(o), the top left corner discrete field amplification area FFAR_TLC_1 includes a top horizontal magnification portion HAP_T_1 that extends along the top side of the color point CD_1_1. The top horizontal magnification portion HAP_T_1 of the region of the opposite polarity of the top side of the color point CD_1_1 is provided to enhance the discrete field of the color point CD_1_1. The top left corner discrete field amplification area FFAR_TLE_1 also includes a left vertical magnification portion VAP_L_1 extending along the left side of the color points CD_1_1 and CD_1_2. The left vertical amplifying portion VAP_L_1 of the region opposite to the left side of the color point CD_1_1 and CD_1_2 is provided to enhance the discrete fields of the color points CD_1_1 and CD_1_2.

The bottom left corner pixel design 430_BLC is a modified discrete field amplification area FFAR that uses the first color component. For clarity, the discrete field amplification region of the first color component of Figure 4(p) is depicted as a bottom left corner discrete field amplification region and is labeled FFAR_BLE_1. The discrete field amplification region of the second color component and the third color component in FIG. 4(p) is the same as the bottom side discrete field amplification region in FIG. 4(j), and thus is described as a bottom side discrete field amplification region, They are labeled as FFAR_BE_2 and FFAR_BE_3, respectively. The top left corner discrete field amplification area in the bottom left corner pixel design 430_BLC is different from the discrete field magnification area of the pixel design 430 including a left vertical magnification portion VAP_L and a bottom horizontal magnification portion HAP_B. The bottom horizontal enlargement portion HAP_B extends leftward from the bottom of the vertical enlargement region VAP (please refer to FIG. 4(c)) and extends over the bottom side of the color point CD_1_2. The left vertical magnification portion VAP_L extends upward from the left edge of the bottom horizontal magnification portion HAP_T and extends along the left side of the color point. In particular, as shown in FIG. 4(o), the bottom left corner discrete field magnifying area FFAR_BLC_1 includes a bottom horizontal amplifying portion HAP_B_1 which extends along the bottom side of the color point CD_1_1. The bottom horizontal amplifying portion HAP_B_1 which provides a region of the opposite polarity of the bottom side of the color point CD_1_2 is a discrete field of the enhanced color point CD_1_2. The bottom left corner discrete field amplification area FFAR_BLE_1 also includes a left vertical magnification portion VAP_L_1 extending along the left side of the color points CD_1_1 and CD_1_2. The left vertical amplifying portion VAP_L_1 of the region opposite to the left side of the color point CD_1_1 and CD_1_2 is provided to enhance the discrete fields of the color points CD_1_1 and CD_1_2.

4(q)-4(s) graphically illustrate different portions of display 460, which uses a pixel design 430 for most of the pixels, a top pixel of the pixel at the top of the display, 430_TE, at The bottom pixel of the bottom of the display is 430_BE, the left pixel of the pixel on the left edge of the display is 430_LE, the top left corner of the pixel at the top left of the display is 430_TLC, and the left corner of the display is drawn. The bottom left corner of the prime design is 430_BLC. In particular, display 460 includes 400 columns (numbered from 0 to 399). Figure 4 (q) is a diagram illustrating the pixels on display row 0 and row 1 of column 99 and column 100 (the pixels on columns 1 to 398 are similar) (i.e., the general pixels of the display); (r) graphically illustrates display row 0 and row 1 column 0 and column 1 (ie, the bottom edge of the display); and Figure 4 (s) illustrates the display row 0 and row 1 column 398 and column 399 The pixel (the top edge of the display). The other lines of display 460 are the same as display 450 as shown in Figures 4(k)-4(m). The display 460 uses a switching element column inversion mode.

In particular, Figure 4(q) shows a portion of display 460, while display 460 uses pixels P(0,99), P(1,99), P(0,100), and P(1,100). . When the pixels P(1, 99) and P(1, 100) use the pixel design 430, the pixels P(0, 99) and P(0, 100) use the left pixel design 4530_LE. Each column of pixels extends to the right of the pixel using the pixel design 430. In a particular embodiment of display 460, each column includes 640 pixels. For the sake of clarity, the gate lines and source lines of the control switching elements are omitted in FIGS. 4(q), 4(r) and 4(s). The gate line and source line of display 460 are the same as the gate line and source line of display 420 shown in Figure 4(e). Furthermore, in order to better explain each pixel, each pixel area is masked; this masking is only for illustrative purposes in FIG. 4(q) and has no functional significance. As in display 420, the pixels of display 460 are configured such that all pixels in a column have the same dot polarity pattern (positive or negative), and each successive column is interposed between positive and negative patterns. alternately. Therefore, in the 100th column (ie, column 99, because the column number is counted from 0), the pixels P(0,99) and P(1,99) have a punctual polarity pattern, in the 101st column (ie, column 100). The pixels P (0, 100) and P (1, 100) have a negative dot polarity pattern. However, in the next page frame, the dot polarity pattern is switched. Therefore, in general, when y is an even number, a pixel P(x, y) has a first polarity, and when y is an odd number, it has a second dot polarity pattern.

Because display 460 is very similar to display 450, only the differences between display 460 and display 450 are described. In particular, display 460 is different from display 450, and display 460 is as shown in Figure 4(1), using a pixel P having a design 430_TLC (as shown in Figure 4(r)) in addition to using the top left corner pixel ( 0,399) (ie, the top right corner), on the left side of line 0, the 430_LE pixel is designed, and the bottom left corner pixel design 430_BLC (as shown in Figure 4(s)) is used. 0,0) (ie the bottom left corner).

4(r) shows a portion of the display 460, which has a pixel P (0, 0) of the bottom left corner pixel design 430_BLC, a pixel P (1, 0) of the bottom edge pixel design 430_BE, and the left side. The pixel design 430_LE is P (0, 1) and the pixel design 430 is P (1, 1). Each column of pixels extends to the right. In order to better explain each pixel, each pixel area is masked; this masking is only for illustrative purposes in Figure 4(r) and has no functional significance. As noted above, the pixels of display 460 are configured such that all of the pixels in a column have the same dot polarity pattern (positive or negative), and each successive column alternates between positive and negative patterns. Therefore, the pixels P(0,0) and P(1,0) in the first column (ie, column 0) have a punctual polarity pattern, and the pixels P(0, 1) in the second column (ie, column 1). And P(1,1) has a negative dot polarity pattern. However, in the next page frame, the dot polarity pattern is switched. By using the bottom left corner pixel design 430_BLC, the pixel P(0,0) is improved due to the amplification of the discrete field in the color point of the pixel P(0,0). Furthermore, by using the bottom pixel design 430_BE, the performance of the color point at the bottom of the display 460 is improved due to the amplification of the discrete fields in the color point.

4(s) shows a portion of the display 460, which uses the top left corner pixel design 430_TLC pixel P (0, 399), the top edge pixel design 430_TE P (1, 399), left pixel The pixel P (0, 398) of 430_LE and the pixel P (1, 398) of the pixel design 430 are designed. Each column of pixels extends to the right. In order to explain each pixel more graphically, it masks an area of each pixel; this shadow is shown in Figure 4(s) for illustrative purposes only and has no functional significance. As noted above, the pixels of display 460 are configured such that all of the pixels on a column have the same dot polarity pattern (positive or negative), and each successive column alternates between positive and negative patterns. Thus, the pixels P(0, 398) and P(1, 398) on column 398 have a punctual polarity pattern, and the pixels P(0, 399) and P(1, 399) on column 399 have a negative Point polarity pattern. However, in the next page frame, the pixel is switched to the polarity pattern. By using the top left corner pixel of the pixel P (0,399) to design 430_TLC, due to the enlargement of the discrete field in the color point of the pixel P (0, 399), the pixel P (0, 399) is improved. The performance of the color point. Again, by using the topside pixel design 430_TE in the top column of display 460 (i.e., column 399), the performance of the color point on top of display 460 is improved due to the amplification of discrete fields in the color point.

As in display 440 (as described above), due to the polarity switching on each column in display 460, if a color point has a first polarity, then any adjacent polarized element has a second polarity. For example, when the discrete field amplification regions FFAR_2 and FFAR_3 of the pixel P(0, 1) have positive polarity, the color point CD_3_2 of the pixel P(0, 1) has a negative polarity. In a particular embodiment of the invention, each color point has a width of 40 microns and a height of 60 microns. Each discrete field amplification region has a vertical magnification width of 5 microns, a vertical magnification height of 145 microns, a horizontal magnification width of 45 microns, and a horizontal magnification height of 5 microns. The horizontal point spacing HDS1 is 15 microns, the vertical point spacing VDS1 is 25 microns, the horizontal discrete field amplification spacing HFFARS is 5 microns, and the vertical discrete field amplification spacing VFFARS is 5 microns.

5(a) and 5(b) show different dot polarity patterns of a pixel design 510 (labeled 510+ and 510a), and the pixel design 510 is a variation of the pixel design 410. Since the layout and polarity of the color point and the switching element extremely discrete field amplification region are the same in the pixel design 430 and the pixel design 410, the description will not be repeated. The main difference between the pixel design 510 and the pixel design 410 is that the pixel design 510 includes conductors to help couple the discrete field amplification regions to the switching elements in other pixels. In particular, one of the current pixels, conductor 512, couples the electrodes of the discrete field amplification region FFAR_1 to the switching element SE_1 of the pixel on the current pixel (please refer to FIG. 5(c)). The connection at the switching element passes through the color point electrode of the pixel on the current pixel. Similarly, one of the current pixels, conductor 514, couples the electrodes of the discrete field amplification region FFAR_2 to the switching element SE_2 of the pixel on the current pixel (please refer to FIG. 5(c)). The connection at the switching element passes through the color point electrode of the pixel on the current pixel. One of the current pixels, conductor 516, couples the electrodes of the discrete field amplification region FFAR_3 to the switching element SE_3 of the pixel on the current pixel (please refer to FIG. 5(c)). The connection at the switching element passes through the color point electrode of the pixel on the current pixel.

This connection is illustrated in Figure 5(c), which is a portion of display 520 that uses pixels P(1,1), P (with pixel design 510 of a switching element column inversion drive mode). 1,0), P(0,1), and P(1,1). Display 520 can have thousands of columns with thousands of pixels per column. The columns and rows are continuous from the portion as shown in Fig. 5(c) in the manner shown in Fig. 5(c). For clarity of explanation. The gate line and the source line of the control switching element are omitted in FIG. 5(c). The gate line and source line are shown in Figure 4(e) except that display 520 does not include the use of discrete field amplification region switching elements. Furthermore, in order to better illustrate each pixel, each region of the pixel is obscured. This masking is only for drawing purposes in Figure 5(c) and has no functional significance. In the display described herein, a pixel P(x, y) is in the xth row (from the left) and the yth column (from the bottom), that is, the pixel P(0, 0) is The bottom leftmost corner. Like display 420, the pixels of display 520 are configured such that all pixels in a column have the same dot polarity pattern (positive or negative), and each successive column alternates between positive and negative dot polarity patterns. Therefore, the pixels P(0,0) and the pixels P(1,0) in the first column (ie, column 0) have a punctual polarity pattern, and the pixels P(0 in the second column (ie, column 1). , 1) and the pixel P (1, 1) have a negative dot polarity pattern. However, in the next page box, the pixels will switch the dot polarity pattern. Thus, in general, a pixel P(x, y) has a first dot polarity pattern when y is even and a second dot polarity pattern when y is odd. Because display 520 is very similar to display 420, only the differences between display 520 and display 420 are described. In particular, display 520 does not include discrete field amplification region electrodes or discrete field amplification region switching elements due to the inclusion of internal conductors 512, 514, and 516 in pixel design 520. As a discrete field amplification region instead of a first pixel, the voltage polarity and voltage amount are received from a second pixel. In particular, the second pixel is a pixel on the first pixel. For example, the electrode of the discrete field amplification region FFAR_1 of the pixel P(0,0) is coupled to the pixel P(0,1) of the pixel of the color point CD_1_2 passing through the pixel P(0,1). Element SE_1. Similarly, the electrodes of the discrete field amplification regions FFAR_2 and FFAR_3 of the pixel P(0,0) are coupled to the pixel P (0,1) of the pixels CD_2_2 and CD_3_2 passing through the pixels P(0,1). ) switching elements SE_2 and SE_3.

Due to the switching of the polarity on each column in display 520, if the color point has a first polarity, then any adjacent polarized element has a second polarity. For example, when the discrete field amplification regions FFAR_2 and FFAR_3 of the pixel P(0, 1) have positive polarity, the color point CD_3_2 of the pixel P(0, 1) has a negative polarity. In a particular embodiment of the invention, each color point has a width of 40 microns and a height of 60 microns. Each discrete field amplification region has a vertical magnification width of 5 microns, a vertical magnification height of 145 microns, a horizontal magnification width of 45 microns, and a horizontal magnification height of 5 microns. The horizontal point spacing HDS1 is 15 microns, the vertical point spacing VDS1 is 25 microns, the horizontal discrete field amplification area spacing HFFARS is 5 microns, and the vertical discrete field amplification area spacing VFFARS is 5 microns.

For example, the bottom edge pixel design, the top edge pixel design, the left pixel design, the top left corner pixel design, and the bottom left corner pixel design pixel design 510, the variations can be amplified using different discrete fields as described above. The area was created. These variations are used as described above with respect to display 450 and display 460.

6(a) and 6(b) show different dot polarity patterns of a pixel design 610 (numbers 610+ and 610-, which will be described later). This pixel design 610 is generally used to have a switching element array. Turn the drive mode on the display. In actual operation, a pixel will switch between a first dot polarity pattern and a second dot polarity pattern between each image frame. In particular, in FIG. 6(a), the pixel design 610 has a punctual polarity pattern (and is labeled 610+), and in FIG. 6(b), the pixel design 610 has a negative point polarity pattern (and is labeled 610). -). Furthermore, in the different pixel designs, the polarity of each polarized element is represented by "+" for positive polarity and "-" for negative polarity.

The pixel design 610 has three color components CC_1, CC_2, and CC_3. Each color component includes two color points. The pixel design 610 also includes a switching element (refer to SE_1, SE_2, and SE_3) of each color component and discrete field amplification regions (refer to FFAR_1, FFAR_2, and FFAR_3) in each color component. The switching elements SE_1, SE_2 and SE_3 are arranged in one column. The device component regions DCA_1, DCA_2, and DCA_3 are defined around the switching elements SE_1, SE_2, and SE_3. The device component regions DCA_1, DCA_2, and DCA_3 have a device component region height DCAH and a device component region width DCAW.

The first color component CC_1 of the pixel 610 has two color points CD_1_1 and CD_1_2. The color points CD_1_1 and CD_1_2 form a first column with a vertical dot pitch VDS1 therebetween. In other words, the color points CD_1_1 and CD_1_2 are horizontally aligned and vertically spaced by the vertical dot pitch VDS1. Furthermore, the color points CD_1_1 and CD_1_2 are vertically offset by a vertical dot offset VDO1, and the vertical dot offset VDO1 is equal to the vertical dot pitch VDS1 plus the color point height CDH. As shown in the connection between color points CD_1_1 and CD_1_2, in some embodiments of the invention, the electrodes of color points CD_1_1 and CD_1_2 are coupled together in the same processing steps as the formation of the electrodes. The device element region DCA_1 is disposed below the color point CD_1_2 and is spaced apart from the color point CD_1_2 by a vertical dot pitch VDS2. The switching element SE_1 is disposed in the device element region DCA_1. Therefore, the color point CD_1_2 is disposed between the color point CD_1_1 and the switching element SE_1. The switching element SE_1 is coupled to the electrodes of the color points CD_1_1 and CD_1_2 to control the voltage polarity and voltage amount of the color points CD_1_1 and CD_1_2.

The second color component CC_2 of the pixel 610 has two color points CD_2_1 and CD_2_2. The color points CD_2_1 and CD_2_2 form a second column with a vertical dot pitch VDS1 therebetween. Therefore, the color points CD_2_1 and CD_2_2 are horizontally aligned and vertically spaced by the vertical dot pitch VDS1. The device element region DCA_2 is disposed below the color point CD_2_2 and is spaced apart from the color point CD_1_2 by a vertical dot pitch VDS2. The switching element SE_2 is disposed in the device element region DCA_2. The switching element SE_2 is coupled to the electrodes of the color points CD_2_1 and CD_2_2 to control the voltage polarity and voltage of the color points CD_2_1 and CD_2_2. The second color component CC_2 is vertically aligned with the first color component CC_1 and is spaced apart from the color component CC_1 by the horizontal dot pitch HDS1, so the color components CC_1 and CC_2 are horizontally offset by a horizontal dot offset amount HDO1, and The horizontal point offset HDD1 is equal to the horizontal dot pitch HDS1 plus the color dot width CDW. In particular, regarding the color point, the color point CD_2_1 is vertically aligned with the color point CD_1_1, and is spaced apart from each other by the horizontal dot pitch HDS1. Similarly, the color point CD_2_2 is vertically aligned with the color point CD_2_1 and spaced apart from each other by the horizontal dot pitch HDS1. Therefore, the color point CD_1_1 and the color point CD_2_1 form a first column of color points, and the color point CD_1_2 and the color point CD_2_2 form a second column of color points.

Similarly, the third color component CC_3 of the pixel 610 has two color points CD_3_1 and CD_3_2. The color points CD_3_1 and CD_3_2 form a third column with a vertical dot pitch VDS1 therebetween. Therefore, the color points CD_3_1 and CD_3_2 are horizontally aligned and vertically spaced by the vertical dot pitch VDS1. The device element region DCA_3 is disposed below the color point CD_3_2 and is spaced apart from the color point CD_3_2 by a vertical dot pitch VDS2. The switching element SE_3 is disposed within the device component area DCA_3. The switching element SE_3 is coupled to the electrodes of the color points CD_3_1 and CD_3_2 to control the voltage polarity and voltage amount of the color points CD_3_1 and CD_3_2. The third color component CC_3 is vertically aligned with the second color component CC_2 and is spaced apart from the color component CC_2 by the horizontal dot pitch HDS1, and thus the color components CC_3 and CC_2 are horizontally cancelled by a horizontal dot offset amount HDO1. In particular, regarding the color point, the color point CD_3_1 is vertically aligned with the color point CD_2_1, and is spaced apart from each other by the horizontal dot pitch HDS1. Similarly, the color point CD_3_2 is vertically aligned with the color point CD_2_2 and is horizontally spaced by the horizontal dot pitch HDS1. Therefore, the color point CD_3_1 forms the first column of the color point, and the color point CD_3_2 forms the second column of the color point.

The pixel design 610 also includes discrete field amplification regions FFAR_1, FFAR_2, and FFAR_3. The discrete field amplification regions of Figures 6(a)-6(b) have the same basic shape as the discrete field amplification regions of Figures 4(a)-4(b). Therefore, there are the same words (that is, the horizontal amplification unit HAP and the vertical amplification unit VAP are reused).

As shown in FIG. 6(a), the discrete field amplification areas FFAR_1, FFAR_2, and FFAR_3 are disposed between the color points of the pixel design 610. In particular, the discrete field amplification region FFAR_1 is configured such that the horizontally amplified portion of the discrete field amplification region FFAR_1 is between the color points CD_1_1 and CD_1_2, and separated from the color points CD_1_1 and CD_1_2 by a vertical discrete field amplification region spacing VFFARS. . However, unlike the discrete field amplification region of the pixel design 410, the discrete field amplification region of the pixel design 610 does not extend to the left end of the color points CD_1_1 and CD_1_2 due to the internal connection between the color points CD_1_1 and CD_1_2. The vertical amplification portion of the discrete field amplification region FFAR_1 is disposed to the right of the color points CD_1_1 and CD_1_2, and is separated from the color points CD_1_1 and CD_1_2 by a horizontal discrete field amplification region pitch HFFARS. Therefore, the discrete field amplification area FFAR_1 extends along the right bottom of the color point CD_1_1 and the top right side of the color point CD_1_2. Furthermore, this configuration also causes the vertical amplification portion of the discrete field amplification region FFAR_1 to be between the color points CD_1_1 and CD_2_1 and between the color points CD_1_2 and CD_2_2.

Similarly, the discrete field amplification area FFAR_2 is set such that the horizontal amplification portion of the discrete field amplification area FFAR_2 is between the color points CD_2_1 and CD_2_2, and is separated by a vertical discrete field amplification area spacing VFFARS. The vertical amplifying portion of the discrete field magnifying region FFAR_2 is disposed to the right of the color points CD_2_1 and CD_2_2, and is separated by a vertical discrete field magnifying region pitch VFFARS. Therefore, the discrete field amplification area FFAR_1 extends along the right bottom of the color point CD_2_1 and the top of the right side of the color point CD_2_2. This configuration also causes the vertical amplification portion of the discrete field amplification region FFAR_2 to be between the color points CD_2_1 and CD_3_1, and between the color points CD_2_2 and CD_3_2.

The discrete field amplification area FFAR_3 is set such that the horizontal amplification area of the discrete field amplification area FFAR_3 is between the color points CD_3_1 and CD_3_2 and is separated by a vertical discrete field amplification area spacing VFFARS. The vertical amplification portion of the discrete field amplification region FFAR_3 is disposed to the right of the color points CD_3_1 and CD_3_2, and is separated from the color points CD_3_1 and CD_3_2 by a horizontal discrete field amplification region pitch HFFARS. Therefore, the discrete field amplification area FFAR_3 extends along the right bottom of the color point CD_3_1 and along the top right side of the color point CD_3_2.

The pixel design 610 is also designed to allow the discrete field amplification region to receive polarity from a neighboring pixel. In particular, a first conduction system is coupled to the discrete field amplification region to receive polarity from the pixels on the current pixel, and a second conduction system is coupled to the switching element to provide voltage polarity and voltage amount to the current The discrete field magnified area of the pixel under the pixel. For example, the conductor 612 coupled to the electrode of the discrete field amplification region FFAR_1 is a conductor 613 extending upwardly connected to the pixel on the current pixel to receive the polarity (please refer to FIG. 6(c)). The conductor 613 is coupled to the switching element SE_1 and extends to the right and then extends downward to the conductor 612 of the pixel under the current pixel. The conductors 614 and 615 are suitable for the purpose of the discrete field amplification region FFAR_2, such as conductors 612 and 613 for the discrete field amplification region FFAR_3. Furthermore, conductors 616 and 617 are suitable for the purpose of discrete field amplification region FFAR_3, such as conductors 612 and 613 for discrete field amplification region FFAR_1.

The color point, the discrete field amplification area, and the polarity of the switching element are indicated by a positive sign "+" and a negative sign "-". Therefore, in FIG. 6(a), the punctual polarity of the pixel design 610+, all switching elements (such as switching elements SE_1, SE_2, and SE_3) and all color points (such as color points CD_1_1, CD_1_2, CD_2_1, CD_2_2, CD_3_1 and CD_3_2) have positive polarity. However, all discrete field amplification regions (eg, discrete field amplification regions FFAR_1, FFAR_2, and FFAR_3) have negative polarity.

Figure 6(b) shows a pixel design 610 having a negative dot polarity pattern. For the negative dot polarity pattern, all switching elements (such as switching elements SE_1, SE_2, and SE_3) and all color points (such as color points CD_1_1, CD_1_2, CD_2_1, CD_2_2, CD_3_1, and CD_3_2) have negative polarity. However, all of the discrete field amplification regions (for example, the discrete field amplification regions FFAR_1, FFAR_2, and FFAR_3) have positive polarity.

As noted above, if adjacent elements have opposite polarities, the discrete fields at each color point will be amplified. The pixel design 610 utilizes discrete field amplification regions to enhance and stabilize the formation of multiple regions in the liquid crystal structure. In general, the polarity of the biased component is specified such that a color point of a first polarity has a second polarized adjacent polarized component. For example, for the pixel design 610 (shown in Figure 6(a)), the color point CD_2_2 has a positive polarity. However, the adjacent polarized elements (the discrete field amplification areas FFAR_2 and FFAR_1) have a negative polarity. Therefore, the discrete field of the color point CD_2_2 is amplified. Furthermore, as described below, the polarity inversion mode is also implemented in the display level such that the color points of other pixels adjacent to the color point CD_1_2 have a negative polarity (refer to FIG. 6(c)).

The pixels using the pixel design 610 of FIGS. 6(a) and 6(b) can be used in a display using the switching element column inversion mode. 6(c) shows a portion of the display 620, which uses the pixels P(0, 0), P(1, 0), P(0, 1), and P(1, 1) of the pixel design 410. The pixel design 410 has a switching element column inversion driving mode. Display 620 can have thousands of columns with thousands of pixels on each column. The columns and rows are continuous from the portion shown in Fig. 6(c) in the manner shown in Fig. 6(c). For clarity of explanation, the gate line and the source line of the control switching element are omitted in FIG. 6(c). The gate and source lines are depicted in Figure 4(e), except that the display 610 does not use discrete field amplification region switching elements and discrete field amplification region electrodes. Furthermore, in order to better illustrate each pixel, each region of the pixel is shaded. This masking is only for drawing purposes in Figure 6(c) and has no functional significance. In display 620, the pixels are configured such that all pixels in a column have the same dot polarity pattern (positive or negative), and each successive column should alternate between positive and negative dot polarity patterns. Therefore, the pixels P(0,0) and P(1,0) in the first column (column 0) have a punctual polarity pattern, and the pixels P(0,1) and P in the second column (column 1) (1,1) has a negative dot polarity pattern. However, in the next page frame, the pixel will switch the dot polarity pattern. Thus, in general, a pixel P(x, y) has a first dot polarity pattern when y is even and a second dot polarity pattern when y is odd.

The pixels on each pixel column are vertically aligned and separated from the leftmost color point of a neighboring pixel by a vertical dot pitch HDS1. The pixels on a line of pixels are horizontally aligned and separated by a vertical dot pitch VDS3.

As described above, the discrete field amplification region of the first pixel receives the polarity from the switching element of the second pixel. For example, the electrode of the discrete field amplification region FFAR_1 of the pixel P(0,0) is coupled to the conductor 612 via the pixel P(0,0) and the conductor 613 of the pixel P(0,1). Switching element SE_1 of pixels (0, 1). Similarly, the electrode of the discrete field amplification region FFAR_2 of the pixel P(0,0) is coupled to the conductor 615 via the pixel P of the pixel P(0,0) and the conductor 615 of the pixel P(0,1). Switching element SE_2 of prime (0, 1). Furthermore, the electrode of the discrete field amplification region FFAR_3 of the pixel P(0,0) is coupled to the conductor 616 via the pixel P(0,0) and the conductor 617 of the pixel P(0,1). Switching element SE_3 of prime (0, 1).

In a particular embodiment of the invention, each color point has a width of 40 microns and a height of 60 microns. Each discrete field amplification region has a vertical magnification width of 135 microns, a vertical magnification height of 5 microns, a horizontal magnification width of 35 microns, and a horizontal magnification height of 5 microns. The horizontal point spacing HDS1 is 15 microns, the vertical point spacing VDS1 is 15 microns, the vertical point spacing VDS2 is 5 microns, the vertical point spacing VDS3 is 5 microns, the horizontal discrete field amplification spacing HFFARS is 5 microns, and the vertical discrete field amplification spacing VFFARS is 5 microns.

7(a) and 7(b) show different dot polarity patterns of a pixel design 710 (numbers 710+ and 710-, as will be described later). This pixel design 710 is generally used to have a switching element array. Turn the drive mode on the display. In actual operation, a pixel will switch between a first dot polarity pattern and a second dot polarity pattern between each image frame. In particular, in FIG. 7(a), the pixel design 710 has a punctual polarity pattern (and is labeled 710+), and in FIG. 7(b), the pixel design 710 has a negative point polarity pattern (and is labeled 710). -). Furthermore, in the different pixel designs, the polarity of each polarized element is represented by "+" for positive polarity and "-" for negative polarity.

The pixel design 710 has three color components CC_1, CC_2, and CC_3. Each color component includes two color points. The pixel design 710 also includes a switching element (refer to SE_1, SE_2, and SE_3) of each color component and discrete field amplification regions (refer to FFAR_1, FFAR_2, and FFAR_3) in each color component. The switching elements SE_1, SE_2 and SE_3 are arranged in one column. The device component regions DCA_1, DCA_2, and DCA_3 are defined around the switching elements SE_1, SE_2, and SE_3. The device component regions DCA_1, DCA_2, and DCA_3 have a device component region height DCAH and a device component region width DCAW.

The first color component CC_1 of the pixel 710 has two color points CD_1_1 and CD_1_2. The color points CD_1_1 and CD_1_2 form a first column with a vertical dot pitch VDS1 therebetween. In other words, the color points CD_1_1 and CD_1_2 are horizontally aligned and vertically spaced by the vertical dot pitch VDS1. Furthermore, the color points CD_1_1 and CD_1_2 are vertically offset by a vertical dot offset VDO1, and the vertical dot offset VDO1 is equal to the vertical dot pitch VDS1 plus the color point height CDH. As shown in the connection between color points CD_1_1 and CD_1_2, in some embodiments of the invention, the electrodes of color points CD_1_1 and CD_1_2 are coupled together in the same processing steps as the formation of the electrodes. The device element region DCA_1 is disposed below the color point CD_1_2 and is spaced apart from the color point CD_1_2 by a vertical dot pitch VDS2. The switching element SE_1 is disposed in the device element region DCA_1. The switching element SE_1 is coupled to the electrodes of the color points CD_1_1 and CD_1_2 to control the voltage polarity and voltage amount of the color points CD_1_1 and CD_1_2.

Similarly, the second color component CC_2 of the pixel 710 has dichromatic dots CD_2_1 and CD_2_2. The color points CD_2_1 and CD_2_2 form a second column with a vertical dot pitch VDS1 therebetween. Therefore, the color points CD_2_1 and CD_2_2 are horizontally aligned and vertically spaced by the vertical dot pitch VDS1. The device element region DCA_2 is disposed below the color point CD_2_2 and is spaced apart from the color point CD_1_2 by a vertical dot pitch VDS2. The switching element SE_2 is disposed in the device element region DCA_2. The switching element SE_2 is coupled to the electrodes of the color points CD_2_1 and CD_2_2 to control the voltage polarity and voltage of the color points CD_2_1 and CD_2_2. The second color component CC_2 is vertically aligned with the first color component CC_1 and is spaced apart from the color component CC_1 by the horizontal dot pitch HDS1, so the color components CC_2 and CC_1 are horizontally offset by a horizontal dot offset amount HDO1, and The horizontal point offset HDD1 is equal to the horizontal dot pitch HDS1 plus the color dot width CDW. In particular, regarding the color point, the color point CD_2_1 is vertically aligned with the color point CD_1_1, and is spaced apart from each other by the horizontal dot pitch HDS1. Similarly, the color point CD_2_2 is vertically aligned with the color point CD_2_1 and spaced apart from each other by the horizontal dot pitch HDS1. Therefore, the color point CD_1_1 and the color point CD_2_1 form a first column of color points, and the color point CD_1_2 and the color point CD_2_2 form a second column of color points.

Similarly, the third color component CC_3 of the pixel 710 has two color points CD_3_1 and CD_3_2. The color points CD_3_1 and CD_3_2 form a third column with a vertical dot pitch VDS1 therebetween. Therefore, the color points CD_3_1 and CD_3_2 are horizontally aligned and vertically spaced by the vertical dot pitch VDS1. The device element region DCA_3 is disposed below the color point CD_3_2 and is spaced apart from the color point CD_3_2 by a vertical dot pitch VDS2. The switching element SE_3 is disposed within the device component area DCA_3. The switching element SE_3 is coupled to the electrodes of the color points CD_3_1 and CD_3_2 to control the voltage polarity and voltage amount of the color points CD_3_1 and CD_3_2. The third color component CC_3 is vertically aligned with the second color component CC_2 and is spaced apart from the color component CC_2 by the horizontal dot pitch HDS1, and thus the color components CC_3 and CC_2 are horizontally cancelled by a horizontal dot offset amount HDO1. In particular, regarding the color point, the color point CD_3_1 is vertically aligned with the color point CD_2_1, and is spaced apart from each other by the horizontal dot pitch HDS1. Similarly, the color point CD_3_2 is vertically aligned with the color point CD_2_2 and is horizontally spaced by the horizontal dot pitch HDS1. Therefore, the color point CD_3_1 forms the first column of the color point, and the color point CD_3_2 forms the second column of the color point.

The pixel design 710 also includes discrete field amplification regions FFAR_1, FFAR_2, and FFAR_3. Figure 7(c) is a more detailed view showing the discrete field amplification area FFAR_1 of the pixel design 710. For the sake of clarity, the discrete field amplification region FFAR_1 is conceptually divided into a vertical amplification portion VAP, a first horizontal amplification portion HAP_1, a second horizontal amplification portion HAP_2, and a third horizontal amplification portion HAP_3. The horizontal amplifying portion HAP_1 is disposed at the top and extends to the left of the vertical amplifying portion VAP; the horizontal amplifying portion HAP_2 is vertically disposed at the center and extends to the left of the vertical amplifying portion VAP; and the horizontal amplifying portion HAP_3 is disposed at the bottom and extends to Vertically magnifies the left side of the VAP. As described above, the use of the horizontal amplifying portion and the vertical amplifying portion allows a clearer description of the arrangement of the discrete field magnifying region FFAR_1. The horizontal amplification sections HAP_1, HAP_2, and HAP_3 have horizontal amplification section widths HAP_W_1, HAP_W_2, and HAP_W_3, and horizontal amplification section heights HAP_H_1, HAP_H_2, and HAP_H_3, respectively. In the specific embodiment of FIGS. 7(a)-7(d), the horizontal amplification portion widths HAP_W_1 and HAP_W_2 are equal, and the horizontal amplification portion width HAP_W_2 is smaller than the horizontal amplification portion widths HAP_W_1 and HAP_W_3. The vertical amplifying portion VAP has a vertical amplifying portion width VAP_W and a vertical amplifying portion height VAP_H. The discrete field amplification areas FFAR_2 and FFAR_3 are identical in shape to the discrete field amplification area FFAR_1.

As shown in FIG. 7(a), the discrete field amplification areas FFAR_1, FFAR_2, and FFAR_3 are disposed between the color points of the pixel design 710. In particular, the discrete field amplification region FFAR_1 is configured such that the horizontal amplification portion HAP_2 of the discrete field amplification region FFAR_1 is located between the color points CD_1_1 and CD_1_2, and is separated by a vertical discrete field amplification region spacing VFFARS and the color point CD_1_1 CD_1_2 is separated. Due to the internal connection between the color points CD_1_1 and CD_1_2, the horizontal amplification portion HAP_2 of the discrete field amplification area FFAR_1 does not extend to the left end of the color points CD_1_1 and CD_1_2. The vertical amplifying portion VAP of the discrete field amplifying area FFAR_1 is disposed to the right of the color points CD_1_1 and CD_1_2, and is separated from the color points CD_1_1 and CD_1_2 by a horizontal discrete field amplifying area pitch HFFARS. The horizontal amplifying portion HAP_1 extends above the color point CD_1_1, and the horizontal amplifying portion HAP_3 extends below the color point CD_1_2. Therefore, the discrete field amplification area FFAR_1 extends along the right top and bottom of the color point CD_1_1 and the top and bottom of the right side of the color point CD_1_2. Furthermore, this configuration also causes the vertical amplification portion of the discrete field amplification region FFAR_1 to be between the color points CD_1_1 and CD_2_1 and between the color points CD_1_2 and CD_2_2.

Similarly, the discrete field amplification area FFAR_2 is set such that the horizontal amplification portion HAP_2 of the discrete field amplification area FFAR_2 is located between the color points CD_2_1 and CD_2_2, and is separated by a vertical discrete field amplification area spacing VFFARS. Due to the internal connection between the color points CD_2_1 and CD_2_2, the horizontal amplification portion HAP_2 of the discrete field amplification region FFAR_2 does not extend to the left end of the color points CD_2_1 and CD_2_2. The vertical amplifying portion VAP of the discrete field amplifying area FFAR_2 is disposed to the right of the color points CD_2_1 and CD_2_2, and is separated by a horizontal discrete field amplifying area pitch HFFARS. The horizontal amplifying portion HAP_2 extends above the color point CD_2_1, and the horizontal amplifying portion HAP_3 extends below the color point CD_2_2. Therefore, the discrete field amplification area FFAR_2 extends along the right top and bottom of the color point CD_2_1 and the top and bottom of the right side of the color point CD_2_2. Furthermore, this configuration also causes the vertical amplification portion of the discrete field amplification region FFAR_2 to be between the color points CD_2_1 and CD_3_1, and between the color points CD_2_2 and CD_3_2.

The discrete field amplification area FFAR_3 is set such that the horizontal amplification portion HAP_2 of the discrete field amplification area FFAR_3 is located between the color points CD_3_1 and CD_3_2, and is separated by a vertical discrete field amplification area spacing VFFARS. Due to the internal connection between the color points CD_3_1 and CD_3_2, the horizontal amplification portion HAP_3 of the discrete field amplification area FFAR_3 does not extend to the left end of the color points CD_3_1 and CD_3_2. The vertical amplifying portion VAP of the discrete field amplifying area FFAR_3 is disposed to the right of the color points CD_3_1 and CD_3_2, and is separated from the color points CD_3_1 and CD_3_2 by a horizontal discrete field amplifying area pitch HFFARS. The horizontal amplifying portion HAP_1 extends above the color point CD_3_1, and the horizontal amplifying portion HAP_3 extends below the color point CD_3_2. Therefore, the discrete field amplification area FFAR_3 extends along the right top and bottom of the color point CD_3_1 and the top and bottom of the right side of the color point CD_3_2.

The pixel design 710 is also designed to allow the discrete field amplification region to receive polarity from a neighboring pixel. In particular, a first conduction system is coupled to the discrete field amplification region to receive polarity from a pixel on the current pixel, and a second conduction system is coupled to the switching element to provide polarity to the current pixel. The discrete field magnified area of the pixel. For example, the conductor 712 coupled to the electrode of the discrete field amplification region FFAR_1 is a conductor 713 extending upwardly connected to the pixel on the current pixel to receive the polarity (please refer to FIG. 7(d)). The conductor 713 is coupled to the switching element SE_1 and extends downwardly to the conductor 712 connected to the pixel under the current pixel. The conductors 714 and 715 are suitable for the purpose of the discrete field amplification region FFAR_2, such as conductors 712 and 713 for the discrete field amplification region FFAR_1. Furthermore, conductors 716 and 717 are suitable for the purpose of discrete field amplification region FFAR_3, such as conductors 712 and 713 for discrete field amplification region FFAR_1.

The color point, the discrete field amplification area, and the polarity of the switching element are indicated by a positive sign "+" and a negative sign "-". Therefore, in FIG. 7(a), the punctual polarity of the pixel design 710+, all switching elements (such as switching elements SE_1, SE_2, and SE_3) and all color points (such as color points CD_1_1, CD_1_2, CD_2_1, CD_2_2, CD_3_1 and CD_3_2) have positive polarity. However, all discrete field amplification regions (eg, discrete field amplification regions FFAR_1, FFAR_2, and FFAR_3) have negative polarity.

Figure 7(b) shows a pixel design 710 having a negative dot polarity pattern. For the negative dot polarity pattern, all switching elements (such as switching elements SE_1, SE_2, and SE_3) and all color points (such as color points CD_1_1, CD_1_2, CD_2_1, CD_2_2, CD_3_1, and CD_3_2) have negative polarity. However, all of the discrete field amplification regions (for example, the discrete field amplification regions FFAR_1, FFAR_2, and FFAR_3) have positive polarity.

As noted above, if adjacent elements have opposite polarities, the discrete fields at each color point will be amplified. The pixel design 710 utilizes discrete field amplification regions to enhance and stabilize the formation of multiple regions in the liquid crystal structure. In general, the polarity of the biased component is specified such that a color point of a first polarity has a second polarized adjacent polarized component. For example, for the pixel design 710 (shown in Figure 7(a)), the color point CD_2_2 has a positive polarity. However, the adjacent polarized elements (the discrete field amplification areas FFAR_2 and FFAR_1) have a negative polarity. Therefore, the discrete field of the color point CD_2_2 is amplified. Furthermore, as described below, the polarity inversion mode is also implemented in the display level such that the color points of other pixels adjacent to the color point CD_1_2 have a negative polarity (refer to FIG. 7(d)).

The pixels using the pixel design 710 of FIGS. 7(a) and 7(b) can be used in a display using the switching element column inversion mode. 7(d) shows a portion of the display 720, which uses the pixels P(0, 0), P(1, 0), P(0, 1), and P(1, 1) of the pixel design 710. The pixel design 710 has a switching element column inversion driving mode. Display 720 can have thousands of columns with thousands of pixels on each column. The columns and rows are continuous from the portion shown in Fig. 7(d) in the manner shown in Fig. 7(d). For clarity of explanation, the gate line and the source line of the control switching element are omitted in FIG. 7(d). The gate and source lines are depicted in Figure 4(e), except that the display 710 does not use discrete field amplification region switching elements and discrete field amplification region electrodes. In order to better illustrate each pixel in the figure, the area of each pixel is obscured. This shadowing is only for drawing purposes in Figure 7(d) and has no functional significance. In display 720, the pixels are configured such that all pixels in a column have the same dot polarity pattern (positive or negative), and each successive column should alternate between positive and negative dot polarity patterns. Therefore, the pixels P(0,0) and P(1,0) in the first column (column 0) have a punctual polarity pattern, and the pixels P(0,1) and P in the second column (column 1) (1,1) has a negative dot polarity pattern. However, in the next page frame, the pixel will switch the dot polarity pattern. Thus, in general, a pixel P(x, y) has a first dot polarity pattern when y is even and a second dot polarity pattern when y is odd.

The pixels on each pixel column are vertically aligned, and the rightmost color point of one pixel is separated from the leftmost color point of a neighboring pixel by a vertical dot pitch HDS1. The pixels on a line of pixels are horizontally aligned and separated by a vertical dot pitch VDS3.

As described above, the discrete field amplification region of the first pixel receives the polarity from the switching element of the second pixel. For example, the electrode of the discrete field amplification region FFAR_1 of the pixel P(0,0) is coupled to the conductor 712 via the pixel P(0,0) and the conductor 713 of the pixel P(0,1). Switching element SE_1 of pixel P(0,1). Similarly, the electrode of the discrete field amplification region FFAR_2 of the pixel P(0,0) is coupled to the conductor 715 via the pixel P of the pixel P(0,0) and the conductor 715 of the pixel P(0,1). Switching element SE_2 of prime (0, 1). Furthermore, the electrode of the discrete field amplification region FFAR_3 of the pixel P(0,0) is coupled to the conductor 717 via the conductor 716 of the pixel P(0,0) and the conductor 717 of the pixel P(0,1). Switching element SE_3 of prime (0, 1).

In a particular embodiment of the invention, each color point has a width of 40 microns and a height of 60 microns. Each discrete field amplification region has a vertical magnification width of 5 microns, a vertical magnification height of 155 microns, a horizontal magnification width of 45 microns, and a horizontal magnification height of 5 microns. The horizontal point spacing HDS1 is 15 microns, the vertical point spacing VDS1 is 15 microns, the vertical point spacing VDS2 is 15 microns, the vertical point spacing VDS3 is 5 microns, the horizontal discrete field amplification spacing HFFARS is 5 microns, and the vertical discrete field amplification spacing VFFARS is 5 microns.

The pixel design 710 can be easily adapted for use with a display having discrete field amplification area switching elements and discrete field amplification area electrodes. As shown in Figure 7(e), display 730 uses a modified pixel design 710 that omits conductors 712, 713, 714, 715, 716, and 717. In particular, FIG. 7(e) shows a portion of display 730 that uses pixels P(0,0), P(1,0), P(0,1), and P(1) of pixel design 710. , 1), and the pixel design 710 has a switching element column inversion driving mode. Display 730 can have thousands of columns with thousands of pixels on each column. The columns and rows are continuous from the portion shown in Fig. 7(e) in the manner shown in Fig. 7(e). For clarity of explanation, the gate line and source line of the control switching element are omitted in FIG. 7(e). Furthermore, in order to better illustrate each pixel in the figure, the area of each pixel is obscured. This masking is only for drawing purposes in Figure 7(e) and has no functional significance. In display 730, the pixels are configured such that all pixels in a column have the same dot polarity pattern (positive or negative), and each successive column should alternate between positive and negative dot polarity patterns. Therefore, the pixels P(0,0) and P(1,0) in the first column (column 0) have a punctual polarity pattern, and the pixels P(0,1) and P in the second column (column 1) (1,1) has a negative dot polarity pattern. However, in the next page frame, the pixel will switch the dot polarity pattern. Thus, in general, a pixel P(x, y) has a first dot polarity pattern when y is even and a second dot polarity pattern when y is odd.

The pixels on each pixel column are vertically aligned, and the rightmost color point of one pixel is separated from the leftmost color point of a neighboring pixel by a vertical dot pitch HDS1. The pixels on a line of pixels are horizontally aligned and separated by a vertical dot pitch VDS3.

For display 730, the discrete field amplification region of the pixels using pixel design 710 receives the correct polarity from outside the pixels. Thus, in display 730, each column of pixels has a corresponding discrete field amplification region switching element coupled to a discrete field amplifying electrode that extends through display 730. The discrete field amplification region of the pixel corresponding to the pixel sequence is coupled to the corresponding discrete field amplification electrode to receive the polarity from the discrete field amplification region switching component. Especially for column 0, the discrete field amplification area switching element FFARSE_0 is on the right side of the display 730. The discrete field amplification region electrode FFARE_0 is coupled to the discrete field amplification region switching element FFARSE_0 and extends through the display 730. The discrete field amplification region of the pixel of column 0 is coupled to the discrete field amplification region switching element FFARSE_0. In particular, the discrete field amplification regions of the pixels P(0, 0) and the pixels P(1, 0) are coupled to the discrete field amplification region switching element FFARSE_0. For column 1, the discrete field amplification region switching element FFARSE_1 is above the right side of the display 730. The discrete field amplification area electrode FFARE_1 is coupled to the discrete field amplification area switching element FFARSE_1 and extends through the display 730. The discrete field amplification region on the pixel of column 1 is coupled to the discrete field amplification region electrode FFARE_1. In particular, the discrete field amplification regions of the pixels P(0, 1) and the pixels P(1, 1) are coupled to the discrete field amplification region electrode FFARE_1. In FIG. 7(e), the discrete field amplification area switching elements FFARSE_0 and FFARSE_1 have negative polarity and positive polarity, respectively. However, in the next page box, the polarity is reversed. All of the discrete field amplification area switching elements can be placed on the same side of the display in certain embodiments of the invention.

Due to the polarity switching on each column of display 730, if a color point has a first polarity, then any of the biased elements adjacent thereto have a second polarity. For example, when the discrete field amplification area FFAR_3 of the pixel P(0, 1) and the discrete field amplification area FFAR_1 of the pixel P(1, 1) have positive polarity, the color point of the pixel P(1, 1) CD_1_1 has a negative polarity.

Certain embodiments of the present invention may enhance display 730 by including a left pixel design. In particular, the variation of the pixel design 730 of the pixel design 710 includes a first component discrete field amplification region including a left vertical magnification portion VAP_L extending along the left side of the color points CD_1_1 and CD_1_2.

8(a) and 8(b) show different dot polarity patterns of a pixel design 810 (numbers 810+ and 810-, which will be described later). This pixel design 810 is generally used to have a switching element array. Turn the drive mode on the display. In actual operation, a pixel will switch between a first dot polarity pattern and a second dot polarity pattern between each image frame. In particular, in FIG. 8(a), the pixel design 810 has a punctual polarity pattern (and is labeled 810+), and in FIG. 8(b), the pixel design 810 has a negative point polarity pattern (and is labeled 810). -). Furthermore, in the different pixel designs, the polarity of each polarized element is represented by "+" for positive polarity and "-" for negative polarity.

The pixel design 810 has three color components CC_1, CC_2, and CC_3. Each color component includes three color points. The pixel design 810 also includes a switching element (refer to SE_1, SE_2, and SE_3) of each color component and discrete field amplification regions (refer to FFAR_1, FFAR_2, and FFAR_3) in each color component. The switching elements SE_1, SE_2 and SE_3 are arranged in one column. The device component regions surrounding each of the switching elements are covered by discrete field amplification regions and are therefore not specifically labeled in Figures 8(a) and 8(b).

The first color component CC_1 of the pixel 810 has three color points CD_1_1, CD_1_2, and CD_1_3. The color points CD_1_1, CD_1_2, and CD_1_3 form a column. The color points CD_1_1 and CD_1_2 are spaced apart by a vertical dot pitch VDS1. The color points CD_1_2 and CD_1_3 are spaced apart by a vertical dot pitch VDS2. As shown in the connection between color points CD_1_1 and CD_1_2, in some embodiments of the invention, the electrodes of color points CD_1_1 and CD_1_2 are coupled together in the same processing steps as the formation of the electrodes. The switching element SE_1 is disposed between the color point CD_1_2 and the color point CD_1_3. The switching element SE_1 is coupled to the electrodes of the color points CD_1_1, CD_1_2, and CD_1_3 to control the voltage polarity and voltage amount of the color points CD_1_1, CD_1_2, and CD_1_3.

Similarly, the second color component CC_2 of the pixel 810 has three color points CD_2_1, CD_2_2, and CD_2_3. The color points CD_2_1, CD_2_2, and CD_2_3 form a column. The color points CD_2_1 and CD_2_2 are separated by a vertical dot pitch VDS1. The color points CD_2_2 and CD_2_3 are separated by a vertical dot pitch VDS2. As shown in the figure, the connections between the color points CD_2_1 and CD_2_2, in some embodiments of the invention, the electrodes of the color points CD_2_1 and CD_2_2 are coupled together in the same processing steps as the formation of the electrodes. The switching element SE_2 is disposed between the color point CD_2_2 and the color point CD_2_3. The switching element SE_2 is coupled to the electrodes of the color points CD_2_1, CD_2_2, and CD_2_3 to control the voltage polarity and voltage amount of the color points CD_2_1, CD_2_2, and CD_2_3. The second color component CC_2 is vertically aligned with the first color component CC_1 and separated from the first color component CC_1 by a horizontal dot pitch HDS1, so the color components CC_2 and CC_1 are offset by a horizontal dot offset HDD1. The horizontal point offset HDD1 is equal to the horizontal point spacing HDS1 plus the color point width CDW. In particular, as far as the color point is concerned, the color point CD_2_1 is vertically aligned with the color point CD_1_1 and horizontally separated by the horizontal dot pitch HDS1. Similarly, the color point CD_2_2 is vertically aligned with the color point CD_1_2 and horizontally separated by the horizontal dot pitch HDS1, and the color point CD_2_3 is vertically aligned with the color point CD_1_3 and horizontally separated by the horizontal dot pitch HDS1. Therefore, the color point CD_1_1 and the color point CD_2_1 form a first color point column, the color point CD_1_2 and the color point CD_2_2 form a second color point column, and the color point CD_1_3 and the color point CD_2_3 form a third color point column.

Similarly, the third color component CC_3 of the pixel 810 has three color points CD_3_1, CD_3_2, and CD_3_3. The color points CD_3_1, CD_3_2, and CD_3_3 form a column. The color points CD_3_1 and CD_3_2 are spaced apart by a vertical dot pitch VDS1. The color points CD_3_2 and CD_3_3 are spaced apart by a vertical dot pitch VDS2. As shown in the connection between the color points CD_3_1 and CD_3_2, in some embodiments of the invention, the electrodes of the color points CD_3_1 and CD_3_2 are coupled together in the same processing steps as the formation of the electrodes. The switching element SE_3 is disposed between the color point CD_3_2 and the color point CD_3_3. The switching element SE_3 is coupled to the electrodes of the color points CD_3_1, CD_3_2, and CD_3_3 to control the voltage polarity and voltage amount of the color points CD_3_1, CD_3_2, and CD_3_3. The third color component CC_3 is vertically aligned with the second color component CC_2, and is separated from the second color component CC_2 by a horizontal dot pitch HDS1, so the color components CC_3 and CC_2 are offset by a horizontal dot offset HDD1. The horizontal point offset HDD1 is equal to the horizontal point spacing HDS1 plus the color point width CDW. In particular, as far as the color point is concerned, the color point CD_3_1 is vertically aligned with the color point CD_2_1 and horizontally separated by the horizontal dot pitch HDS1. Similarly, the color point CD_3_2 is vertically aligned with the color point CD_2_2 and horizontally separated by the horizontal dot pitch HDS1, and the color point CD_3_3 is vertically aligned with the color point CD_2_3 and horizontally separated by the horizontal dot pitch HDS1. Therefore, the color point CD_3_1 is on the first color point column, the color point CD_3_2 is on the second color point column, and the color point CD_3_3 is on the third color point list.

The pixel design 810 also includes discrete field amplification regions FFAR_1, FFAR_2, and FFAR_3. Figure 8(c) is a more detailed view showing the discrete field amplification area FFAR_1 of the pixel design 810. For the sake of clarity, the discrete field amplification region FFAR_1 is conceptually divided into a vertical amplification portion VAP, a first horizontal amplification portion HAP_1, and a second horizontal amplification portion HAP_2. The horizontal amplifying portion HAP_1 is substantially downward from the top of the vertical amplifying portion VAP and extends to the left of the vertical amplifying portion VAP; the horizontal amplifying portion HAP_2 is substantially one-third from the vertical amplifying portion VAP The bottom is upward and extends to the left of the vertical magnification VAP. As described above, the use of the horizontal amplifying portion and the vertical amplifying portion allows a clearer description of the arrangement of the discrete field magnifying region FFAR_1. The horizontal amplification sections HAP_1 and HAP_2 have horizontal amplification section widths HAP_W_1 and HAP_W_2 and horizontal amplification section heights HAP_H_1 and HAP_H_2, respectively. In the particular embodiment of Figures 8(a)-8(d), the horizontal magnification portion width HAP_W_2 is less than the horizontal magnification portion width HAP_W_1. The vertical amplifying portion VAP has a vertical amplifying portion width VAP_W and a vertical amplifying portion height VAP_H. The discrete field amplification areas FFAR_2 and FFAR_3 are identical in shape to the discrete field amplification area FFAR_1.

As shown in FIG. 8(a), the discrete field amplification areas FFAR_1, FFAR_2, and FFAR_3 are disposed between the color points of the pixel design 810. In particular, the discrete field amplification region FFAR_1 is configured such that the horizontal amplification portion HAP_1 of the discrete field amplification region FFAR_1 is between the color points CD_1_1 and CD_1_2, and is separated by a vertical discrete field amplification region spacing VFFARS and the color point CD_1_1 CD_1_2 is separated. Due to the internal connection between the color points CD_1_1 and CD_1_2, the horizontal amplification portion HAP_1 of the discrete field amplification area FFAR_1 does not extend to the left end of the points CD_1_1 and CD_1_2. The vertical amplification portion VAP of the discrete field amplification region FFAR_1 is disposed to the right of the color points CD_1_1, CD_1_2, and CD_1_3, and is separated from the color points CD_1_1, CD_1_2, and CD_1_3 by a horizontal discrete field amplification region pitch HFFARS. The horizontal amplifying portion HAP_2 extends between the color point CD_1_2 and the color point CD_1_3. Therefore, the discrete field amplification area FFAR_1 extends along the right top of the color point CD_1_1, the top and bottom of the right side of the color point CD_1_2, and the top of the right side of the color point CD_1_3. Furthermore, this configuration also causes the vertical amplification portion of the discrete field amplification region FFAR_1 to be between the color points CD_1_1 and CD_2_1, between the color points CD_1_2 and CD_2_2, and between the color points CD_1_3 and CD_2_3.

Similarly, the discrete field amplification area FFAR_2 is set such that the horizontal amplification portion HAP_1 of the discrete field amplification area FFAR_2 is between the color points CD_2_1 and CD_2_2, and is separated by a vertical discrete field by the area spacing VFFARS and the color point CD_2_1 Separated from CD_2_2. Due to the internal connection between the color points CD_2_1 and CD_2_2, the horizontal amplification portion HAP_1 of the discrete field amplification region FFAR_2 does not extend to the left end of the color points CD_2_1 and CD_2_2. The vertical amplifying portion VAP of the discrete field amplifying area FFAR_2 is disposed to the right of the color points CD_2_1, CD_2_2, and CD_2_3, and is separated by a horizontal discrete field amplifying area pitch HFFARS. The horizontal amplifying portion HAP_2 extends between the color point CD_2_2 and the color point CD_2_3. Therefore, the discrete field amplification area FFAR_2 extends along the right bottom of the color point CD_2_1, the bottom right side of the color point CD_2_2, and the top right side of the color point CD_2_3. Furthermore, this configuration also causes the vertical amplification portion of the discrete field amplification region FFAR_2 to be between the color points CD_2_1 and CD_3_1, between the color points CD_2_2 and CD_3_2, and between the color points CD_2_3 and CD_3_3.

The discrete field amplification area FFAR_3 is set such that the horizontal amplification portion HAP_1 of the discrete field amplification area FFAR_3 is between the color points CD_3_1 and CD_3_2, and is separated by a vertical discrete field amplification area spacing VFFARS from the color points CD_3_1 and CD_3_2. Separate. Due to the internal connection between the color points CD_3_1 and CD_3_2, the horizontal amplification portion HAP_1 of the discrete field amplification area FFAR_3 does not extend to the left end of the color points CD_3_1 and CD_3_2. The vertical amplifying portion VAP of the discrete field amplifying area FFAR_3 is disposed to the right of the color points CD_3_1, CD_3_2, and CD_3_3, and is separated from the color points CD_3_1, CD_3_2, and CD_3_3 by a horizontal discrete field amplifying area pitch HFFARS. The horizontal amplifying portion HAP_3 extends between the color point CD_3_2 and the color point CD_3_3. Therefore, the discrete field amplification area FFAR_3 extends along the right bottom of the color point CD_3_1, the bottom right side of the color point CD_3_2, and the top right side of the color point CD_3_3. Furthermore, this configuration also causes the vertical amplification portion of the discrete field amplification region FFAR_3 to be between the color points CD_3_1 and CD_1_1 of the adjacent pixels, between the color points CD_3_2 and CD_1_2 of the adjacent pixels, and the color point CD_3_3 of the adjacent pixels. Between CD_1_3.

The pixel design 810 is also designed to allow the discrete field amplification region to receive polarity from a neighboring pixel. In particular, a pilot system is coupled to the discrete field amplification region to receive polarity from the pixels on the current pixel. In particular, a current pixel conductor 812 couples the electrodes of the discrete field amplification region FFAR_1 to the switching element SE_1 of the pixel on the current pixel (please refer to FIG. 8(d)). This connection to the switching element is via an electrode of the pixel color point on the current pixel. Similarly, a current pixel conductor 814 couples the electrodes of the discrete field amplification region FFAR_2 to the switching element SE_2 of the pixel on the current pixel (please refer to FIG. 8(d)). This connection to the switching element is via an electrode of the pixel color point on the current pixel. A current pixel conductor 816 couples the electrodes of the discrete field amplification region FFAR_3 to the switching element SE_3 of the pixel on the current pixel (please refer to FIG. 8(d)). This connection to the switching element is via an electrode of the pixel color point on the current pixel.

The color point, the discrete field amplification area, and the polarity of the switching element are indicated by a positive sign "+" and a negative sign "-". Therefore, in FIG. 8(a), the punctual polarity of the pixel design 810+, all switching elements (such as switching elements SE_1, SE_2, and SE_3) and all color points (such as color points CD_1_1, CD_1_2, CD_2_1, CD_2_2, CD_3_1 and CD_3_2) have positive polarity. However, all discrete field amplification regions (eg, discrete field amplification regions FFAR_1, FFAR_2, and FFAR_3) have negative polarity.

Figure 8(b) shows a pixel design 810 having a negative dot polarity pattern. For the negative dot polarity pattern, all switching elements (such as switching elements SE_1, SE_2, and SE_3) and all color points (such as color points CD_1_1, CD_1_2, CD_1_3, CD_2_1, CD_2_2, CD_2_3, CD_3_1, CD_3_2, and CD_3_3), It has a negative polarity. However, all of the discrete field amplification regions (for example, the discrete field amplification regions FFAR_1, FFAR_2, and FFAR_3) have positive polarity.

As noted above, if adjacent elements have opposite polarities, the discrete fields at each color point will be amplified. The pixel design 810 utilizes discrete field amplification regions to enhance and stabilize the formation of multiple regions in the liquid crystal structure. In general, the polarity of the biased component is specified such that a color point of a first polarity has a second polarized adjacent polarized component. For example, for the pixel design 810 (shown in Figure 8(a)), the color point CD_2_2 has a positive polarity. However, the adjacent polarized elements (the discrete field amplification areas FFAR_2 and FFAR_1) have a negative polarity. Therefore, the discrete field of the color point CD_2_2 is amplified. Furthermore, as described below, the polarity inversion mode is also implemented in the display level such that the color points of other pixels adjacent to the color point CD_1_1 have a negative polarity (refer to FIG. 8(d)).

The pixels using the pixel design 810 of FIGS. 8(a) and 8(b) can be used in a display using the switching element column inversion mode. 8(d) shows a part of the display 820, and the display 820 uses the pixels P(0, 0), P(1, 0), P(0, 1), and P(1, 1) of the pixel design 810. The pixel design 810 has a switching element column inversion driving mode. Display 820 can have thousands of columns with thousands of pixels on each column. The columns and rows are continuous from the portion shown in Fig. 8(d) in the manner shown in Fig. 8(d). For clarity of explanation, the gate line and source line of the control switching element are omitted in FIG. 8(d). The gate and source lines are depicted in Figure 4(e), except that the display 810 does not use discrete field amplification region switching elements and discrete field amplification region electrodes. In order to better illustrate each pixel in the figure, the area of each pixel is obscured. This masking is only for drawing purposes in Figure 8(d) and has no functional significance. In display 820, the pixels are configured such that all pixels in a column have the same dot polarity pattern (positive or negative), and each successive column should alternate between positive and negative dot polarity patterns. Therefore, the pixels P(0,0) and P(1,0) in the first column (column 0) have a punctual polarity pattern, and the pixels P(0,1) and P in the second column (column 1) (1,1) has a negative dot polarity pattern. However, in the next page frame, the pixel will switch the dot polarity pattern. Thus, in general, a pixel P(x, y) has a first dot polarity pattern when y is even and a second dot polarity pattern when y is odd.

The pixels on each pixel column are vertically aligned and horizontally separated so that the rightmost color point of one pixel is separated from the leftmost color point of a neighboring pixel by the horizontal dot pitch HDS1. . The pixels on a line of pixels are horizontally aligned and separated by a vertical dot pitch VDS3.

As described above, the discrete field amplification region of the first pixel receives the polarity from the switching element of the second pixel. For example, the electrode of the discrete field amplification region FFAR_1 of the pixel P(0,0) is coupled to the color point CD_1_3 of the pixel 812 and the pixel P(0,1) via the pixel P(0,0). The switching element SE_1 of the pixel P (0, 1) of the electrode. Similarly, the electrode of the discrete field amplification region FFAR_2 of the pixel P(0,0) is coupled to the color point CD_2_3 electrode via the conductor 814 of the pixel P(0,0) and the pixel P(0,1). The switching element SE_2 of the pixel (0, 1). Furthermore, the electrode of the discrete field amplification region FFAR_3 of the pixel P(0,0) is coupled to the color point CD_1_3 electrode via the conductor 816 of the pixel P(0,0) and the pixel P(0,1). The switching element SE_3 of the pixel (0, 1).

The variation of the pixel design 810, such as the bottom edge pixel design, the top edge pixel design, the left pixel design, the top left corner pixel design, and the bottom left corner pixel design, can be used to use the modified discrete field magnification. region. For example, the top horizontal magnification can be attached to the pixels at the top edge of the display, the bottom horizontal magnification can be attached to the pixels at the bottom edge of the display, and the left vertical magnification can be attached to the pixels at the left edge of the display. These variations use similar means of display 450 and display 460 as described above.

In a particular embodiment of the invention using pixel design 810, each color point has a width of 40 microns and a height of 60 microns. Each discrete field amplification region has a vertical amplifying portion width of 5 microns, a vertical amplifying portion height of 220 microns, a horizontal amplifying portion width HAP_W_1 of 45 microns, and a horizontal amplifying portion width HAP_W_2 of 5 microns. The horizontal point spacing HDS1 is 15 microns, the vertical point spacing VDS1 is 15 microns, the vertical point spacing VDS2 is 25 microns, the vertical point spacing VDS3 is 5 microns, the horizontal discrete field amplification area spacing HFFARS is 5 microns, vertical dispersion The field amplification area spacing VFFARS is 5 microns.

The pixel design 910 has three color components CC_1, CC_2, and CC_3. Each color component includes two color points. The pixel design 910 also includes a switching element (refer to SE_1, SE_2, and SE_3) of each color component and discrete field amplification regions (refer to FFAR_1, FFAR_2, and FFAR_3) in each color component. The switching elements SE_1, SE_2 and SE_3 are arranged in one column. The device component regions DCA_1, DCA_2, and DCA_3 are defined around the switching elements SE_1, SE_2, and SE_3. The device component regions DCA_1, DCA_2, and DCA_3 have a device component region height DCAH and a device component region width DCAW.

The first color component CC_1 of the pixel 910 has two color points CD_1_1 and CD_1_2. The color points CD_1_1 and CD_1_2 form a column with a vertical dot pitch VDS1 therebetween. In other words, the color points CD_1_1 and CD_1_2 are horizontally aligned and vertically spaced by the vertical dot pitch VDS1. Furthermore, the color points CD_1_1 and CD_1_2 are vertically offset by a vertical dot offset VDO1, and the vertical dot offset VDO1 is equal to the vertical dot pitch VDS1 plus the color point height CDH. As shown in the connection between color points CD_1_1 and CD_1_2, in some embodiments of the invention, the electrodes of color points CD_1_1 and CD_1_2 are coupled together in the same processing steps as the formation of the electrodes. The device element region DCA_1 is disposed below the color point CD_1_2 and is spaced apart from the color point CD_1_2 by a vertical dot pitch VDS2. The switching element SE_1 is disposed in the device element region DCA_1. The switching element SE_1 is coupled to the electrodes of the color points CD_1_1 and CD_1_2 to control the voltage polarity and voltage amount of the color points CD_1_1 and CD_1_2.

The second color component CC_2 of the pixel 910 has two color points CD_2_1 and CD_2_2. The color points CD_2_1 and CD_2_2 form a second column with a vertical dot pitch VDS1 therebetween. Therefore, the color points CD_2_1 and CD_2_2 are horizontally aligned and vertically spaced by the vertical dot pitch VDS1. The device element region DCA_2 is disposed below the color point CD_2_2 and is spaced apart from the color point CD_2_2 by a vertical dot pitch VDS2. The switching element SE_2 is disposed in the device element region DCA_2. The switching element SE_2 is coupled to the electrodes of the color points CD_2_1 and CD_2_2 to control the voltage polarity and voltage of the color points CD_2_1 and CD_2_2. The second color component CC_2 is vertically aligned with the first color component CC_1 and is spaced apart from the color component CC_1 by the horizontal dot pitch HDS1, so the color components CC_2 and CC_1 are horizontally offset by a horizontal dot offset amount HDO1, and The horizontal point offset HDD1 is equal to the horizontal dot pitch HDS1 plus the color dot width CDW. In particular, regarding the color point, the color point CD_2_1 is vertically aligned with the color point CD_1_1, and is spaced apart from each other by the horizontal dot pitch HDS1. Similarly, the color point CD_2_2 is vertically aligned with the color point CD_2_1 and spaced apart from each other by the horizontal dot pitch HDS1. Therefore, the color point CD_1_1 and the color point CD_2_1 form a first column of color points, and the color point CD_1_2 and the color point CD_2_2 form a second column of color points.

Similarly, the third color component CC_3 of the pixel 910 has two color points CD_3_1 and CD_3_2. The color points CD_3_1 and CD_3_2 form a third column with a vertical dot pitch VDS1 therebetween. Therefore, the color points CD_3_1 and CD_3_2 are horizontally aligned and vertically spaced by the vertical dot pitch VDS1. The device element region DCA_3 is disposed below the color point CD_3_2 and is spaced apart from the color point CD_3_2 by a vertical dot pitch VDS2. The switching element SE_3 is disposed within the device component area DCA_3. The switching element SE_3 is coupled to the electrodes of the color points CD_3_1 and CD_3_2 to control the voltage polarity and voltage amount of the color points CD_3_1 and CD_3_2. The third color component CC_3 is vertically aligned with the second color component CC_2 and is spaced apart from the color component CC_2 by the horizontal dot pitch HDS1, and thus the color components CC_3 and CC_2 are horizontally cancelled by a horizontal dot offset amount HDO1. In particular, regarding the color point, the color point CD_3_1 is vertically aligned with the color point CD_2_1, and is spaced apart from each other by the horizontal dot pitch HDS1. Similarly, the color point CD_3_2 is vertically aligned with the color point CD_2_2 and is horizontally spaced by the horizontal dot pitch HDS1. Therefore, the color point CD_3_1 forms the first column of the color point, and the color point CD_3_2 forms the second column of the color point.

The pixel design 910 also includes discrete field amplification regions FFAR1, FFAR_2, and FFAR_3. Figure 9(c) is a more detailed view showing the discrete field amplification area FFAR_1 of the pixel design 910. For the sake of clarity, the discrete field amplification region FFAR_1 is conceptually divided into a first vertical amplification portion VAP_1, a second vertical amplification portion VAP_2, a first horizontal amplification portion HAP_1, a second horizontal amplification portion HAP_2, and a third level. Amplification section HAP_3. The direct amplification portions VAP_1 and VAP_2 are vertically aligned and horizontally spaced by the length of the horizontal amplification portion HAP_1. The horizontal amplifying portion HAP_1 is disposed at the top and extends between the vertical amplifying portions VAP_1 and VAP_2. The horizontal amplifying portion HAP_2 is vertically disposed at the center and extends to the left of the vertical amplifying portion VAP_1. The horizontal amplifying portion HAP_3 is disposed at the bottom and extends between the vertical amplifying portions VAP_1 and VAP_2. As described above, the use of the horizontal amplifying portion and the vertical amplifying portion allows a clearer description of the arrangement of the discrete field magnifying region FFAR_1. The horizontal amplification sections HAP_1, HAP_2, and HAP_3 have horizontal amplification section widths HAP_W_1, HAP_W_2, and HAP_W_3, and horizontal amplification section heights HAP_H_1, HAP_H_2, and HAP_H_3, respectively. In the specific embodiment of FIGS. 9(a)-9(d), the horizontal amplification portion widths HAP_W_1 and HAP_W_2 are equal, and the horizontal amplification portion width HAP_W_2 is smaller than the horizontal amplification portion widths HAP_W_1 and HAP_W_3. The vertical amplifying portions VAP_1 and VAP_2 respectively have vertical amplifying portion widths VAP_W_1 and HAP_W_2, and vertical amplifying portion heights VAP_H_1 and VAP_H_2. The discrete field amplification areas FFAR_2 and FFAR_3 are identical in shape to the discrete field amplification area FFAR_1.

As shown in FIG. 9(a), the discrete field amplification areas FFAR_1, FFAR_2, and FFAR_3 respectively surround the color components CC_1, CC_2, and CC_3. In particular, the discrete field amplification region FFAR_1 is configured such that the horizontal amplification portion HAP_2 of the discrete field amplification region FFAR_1 is located between the color points CD_1_1 and CD_1_2, and is separated by a vertical discrete field amplification region spacing VFFARS and the color point CD_1_1 CD_1_2 is separated. Due to the internal connection between the color points CD_1_1 and CD_1_2, the horizontal amplification portion HAP_2 of the discrete field amplification area FFAR_1 does not extend to the left end of the color points CD_1_1 and CD_1_2. The vertical amplification portion VAP_1 of the discrete field amplification region FFAR_1 is disposed to the right of the color points CD_1_1 and CD_1_2, and is separated from the color points CD_1_1 and CD_1_2 by a horizontal discrete field amplification region pitch HFFARS. The vertical amplifying portion VAP_2 of the discrete field amplifying area FFAR_1 is disposed to the left of the color points CD_1_1 and CD_1_2, and is separated from the color points CD_1_1 and CD_1_2 by a horizontal discrete field amplifying area pitch HFFARS. The horizontal amplifying portion HAP_1 extends above the color point CD_1_1, and the horizontal amplifying portion HAP_3 extends below the color point CD_1_2. Therefore, the discrete field amplification area FFAR_1 extends along the right side, the left side, the top, and the bottom of the color point CD_1_1 and the color point CD_1_2.

Similarly, the discrete field amplification area FFAR_2 is set such that the horizontal amplification portion HAP_2 of the discrete field amplification area FFAR_2 is located between the color points CD_2_1 and CD_2_2, and is separated by a vertical discrete field amplification area spacing VFFARS. Due to the internal connection between the color points CD_2_1 and CD_2_2, the horizontal amplification portion HAP_2 of the discrete field amplification region FFAR_2 does not extend to the left end of the color points CD_2_1 and CD_2_2. The vertical amplifying portion VAP_1 of the discrete field amplifying area FFAR_2 is disposed on the right side of the color points CD_2_1 and CD_2_2, and is separated by a horizontal discrete field amplifying area pitch HFFARS. The vertical amplifying portion VAP_2 of the discrete field amplifying area FFAR_2 is disposed to the left of the color points CD_2_1 and CD_2_2, and is separated by a horizontal discrete field amplifying area pitch HFFARS. The horizontal amplifying portion HAP_2 extends above the color point CD_2_1, and the horizontal amplifying portion HAP_3 extends below the color point CD_2_2. Therefore, the discrete field amplification area FFAR_2 extends along the right side, the left side, the top, and the bottom of the color point CD_2_1 and the color point CD_2_2.

The discrete field amplification area FFAR_3 is set such that the horizontal amplification portion HAP_2 of the discrete field amplification area FFAR_3 is located between the color points CD_3_1 and CD_3_2, and is separated by a vertical discrete field amplification area spacing VFFARS. Due to the internal connection between the color points CD_3_1 and CD_3_2, the horizontal amplification portion HAP_3 of the discrete field amplification area FFAR_3 does not extend to the left end of the color points CD_3_1 and CD_3_2. The vertical amplifying portion VAP_1 of the discrete field amplifying area FFAR_3 is disposed to the right of the color points CD_3_1 and CD_3_2, and is separated from the color points CD_3_1 and CD_3_2 by a horizontal discrete field amplifying area pitch HFFARS. The vertical amplifying portion VAP_2 of the discrete field amplifying area FFAR_3 is disposed to the left of the color points CD_3_1 and CD_3_2, and is separated from the color points CD_3_1 and CD_3_2 by a horizontal discrete field amplifying area pitch HFFARS. The horizontal amplifying portion HAP_1 extends above the color point CD_3_1, and the horizontal amplifying portion HAP_3 extends below the color point CD_3_2. Therefore, the discrete field amplification area FFAR_3 extends along the right side, the left side, the top, and the bottom of the color point CD_3_1 and the color point CD_3_2.

The pixel design 910 is also designed to allow the discrete field amplification region to receive polarity from a neighboring pixel. In particular, a first conduction system is coupled to the discrete field amplification region to receive polarity from a pixel on the current pixel, and a second conduction system is coupled to the switching element to provide polarity to the current pixel. The discrete field magnified area of the pixel. For example, the conductor 912 coupled to the electrode of the discrete field amplification region FFAR_1 is a conductor 913 extending upwardly connected to the pixel on the current pixel to receive the polarity (please refer to FIG. 9(d)). It is coupled to the switching element SE_1 conductor 913 and extends downwardly to the conductor 912 connected to the pixel under the current pixel. The conductors 914 and 915 are suitable for the purpose of the discrete field amplification region FFAR_2, such as conductors 912 and 913 for the discrete field amplification region FFAR_1. Furthermore, conductors 916 and 917 are suitable for the purpose of discrete field amplification region FFAR_3, such as conductors 912 and 913 for discrete field amplification region FFAR_1.

The color point, the discrete field amplification area, and the polarity of the switching element are indicated by a positive sign "+" and a negative sign "-". Therefore, in FIG. 9(a), the punctual polarity of the pixel design 910+, all switching elements (such as switching elements SE_1, SE_2, and SE_3) and all color points (such as color points CD_1_1, CD_1_2, CD_2_1, CD_2_2, CD_3_1 and CD_3_2) have positive polarity. However, all discrete field amplification regions (eg, discrete field amplification regions FFAR_1, FFAR_2, and FFAR_3) have negative polarity.

Figure 9(b) shows a pixel design 910 having a negative dot polarity pattern. For the negative dot polarity pattern, the switching elements SE_1 and SE_3, the color points CD_1_1, CD_1_2, CD_3_1 and CD_3_2, and the discrete field amplification area FFAR_2 have negative polarity. However, the switching element SE_2, the color points CD_2_1 and CD_2_2, and the discrete field amplification areas FFAR_1 and FFAR_3 have positive polarity.

As noted above, if adjacent elements have opposite polarities, the discrete fields at each color point will be amplified. The pixel design 910 utilizes discrete field amplification regions to enhance and stabilize the formation of multiple regions in the liquid crystal structure. In general, the polarity of the biased component is specified such that a color point of a first polarity has a second polarized adjacent polarized component. More specifically for the pixel design 910, each color point is on four sides of a portion of the discrete field amplification region of opposite polarity. For example, for the punctual polarity pattern of the pixel design 910 (shown in FIG. 9(a)), the color point CD_1_2 has a positive polarity and is surrounded by a discrete field amplification region FFAR_1 having a negative polarity. Therefore, the discrete field of the color point CD_1_2 is amplified.

The pixels using the pixel design 910 of FIGS. 9(a) and 9(b) can be used in a display using the switching element dot inversion mode. Figure 9(d) shows a portion of display 920, which uses pixels P(0,0), P(1,0), P(0,1), and P(1,1) of pixel design 910. The pixel design 910 has a switching element dot inversion driving mode. Display 920 can have thousands of columns with thousands of pixels on each column. The columns and rows are continuous from the portion shown in Fig. 9(d) in the manner shown in Fig. 9(d). For clarity of explanation, the gate line and source line of the control switching element are omitted in FIG. 9(d). In order to better illustrate each pixel in the figure, the area of each pixel is obscured. This shadowing is only for drawing purposes in Figure 9(d) and has no functional significance. In display 920, the pixels are configured such that the pixels in one column alternate dot patterns (positive or negative), and the pixels in one row alternate between positive and negative dot polar patterns. Therefore, the pixels P(0, 0) and P(1, 1) have a punctual polarity pattern, and the pixels P(0, 1) and P(1, 0) have a negative dot polarity pattern. However, in the next page frame, the pixel will switch the dot polarity pattern. Thus, in general, a pixel P(x, y) has a first dot polarity pattern when x+y is even, and a second dot polarity pattern when x+y is odd. The pixels on each pixel column are vertically aligned and horizontally separated such that the rightmost color point of the pixel is separated from the leftmost color point of the adjacent pixel by the horizontal dot pitch HDS1. The pixels in a picture line are horizontally aligned and spaced apart from each other by a vertical dot pitch VDS3.

As described above, the discrete field amplification region of the first pixel receives the polarity from the switching element of the second pixel. For example, the electrode of the discrete field amplification region FFAR_1 of the pixel P(0, 0) is coupled to the conductor 912 via the pixel P (0, 0) and the conductor 913 of the pixel P (0, 1). Switching element SE_1 of pixel P(0,1). Similarly, the electrode of the discrete field amplification region FFAR_2 of the pixel P(0,0) is coupled to the conductor 914 via the conductor 914 of the pixel P(0,0) and the conductor 915 of the pixel P(0,1). Switching element SE_2 of prime (0, 1). Furthermore, the electrode of the discrete field amplification region FFAR_3 of the pixel P(0,0) is coupled to the conductor 917 via the pixel P(0,0) and the conductor 917 of the pixel P(0,1). Switching element SE_3 of prime (0, 1).

In a particular embodiment of the invention, each color point has a width of 40 microns and a height of 60 microns. Each discrete field amplification region has a vertical magnification width of 5 microns, a vertical magnification height of 155 microns, a horizontal magnification width of 45 microns, and a horizontal magnification height of 5 microns. The horizontal point spacing HDS1 is 15 microns, the vertical point spacing VDS1 is 15 microns, the vertical point spacing VDS2 is 15 microns, the vertical point spacing VDS3 is 5 microns, the horizontal discrete field amplification spacing HFFARS is 5 microns, and the vertical discrete field amplification spacing VFFARS is 5 microns.

The pixel design 910 can be easily adapted for use with a display having discrete field amplification area switching elements and discrete field amplification area electrodes. As shown in Figure 9(e), display 930 uses a modified pixel design 910 that omits conductors 912, 913, 914, 915, 916, and 917. In particular, FIG. 9(e) shows a portion of the display 930 which uses the pixels P(0, 0), P(1, 0), P(0, 1), and P(1) of the pixel design 910. , 1), and the pixel design 910 has a switching element column inversion driving mode. Display 930 can have thousands of columns with thousands of pixels on each column. The columns and rows are continuous from the portion shown in Fig. 9(e) in the manner shown in Fig. 9(e). For clarity of explanation, the gate line and source line of the control switching element are omitted in FIG. 9(e). Furthermore, in order to better illustrate each pixel, each region of the pixel is obscured. This masking is only for drawing purposes in Figure 9(e) and has no functional significance. In display 930, the pixels are configured such that the pixels in one column alternate dot patterns (positive or negative), and the pixels on one line alternate between positive and negative dot polar patterns. Therefore, the pixels P(0, 0) and P(1, 1) have a punctual polarity pattern, and the pixels P(0, 1) and P(1, 0) have a negative dot polarity pattern. However, in the next page frame, the pixel will switch the dot polarity pattern. Thus, in general, a pixel P(x, y) has a first dot polarity pattern when x+y is even, and a second dot polarity pattern when x+y is odd.

The pixels on each pixel column are vertically aligned and horizontally separated so that the rightmost color point of one pixel is separated from the leftmost color point of a neighboring pixel by the horizontal dot pitch HDS1. . The pixels on a line of pixels are horizontally aligned and separated by a vertical dot pitch VDS3.

For display 930, the discrete field amplification region of the pixel of pixel design 910 is used to receive the correct polarity from outside the pixel. Furthermore, the discrete field amplification region in the pixel has both positive and negative polarities. Thus, in display 930, each column of pixels has two corresponding discrete field amplification region switching elements, each coupled to one of the discrete field amplification electrodes extending through one of display 930. The discrete field amplification region of the pixel in the corresponding pixel column is coupled to a suitable discrete field amplifying electrode to receive the polarity from the discrete field amplification region switching element. In particular, for column 0, the discrete field amplification area switching elements FFARSE_0_1 and FFARSE_0_2 are on the left side of the display 930. The discrete field amplification electrode FFARE_0_1 is coupled to the discrete field amplification region switching element FFARSE_0_1 and extends through the display 930. The discrete field amplifying electrode FFARE_0_2 is coupled to the discrete field amplification region switching element FFARSE_0_2 and extends through the display 930. As shown in FIG. 9(e), the discrete field amplification region FFAR_2 of the pixel P(0, 0) and the discrete field amplification regions FFAR_1 and FFAR_3 of the pixel P(1, 0) are coupled to the discrete field amplification electrode. FFARE_0_1. Conversely, the discrete field amplification regions FFAR_1 and FFAR_3 of the pixel P(0,0) and the discrete field amplification region FFAR_2 of the pixel P(1,0) are coupled to the discrete field amplification electrode FFARE_0_2. As shown in FIG. 9(e), the discrete field amplification area switching element FFARSE_0_1 has a positive polarity, and the discrete field amplification area switching element FFARSE_0_2 has a negative polarity. However, in the next page box, the polarity is switched.

For column 1, the discrete field amplification region switching elements FFARSE_1_1 and FFARSE_1_2 are on the right side of the display 930. However, in an embodiment of the invention, the discrete field amplification region switching elements are all on the same side of the display. The discrete field amplification area electrode FFARE_1_1 is coupled to the discrete field amplification area switching element FFARSE_1_1 and extends through the display 930. The discrete field amplifying electrode FFARE_1_2 is coupled to the discrete field amplification region switching element FFARSE_1_2 and extends through the display 930. As shown in FIG. 9(e), the discrete field amplification region FFAR_2 of the pixel P(0, 0) and the discrete field amplification regions FFAR_1 and FFAR_3 of the pixel P(1, 0) are coupled to the discrete field amplification electrode. FFARE_1_1. Conversely, the discrete field amplification regions FFAR_1 and FFAR_3 of the pixel P(0,1) and the discrete field amplification region FFAR_2 of the pixel P(1,1) are coupled to the discrete field amplification electrode FFARE_1_2. As shown in FIG. 9(e), the discrete field amplification area switching element FFARSE_1_1 has a positive polarity, and the discrete field amplification area switching element FFARSE_1_2 has a negative polarity. However, in the next page box, the polarity is switched.

Figures 10(a) and 10(b) show the positive and negative dot polarity patterns of a pixel design 1010. The layout of the pixel design 1010 is very similar to the pixel design 910 (shown in Figures 9(a) and 9(b)). Therefore, for the sake of simplicity, only the differences therebetween will be described. In particular, in the pixel design 1010, the color component and the discrete field amplification region are in the same position as the pixel design 910. Furthermore, the switching elements SE_1 and SE_3 and the device element areas DCA_1 and DCA_3 are also in the same position as the pixel design 910. However, in the pixel design 1010, the switching element SE_2 and the device element region DCA_2 are tied above the color component CC_2 and the discrete field amplification region FFAR_2. Therefore, unlike the previous pixel design, the switching elements of the pixel design 1010 are in multiple columns. In particular, the color components of the pixel design 1010 are aligned in a straight line, the switching elements SE_1 and SE_3 are positioned on a first side of the line, and the switching element SE_2 is positioned on a second side of the line. As mentioned above, each column of switching elements is coupled to a single gate line. Furthermore, only one gate line will be activated during a time. Therefore, for the pixel design 1010, the switching element SE_2 is activated at different times with respect to the switching elements SE_1 and SE_2. U.S. Patent Application Serial No. 11/751,469, entitled "Low Cost Switching Element Point Inversion Driving Scheme for Liquid Crystal Displays", which is filed by the inventor, Hiap L. Ong, is incorporated herein by reference. Reference is hereby incorporated by reference.

In the punctual polarity pattern of the pixel design 1010+ as shown in FIG. 10(a), the color components CC_1 (such as color points CD_1_1 and CD_1_2), the color components CC_3 (such as color points CD_3_1 and CD_3_2), and the discrete field amplification area FFAR_2 And the switching elements SE_1 and SE_3 have positive polarity. The color components CC_2 (such as color points CD_2_1 and CD_2_2), the discrete field amplification areas FFAR_1 and FFAR_3, and the switching element SE_2 have negative polarity. In the negative point polarity pattern of the pixel design 1010- as shown in FIG. 10(b), color components CC_1 (such as color points CD_1_1 and CD_1_2), color components CC_3 (such as color points CD_3_1 and CD_3_2), and discrete field amplification regions FFAR_2 and switching elements SE_1 and SE_3 have a negative polarity. The color components CC_2 (such as color points CD_2_1 and CD_2_2), the discrete field amplification areas FFAR_1 and FFAR_3, and the switching element SE_2 have positive polarity.

Figures 10(c) and 10(d) show the positive and negative dot polarity patterns of a pixel design 1020. The layout of the pixel design 1020 is very similar to the pixel design 910 (shown in Figures 9(a) and 9(b)). Therefore, for the sake of simplicity, only the differences therebetween will be described. In particular, in the pixel design 1020, the color component and the discrete field amplification region are in the same position as the pixel design 910. Furthermore, the switching element SE_2 and the device element area DCA_2 are also positioned at the same position as the pixel design 910. However, in the pixel design 1020, the switching elements SE_1 and SE_3 and the device element regions DCA_1 and DCA_3 are respectively located above the color component CC_2 (and the discrete field amplification region FFAR_1) and the color component CC_3 (and the discrete field amplification region FFAR_3). . Therefore, unlike the pixel design 1010, the switching elements of the pixel design 1020 are in multiple columns. In the punctual polarity pattern of the pixel design 1020+ as shown in FIG. 10(c), the color components CC_1 (such as color points CD_1_1 and CD_1_2), the color components CC_3 (such as color points CD_3_1 and CD_3_2), and the discrete field amplification area FFAR_2 And the switching elements SE_1 and SE_3 have positive polarity. The color components CC_2 (such as color points CD_2_1 and CD_2_2), the discrete field amplification areas FFAR_1 and FFAR_3, and the switching element SE_2 have negative polarity. In the negative point polarity pattern of the pixel design 1010- as shown in FIG. 10(d), color components CC_1 (such as color points CD_1_1 and CD_1_2), color components CC_3 (such as color points CD_3_1 and CD_3_2), and discrete field amplification regions FFAR_2 and switching elements SE_1 and SE_3 have a negative polarity. The color components CC_2 (such as color points CD_2_1 and CD_2_2), the discrete field amplification areas FFAR_1 and FFAR_3, and the switching element SE_2 have positive polarity.

Figure 10(e) shows a portion of display 1050 that includes pixels using pixel design 1010 and pixel design 1020. For the sake of clarity, the gate and source lines that are powered to the switching elements in Figure 10(e) are omitted. In order to better illustrate each pixel in the figure, the area of each pixel is obscured. This masking is only for drawing purposes in Figure 10(e) and has no functional significance. Display 1050 has alternating pixels of pixel design 1010 and pixel design 1020. For example, in column 0, pixel P(0,0) uses pixel design 1010, while pixel P(1,0) uses pixel design 1020. The pixel P(2,0) (not shown) uses the pixel design 1010. Similarly, in column 1, the pixel P(0,1) uses the pixel design 1010, while the pixel P(1,1) uses the pixel design 1020. The pixel P(2,1) (not shown) uses the pixel design 1010. The pixels in one of the columns of the display 1050 are vertically aligned, and are horizontally spaced apart by a horizontal dot pitch HDS1 (not shown in FIG. 10(e)).

In a pixel list, the color components of the pixels are horizontally aligned. However, the device element regions of the pixels are interleaved horizontally. In particular, the top device component regions (and switching elements) in the first column are perpendicular to the bottom device component regions (and switching elements) in the second column (located above the first column). Ground alignment. For example, the device element region DCA_2 of the pixel P(0, 0) is vertically aligned with the device element regions DCA_1 and DCA_3 of the pixel P(0, 1). Furthermore, the device element region DCA_2 of the pixel P(0, 0) is located between the device element regions DCA_1 and DCA_3 of the pixel P(0, 1).

The pixels in each column alternate between a pattern having a punctual polarity and a pattern having a negative polarity. Therefore, for example, on column 0, the pixel P(0, 0) has a punctual polarity pattern, and the pixel P(0, 1) has a negative dot polarity pattern. Similarly, on column 1, the pixel P(1,0) has a punctual polarity pattern, and the pixel P(1,1) has a negative dot polarity pattern. Furthermore, the pixels in each column alternate between a pattern having a positive dot polarity and a pattern having a negative dot polarity. Therefore, for example, on column 0, the pixel P(0, 0) has a punctual polarity pattern, and the pixel P(0, 1) has a negative dot polarity pattern. Similarly, on column 1, the pixel P(1,0) has a punctual polarity pattern, and the pixel P(1,1) has a negative dot polarity pattern. In general, the pixels P(X, Y) in the display 1050 use the pixel design 1010 when X is an even number and the pixel design 1020 when X is an odd number. Furthermore, when X+Y is an even number, the pixel P(X, Y) has a first polarity; when X+Y is an odd number, the pixel P(X, Y) has a second polarity. Due to the nature of the pixel design, each of the switching element columns in display 1050 has the same polarity. The display 1050 therefore uses the switching element column inversion drive mode. In a particular embodiment of the invention, each color point has a width of 43 microns and a height of 49 microns. Each associated point has a width of 43 microns and a height of 39 microns. The horizontal and vertical dot spacing is 4 microns.

As shown in Figure 10(e), using the pixel design described above, the color points of display 1050 have opposite polarities as compared to adjacent polarized elements. Thus, the discrete field lines in each color point are amplified to produce multiple liquid crystal domains.

11(a) and 11(b) show different dot polarity patterns of a pixel design 1110 (numbers 1110+ and 1110- described later). This pixel design 610 is generally used to have a switching element point inverse. Turn the drive mode on the display. In actual operation, a pixel will switch between a first dot polarity pattern and a second dot polarity pattern between each image frame. In particular, in Fig. 11(a), the pixel design 1110 has a punctual polarity pattern (hence the label is 1110+), and in Fig. 11(b), the pixel design 1110 has a negative point polarity pattern (hence the label is 1110) -). Furthermore, in the different pixel designs, the polarity of each polarized element is represented by "+" for positive polarity and "-" for negative polarity.

The pixel design 1110 has three color components CC_1, CC_2, and CC_3. Each color component includes eight color dots. A large number of color points in each color component makes the pixel design 1110 more suitable for use in large screen displays. The pixel design 1110 also includes a switching element (refer to SE_1, SE_2, and SE_3) of each color component and discrete field amplification regions (refer to FFAR_1, FFAR_2, and FFAR_3) in each color component. The switching elements SE_1, SE_2 and SE_3 are arranged in one column. The device component regions DCA_1, DCA_2, and DCA_3 are defined around the switching elements SE_1, SE_2, and SE_3. The device component regions DCA_1, DCA_2, and DCA_3 have a device component region height DCAH and a device component region width DCAW.

The eight color point of the first color component CC_1 of the pixel design 1110 is arranged in a matrix having two rows of four color points. The two columns are vertically aligned so that the eight color dots also form four color point columns. The color point lines are separated by a first horizontal dot pitch HDS1. Each of the vertically adjacent color points in a column is spaced apart from each other by a first vertical dot pitch VDS1. In particular, in the first color point sequence, the color point CD_1_1 is above the color point CD_1_2, and the color point CD_1_2 is above the color point CD_1_3, and the color point CD_1_3 is above the color point CD_1_4. In the second color point column on the right side of the first color point column and spaced apart from the first color point column by the horizontal dot pitch HDS1, the color point CD_1_5 is above the color point CD_1_6, and the color point CD_1_6 is in the color point CD_1_7 Above, and the color point CD_1_7 is above the color point CD_1_8. (As described above, in the mark of "color point CD_X_Y", when Y specifies that the color point is within the color component CC_X, then X specifies the color component CC_X in one pixel.) Except for the color points CD_1_1 and CD_1_5 In addition to the spacing between the dots, the color points are electrically coupled along the outer edge of the matrix of color points. In particular, the bottom right corner of the color point CD_1_5 is coupled to the top right corner of the color point CD_1_6; the bottom right corner of the color point CD_1_6 is connected to the top right corner of the color point CD_1_7; the bottom right corner of the color point CD_1_7 is The top right corner of the color point CD_1_8 is received; the bottom left corner of the color point CD_1_8 is connected to the bottom right corner of the color point CD_1_4; the top left corner of the color point CD_1_4 is connected to the bottom left corner of the color point CD_1_3; The top left corner of CD_1_3 is connected to the bottom left corner of the color point CD_1_2; and the top left corner of the color point CD_1_2 is connected to the bottom left corner of the color point CD_1_1. In order to reduce the manufacturing cost, the connection between the color point and the color point can be formed by a single metal process. However, certain embodiments of the present invention may use process steps to form color points and coupling color points. Moreover, some embodiments are capable of coupling color points of color components at different locations.

The device element region DCA_1 disposed under the color point CD_1_4 and the color point CD_1_8 is spaced apart from the color point CD_1_4 by the color point CD_1_4 by the vertical dot pitch VDS2. The switching element SE_1 is disposed in the device element region DCA_1. The switching element SE_1 is coupled to the electrodes of the color point of the color component CC_1 (ie, the color points CD_1_1, CD_1_2, CD_1_3, CD_1_4, CD_1_5, CD_1_6, CD_1_7, and CD_1_8) to control the voltage polarity and voltage amount of the color point of the color component CC_1. . In some embodiments of the invention, the color point may overlap with the device component area.

Similarly, the second color component CC_2 of the pixel design 1110 also has eight color points, and the eight color points are arranged in a matrix having two rows of four color points. The two columns are vertically aligned so that the eight color dots also form four color point columns. In particular, in the first color point column, the color point CD_2_1 is above the color point CD_2_2, and the color point CD_2_2 is above the color point CD_2_3, and the color point CD_2_3 is above the color point CD_2_4. In the second color point column to the right of the first color point column, the color point CD_2_5 is above the color point CD_2_6, and the color point CD_2_6 is above the color point CD_2_7, and the color point CD_2_7 is above the color point CD_2_8. In addition to the spacing between the color points CD_2_1 and CD_2_5, the color points are electrically coupled along the outer edge of the color point matrix. In particular, the bottom right corner of the color point CD_2_5 is coupled to the top right corner of the color point CD_2_6; the bottom right corner of the color point CD_2_6 is connected to the top right corner of the color point CD_2_7; the bottom right corner of the color point CD_2_7 is The top right corner of the color point CD_2_8 is received; the bottom left corner of the color point CD_2_8 is connected to the bottom right corner of the color point CD_2_4; the top left corner of the color point CD_2_4 is connected to the bottom left corner of the color point CD_2_3; The top left corner of CD_2_3 is connected to the bottom left corner of the color point CD_2_2; and the top left corner of the color point CD_2_2 is connected to the bottom left corner of the color point CD_2_1.

The device element region DCA_2 disposed under the color point CD_2_4 and the color point CD_2_8 is spaced apart from the color point CD_2_4 and the color point CD_2_8 by the vertical dot pitch VDS2. The switching element SE_2 is disposed in the device element region DCA_2. The switching element SE_2 is coupled to the electrodes of the color points of the color component CC_2 (ie, color points CD_2_1, CD_2_2, CD_2_3, CD_2_4, CD_2_5, CD_2_6, CD_2_7, and CD_2_8) to control the voltage polarity and voltage amount of the color point of the color component CC_2. . The second color component CC_2 is vertically aligned with the first color component CC_1, and is spaced apart from the first color component CC_1 by the second horizontal dot pitch HDS2. Therefore, the color points CC_2 and CC_1 are offset by a horizontal color component HCCO1. Offset (horizontal color component offset), wherein the horizontal color component offset HCCO1 is equal to the sum of the horizontal dot pitch HDS1 plus the horizontal dot pitch HDS2 plus twice the color dot width CDW. In some embodiments of the invention, the horizontal dot spacing HDS2 is greater than the horizontal dot spacing HDS1. In this embodiment, a larger distance allows a signal line such as the source line for the switching element to operate the color component CC_1 and the color component CC_2. Since the discrete field amplification regions can be formed using ITO lines that are thinner than the signal lines, the pitch between the lines of a color component can be made smaller.

In particular, regarding the color point, the color point CD_2_1 is vertically aligned with the color point CD_1_5, and is spaced apart from each other by the horizontal dot pitch HDS2. Similarly, the color points CD_2_2, CD_2_3, and CD_2_4 are vertically aligned with CD_1_6, CD_1_7, and CD_1_8, respectively, and horizontally spaced from each other by the horizontal dot pitch HDS2.

Similarly, the third color component CC_3 of the pixel design 1110 also has eight color points, and the incoming color points are arranged in a matrix having two rows of four color points. The two columns are vertically aligned so that the eight color dots also form four color point columns. In particular, in the first color point column, the color point CD_3_1 is above the color point CD_3_2, and the color point CD_3_2 is above the color point CD_3_3, and the color point CD_3_3 is above the color point CD_3_4. In the second color point column to the right of the first color point column, the color point CD_3_5 is above the color point CD_3_6, and the color point CD_3_6 is above the color point CD_3_7, and the color point CD_3_7 is above the color point CD_3_8. In addition to the spacing between the color points CD_3_1 and CD_3_5, the color points are electrically coupled along the outer edge of the color point matrix. In particular, the bottom right corner of the color point CD_3_5 is coupled to the top right corner of the color point CD_3_6; the bottom right corner of the color point CD_3_6 is connected to the top right corner of the color point CD_3_7; the bottom right corner of the color point CD_3_7 is The top right corner of the color point CD_3_8 is received; the bottom left corner of the color point CD_3_8 is connected to the bottom right corner of the color point CD_3_4; the top left corner of the color point CD_3_4 is connected to the bottom left corner of the color point CD_3_3; The top left corner of CD_3_3 is connected to the bottom left corner of the color point CD_3_2; and the top left corner of the color point CD_3_2 is connected to the bottom left corner of the color point CD_3_1.

The device element region DCA_3 disposed under the color point CD_3_4 and the color point CD_3_8 is spaced apart from the color point CD_3_4 and the color point CD_3_8 by the vertical dot pitch VDS2. The switching element SE_3 is disposed within the device component area DCA_3. The switching element SE_3 is coupled to the electrodes of the color point of the color component CC_3 (ie, the color points CD_3_1, CD_3_2, CD_3_3, CD_3_4, CD_3_5, CD_3_6, CD_3_7, and CD_3_8) to control the voltage polarity and voltage amount of the color point of the color component CC_3. . The third color component CC_3 is vertically aligned with the second color component CC_2, and is spaced apart from the first color component CC_1 by the second horizontal dot pitch HDS2. Therefore, the color points CC_3 and CC_2 are offset by a horizontal color component. offset. In particular, regarding the color point, the color point CD_3_1 is vertically aligned with the color point CD_2_5, and is spaced apart from each other by the horizontal dot pitch HDS2. Similarly, the color points CD_3_2, CD_3_3, and CD_3_4 are vertically aligned with CD_2_6, CD_2_7, and CD_2_8, respectively, and are horizontally spaced apart from each other by the horizontal dot pitch HDS2.

The pixel design 1110 also includes discrete field amplification regions FFAR_1, FFAR_2, and FFAR_3. Fig. 11(c) is a more detailed view showing the discrete field amplification area FFAR_1 of the pixel design 1110. For the sake of clarity, the discrete field amplification area FFAR_1 is conceptually divided into a first vertical amplification unit VAP_1, a first horizontal amplification unit HAP_1, a second horizontal amplification unit HAP_2, a third horizontal amplification unit HAP_3, and a fourth level. The amplification unit HAP_4, a fifth horizontal amplification unit HAP_5, and a sixth horizontal amplification unit HAP_6. The horizontal amplifying portion HAP_1 is adjacent to the vertical amplifying portion VAP_1 and along the left side. The horizontal amplifying portion HAP_1 is vertically disposed substantially at a quarter height from the top of the vertical amplifying portion VAP_1 (i.e., VAP_H_1). The horizontal amplifying portion HAP_2 is vertically disposed at the center and extends to the left of the vertical amplifying portion VAP_1. The horizontal amplifying portion HAP_3 is vertically disposed substantially at a quarter height from the bottom of the vertical amplifying portion VAP_1 and extends to the left of the vertical amplifying portion VAP_1. The horizontal amplifying portion HAP_4 is orthogonally aligned with the horizontal amplifying portion HAP_1 and adjacent to each other, but extends to the right of the vertical amplifying portion VAP_1. The horizontal amplifying portion HAP_5 is vertically aligned with the horizontal amplifying portion HAP_2 and adjacent to each other, but extends to the right of the vertical amplifying portion VAP_1. The horizontal amplifying portion HAP_6 is orthogonally aligned with the horizontal amplifying portion HAP_3 and adjacent to each other, but extends to the right of the vertical amplifying portion VAP_1. As described above, the use of the horizontal amplifying portion and the vertical amplifying portion allows a clearer description of the arrangement of the discrete field magnifying region FFAR_1. The horizontal amplification sections HAP_1, HAP_2, HAP_3, HAP_4, HAP_5, and HAP_6 respectively have horizontal amplification section widths HAP_W_1, HAP_W_2, HAP_W_3, HAP_W_4, HAP_W_5 and HAP_W_6, and horizontal amplification section heights HAP_H_1, HAP_H_2, HAP_H_3, HAP_H_4, HAP_H_5, and HAP_H_6. In the particular embodiment of Figures 11(a)-11(d), the horizontal magnifications are the same height and the horizontal magnifications are the same. The vertical amplifying portion VAP_1 has a vertical amplifying portion width VAP_W_1 and a vertical amplifying portion height VAP_H_1. The discrete field amplification areas FFAR_2 and FFAR_3 are identical in shape to the discrete field amplification area FFAR_1.

As shown in FIG. 11(a), the discrete field amplification areas FFAR_1, FFAR_2, and FFAR_3 are respectively disposed in the color components CC_1, CC_2, and CC_3. In particular, the discrete field amplification region FFAR_1 is configured such that the horizontal amplification portion HAP_1 of the discrete field amplification region FFAR_1 is between the color points CD_1_1 and CD_1_2, and is separated by a vertical discrete field amplification region spacing VFFARS and the color point CD_1_1 CD_1_2 is separated. Due to the internal connection between the color points CD_1_1 and CD_1_2, the horizontal amplification portion HAP_1 of the discrete field amplification area FFAR_1 does not extend to the left end of the points CD_1_1 and CD_1_2. Similarly, the horizontal amplification portion HAP_2 of the discrete field amplification region FFAR_1 is located between the color points CD_1_2 and CD_1_3; the horizontal amplification portion HAP_3 of the discrete field amplification region FFAR_1 is located between the color points CD_1_3 and CD_1_4; the level of the discrete field amplification region FFAR_1 The amplification portion HAP_4 is located between the color points CD_1_5 and CD_1_6; the horizontal amplification portion HAP5 of the discrete field amplification region FFAR_1 is located between the color points CD_1_6 and CD_1_7; and the horizontal amplification portion HAP_6 of the discrete field amplification region FFAR_1 is at the color points CD_1_7 and CD_1_8 between. The vertical amplifying portion VAP_1 of the discrete field amplification region FFAR_1 is disposed between the color points CD_1_1 and CD_1_5, between CD_1_2 and CD_1_6, between CD_1_3 and CD_1_7, and between CD_1_4 and CD_1_8. The vertical amplifying portion VAP_1 of the discrete field amplifying area FFAR_1 is separated from the color point by a horizontal discrete field amplifying area pitch HFFARS (not specifically shown in FIG. 11(a)). Therefore, the discrete field amplification area FFAR_1 is along the right top of the color point CD_1_1, the top and bottom of the color point CD_1_2 and CD_1_3, the top of the right side of the color point CD_1_4, the bottom of the left side of the color point CD_1_5, the top left and bottom of the color point CD_1_6 and CD_1_7, color Click on the top left side of CD_1_8 to extend.

The discrete field amplification areas FFAR_2 and FFAR_3 are respectively disposed in the color components CC_2 and CC_3 by the same means as the discrete field amplification area FFAR_1 and the color component CC_1 described above.

The pixel design 1110 is also designed to allow the discrete field amplification region to receive polarity from a neighboring pixel. In particular, a first conduction system is coupled to the discrete field amplification region to receive polarity from a pixel on the current pixel, and a second conduction system is coupled to the switching element to provide polarity to the current pixel. The discrete field magnified area of the pixel. For example, the conductor 1112 coupled to the electrode of the discrete field amplification region FFAR_1 is connected to the conductor 1113 of the pixel connected to the current pixel to receive the polarity (please refer to FIG. 11(d)). The conductor 1111 is coupled to the switching element SE_1 and extends downwardly to the conductor 1112 of the pixel under the current pixel. The conductors 1114 and 1115 are suitable for the purpose of the discrete field amplification region FFAR_2, such as the conductors 1112 and 1113 for the discrete field amplification region FFAR_1. Furthermore, conductors 1116 and 1117 are suitable for discrete field amplification regions FFAR_3, such as conductors 1112 and 1113 for discrete field amplification regions FFAR_1.

The color point, the discrete field amplification area, and the polarity of the switching element are indicated by a positive sign "+" and a negative sign "-". Therefore, in FIG. 11(a), the punctual polarity pattern of the pixel design 1110+, the switching elements SE_1 and SE_3, the color points CD_1_1, CD_1_2, CD_1_3, CD_1_4, CD_1_5, CD_1_6, CD_1_7, CD_1_8, CD_3_1, CD_3_2, CD_3_3, CD_3_4, CD_3_5, CD_3_6, CD_3_7, CD_3_8, and discrete field amplification area FFAR_2 have positive polarity. However, the switching element SE_2, the color points CD_2_1, CD_2_2, CD_2_3, CD_2_4, CD_2_5, CD_2_6, CD_2_7, CD_2_8, and the discrete field amplification areas FFAR_1, FFAR_3 have negative polarity.

Fig. 11(b) shows a pixel design 1110 having a negative dot polarity pattern. For negative dot polarity patterns, switching elements SE_1 and SE_3, color points CD_1_1, CD_1_2, CD_1_3, CD_1_4, CD_1_5, CD_1_6, CD_1_7, CD_1_8, CD_3_1, CD_3_2, CD_3_3, CD_3_4, CD_3_5, CD_3_6, CD_3_7, CD_3_8, and discrete fields The enlarged area FFAR_2 has a negative polarity. However, the switching element SE_2, the color points CD_2_1, CD_2_2, CD_2_3, CD_2_4, CD_2_5, CD_2_6, CD_2_7, CD_2_8, and the discrete field amplification areas FFAR_1, FFAR_3 have positive polarity.

As noted above, if adjacent elements have opposite polarities, the discrete fields at each color point will be amplified. The pixel design 1110 utilizes discrete field amplification regions to enhance and stabilize the formation of multiple regions in the liquid crystal structure. In general, the polarity of the biased component is specified such that a color point of a first polarity has a second polarized adjacent polarized component. More specifically for the pixel design 1110, each color point is on either or both sides of a portion of the discrete field amplification region of opposite polarity. Moreover, these color points are also adjacent to a color point of opposite polarity. For example, for the punctual polarity pattern of the pixel design 1110 (shown in FIG. 11(a)), the color point CD_1_6 has a positive polarity and is adjacent to the discrete field amplification area FFAR_1 at the top, left and bottom of the color point CD_1_6. Part (with negative polarity). Further, the color point CD_2_2 having a negative polarity is on the left side of the color point CD_1_6. Therefore, the discrete field of the color point CD_1_6 is amplified.

The pixels using the pixel design 1110 of FIGS. 11(a) and 11(b) can be used in a display using the switching element dot inversion mode. 11(d) shows a portion of the display 1120, and the display 1120 uses the pixels P (10, 10), P (11, 10), P (10, 11), and P (11, 11) of the pixel design 1110. The pixel design 1110 has a switching element dot inversion driving mode. Display 1120 can have thousands of columns with thousands of pixels on each column. The columns and rows are continuous from the portion shown in Fig. 11(d) in the manner shown in Fig. 11(d). For clarity of explanation, the gate line and the source line of the control switching element are omitted in FIG. 11(d). In order to better illustrate each pixel in the figure, the area of each pixel is obscured. This masking is only for drawing purposes in Figure 11(d) and has no functional significance. Furthermore, due to space constraints, in FIG. 11(d), the color point is indicated as "X_Y" instead of "CD_X_Y".

In the display 1120, the pixels are configured such that the pixels in one column alternate dot patterns (positive or negative), and the pixels in one row also alternate positive and negative dot polar patterns. Therefore, the pixels P(10, 10) and P(11, 11) have a punctual polarity pattern, and the pixels P(10, 11) and P(11, 10) have a negative dot polarity pattern. However, in the next page frame, the pixel will switch the dot polarity pattern. Thus, in general, a pixel P(x, y) has a first dot polarity pattern when x+y is even, and a second dot polarity pattern when x+y is odd. The pixels on each pixel column are vertically aligned and horizontally separated such that the rightmost color point of the pixel is separated from the leftmost color point of the adjacent pixel by the horizontal dot pitch HDS2. The pixels in a picture line are horizontally aligned and spaced apart from each other by a vertical dot pitch VDS3.

As described above, the discrete field amplification region of the first pixel receives the polarity from the switching element of the second pixel. For example, the electrodes of the discrete field amplification region FFAR_1 of the pixel P (10, 10) are coupled to the conductor 1113 via the conductor 1112 of the pixel P (10, 10) and the conductor 1113 of the pixel P (10, 11). Switching element SE_1 of pixel P (10, 11). Similarly, the electrodes of the discrete field amplification region FFAR_2 of the pixel P (10, 10) are coupled to the conductor 1115 of the pixel P1 through the pixel P (10, 10) and the conductor 1115 of the pixel P (10, 11). The switching element SE_2 of the prime (10, 11). Furthermore, the electrodes of the discrete field amplification region FFAR_3 of the pixel P (10, 10) are coupled to the conductor 1117 of the pixel P1 (10, 10) and the conductor 1117 of the pixel P (10, 11). Switching element SE_3 of prime (10, 11).

In a particular embodiment of the invention, each color point has a width of 120 microns and a height of 360 microns. Each color point has a width of 44 microns and a height of 66 microns. Each discrete field amplification region has a vertical magnification width of 5 microns, a vertical magnification height of 5 microns, a horizontal magnification width of 5 microns, and a horizontal magnification height of 5 microns. The horizontal point spacing HDS1 is 17 microns, the horizontal point spacing HDS2 is 16 microns, the vertical point spacing VDS1 is 17 microns, the vertical point spacing VDS2 is 5 microns, the vertical point spacing VDS3 is 18 microns, and the horizontal discrete field amplification spacing HFFARS is 5 microns. And the vertical discrete field amplification pitch VFFARS is 6 micrometers.

Different other principles as described above can also be used in the pixel design 1110. For example, the pixel design 1110 can be simply adapted to be used on displays having discrete field amplification region switching elements and discrete field amplification region electrodes. (Refer to Figure 7(e) or Figure 9(e)) Furthermore, the variation of the pixel design 1110 can also produce edge pixels.

Fig. 11(e) is a diagram illustrating a topside pixel design 1110_TE based on the pixel design 1110. For the sake of simplicity, the description is not repeated, and only the difference between the topside pixel design 1110_TE and the pixel design 1110 is described.

In particular, the topside pixel design 1110_TE uses a modified color component layout that slightly modifies the device component region and compares one of the modified discrete field amplification regions to the pixel design 1110. All of the color components of the pixel design 1110_TE have the same modifications as the discrete field amplification regions. For the sake of clarity, the color components of the pixel design 1110_TE are represented as top-edge color components and are labeled CC_TE_1, CC_TE_2, and CC_TE_3. Similarly, the discrete field amplification region of the pixel design 1110_TE is represented as a top edge discrete field amplification region and is labeled FFAR_TE_1, FFAR_TE_2, and FFAR_TE_3. In particular, the manner of color points is coupled along the outer edge of the modified color point matrix. In particular, in the top edge color component CC_TE_1, the color point CD_1_1 is coupled to the color point CD_1_5, but the color point CD_1_7 is coupled to the color point CE_1_8 along the edge of the color point matrix. Furthermore, the color point CD_1_8 of the top edge color component CC_TE_1 is reduced to provide space for the connectors 1132. The top-edge color components CC_TE_2 and CC_TE_3 of the pixel design 1110_TE are modified similarly.

Furthermore, due to the coupling between the color points CD_1_1 and CD_1_5, the vertical enlargement portion of the top-side discrete field amplification region FFAR_TE_1 between the color points CD_1_1 and CD_1_5 is shortened. The top edge discrete field amplifying sections FFAR_TE_2 and FFAR_TE_3 are similarly modified. Furthermore, the device component regions DCA_TE_1, DCA_TE_2, and DCA_TE_3 of the topside pixel design 1110_TE are narrowed to provide space for the connectors 1132, 1134, and 1136, respectively. The connectors 1132, 1134, and 1136 are used to couple the top-side discrete field amplification regions FFAR_TE_1, FFAR_TE_2, and FFAR_TE_3 to the color components CC_1, CC_2, and CC_3 under the top-side pixels.

Figure 11 (f) and Figure 11 (g) illustrate another top-side pixel design 1110_TE_2 and a top right-corner pixel design 1110_TRC according to the pixel design 1110. For the sake of simplicity, the description will not be repeated, only the difference between the edge pixel design and the pixel design 1110 will be described.

In particular, the topside pixel design 1110_TE2 uses a modified color component layout that is a modified discrete field amplification region compared to the pixel design 1110. All of the color components of the pixel design 1110_TE2 have the same modifications as the discrete field amplification regions. For the sake of clarity, the color components of the pixel design 1110_TE2 are represented as top-edge color components and are labeled CC_TE2_1, CC_TE2_2, and CC_TE2_3. Similarly, the discrete field amplification region of the pixel design 1110_TE2 is represented as a top edge discrete field amplification region and is labeled FFAR_TE2_1, FFAR_TE2_2, and FFAR_TE2_3. In particular, the manner of color points is coupled along the outer edge of the modified color point matrix. In particular, in the top edge color component CC_TE2_1, the color point CD_1_5 is coupled to the color point CD_1_1, but the color point CD_1_5 is coupled to the color point CE_1_6 along the edge of the color point matrix. The top edge color components CC_TE2_2 and CC_TE2_3 of the pixel design 1110_TE2 are similarly modified. Furthermore, the top side discrete field amplification area FFAR_TE2_1 between the color points CD_1_5 and CD_1_6 extends to the right side of the color points CD_1_5 and CD_1_6. The edge discrete field amplification regions FFAR_TE2_2 and FFAR_TE_3 are similarly modified. A connector 1142 couples the top edge discrete field amplification region FFAR_TE2_1 to the top edge color component CC_TE2_2. A connector 1143 couples the top edge discrete field amplification region FFAR_TE2_2 to the top edge color component CC_TE2_3. In addition, a connector 1144 couples the top edge discrete field amplification region FFAR_TE2_3 to the leftmost color component of a neighboring pixel.

The top right corner pixel design 1110_TRC (Fig. 11(g)) is similar to the topside pixel design 1110_TE2. For the sake of simplicity, the description will not be repeated, only the difference between the top right corner pixel design 1110_TRC and the top edge pixel design 1110_TE2 will be described.

In particular, the top right corner pixel design 1110_TRC uses a modified color component layout for the third color component that is a modified discrete field magnification region compared to the third discrete field amplification region of the pixel design 1110. For the sake of clarity, the modified color component of the pixel design 1110_TRC is represented as the top right corner color component and is labeled CC_TRC_3. Similarly, the third discrete field amplification region of the pixel design 1110_TRC is represented as a top right corner discrete field amplification region and is labeled FFAR_TRC_3. In particular, the manner of color points is coupled along the outer edge of the modified color point matrix. Especially in the top right corner color component CC_TRC_3, the color point CD_3_5 is coupled to the color point CD_3_6, but the color point CD_3_2 is coupled to the color point CE_3_3 along the edge of the color point matrix. Furthermore, the top right corner vertical field amplification area FFAR_TRC_3 between the color points CD_3_2 and CD_3_3 extends to the left side of the color points CD_3_2 and CD_3_3. The edge discrete field amplification regions FFAR_TE2_2 and FFAR_TE_3 are similarly modified. A connector 1148 couples the top right corner drawn discrete field amplification region FFAR_TRC_3 to the top edge color component CC_TE2_2 (in the same pixel).

Furthermore, the pixel design 1110 can be modified for displays that use the switching element column inversion mode. Figures 11(h) and 11(i) show different dot polarity patterns for pixel design 1150 (labeled 1150+ and 1150-), while pixel design 1150 can be used with a switching element column inversion mode. In the display. The pixel design 1150 has the same layout as the pixel design 1110, and thus the description is not repeated for the sake of simplicity. However, in the pixel design in the pixel design 1150, the pixel design 1150 is different from the pixel design 1110.

The color point, the discrete field amplification area, and the polarity of the switching element are indicated by a positive sign "+" and a negative sign "_". Therefore, in FIG. 11(h), all of the switching elements showing the punctual polarity pattern and the color point of the pixel design 1150+ have positive polarity, and all of the discrete field amplification regions have negative polarity. In particular, switching elements SE_1, SE_2 and SE_3, color points CD_1_1, CD_1_2, CD_1_3, CD_1_4, CD_1_5, CD_1_6, CD_1_7, CD_2_1, CD_2_2, CD_2_3, CD_2_4, CD_2_5, CD_2_6, CD_2_7, CD_2_8 and color points CD_3_1, CD_3_2, CD_3_3 CD_3_4, CD_3_5, CD_3_6, CD_3_7, and CD__3_8 have positive polarity. However, the discrete field amplification regions FFAR_1, FFAR_2, and FFAR_3 have negative polarity.

Fig. 11(i) shows a pixel design 1150 having a negative dot polarity pattern. For the negative dot polarity pattern, all of the switching elements of the color point have a negative polarity, and all of the discrete field amplification regions have a positive polarity. In particular, switching elements SE_1, SE_2 and SE_3, color points CD_1_1, CD_1_2, CD_1_3, CD_1_4, CD_1_5, CD_1_6, CD_1_7, CD_2_1, CD_2_2, CD_2_3, CD_2_4, CD_2_5, CD_2_6, CD_2_7, CD_2_8 and color points CD_3_1, CD_3_2, CD_3_3 CD_3_4, CD_3_5, CD_3_6, CD_3_7, and CD_3_8 have negative polarity. However, the discrete field amplification regions FFAR_1, FFAR_2, and FFAR_3 have positive polarity.

As noted above, if adjacent elements have opposite polarities, the discrete fields at each color point will be amplified. The pixel design 1150 utilizes discrete field amplification regions to enhance and stabilize the formation of multiple regions in the liquid crystal structure. In general, the polarity of the biased component is specified such that a color point of a first polarity has a second polarized adjacent polarized component. More specifically for the pixel design 1110, each color point is on either or both sides of a portion of the discrete field amplification region of opposite polarity. Moreover, these color points are also adjacent to a color point of opposite polarity. Although the color point is also adjacent to another color point of the same polarity, the distance between the color points is greater than the distance between the color point and the discrete field magnifying area. Therefore, the discrete field amplification region can still magnify the discrete fields of the color points. For example, for the punctual polarity pattern of the pixel design 1110 (shown in FIG. 11(a)), the color point CD_1_6 has a positive polarity and is adjacent to the discrete field amplification area FFAR_1 at the top, left and bottom of the color point CD_1_6. Part (with negative polarity). Although the color point CD_2_2 having a positive polarity is on the right side of the color point CD_1_6, since the discrete field amplification area FFAR_1 is adjacent to the color point CD_1_6 and on the multiple sides of the color point CD_1_6, the discrete field amplification area FFAR_1 still magnifies the color point. Discrete field of CD_1_6.

The pixels using the pixel design 1150 of Fig. 11(h) and Fig. 11(i) can be used in a display using the switching element column inversion mode. 11(j) shows a portion of the display 1160, and the display 1160 uses the pixels P (10, 10), P (11, 10), P (10, 11), and P (11, 11) of the pixel design 1150. The pixel design 1150 has a switching element column inversion driving mode. Display 1160 can have thousands of columns with thousands of pixels on each column. The columns and rows are continuous from the portion shown in Fig. 11(j) in the manner shown in Fig. 11(j). For clarity of explanation, the gate line and the source line of the control switching element are omitted in FIG. 11(j). In order to better illustrate each pixel in the figure, the area of each pixel is obscured. This masking is only for drawing purposes in Figure 11(j) and has no functional significance. Furthermore, due to space constraints, in Fig. 11(j), the color point is indicated as "X_Y" instead of "CD_X_Y".

In the display 1160, the pixels are configured such that the pixels in one column alternate dot patterns (positive or negative), and the pixels in one row alternate between positive and negative dot polar patterns. Therefore, the pixels P(10, 10) and P(11, 10) have a punctual polarity pattern, and the pixels P(10, 11) and P(11, 11) have a negative dot polarity pattern. However, in the next page frame, the pixel will switch the dot polarity pattern. Thus, in general, a pixel P(x, y) has a first dot polarity pattern when y is even and a second dot polarity pattern when y is odd. The pixels on each pixel column are vertically aligned and horizontally separated such that the rightmost color point of the pixel is separated from the leftmost color point of the adjacent pixel by the horizontal dot pitch HDS1. The pixels in a picture line are horizontally aligned and spaced apart from each other by a vertical dot pitch VDS3.

As described above, the discrete field amplification region of the first pixel receives the polarity from the switching element of the second pixel. For example, the electrodes of the discrete field amplification region FFAR_1 of the pixel P (10, 10) are coupled to the conductor 1113 via the conductor 1112 of the pixel P (10, 10) and the conductor 1113 of the pixel P (10, 11). Switching element SE_1 of pixel P (10, 11). Similarly, the electrodes of the discrete field amplification region FFAR_2 of the pixel P (10, 10) are coupled to the conductor 1115 of the pixel P1 through the pixel P (10, 10) and the conductor 1115 of the pixel P (10, 11). The switching element SE_2 of the prime (10, 11). Furthermore, the electrodes of the discrete field amplification region FFAR_3 of the pixel P (10, 10) are coupled to the conductor 1117 of the pixel P1 (10, 10) and the conductor 1117 of the pixel P (10, 11). Switching element SE_3 of prime (10, 11).

Even so, the amplified intrinsic discrete electric field multi-region vertical alignment liquid crystal display (AIFF MVA LCD) in accordance with the present invention provides a low cost, wide viewing angle, and in some embodiments of the invention, optical compensation methods are used. ) to further increase the perspective. For example, some embodiments of the present invention are on a top substrate or a bottom substrate, or both upper and lower substrates, using a negative birefringent optical compensation film having a vertical optical axis ( Negative birefringence optical film). Other embodiments use a single optical axis optical compensation film or a dual optical axis optical compensation film having negative birefringence. In some embodiments, a positive compensation film having parallel optical axes can be attached to a negative birefringent film having a vertical optical axis. Furthermore, it is also possible to use a plurality of films including all combinations. Other embodiments may use a circular polarizer to improve optical transmission and viewing angle. Other embodiments may use a circularly polarized plate with an optical compensation film to further improve optical transmission and viewing angle. Moreover, some embodiments of the present invention cover the discrete field amplification regions (FFARs) using a black matrix (BM) to make the discrete field amplification regions opaque. The use of a black matrix improves the contrast ratio of the display and provides better color performance. In other embodiments, some or all of the black matrix may be removed (or omitted) to make the discrete field amplification region transparent, which improves the light transmittance in the display. Improved light transmission can reduce the power requirement of the display.

In various examples of the present invention, novel structures and methods have been described that do not require the use of additional physical configurations in the structure to create a multi-region vertical alignment liquid crystal display. The various embodiments of the present invention, as described above, are merely illustrative of the principles of the invention and are not intended to limit the scope of the invention to the particular embodiments described. For example, from this disclosure, those skilled in the art can define other pixel definitions, dot polarity patterns, pixel design, color components, discrete field amplification regions, vertical amplification portions, horizontal amplification portions, polarities, discrete fields, Electrodes, substrates and membranes, etc., and use these alternating characteristics in accordance with the principles of the present invention to produce a method or system. Accordingly, the invention is to be limited only by the scope of the appended claims.

Although the present invention has been explained in connection with the preferred embodiments, it is not intended to limit the invention. It should be noted that many other similar embodiments can be constructed in accordance with the teachings of the present invention, which are within the scope of the present invention.

100. . . Vertical alignment liquid crystal display

105. . . First polarizer

110. . . First substrate

120. . . First electrode

125. . . First alignment layer

130. . . liquid crystal

140. . . Second alignment layer

145. . . Second electrode

150. . . Second substrate

155. . . Second polarizer

302. . . First polarizer

305. . . First substrate

307. . . First alignment layer

310. . . Pixel

311. . . First electrode

312. . . liquid crystal

313. . . liquid crystal

315. . . Second electrode

320. . . Pixel

321. . . First electrode

322. . . liquid crystal

323. . . liquid crystal

325. . . Second electrode

327. . . electric field

330. . . Pixel

331. . . First electrode

332. . . liquid crystal

333. . . liquid crystal

335. . . Second electrode

352. . . Second alignment layer

355. . . Second substrate

357. . . Second polarizer

400. . . monitor

410. . . Graphic design

410+. . . Graphic design

410-. . . Graphic design

420. . . monitor

430. . . Graphic design

430+. . . Graphic design

430-. . . Graphic design

430_BLC. . . Bottom left corner pixel design

430_LE. . . Left pixel design

430_SE. . . Bottom pixel design

430_TE. . . Top edge pixel design

430_TLC. . . Top left corner pixel design

432. . . conductor

434. . . conductor

436. . . conductor

440. . . monitor

450. . . monitor

451. . . Transistor

510. . . Graphic design

510+. . . Graphic design

510-. . . Graphic design

512. . . conductor

514. . . conductor

520. . . monitor

610. . . Graphic design

610+. . . Graphic design

610-. . . Graphic design

612. . . conductor

613. . . conductor

614. . . conductor

615. . . conductor

616. . . conductor

617. . . conductor

620. . . monitor

710. . . Graphic design

710+. . . Graphic design

710-. . . Graphic design

712. . . conductor

713. . . conductor

714. . . conductor

715. . . conductor

716. . . conductor

717. . . conductor

810. . . Graphic design

810+. . . Graphic design

810-. . . Graphic design

812. . . conductor

814. . . conductor

816. . . conductor

820. . . monitor

910. . . Graphic design

910+. . . Graphic design

910-. . . Graphic design

912. . . conductor

913. . . conductor

914. . . conductor

915. . . conductor

916. . . conductor

917. . . conductor

920. . . monitor

930. . . monitor

1010. . . Graphic design

1010+. . . Graphic design

1010-. . . Graphic design

1020. . . Graphic design

1020+. . . Graphic design

1020-. . . Graphic design

1050. . . monitor

1110. . . Graphic design

1110+. . . Graphic design

1110-. . . Graphic design

1110_TE. . . Top edge pixel design

1110_TE2. . . Top edge pixel design

1110_TRC. . . Top right corner pixel design

1112. . . conductor

1113. . . conductor

1114. . . conductor

1115. . . conductor

1116. . . conductor

1117. . . conductor

1120. . . monitor

1132. . . Connector

1134. . . Connector

1136. . . Connector

1142. . . Connector

1143. . . Connector

1144. . . Connector

1148. . . Connector

1150. . . Graphic design

1160. . . monitor

ADH. . . Associated point height

ADW. . . Associated point width

CC_1. . . First color component

CC_2. . . Second color component

CC_3. . . Third color component

CC_TE_1. . . Top edge color component

CC_TE_2. . . Top edge color component

CC_TE_3. . . Top edge color component

CC_TE2_1. . . Top edge color component

CC_TE2_2. . . Top edge color component

CC_TE2_3. . . Top edge color component

CD_1_1. . . Color point

CD_1_2. . . Color point

CD_1_3. . . Color point

CD_1_4. . . Color point

CD_1_5. . . Color point

CD_1_6. . . Color point

CD_1_7. . . Color point

CD_1_8. . . Color point

CD_2_1. . . Color point

CD_2_2. . . Color point

CD_2_3. . . Color point

CD_2_4. . . Color point

CD_2_5. . . Color point

CD_2_6. . . Color point

CD_2_7. . . Color point

CD_2_8. . . Color point

CD_3_1. . . Color point

CD_3_2. . . Color point

CD_3_3. . . Color point

CD_3_4. . . Color point

CD_3_5. . . Color point

CD_3_6. . . Color point

CD_3_7. . . Color point

CD_3_8. . . Color point

CDH. . . Color point height

CDW. . . Color point width

DCA_1. . . Device component area

DCA_2. . . Device component area

DCA_3. . . Device component area

DCAH. . . Device component area height

DCA_TE_1. . . Device component area

DCA_TE_2. . . Device component area

DCA_TE_3. . . Device component area

DCAW. . . Device component area width

FFAR. . . Modified discrete field amplification area

FFAR_1. . . Discrete field amplification area

FFAR_2. . . Discrete field amplification area

FFAR_3. . . Discrete field amplification area

FFAR_BLE_1. . . Bottom left corner discrete field enlargement area

FFARE_0. . . Discrete field amplification area electrode

FFARE_1. . . Discrete field amplification area electrode

FFAR_LE_1. . . Left discrete field amplification area

FFAR_LE_2. . . Left discrete field amplification area

FFAR_LE_3. . . Left discrete field amplification area

FFARSE_0. . . Discrete field amplification area switching element

FFARSE_1. . . Discrete field amplification area switching element

FFAR_T_0. . . Discrete field amplification area transistor

FFAT_T_1. . . Discrete field amplification area transistor

FFAR_TE_1. . . Top edge discrete field amplification area

FFAR_TE_2. . . Top edge discrete field amplification area

FFAR_TE_3. . . Top edge discrete field amplification area

FFAR_TE2_1. . . Top edge discrete field amplification area

FFAR_TE2_2. . . Top edge discrete field amplification area

FFAR_TE2_3. . . Top edge discrete field amplification area

FFAR_TLC_1. . . Top left corner discrete field magnification area

G_0. . . Gate line

G_1. . . Gate line

HAP. . . Horizontal magnification

HAP_1. . . First horizontal magnification

HAP_2. . . Second horizontal enlargement

HAP_3. . . Third horizontal magnification

HAP_4. . . Fourth horizontal enlargement

HAP_5. . . Fifth horizontal enlargement

HAP_6. . . Sixth horizontal magnification

HAP_B. . . Bottom horizontal magnification

HAP_B_1. . . Bottom horizontal magnification

HAP_B_2. . . Bottom horizontal magnification

HAP_B_3. . . Bottom horizontal magnification

HAP_H. . . Horizontal magnification

HAP_H_1. . . Horizontal magnification

HAP_H_2. . . Horizontal magnification

HAP_H_3. . . Horizontal magnification

HAP_T_1. . . Top horizontal magnification

HAP_W. . . Horizontal magnification

HAP_W_1. . . Horizontal magnification

HAP_W_2. . . Horizontal magnification

HAP_W_3. . . Horizontal magnification

HCCO1. . . Horizontal color component offset

HDS. . . Horizontal point spacing

HDS1. . . Horizontal point spacing

HFFARS. . . Horizontal discrete field amplification area spacing

S_0_1. . . Source line

S_0_2. . . Source line

S_0_3. . . Source line

S_1_1. . . Source line

S_1_2. . . Source line

S_1_3. . . Source line

SE_1. . . Switching element

SE_2. . . Switching element

SE_3. . . Switching element

S_FFAR. . . Single discrete field amplification area transistor

S_FFAR_E. . . Discrete field amplification area even source line

S_FFAR_O. . . Odd source line in discrete field amplification region

VAP. . . Vertical enlargement

VAP_H. . . Vertical magnification

VAP_H_1. . . Vertical magnification

VAP_L. . . Vertical enlargement on the left

VAP_L_1. . . Vertical enlargement on the left

VAP_W. . . Vertical enlargement width

VAP_W_1. . . Vertical enlargement width

V-Com. . . Common voltage

VDO1. . . Vertical point offset

VDS. . . Vertical dot spacing

VDS1. . . Vertical dot spacing

VDS2. . . Vertical dot spacing

VDS3. . . Vertical dot spacing

VFFARS. . . Vertical discrete field amplification area spacing

The objects, advantages and novel features of the present invention will become more apparent from

1(a)-1(c) are three schematic views showing the pixels of a conventional single-region vertical alignment liquid crystal display.

2 is a schematic view showing a pixel of a conventional multi-region vertical alignment liquid crystal display.

3(a)-3(b) are schematic views showing a multi-region vertical alignment liquid crystal display according to an embodiment of the present invention.

4(a)-4(b) are diagrams showing a pixel design in accordance with an embodiment of the present invention.

4(c) is an enlarged view showing a region of a discrete field amplification region according to an embodiment of the present invention.

Figure 4 (d) is a schematic view showing a portion of a liquid crystal display according to an embodiment of the present invention.

4(e) is a schematic view showing a source line and a gate line of a liquid crystal display according to an embodiment of the present invention.

4(f)-4(g) are schematic views showing a pixel design in accordance with an embodiment of the present invention.

Figure 4 (h) is a schematic view showing a portion of a liquid crystal display according to an embodiment of the present invention.

Figure 4 (i) is a schematic diagram showing the design of a pixel according to an embodiment of the present invention.

Figure 4 (j) is a schematic diagram showing the design of a pixel according to an embodiment of the present invention.

4(k)-4(m) are views showing a part of a liquid crystal display according to an embodiment of the present invention.

Figure 4 (n) is a diagram showing the design of a pixel according to an embodiment of the present invention.

Figure 4 (o) is a schematic diagram showing the design of a pixel according to an embodiment of the present invention.

Figure 4 (p) is a schematic diagram showing the design of a pixel according to an embodiment of the present invention.

4(q)-4(s) are schematic views showing a part of a liquid crystal display according to an embodiment of the present invention.

5(a)-5(b) are diagrams showing the design of a pixel according to an embodiment of the present invention.

Figure 5 (c) is a schematic view showing a portion of a liquid crystal display according to an embodiment of the present invention.

6(a)-6(b) are diagrams showing the design of a pixel according to an embodiment of the present invention.

Figure 6 (c) is a schematic view showing a portion of a liquid crystal display according to an embodiment of the present invention.

7(a)-7(b) are diagrams showing a pixel design according to an embodiment of the present invention.

Figure 7 (c) is an enlarged view showing a region of a discrete field amplification region according to an embodiment of the present invention.

Figure 7 (d) is a schematic view showing a portion of a liquid crystal display according to an embodiment of the present invention.

Figure 7 (e) is a view showing a part of a liquid crystal display according to an embodiment of the present invention.

8(a)-8(b) are diagrams showing the design of a pixel according to an embodiment of the present invention.

Figure 8(c) is an enlarged view showing a region of a discrete field amplification region according to an embodiment of the present invention.

Figure (d) is a schematic view showing a portion of a liquid crystal display according to an embodiment of the present invention.

9(a)-9(b) are diagrams showing the design of a pixel according to an embodiment of the present invention.

9(c)-9(e) are enlarged views showing a region of a discrete field amplification region according to an embodiment of the present invention.

Figure 9 (d) is a schematic view showing a portion of a liquid crystal display according to an embodiment of the present invention.

10(a)-10(b) are diagrams showing the design of a pixel according to an embodiment of the present invention.

10(c)-10(d) are diagrams showing the design of a pixel according to an embodiment of the present invention.

Figure 10 (e) is a view showing a part of a liquid crystal display according to an embodiment of the present invention.

11(a)-11(b) are diagrams showing the design of a pixel according to an embodiment of the present invention.

Figure 11 (c) is an enlarged view showing a region of a discrete field amplification region according to an embodiment of the present invention.

Figure 11 (d) is a view showing a part of a liquid crystal display according to an embodiment of the present invention.

Figure 11 (e) is a diagram showing the design of a pixel in accordance with an embodiment of the present invention.

Figure 11 (f) is a diagram showing the design of a pixel according to an embodiment of the present invention.

Figure 11 (g) is a diagram showing the design of a pixel according to an embodiment of the present invention.

11(h)-11(i) are diagrams showing the design of a pixel according to an embodiment of the present invention.

Figure 11 (j) is a view showing a part of a liquid crystal display according to an embodiment of the present invention.

300. . . Multi-zone vertical alignment liquid crystal display

302. . . First polarizer

305. . . First substrate

307. . . First alignment layer

310. . . Pixel

311. . . First electrode

312. . . liquid crystal

313. . . liquid crystal

315. . . Second electrode

320. . . Pixel

321. . . First electrode

322. . . liquid crystal

323. . . liquid crystal

325. . . Second electrode

327. . . electric field

330. . . Pixel

331. . . First electrode

332. . . liquid crystal

333. . . liquid crystal

335. . . Second electrode

352. . . Second alignment layer

355. . . Second substrate

357. . . Second polarizer

Claims (37)

A display includes: a first pixel structure, a second pixel structure, and a first discrete field amplification region switching component, wherein the first pixel structure has: a first color component having a first a color point; a first discrete field magnifying region extending along a first side of the first color point of the first color component and a second side of the first color point along the first color component; a first switching component coupled to the first color component of the first pixel structure; the second pixel structure having: a first color component; a first discrete field amplification region; a first switching component And the first discrete field amplification region switching component is coupled to the first discrete field amplification region of the first pixel structure and the first discrete field amplification region of the second pixel structure, respectively. The display device of claim 1, wherein the first switching element of the first pixel structure and the first switching element of the second pixel structure have a first polarity, and the first discrete field The amplification area switching element has a second polarity. The display of claim 1, wherein the first pixel structure further comprises a second color component, a second discrete field amplification region, and a second switching element, the first pixel structure The second color component is aligned with the first color component of the first pixel structure in a first dimension, and the second discrete field magnifying region of the first pixel structure is in the first dimension and the first color The first discrete field amplification region of the prime structure is aligned, and the first switching element of the first pixel structure is coupled to the second color component of the first pixel structure. The display of claim 3, wherein the second pixel structure further comprises a second color component, a second discrete field amplification region, and a second switching element, the second pixel structure The dichroic component is aligned with the first color component of the second pixel structure in a first dimension, the second discrete field magnifying region of the second pixel structure being in the first dimension and the second pixel The first discrete field amplification region of the structure is aligned, and the first switching element of the second pixel structure is coupled to the second color component of the second pixel structure. The display of claim 4, wherein the second discrete field amplification region of the first pixel structure and the second discrete field amplification region of the second pixel structure are coupled to the first Discrete field amplification area switching element. The display of claim 1, further comprising a third pixel structure and a fourth pixel structure, the third pixel structure having: a first color component; a first discrete field amplification region And a first switching component coupled to the first color component of the third pixel structure; the fourth pixel structure has: a first color component; a first discrete field amplification region; and a first switching element; wherein the third pixel structure and the fourth pixel structure are on a second column of the display. The display device of claim 6, further comprising a second discrete field amplification region switching component coupled to the first discrete field amplification region of the third pixel structure and the fourth pixel structure The first discrete field amplification region. The display device of claim 7, wherein the first switching element of the first pixel structure, the first switching element of the second pixel structure, and the second discrete field amplification area switching element have a first polarity, the first discrete field amplification region switching element, the first switching element of the third pixel structure, and the first switching element of the fourth pixel structure have a second polarity. The display of claim 1, wherein the first pixel structure is on a first column of the display and the second pixel structure is on a second column of the display. The display of claim 9, wherein the first discrete field amplification region of the second pixel structure is coupled to the first color component of the first pixel structure. The display of claim 9, wherein the first discrete field amplification region of the second pixel structure is coupled to the first switching element of the first pixel structure. According to the display of claim 11, wherein the The first switching element of the first pixel structure has a first polarity, and the first switching element of the second pixel structure has a second polarity. The display device of claim 11, wherein the first pixel structure further comprises a second color component, a second discrete field amplification region, and a second switching element, the second pixel structure further comprising a a second color component, a second discrete field amplification region, and a second switching component, wherein the second color component of the first pixel structure is in a first dimension and the first color component of the first pixel structure Aligning, the second discrete field amplification region of the first pixel structure is aligned with the first discrete field amplification region of the first pixel structure in the first dimension, the second switching of the first pixel structure The component is coupled to the second color component of the first pixel structure, and the second color component of the second pixel structure is aligned with the first color component of the second pixel structure in a first dimension The second discrete field amplification region of the second pixel structure is aligned with the first discrete field amplification region of the second pixel structure in the first dimension, the second switching element of the second pixel structure The second color component of the second pixel structure is coupled to the second pixel component. The display of claim 13, wherein the second discrete field amplification region of the second pixel structure is coupled to the second switching element of the first pixel structure. The display device of claim 14, wherein the first switching element of the first pixel structure and the second switching element of the first pixel structure have a first polarity, the second pixel Knot The first switching element and the second switching element of the second pixel structure have a second polarity. The display device of claim 14, wherein the first switching element of the first pixel structure and the second switching element of the second pixel structure have a first polarity, the second pixel structure The first switching element and the second switching element of the first pixel structure have a second polarity. The display of claim 13, further comprising a third pixel structure on a third column of the display, the third pixel structure comprising: a first color component; a second color a first discrete field amplification region; a second discrete field amplification region; a first switching component coupled to the first color component of the third pixel structure; and a second switching component coupled Receiving the second color component of the third pixel structure. The display of claim 17, wherein the second discrete field amplification region of the second pixel structure is coupled to the second switching element of the third pixel structure. The display of claim 18, wherein the first discrete field amplification region of the third pixel structure is coupled to the first switching element of the second pixel structure. According to the display of claim 19, wherein the The first switching element of the pixel structure, the second switching element of the second pixel structure, and the first switching element of the third pixel structure have a first polarity, the first pixel structure The second switching element, the first switching element of the second pixel structure, and the second switching element of the third pixel structure have a second polarity. The display of claim 19, wherein the first switching element of the first pixel structure and the second switching element of the second pixel structure are aligned in the first dimension. The display of claim 22, wherein the first switching element of the second pixel structure and the second switching element of the third pixel structure are aligned in the first dimension. The display of claim 1, wherein the first discrete field amplification region of the first pixel structure comprises: a first vertical amplification portion along the first color component of the first pixel structure One of the first color points extends vertically; and a first horizontal magnifying portion extends horizontally along a second side of one of the first color points of the first color component of the first pixel structure. The display of claim 23, wherein the first color component of the first pixel structure further comprises a second color point in a first dimension and the first of the first pixel structure The first color point of the color component is aligned. The display of claim 24, wherein the first horizontal amplifying portion of the first discrete field magnifying region of the first pixel structure is at the first color component of the first pixel structure The A first color point extends between the second color point of the first color component of the first pixel structure. The display of claim 25, wherein the first switching element of the first pixel structure is within the horizontal amplification of the first discrete field amplification region of the first pixel structure. The display of claim 25, wherein the second color point of the first color component of the first pixel structure is in the first color component of the first pixel structure A color point is between the first switching element of the first pixel structure. The display of claim 24, wherein the first discrete field magnifying region of the first pixel structure further comprises a second horizontal amplifying portion along the first color component of the first pixel structure One of the second color points has a third side that extends horizontally. The display of claim 28, wherein the first discrete field amplification region of the first pixel structure further comprises a third horizontal amplification portion along the first color component of the first pixel structure One of the first color points has a third side that extends horizontally. The display of claim 29, wherein the first discrete field magnifying region of the first pixel structure further comprises a second vertical amplifying portion along the first color component of the first pixel structure One of the first color points, the fourth side, and the fourth side of the second color point of the first color component of the first pixel structure extend perpendicularly. The display of claim 28, wherein the first color component of the first pixel structure further comprises a third color point, the first dimension and the first of the first pixel structure Color component The first color point is aligned. The display of claim 31, wherein the second horizontal amplifying portion of the first discrete field magnifying region of the first pixel structure is along the first color component of the first pixel structure Extending from a first side of the third color point, wherein the first vertical amplifying portion of the first discrete field magnifying region of the first pixel structure is along the first color component of the first pixel structure One of the third color points extends on the second side. The display of claim 25, wherein the first color component of the first pixel structure further comprises: a third color point, in a second dimension and the first pixel structure The first color point of the one color component is aligned; a fourth color point is aligned with the second color point of the first color component of the first pixel structure in the second dimension, and in the first dimension The third color point of the first color component of the first pixel structure is aligned. The display of claim 33, wherein the first vertical amplifying portion of the first discrete field magnifying region of the first pixel structure is at the first color component of the first pixel structure The second color point extends between the fourth color point of the first color component of the first pixel structure. The display of claim 34, wherein the first discrete field magnifying region of the first pixel structure further comprises a second horizontal amplifying portion, the first color component of the first pixel structure The third color point and the first color component of the first pixel structure The fourth color point extends between. The display of claim 35, wherein the first color component of the first pixel structure further comprises a fifth color point and a sixth color point, the first dispersion of the first pixel structure The field magnifying region further includes a third horizontal amplifying portion and a fourth horizontal flat amplifying portion, wherein the fifth color point of the first color component of the first pixel structure is in the first dimension and the second pixel The second color point of the first color component of the structure is aligned, the sixth color point of the first color component of the first pixel structure is at the first dimension and the first of the first pixel structure The fourth color point of the color component is aligned, and the first color is aligned with the fifth color point of the first color component of the first pixel structure, and the first discrete field of the first pixel structure is enlarged The third horizontal amplifying portion of the region is between the second color point of the first color component of the first pixel structure and the fifth color point of the first color component of the first pixel structure Extending, the fourth horizontal amplifying portion of the first discrete field magnifying region of the first pixel structure is at the first pixel And extending the fourth color point of the first color component to the sixth color point of the first color component of the first pixel structure; wherein the first discrete field magnifying region of the first pixel structure The first vertical amplifying portion extends between the fifth color point of the first color component of the first pixel structure and the sixth color point of the first color component of the first pixel structure . The display of claim 36, wherein the first color component of the first pixel structure further comprises a seventh color point and an eighth color point, the first dispersion of the first pixel structure Field amplification area The field further includes a fifth horizontal amplifying portion and a sixth horizontal amplifying portion, wherein the seventh color point of the first color component of the first pixel structure is in the first dimension and the first pixel structure The second color point of the first color component is aligned, and the eighth color point of the first color component of the first pixel structure is in the first dimension and the first color component of the first pixel structure The sixth color point is aligned, and the first color is aligned with the fifth color point of the first color component of the first pixel structure, the first discrete field magnifying region of the first pixel structure a fifth horizontal amplifying portion extending between the fifth color point of the first color component of the first pixel structure and the seventh color point of the first color component of the first pixel structure, The sixth horizontal amplifying portion of the first discrete field magnifying region of the first pixel structure is the sixth color point of the first color component of the first pixel structure and the first pixel structure Extending between the eighth color points of the first color component; wherein the first vertical of the first discrete field magnified region of the first pixel structure Most, extending between the lines of the first color component of a pixel structure of a first color point of the seventh and the eighth of the first color dot of the first color component of the pixel structure.