TWI436462B - Conductive bump structure and chip bonding structure of display panel - Google Patents

Description

Conductive bump structure and wafer bonding structure of display panel

The present invention relates to a conductive bump structure and a wafer bonding structure of a display panel, and more particularly to a conductive bump structure including an insulating buffer structure having a notch design and a wafer bonding structure of a display panel.

The COG (chip on glass) technology refers to a technique of bonding a wafer directly to a connection pad on a glass substrate, and since COG technology has a low cost advantage, it has been widely used in wafer bonding production of a display panel. According to the current COG technology, a gold conductive bump structure is disposed on the wafer, and the wafer and the display panel are joined by an anisotropic conductive paste (ACF), and the gold conductive bump structure is brought into contact with the connection pad of the display panel to achieve The effect of electrical connection.

However, due to the high material cost of the gold and the anisotropic conductive paste, the fabrication cost of the bonding of the wafer cannot be further reduced. Therefore, COG technology still needs further research and development to save production costs.

One of the objects of the present invention is to provide a conductive bump structure and a wafer bonding structure of a display panel to solve the problems faced by conventional COG technology.

To achieve the above objective, the present invention provides a conductive bump structure disposed on a substrate. The conductive bump structure includes a plurality of pads, an insulating buffer structure, and a plurality of conductive films. The pad is disposed on the substrate; the insulating buffer structure continuously traverses the pad and partially covers the pads; the conductive film is disposed on the insulating buffer structure and electrically connected to the pads respectively. The insulating buffer structure has a plurality of notches at least between a portion of the two adjacent conductive films to form a discharge passage.

To achieve the above object, the present invention further provides a wafer bonding structure for a display panel, comprising a substrate, a plurality of connection pads, a wafer and a non-conductive colloid. The substrate includes a soldering region, and the connection pads are disposed in the soldering region. The wafer includes at least one conductive bump structure, and the conductive bump structure includes a plurality of pads, an insulating buffer structure and a plurality of conductive films. The pad is disposed on the wafer; the insulating buffer structure continuously traverses the pad and partially covers the pads; the conductive film is disposed on the insulating buffer structure and electrically connected to the pads respectively. The non-conductive adhesive system is disposed between the substrate and the wafer, and adheres the wafer to the substrate. The insulating buffer structure has a plurality of notches, at least between the two adjacent conductive films, forming a non-conductive colloidal discharge channel.

The conductive bump structure of the present invention has an insulating buffer structure to help buffer the compressive stress generated by the wafer pressing process. In addition, the insulating buffer structure has a notch design, which can increase the discharge passage of the non-conductive colloid, thereby improving the yield of the wafer bonding process and the reliability of the wafer bonding structure.

The present invention will be further understood by those skilled in the art to which the present invention pertains. The effect.

Please refer to Figures 1 to 3. 1 to 3 are schematic views showing a structure of a conductive bump according to a preferred embodiment of the present invention, wherein FIG. 1 is a schematic view showing the appearance of a conductive bump structure, and FIG. 2 is a view showing a conductive bump structure. View, FIG. 3 is a cross-sectional view of the conductive bump structure taken along line AA' of FIG. As shown in FIG. 1 to FIG. 3 , the conductive bump structure 10 of the embodiment is disposed on the substrate 12 , and the conductive bump structure 12 includes a plurality of pads 14 , an insulating buffer structure 16 , and a plurality of conductive films. 18. The pad 14 is disposed on the substrate 12, and in the embodiment, the substrate 12 can be a wafer, and the pad 14 can be electrically connected to an internal connection (not shown) of the chip. The insulating buffer structure 16 is disposed on the substrate 12 and spans the solder pad 14 , wherein the insulating buffer structure 16 of the embodiment has a strip structure, but not limited thereto, and the insulating buffer structure partially covers the pads 14 , and A portion of each of the pads 14 is exposed. In the present embodiment, the insulating buffer structure 16 is made of an elastic insulating material, such as a polymer material, and preferably a photosensitive material such as a photosensitive polyimide (PI) is used. The pattern is created and defined by the exposure and development process, but is not limited thereto. The conductive film 18 is disposed on the insulating buffer structure 16 and electrically connected to the corresponding pads 14 respectively. In this embodiment, the material of the conductive film 18 can be selected from various materials, such as gold, which are excellent in electrical conductivity and have good adhesion to the insulating buffer structure 16, but are not limited thereto. The function of the conductive film 18 is to electrically connect the pad 14 to the surface of the insulating buffer structure 16 for further external connection.

The conductive bump structure 10 of the present invention mainly comprises a solder pad 14, an insulating buffer structure 16 and a conductive film 18. The insulating buffer structure 16 is used as a main substrate of the conductive bump structure 10, which has the advantages of low cost and easy patterning, and can reduce the use of the conductive material. Moreover, the insulating buffer structure 16 also has a buffer wafer bonding process. The effect of the resulting stress. In addition, the conductive film 18 functions to electrically connect the pad 14 to the surface of the insulating buffer structure 16 to utilize subsequent external connections.

The insulating buffer structure 16 of the conductive bump structure 10 of the present invention has a plurality of notches 20 between at least a portion of two adjacent conductive films 18. The notch 20 is used as a discharge passage for the non-conductive colloid in the subsequent wafer pressing process, so that the excess non-conductive colloid can be smoothly discharged. In this embodiment, each of the notches 20 is formed in the insulating buffer structure 16 between any two adjacent conductive films 18. The depth of the notches 20 is smaller than the height of the insulating buffer structure 16. For example, the depth of the notches 20 is an insulating buffer structure. The height of 16 is half, and the notch 20 has an arc-shaped cross section, but the position, depth, size, shape and number of the notch 20 are not limited thereto, and the visual discharge effect is moderately changed.

Please refer to Figure 4 and Figure 5 again. 4 and 5 are schematic cross-sectional views showing the structure of the conductive bumps according to another preferred embodiment of the present invention. In order to simplify the description and compare the similarities and differences between the embodiments, the embodiments of FIGS. 4 and 5 are The foregoing embodiments are denoted by the same reference numerals, and only the differences of the embodiments are described. As shown in FIG. 4, the notch 20 of the insulating buffer structure 16 is not limited to a circular arc section, and the visible drainage effect is a geometrical section, such as a quadrangular section or other geometric section. As shown in Fig. 5, the number of the notches 20 between the adjacent conductive films 18 is not limited to one, and the visual discharge effect is changed or combined.

Please refer to Figures 6 and 7, and refer to Figures 1 to 3 together. 6 is a schematic view of a wafer bonding structure of a display panel before bonding according to a preferred embodiment of the present invention, and FIG. 7 is a diagram showing a wafer bonding structure of a display panel after bonding according to a preferred embodiment of the present invention. schematic diagram. As shown in FIG. 6, the wafer bonding structure 30 of the display panel of the present embodiment includes a substrate 32, a plurality of connection pads 34, at least one wafer 40, and a non-conductive colloid 50. The substrate 32 is a substrate of the display panel, such as a thin film transistor substrate, and includes a soldering region 36, and the connection pads 34 are disposed in the soldering region 36 for guiding the wires of the display panel such as data lines or gate lines ( The figure is not shown electrically connected to the lands 36 for external connection. Additionally, the lands 36 are located in the non-metallic terminal regions of the display panel. The wafer 40 includes at least one conductive bump structure 10, wherein the conductive bump structure 10 includes a plurality of pads 14 (as shown in FIGS. 1 and 2), an insulating buffer structure 16, and a plurality of conductive films 18. The pad 14 can be electrically connected to an internal connection (not shown) of the wafer 40. The insulating buffer structure 16 spans the pads 14 and partially covers the pads 14 to expose portions of the pads 14. The conductive film 18 is disposed on the insulating buffer structure 16 and electrically connected to the corresponding pads 14 respectively. The non-conductive colloid 50 is disposed between the substrate 32 and the wafer 40, and adheres the wafer 40 to the substrate 32.

The conductive bump structure 10 of the wafer bonding structure 30 of the display panel of the present embodiment may be the conductive bump structure 10 disclosed in any of the foregoing embodiments or a variant embodiment thereof, and the detailed description thereof is as described above, and is not Repeat it again. The insulating buffer structure 16 of the conductive bump structure 10 has a plurality of notches 20, and the notches 20 are located at least between a portion of the two adjacent conductive films 18, thereby forming a discharge passage of the non-conductive colloid 50. By performing the wafer bonding process on the wafer 40 and the substrate 32 of the display panel by the notch 20 of the insulating buffer structure 16, the non-conductive colloid 50 can be discharged through the gap between the adjacent insulating buffer structures 16, The problem can be discharged through the notch 20 of each of the insulating buffer structures 16 without causing the problem that the non-conductive colloid 50 cannot be smoothly discharged. Therefore, the wafer 40 and the substrate 32 of the display panel can be smoothly joined, as shown in FIG.

In summary, the conductive bump structure used in the wafer bonding structure of the display panel of the present invention has an insulating buffer structure to help buffer the compressive stress generated by the wafer bonding process. In addition, the insulating buffer structure has a notch design, which can increase the discharge passage of the non-conductive colloid, thereby improving the yield of the wafer pressing process and the reliability of the wafer bonding structure. In addition, the insulating buffer structure can be made of a photosensitive material, so that the formation of the notch can be easily achieved by exposure and development techniques without additional cost.

The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.

10. . . Conductive bump structure

12. . . Base

14. . . Solder pad

16. . . Insulation buffer structure

18. . . Conductive film

20. . . gap

30. . . Wafer bonding structure of display panel

32. . . Substrate

34. . . Connection pad

36. . . Weld zone

40. . . Wafer

50. . . Non-conductive colloid

1 to 3 are schematic views showing a structure of a conductive bump according to a preferred embodiment of the present invention.

4 and 5 are schematic cross-sectional views showing a structure of a conductive bump according to another preferred embodiment of the present invention.

FIG. 6 is a schematic view showing the wafer bonding structure of the display panel before bonding according to a preferred embodiment of the present invention.

FIG. 7 is a schematic view showing the wafer bonding structure of the display panel after bonding according to a preferred embodiment of the present invention.

10. . . Conductive bump structure

12. . . Base

14. . . Solder pad

16. . . Insulation buffer structure

18. . . Conductive film

20. . . gap

Claims (11)

A conductive bump structure is disposed on a substrate, the conductive bump structure includes: a plurality of solder pads disposed on the substrate; an insulating buffer structure continuously spanning the pads and partially covering the pads And a plurality of conductive films disposed on the insulating buffer structure and electrically connected to the pads respectively; wherein the insulating buffer structure has a plurality of notches, at least between the two adjacent conductive films, forming Discharge channel. The conductive bump structure of claim 1, wherein the material of the insulating buffer structure comprises a photosensitive material. The conductive bump structure of claim 1, wherein the substrate comprises a wafer. The conductive bump structure of claim 1, wherein the gap of the insulating buffer structure has a depth smaller than a height of the insulating buffer structure. The conductive bump structure of claim 1, wherein the notch of the insulating buffer structure has an arcuate cross section. The conductive bump structure of claim 1, wherein the gap of the insulating buffer structure Has a geometric cross section. A wafer bonding structure of a display panel, comprising: a substrate comprising a soldering region; a plurality of connecting pads disposed in the soldering region; and a wafer comprising at least one conductive bump structure, the conductive bump structure comprising: a plurality a solder pad disposed on the wafer; an insulating buffer structure continuously spanning the pads and partially covering the pads; a plurality of conductive films disposed on the insulating buffer structure and respectively associated with the pads Electrically connecting; and a non-conductive colloid disposed between the substrate and the wafer, and bonding the wafer to the substrate; wherein the insulating buffer structure has a plurality of notches, at least two of the adjacent portions Between the conductive films, a discharge passage of the non-conductive colloid is formed. The wafer bonding structure of the display panel of claim 7, wherein the material of the insulating buffer structure comprises a photosensitive material. The wafer bonding structure of the display panel of claim 7, wherein the gap of the insulating buffer structure has a depth smaller than a height of the insulating buffer structure. The wafer bonding structure of the display panel of claim 7, wherein the insulation buffer The gap of the structure has an arcuate cross section. The wafer bonding structure of the display panel of claim 7, wherein the notch of the insulating buffer structure has a geometric cross section.