TWI436203B - Testing method for automatically rebooting a motherboard and recording related debug information and rebooting device thereof - Google Patents

Testing method for automatically rebooting a motherboard and recording related debug information and rebooting device thereof Download PDF

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TWI436203B
TWI436203B TW99140176A TW99140176A TWI436203B TW I436203 B TWI436203 B TW I436203B TW 99140176 A TW99140176 A TW 99140176A TW 99140176 A TW99140176 A TW 99140176A TW I436203 B TWI436203 B TW I436203B
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motherboard
data
debug
switch
interface
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TW201222240A (en
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Chin Lee Teng
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Elitegroup Computer Sys Co Ltd
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Description

自動重啟主機板以及記錄相關除錯資料之測試方法及其重啟裝置Automatic restart motherboard and test method for recording related debug data and restart device thereof

本發明關於一種測試方法及其重啟裝置,尤指一種自動重啟主機板以及記錄相關除錯資料之測試方法及其重啟裝置。The invention relates to a testing method and a restarting device thereof, in particular to a testing method for automatically restarting a motherboard and recording related debugging materials and a restarting device thereof.

一般而言,為了確保主機板之重啟動流程之運作穩定性,主機板在出廠前往往需要經過上千次的開關機測試,其常見之測試方法採用人工手動開關機並記錄相關測試資料之方式來進行,但是此種方法會導致費時費工的檢測時程。In general, in order to ensure the stability of the restart process of the motherboard, the motherboard often needs to be tested by thousands of switches before leaving the factory. The common test method is to manually switch the machine and record the relevant test data. To carry out, but this method will lead to time-consuming and labor-intensive detection time.

因此,外接一重啟動卡以自動執行主機板開關機測試之設計因應而生,如中華民國I270782號專利的一種重啟動卡及其決定測試重啟動機制時機之方法,其相關裝置設計如第1圖所示,其為先前技術之一重啟動卡10之功能方塊示意圖。重啟動卡10包含一偵測單元12、計數單元14以及一重置單元16。偵測單元12用於偵測基本輸入輸出系統(Basic Input Output System,BIOS)所存取完成碼之輸入/輸出埠,當偵測單元12偵測到輸入/輸出埠存取有該完成碼時,即代表電腦系統已完成開機程序,此時偵測單元12發出一第一信號至計數單元14,驅動計數單元14計數時間至設定時間值後,發出一第二信號至重置單元16,驅動重置單元16執行冷開機重啟機制,即藉由重置單元16先短路主機板之一電源鈕腳位數秒,使主機板之系統晶片切斷電源供應,之後重置單元16再一次短路電源鈕腳位,即可供應電源並重新執行基本輸入輸出系統進行開機。另一方面,若是,電腦系統未執行完所有開機程序,即呈當機狀態,則將不會驅使重啟動卡10測試主機板之冷開機重啟機制,以供測試人員獲知開機失敗狀態,進行分析解決。Therefore, an external restart card is used to automatically execute the design of the motherboard switch test. For example, a restart card of the Republic of China I270782 patent and a method for determining the timing of the test restart mechanism are designed as shown in FIG. Shown is a functional block diagram of one of the prior art restart cards 10. The restart card 10 includes a detecting unit 12, a counting unit 14, and a reset unit 16. The detecting unit 12 is configured to detect an input/output port of the completion code accessed by the Basic Input Output System (BIOS), and when the detecting unit 12 detects that the input/output port has the completion code. That is, the computer system has completed the booting process. At this time, the detecting unit 12 sends a first signal to the counting unit 14, and after driving the counting unit 14 to count the time to the set time value, a second signal is sent to the resetting unit 16, and the driving is performed. The reset unit 16 performs a cold boot restart mechanism, that is, the reset unit 16 shorts the power button of the motherboard to the power supply pin for a second, so that the system chip of the motherboard is powered off, and then the reset unit 16 shorts the power button again. At the foot, you can supply power and re-execute the basic I/O system to power on. On the other hand, if the computer system does not execute all the booting procedures, that is, it is in the state of being down, it will not drive the restarting card 10 to test the cold booting mechanism of the motherboard, so that the tester can know the boot failure state and analyze it. solve.

然而,由上述可知,於先前技術中,即使改採用一外接重啟動卡以取代手動開關機測試流程,在電腦當機時,仍然只能手動重新啟動主機板。除此之外,於主機板執行開機時所產生之除錯資料亦僅能利用人工記錄方式以進行測試分析,如此亦會為測試人員帶來諸多的不便。However, as can be seen from the above, in the prior art, even if an external restart card is used instead of the manual switch test procedure, the motherboard can only be manually restarted when the computer is down. In addition, the debug data generated when the motherboard is booted up can only be analyzed by manual recording, which will bring a lot of inconvenience to the testers.

因此,本發明提供一種自動重啟主機板以及記錄相關除錯資料之測試方法及其相關重啟裝置,以解決上述之問題。Therefore, the present invention provides a test method for automatically restarting a motherboard and recording related debug data and related restarting devices to solve the above problems.

本發明提供一種自動重啟主機板以及記錄相關除錯資料之測試方法,其包含設定開關機參數;啟動至少一主機板;累加該主機板之啟動次數;讀取該主機板執行開機時所產生之一除錯資料;根據該除錯資料以及該開關機參數判斷是否重啟該主機板;以及根據該除錯資料以及該啟動次數產生一開關機測試資料。The invention provides a test method for automatically restarting a motherboard and recording related debugging data, which comprises setting a switch machine parameter; starting at least one motherboard; accumulating the number of startups of the motherboard; and reading the generated when the motherboard performs booting Decoding data; determining whether to restart the motherboard according to the debugging data and the switch parameter; and generating a switch test data according to the debug data and the number of startups.

本發明另提供一種可自動重啟主機板以及記錄相關除錯資料之重啟裝置,其包含一設定介面,其用來設定對應至少一主機板之開關機參數;一匯流排傳輸介面,其用來電連接於該主機板之一輸入輸出系統單元以及一電源接腳;以及一可程式化晶片,其電連接於該匯流排傳輸介面以及該設定介面,該可程式化晶片包含一開關機控制單元,其用來重啟該主機板;一計數單元,其用來計算該主機板之啟動次數;一除錯運算單元,其用來經由該匯流排傳輸介面讀取該主機板執行開機時所產生之一除錯資料以及根據該除錯資料以及該開關機參數判斷是否控制該開關機控制單元重啟該主機板;以及一記錄單元,其用來根據該除錯資料以及該啟動次數產生一開關機測試資料。The invention further provides a restarting device capable of automatically restarting a motherboard and recording related debugging data, which comprises a setting interface for setting switch parameters corresponding to at least one motherboard; a bus transmission interface for electrically connecting An input/output system unit and a power pin of the motherboard; and a programmable chip electrically connected to the bus transmission interface and the setting interface, the programmable chip comprising a switch control unit The device is used to restart the motherboard; a counting unit is used to calculate the number of startups of the motherboard; and a debugging operation unit is configured to read, by the bus transmission interface, one of the generated ones when the motherboard is booted. Error data and determining whether to control the switch control unit to restart the motherboard according to the debug data and the switch parameter; and a recording unit for generating a switch test data according to the debug data and the number of startups.

相較於先前技術,本發明改利用可程式化晶片讀取主機板開機時所產生之除錯資料以及比對開關機時間,以作為重啟主機板之判斷依據以及產生相對應之開關機測試資料,因此,無論主機板是否完成開機程序或是處於當機狀態,本發明所提供之重啟裝置均可自動重啟主機板。如此一來,不僅可大大地縮減主機板之開關機穩定性檢測時程,同時亦可幫助使用者不需人工記錄,即可直接且清楚地得知主機板經過重覆開關機後的統計資料,並可根據當機時所產生之除錯碼或當機畫面進行相對應的當機問題排除。Compared with the prior art, the present invention utilizes a programmable wafer to read the debug data generated when the motherboard is booted and the time of the switch, as a basis for judging the motherboard and generating corresponding test data for the switch. Therefore, the restart device provided by the present invention can automatically restart the motherboard regardless of whether the motherboard completes the boot process or is in a down state. In this way, not only can the switchboard stability detection time of the motherboard be greatly reduced, but also the user can directly and clearly know the statistics of the motherboard after being repeatedly switched on and off without manual recording. And can be based on the debug code generated when the machine is down or the screen of the machine to perform the corresponding crash problem.

請參閱第2圖,其為本發明一較佳實施例之一重啟裝置100電連接於一主機板102之示意圖。重啟裝置100包含一設定介面104、一匯流排傳輸介面106、一影像擷取介面108、一可程式化晶片110,以及一顯示裝置112。設定介面104電連接於可程式化晶片110且用來設定對應主機板102之開關機參數,如主機板102之開關機時間預設值、開關機測試次數等,其中在此實施例中,設定介面104較佳地為常見之機械式設定按鈕之組合,如Start、+、-、Stop等,以供使用者按壓設定。匯流排傳輸介面106較佳地為一通用輸入輸出(General Purpose Input/Output,GPIO)傳輸介面,其用來電連接於主機板102之一輸入輸出系統單元114以及一電源接腳116,其中匯流排傳輸介面106與輸入輸出系統單元114之資料傳輸可藉由以排線連接或是以金手指插入之方式安裝於主機板102上的一資料傳輸插槽(如周邊組件互連匯流排插槽(PCI)插槽、高速周邊組件互連匯流排插槽(PCI-E)插槽、低接腳數量架構(LPC)匯流排)來達成。影像擷取介面108電連接於可程式化晶片110且用來電連接於主機板102之一影像輸出介面118,藉以擷取對應主機板102之當機畫面,其較佳地為一視訊圖形陣列(Video Graphics Array,VGA)接頭。顯示裝置112電連接於可程式化晶片110且用來顯示可程式化晶片110所讀取到之主機板102之輸入輸出系統單元114執行開機自我測試(Power On Self Test,POST)時所產生之除錯碼資料,以允許使用者可清楚地得知主機板102之開機除錯歷程,其中,輸入輸出系統單元114可利用一基本輸入輸出系統或一統一可擴展韌體介面(Unified Extensible Firmware Interface,UEFI)來執行開機自我測試。Please refer to FIG. 2 , which is a schematic diagram of a re-installation device 100 electrically connected to a motherboard 102 according to a preferred embodiment of the present invention. The restarting device 100 includes a setting interface 104, a bus transmission interface 106, an image capturing interface 108, a programmable wafer 110, and a display device 112. The setting interface 104 is electrically connected to the programmable chip 110 and used to set the switch parameters of the corresponding motherboard 102, such as the on-off time preset value of the motherboard 102, the number of times of the switch test, etc., in this embodiment, the setting The interface 104 is preferably a combination of conventional mechanical setting buttons, such as Start, +, -, Stop, etc., for the user to press the setting. The bus transfer interface 106 is preferably a general purpose input/output (GPIO) transmission interface for electrically connecting to one of the input and output system units 114 of the motherboard 102 and a power pin 116, wherein the bus bar The data transmission between the transmission interface 106 and the input/output system unit 114 can be mounted on a data transmission slot (such as a peripheral component interconnection bus slot) on the motherboard 102 by a cable connection or a golden finger insertion ( PCI) slot, high-speed peripheral component interconnect bus slot (PCI-E) slot, low pin count architecture (LPC) bus). The image capture interface 108 is electrically connected to the programmable chip 110 and is electrically connected to one of the image output interfaces 118 of the motherboard 102 to capture a screen of the corresponding motherboard 102, which is preferably a video graphics array ( Video Graphics Array, VGA) connector. The display device 112 is electrically connected to the programmable wafer 110 and is used to display the power on self test (POST) of the input/output system unit 114 of the motherboard 102 to which the programmable wafer 110 is read. The error code data is provided to allow the user to clearly know the boot process of the motherboard 102. The input/output system unit 114 can utilize a basic input/output system or a unified extensible firmware interface (Unified Extensible Firmware Interface). , UEFI) to perform the boot self test.

於此針對可程式化晶片110之設計進行說明,請參閱第3圖,其為第2圖所示之重啟裝置100之功能方塊圖。可程式化晶片110較佳地為一場域可程式邏輯閘陣列(Field Programmable Gate Array,FPGA)晶片,其電連接於設定介面104、匯流排傳輸介面106、影像擷取介面108,以及顯示裝置112,並且包含一開關機控制單元120、一計數單元122、一除錯運算單元124及一記錄單元126。開關機控制單元120用來重啟主機板102。計數單元122用來計算主機板102之啟動次數。除錯運算單元124用來經由匯流排傳輸介面106讀取主機板102執行開機時所產生之除錯資料及根據該除錯資料與該開關機參數判斷是否控制開關機控制單元120重啟主機板102。記錄單元126用來根據該除錯資料及該啟動次數產生一開關機測試資料,以供使用者進行後續檢測分析之用。The design of the programmable wafer 110 will be described herein. Please refer to FIG. 3, which is a functional block diagram of the restarting device 100 shown in FIG. The programmable chip 110 is preferably a Field Programmable Gate Array (FPGA) chip electrically connected to the setting interface 104, the bus transmission interface 106, the image capturing interface 108, and the display device 112. And including a switch control unit 120, a counting unit 122, a debugging operation unit 124, and a recording unit 126. The switch control unit 120 is used to restart the motherboard 102. The counting unit 122 is used to calculate the number of starts of the motherboard 102. The debugging unit 124 is configured to read, via the bus bar transmission interface 106, the debug data generated when the motherboard 102 performs booting, and determine whether to control the switch control unit 120 to restart the motherboard 102 according to the debug data and the switch parameters. . The recording unit 126 is configured to generate a switch test data according to the debug data and the number of startups for the user to perform subsequent detection and analysis.

值得一提的是,重啟裝置100另包含一儲存介面128,其電連接於可程式化晶片110且較佳地為一記憶卡插槽,用以傳送該開關機測試資料至一儲存媒體,如安全數碼(Secure Digital,SD)記憶卡等。除此之外,本發明所提供之重啟裝置100亦可應用於複數個主機板之開關機測試,在此應用中,重啟裝置100可進一步地包含一切換介面130,其電連接於可程式化晶片110且可較佳地為一組包含18 個指撥開關的操作介面,藉以達到以同時多工之方式進行可程式化晶片110對不同主機板之重啟測試的目的。以下針對重啟裝置100自動重啟單一主機板102以及記錄相關除錯資料之流程步驟進行詳細說明,至於在測試複數個主機板之開關機方面,其可根據以下說明以此類推,故於此不再贅述。It is worth mentioning that the restarting device 100 further includes a storage interface 128 electrically connected to the programmable chip 110 and preferably a memory card slot for transmitting the switch test data to a storage medium, such as Secure Digital (SD) memory card, etc. In addition, the restarting device 100 provided by the present invention can also be applied to the on/off test of a plurality of motherboards. In this application, the restarting device 100 can further include a switching interface 130 electrically connected to the programmable Wafer 110 and preferably a set comprising 18 The operation interface of the dip switch enables the purpose of performing the restart test of the programmable chip 110 on different motherboards in a simultaneous multiplex manner. The following is a detailed description of the process steps for the restart device 100 to automatically restart the single motherboard 102 and record the related debug data. As for the test of the plurality of motherboards, the following can be deduced according to the following description, so Narration.

請參閱第2圖、第3圖以及第4圖,第4圖為本發明一較佳實施例之利用第2圖所示之重啟裝置100自動重啟主機板102以及記錄相關除錯資料之方法的流程圖。若是想要使用重啟裝置100以進行主機板102之開關機測試,首先需使用設定介面104進行開關機參數之設定(步驟400),其為進行對應主機板102之開機時間預設值以及關機時間預設值之設定。接著,使用者即可利用開關機控制單元120以啟動主機板102,也就是步驟402,而其步驟402之執行可在使用者按壓設定介面104中所包含之Start按鈕後觸發,其中,啟動主機板102之方式可採用常見之冷開機之方式,也就是可利用匯流排傳輸介面106與電源接腳116之耦接並以電路短路之方式控制主機板102之開關機。Please refer to FIG. 2, FIG. 3 and FIG. 4 . FIG. 4 is a schematic diagram of a method for automatically restarting the motherboard 102 and recording related debug data by using the restart device 100 shown in FIG. 2 according to a preferred embodiment of the present invention. flow chart. If the restarting device 100 is to be used for the on/off test of the motherboard 102, the setting interface 104 is first used to set the switch parameters (step 400), which is to perform the preset time and shutdown time of the corresponding motherboard 102. The setting of the preset value. Then, the user can use the switch control unit 120 to activate the motherboard 102, that is, step 402, and the execution of step 402 can be triggered after the user presses the Start button included in the setting interface 104, wherein the host is started. The mode of the board 102 can be implemented by a common cold booting method, that is, the switch of the bus board transmission interface 106 and the power pin 116 can be used to control the switch of the motherboard 102 in a short circuit manner.

在啟動主機板102之後,計數單元122就會計算主機板102之啟動次數(步驟404),而除錯運算單元124會讀取主機板102執行開機時所產生之除錯資料(步驟406),此處所提及之除錯資料可較佳地包含經由匯流排傳輸介面106與輸入輸出系統單元114之耦接所讀取到的該除錯碼資料,以及若是操作系統出錯時所產生之當機畫 面(如Windows之藍色當機畫面),該除錯碼資料可經由顯示裝置112顯示之,而上述當機畫面則是可被影像擷取介面108所擷取並經由記錄單元126存入該開關機測試資料中,藉以允許使用者可透過該開關機測試資料同時得知輸入輸出系統單元114以及操作系統的開機錯誤。After the motherboard 102 is started, the counting unit 122 calculates the number of startups of the motherboard 102 (step 404), and the debugging operation unit 124 reads the debugging data generated when the motherboard 102 performs booting (step 406). The debug data referred to herein may preferably include the debug code data read via the coupling of the bus transfer interface 106 and the input/output system unit 114, and if the operating system is in error. Machine painting In the face (such as the blue screen of Windows), the debug code data can be displayed via the display device 112, and the crash screen can be captured by the image capture interface 108 and stored in the recording unit 126. In the switch test data, the user can learn the data of the input and output system unit 114 and the operating system through the test data of the switch.

接下來,除錯運算單元124就會判斷該除錯碼資料內之一除錯碼的偵測累加次數是否大於一特定值(步驟408)。舉例來說,假設該特定值設定為5次,若是某一除錯碼(如3C)的偵測累加次數大於5次,則除錯運算單元124會判斷主機板102處於當機狀態,因此,就會執行步驟412;反之,則接著執行步驟410,意即接著偵測所讀取到之該除錯碼資料是否具有一除錯完成碼(如00)以及主機板102之實際開機時間是否大於或等於該開機時間預設值(如15秒),若無,則表示主機板102尚未完成開機程序,則就會再次執行步驟408,如此循環之,直到偵測到該除錯完成碼以及主機板102之實際開機時間大於或等於該開機時間預設值或是判斷出主機板102處於當機狀態為止。Next, the debug operation unit 124 determines whether the number of detection accumulations of one of the debug codes in the debug code data is greater than a specific value (step 408). For example, if the specific value is set to 5 times, if the detection accumulation number of a certain debugging code (such as 3C) is greater than 5 times, the debugging operation unit 124 determines that the motherboard 102 is in the down state, therefore, Step 412 is performed; otherwise, step 410 is performed, that is, it is next detected whether the read debug code data has a debug completion code (such as 00) and whether the actual boot time of the motherboard 102 is greater than Or equal to the preset value of the boot time (for example, 15 seconds). If not, it means that the motherboard 102 has not completed the booting process, then step 408 is executed again, and the loop is repeated until the debug completion code and the host are detected. The actual boot time of the board 102 is greater than or equal to the preset value of the boot time or it is determined that the motherboard 102 is in the down state.

當偵測到該除錯完成碼以及主機板102之實際開機時間大於或等於該開機時間預設值時,除錯運算單元124同樣地也會執行步驟412,也就是記錄單元126就會根據該除錯資料以及該啟動次數產生相對應本次測試的該開關機測試資料,如利用”啟動次數”及”對應之除錯碼”的欄位表列以產生統計資料,以允許使用者可清楚地得知主 機板102於本次測試中是正常地完成開機程序還是處於當機狀態,同時也可允許使用者根據當機時所產生之除錯碼進行相對應的當機問題排除。When the debug completion code is detected and the actual boot time of the motherboard 102 is greater than or equal to the boot time preset value, the debug operation unit 124 similarly performs step 412, that is, the recording unit 126 The debug data and the number of starts generate the test data corresponding to the test of the test, such as using the "start number" and "corresponding debug code" field table to generate statistics to allow the user to be clear Know the Lord In this test, the board 102 normally completes the booting process or is in the state of being down, and also allows the user to perform the corresponding downtime problem according to the debug code generated when the machine is down.

最後在再次啟動主機板102方面,在完成該開關機測試資料之紀錄後,除錯運算單元124就會控制開關機控制單元120關閉主機板102(步驟414)並開始執行步驟416,也就是偵測該除錯碼資料是否具有一關機除錯碼(如FF)以及判斷主機板102之實際關機時間是否大於或等於該關機時間預設值(如5秒)。在步驟416中,若是無法偵測到該關機狀態碼以及判斷出主機板102之實際關機時間小於該關機時間預設值,則代表主機板102並沒有順利地完成關機程序,因此除錯運算單元124就會再次執行步驟414以關閉主機板102,直到偵測到該關機除錯碼以及判斷出主機板102之實際關機時間大於或等於該關機時間預設值為止。此時,除錯運算單元124即可判斷出主機板102已完成關機程序,如此一來,除錯運算單元124接著再次執行步驟402,藉以開始下一次的開關機測試,如此循環之,直到達到使用者所設定的測試次數為止。Finally, in the case of restarting the motherboard 102, after completing the recording of the test data of the switch, the debugging operation unit 124 controls the switch control unit 120 to turn off the motherboard 102 (step 414) and starts executing step 416, that is, detecting It is determined whether the debug code data has a shutdown debug code (such as FF) and whether the actual shutdown time of the motherboard 102 is greater than or equal to the preset value of the shutdown time (for example, 5 seconds). In step 416, if the shutdown status code cannot be detected and it is determined that the actual shutdown time of the motherboard 102 is less than the preset value of the shutdown time, the representative board 102 does not successfully complete the shutdown procedure, so the debugging unit is 124 will perform step 414 again to turn off the motherboard 102 until the shutdown debug code is detected and it is determined that the actual shutdown time of the motherboard 102 is greater than or equal to the preset value of the shutdown time. At this time, the debugging operation unit 124 can determine that the motherboard 102 has completed the shutdown process. In this way, the debugging operation unit 124 then performs step 402 again, so as to start the next power-on test, and thus loop until it reaches The number of tests set by the user.

相較於先前技術,本發明改利用可程式化晶片讀取主機板開機時所產生之除錯資料以及比對開關機時間,以作為重啟主機板之判斷依據以及產生相對應之開關機測試資料,因此,無論主機板是否完成開機程序或是處於當機狀態,本發明所提供之重啟裝置均可自動重啟主機板。如此一來,不僅可大大地縮減主機板之開關機穩定性檢測時程,同時亦可幫助使用者不需人工記錄,即可直接且清楚地得知主機板經過重覆開關機後的統計資料,並可根據當機時所產生之除錯碼或當機畫面進行相對應的當機問題排除。Compared with the prior art, the present invention utilizes a programmable wafer to read the debug data generated when the motherboard is booted and the time of the switch, as a basis for judging the motherboard and generating corresponding test data for the switch. Therefore, the restart device provided by the present invention can automatically restart the motherboard regardless of whether the motherboard completes the boot process or is in a down state. In this way, not only can the switchboard stability detection time of the motherboard be greatly reduced, but also the user can directly and clearly know the statistics of the motherboard after being repeatedly switched on and off without manual recording. And can be based on the debug code generated when the machine is down or the screen of the machine to perform the corresponding crash problem.

以上所述僅為本發明之較佳實施例,凡依本發明申請專利範圍所做之均等變化與修飾,皆應屬本發明之涵蓋範圍。The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.

10...重啟動卡10. . . Restart card

12...偵測單元12. . . Detection unit

14...計數單元14. . . Counting unit

16...重置單元16. . . Reset unit

100...重啟裝置100. . . Restart device

102...主機板102. . . motherboard

104...設定介面104. . . Setting interface

106...匯流排傳輸介面106. . . Bus transmission interface

108...影像擷取介面108. . . Image capture interface

110...可程式化晶片110. . . Programmable wafer

112...顯示裝置112. . . Display device

114...輸入輸出系統單元114. . . Input and output system unit

116...電源接腳116. . . Power pin

118...影像輸出介面118. . . Image output interface

120...開關機控制單元120. . . Switching machine control unit

122...計數單元122. . . Counting unit

124...除錯運算單元124. . . Debug unit

126...記錄單元126. . . Recording unit

128...儲存介面128. . . Storage interface

130...切換介面130. . . Switching interface

400、402、404、406、408、410、412、414、416...步驟400, 402, 404, 406, 408, 410, 412, 414, 416. . . step

第1圖為先前技術之重啟動卡之功能方塊示意圖。Figure 1 is a functional block diagram of a prior art restart card.

第2圖為本發明一較佳實施例之重啟裝置電連接於主機板之示意圖。2 is a schematic diagram of a restarting device electrically connected to a motherboard according to a preferred embodiment of the present invention.

第3圖為第2圖所示之重啟裝置之功能方塊圖。Fig. 3 is a functional block diagram of the restarting device shown in Fig. 2.

第4圖為本發明一較佳實施例之利用第2圖所示之重啟裝置自動重啟主機板以及記錄相關除錯資料之方法的流程圖。FIG. 4 is a flow chart showing a method for automatically restarting a motherboard and recording related debug data by using the restart device shown in FIG. 2 according to a preferred embodiment of the present invention.

100...重啟裝置100. . . Restart device

102...主機板102. . . motherboard

104...設定介面104. . . Setting interface

106...匯流排傳輸介面106. . . Bus transmission interface

108...影像擷取介面108. . . Image capture interface

110...可程式化晶片110. . . Programmable wafer

112...顯示裝置112. . . Display device

114...輸入輸出系統單元114. . . Input and output system unit

116...電源接腳116. . . Power pin

118...影像輸出介面118. . . Image output interface

128...儲存介面128. . . Storage interface

130...切換介面130. . . Switching interface

Claims (16)

一種自動重啟主機板以及記錄相關除錯資料之測試方法,其包含:設定開關機參數;一可程式化晶片啟動至少一主機板;該可程式化晶片累加該主機板之啟動次數;該可程式化晶片讀取該主機板執行開機時所產生之一除錯資料;該可程式化晶片在根據該除錯資料以及該開關機參數判斷出該主機板於執行開機的過程中當機時,關閉該主機板;該可程式化晶片在根據該除錯資料以及該開關參數判斷出該主機板已關閉時,重新啟動該主機板;以及根據該除錯資料以及該啟動次數產生一開關機測試資料。 A method for automatically restarting a motherboard and recording related debug data, comprising: setting a switch parameter; a programmable chip starts at least one motherboard; the programmable chip accumulates a number of startups of the motherboard; the programmable The wafer reads one of the debug data generated when the motherboard is booted; the programmable wafer is turned off when it is determined that the motherboard is down during the booting process according to the debug data and the switch parameters. The motherboard; the programmable chip restarts the motherboard when it is determined that the motherboard is closed according to the debugging data and the switch parameter; and generates a switch test data according to the debug data and the number of startups . 如請求項1所述之測試方法,其中該可程式化晶片讀取該主機板執行開機時所產生之該除錯資料包含該可程式化晶片讀取該主機板之一基本輸入輸出系統(Basic Input Output System,BIOS)或一統一可擴展韌體介面(Unified Extensible Firmware Interface,UEFI)執行開機自我測試(Power On Self Test,POST)時所產生之一除錯碼資料。 The test method of claim 1, wherein the programmable chip reads the debug data generated when the motherboard is booted, and the programmable wafer reads the basic input/output system of the motherboard (Basic) Input Output System (BIOS) or a Unified Extensible Firmware Interface (UEFI) generates one of the debug code data when performing Power On Self Test (POST). 如請求項2所述之測試方法,其中該可程式化晶片在根據該除錯資料以及該開關機參數判斷出該主機板於執行開機的過程中當 機時關閉該主機板包含:當該可程式化晶片判斷該除錯碼資料中之一除錯碼的偵測累加次數大於一特定值時,該可程式化晶片關閉該主機板。 The test method of claim 2, wherein the programmable chip determines that the motherboard is in the process of booting according to the debug data and the switch parameters Turning off the motherboard at the machine time includes: when the programmable chip determines that the detection accumulation time of one of the debug code data is greater than a specific value, the programmable wafer closes the motherboard. 如請求項2所述之測試方法,其中設定該開關機參數包含設定該主機板之一開機時間預設值,該可程式化晶片在根據該除錯資料以及該開關機參數判斷出該主機板於執行開機的過程中當機時關閉該主機板包含:當該可程式化晶片偵測到該除錯碼資料具有一除錯完成碼以及判斷該主機板之實際開機時間大於或等於該開機時間預設值時時,關閉該主機板。 The test method of claim 2, wherein setting the switch parameter comprises setting a boot time preset value of the motherboard, the programmable chip determining the motherboard according to the debug data and the switch parameter Turning off the motherboard during the booting process includes: when the programmable chip detects that the debug code data has a debug completion code and determines that the actual boot time of the motherboard is greater than or equal to the boot time When the preset value is up, the motherboard is turned off. 如請求項2所述之測試方法,其中設定該開關機參數包含設定該主機板之一關機時間預設值,該可程式化晶片在根據該除錯資料以及該開關機參數判斷出該主機板已關閉時重新啟動該主機板包含:當該可程式化晶片偵測到該除錯碼資料具有一關機狀態碼以及判斷該主機板之實際關機時間大於或等於該關機時間預設值時,啟動該主機板。 The test method of claim 2, wherein setting the switch parameter comprises setting a preset time of a shutdown time of the motherboard, the programmable chip determining the motherboard according to the debug data and the switch parameter Restarting the motherboard when closed includes: when the programmable chip detects that the debug code data has a shutdown status code and determines that the actual shutdown time of the motherboard is greater than or equal to the preset value of the shutdown time, starting The motherboard. 如請求項1所述之測試方法,其中該可程式化晶片讀取該主機板執行開機時所產生之該除錯資料包含:擷取該主機板之一當機畫面。 The test method of claim 1, wherein the programmable data generated by the programmable chip reading the motherboard is: capturing a screen of the motherboard. 一種可自動重啟主機板以及記錄相關除錯資料之重啟裝置,其包含:一設定介面,其用來設定對應至少一主機板之開關機參數;一匯流排傳輸介面,其用來電連接於該主機板之一輸入輸出系統單元以及一電源接腳;以及一可程式化晶片,其電連接於該匯流排傳輸介面以及該設定介面,該可程式化晶片包含:一開關機控制單元,其用來重啟該主機板;一計數單元,其用來計算該主機板之啟動次數;一除錯運算單元,其用來經由該匯流排傳輸介面讀取該主機板執行開機時所產生之一除錯資料、根據該除錯資料以及該開關機參數判斷出該主機板於執行開機的過程中當機時控制該開關機控制單元關閉該主機板,以及根據該除錯資料以及該開關機參數判斷出該主機板已關閉時控制該開關機控制單元重新啟動該主機板;以及一記錄單元,其用來根據該除錯資料以及該啟動次數產生一開關機測試資料。 A restart device capable of automatically restarting a motherboard and recording related debug data, comprising: a setting interface for setting switch parameters corresponding to at least one motherboard; a bus transmission interface for electrically connecting to the host An input/output system unit and a power pin; and a programmable chip electrically connected to the bus transmission interface and the setting interface, the programmable chip comprising: a switch control unit for Restarting the motherboard; a counting unit for calculating the number of startups of the motherboard; and a debugging operation unit for reading, by using the bus transmission interface, one of the debugging data generated when the motherboard is booted And determining, according to the debugging data and the switch parameter, that the motherboard controls the switch control unit to close the motherboard when the machine is in the process of performing the booting, and determining the fault according to the debug data and the switch parameter Controlling the switch control unit to restart the motherboard when the motherboard is closed; and a recording unit for using the debug data The number of starts and a switch generating test data. 如請求項7所示之重啟裝置,其中該除錯運算單元用來讀取該主機板之一基本輸入輸出系統或一統一可擴展韌體介面執行開機自我測試時所產生之一除錯碼資料。 The restarting device as claimed in claim 7, wherein the debugging unit is configured to read one of the basic input/output system of the motherboard or a unified scalable firmware interface to generate a debug code data when the boot self-test is performed. . 如請求項7所述之重啟裝置,其另包含:一顯示裝置,其電連接於該可程式化晶片,該顯示裝置用來顯示該除錯碼資料。 The restarting device of claim 7, further comprising: a display device electrically connected to the programmable chip, the display device for displaying the debug code data. 如請求項8所述之重啟裝置,其中該除錯運算單元用來於判斷該除錯碼資料中之一除錯碼的偵測累加次數大於一特定值時,控制該開關機控制單元關閉該主機板。 The restarting device of claim 8, wherein the debugging unit is configured to control the power on/off control unit to close the one of the error code data when the detection accumulation time is greater than a specific value. motherboard. 如請求項8所述之重啟裝置,其中該設定介面用來設定該主機板之一開機時間預設值,該除錯運算單元用來於偵測到該除錯碼資料具有一除錯完成碼以及判斷該主機板之實際開機時間大於或等於該開機時間預設值時,控制該開關機控制單元關閉該主機板。 The restarting device of claim 8, wherein the setting interface is configured to set a preset value of a boot time of the motherboard, and the debugging unit is configured to detect that the debug code data has a debug completion code. And determining that the actual boot time of the motherboard is greater than or equal to the preset value of the boot time, controlling the switch control unit to close the motherboard. 如請求項8所述之重啟裝置,其中該設定介面用來設定該主機板之一關機時間預設值,該除錯運算單元用來於偵測到該除錯碼資料具有一關機狀態碼以及判斷該主機板之實際關機時間大於或等於該關機時間預設值時,控制該開關機控制單元啟動該主機板。 The restarting device of claim 8, wherein the setting interface is configured to set a preset value of a shutdown time of the motherboard, and the debugging unit is configured to detect that the debugging code data has a shutdown status code and When it is determined that the actual shutdown time of the motherboard is greater than or equal to the preset value of the shutdown time, the control unit of the switch is controlled to start the motherboard. 如請求項8所述之重啟裝置,其另包含:一影像擷取介面,其電連接於該可程式化晶片,該除錯運算單元用來經由該影像擷取介面擷取該主機板之一當機畫面。 The restarting device of claim 8, further comprising: an image capturing interface electrically connected to the programmable chip, the debugging unit is configured to retrieve the motherboard through the image capturing interface Dang screen. 如請求項8所述之重啟裝置,其另包含:一儲存介面,其電連接於該可程式化晶片,該儲存介面用來傳送至該開關機測試資料至一儲存媒體。 The restarting device of claim 8, further comprising: a storage interface electrically connected to the programmable chip, the storage interface being configured to transmit the switch test data to a storage medium. 如請求項8所述之重啟裝置,其另包含:一切換介面,其電連接於該可程式化晶片,該切換介面用來切換該可程式化晶片對不同主機板之重啟測試。 The restarting device of claim 8, further comprising: a switching interface electrically connected to the programmable chip, the switching interface for switching the restart test of the programmable chip to different motherboards. 如請求項8所述之重啟裝置,其中該可程式化晶片為一場域可程式邏輯閘陣列(Field Programmable Gate Array,FPGA)晶片。 The restart device of claim 8, wherein the programmable chip is a Field Programmable Gate Array (FPGA) chip.
TW99140176A 2010-11-22 2010-11-22 Testing method for automatically rebooting a motherboard and recording related debug information and rebooting device thereof TWI436203B (en)

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