TWI429340B - Printed circuit board - Google Patents

Printed circuit board Download PDF

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TWI429340B
TWI429340B TW98120912A TW98120912A TWI429340B TW I429340 B TWI429340 B TW I429340B TW 98120912 A TW98120912 A TW 98120912A TW 98120912 A TW98120912 A TW 98120912A TW I429340 B TWI429340 B TW I429340B
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Taiwan
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power
layer
printed circuit
circuit board
reference layer
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TW98120912A
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Chinese (zh)
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TW201101942A (en
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Shou Kuo Hsu
Chun Jen Chen
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Hon Hai Prec Ind Co Ltd
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Description

印刷電路 Printed circuit

本發明係關於一種印刷電路板。 This invention relates to a printed circuit board.

組裝在印刷電路板上的積體電路通常具有一電源端及一接地端,電源端及接地端分別透過過孔與印刷電路板的電源層及接地層相連。然而,隨著科技的發展,積體電路朝著高頻及高速邁進。當積體電路高速工作時,積體電路的電源端產生的高頻噪音將經由過孔到達電源層,從而對印刷電路板上的其他元件造成影響,甚至損壞積體電路本身。 The integrated circuit assembled on the printed circuit board usually has a power terminal and a ground terminal. The power terminal and the ground terminal are respectively connected to the power layer and the ground layer of the printed circuit board through the via holes. However, with the development of technology, integrated circuits are moving toward high frequency and high speed. When the integrated circuit operates at high speed, the high-frequency noise generated at the power supply terminal of the integrated circuit will reach the power supply layer via the via hole, thereby affecting other components on the printed circuit board and even damaging the integrated circuit itself.

鑒於上述內容,有必要提供一種減少高頻噪音的印刷電路板。 In view of the above, it is necessary to provide a printed circuit board that reduces high frequency noise.

一種印刷電路板,包括層迭設置的一第一訊號層、一第一參考層、一第二參考層、一第二訊號層及貫穿該第一訊號層、第一參考層、第二參考層、第二訊號層的一第一電源過孔、一第二電源過孔,該第一電源過孔與該第一及第二參考層隔離,該第二電源過孔與該第一參考層相連,並與第二參考層隔離,該第一訊號層上設有一積體電路及一第一電源線,該第二訊號層上設有一電容及一第二電源線,該第二參考層上設有一挖空區域,該挖空區域在該第二訊號層上的投影至少部分與該第二電源線重疊,該第一電源線連接該積體電路的電源端與該第一電源過孔,該第二電源線 連接該第一電源過孔與該第二電源過孔,該電容的一端連接該第一電源過孔,另一端接地。 A printed circuit board includes a first signal layer, a first reference layer, a second reference layer, a second signal layer, and a first signal layer, a first reference layer, and a second reference layer a first power supply via of the second signal layer, a second power via, the first power via being isolated from the first and second reference layers, the second power via being connected to the first reference layer And being separated from the second reference layer, the first signal layer is provided with an integrated circuit and a first power line, the second signal layer is provided with a capacitor and a second power line, and the second reference layer is provided a hollowed out area, the projection of the hollowed out area on the second signal layer at least partially overlapping the second power line, the first power line connecting the power end of the integrated circuit and the first power via, Second power cord The first power via is connected to the second power via, and one end of the capacitor is connected to the first power via and the other end is grounded.

該印刷電路板透過在該第二參考層上設置該挖空區域,以將該第二電源線的參考層由該第二參考層變為該第一參考層,增加該第二電源線的阻抗值,以使該電源端產生的高頻噪音大部分流入該電容,並被該電容濾除,從而減少了高頻噪音。 The printed circuit board increases the impedance of the second power line by providing the hollowed out area on the second reference layer to change the reference layer of the second power line from the second reference layer to the first reference layer The value is such that most of the high frequency noise generated by the power supply terminal flows into the capacitor and is filtered by the capacitor, thereby reducing high frequency noise.

10‧‧‧印刷電路板 10‧‧‧Printed circuit board

100‧‧‧第一訊號層 100‧‧‧first signal layer

120‧‧‧積體電路 120‧‧‧ integrated circuit

121、Vdd‧‧‧電源端 121, Vdd‧‧‧ power terminal

122、GND‧‧‧接地端 122, GND‧‧‧ grounding terminal

123‧‧‧輸入輸出端 123‧‧‧Input and output

130‧‧‧第一電源線 130‧‧‧First power cord

200‧‧‧電源層 200‧‧‧Power layer

300‧‧‧接地層 300‧‧‧ Grounding layer

320‧‧‧挖空區域 320‧‧‧Knockout area

400‧‧‧第二訊號層 400‧‧‧second signal layer

410、670‧‧‧電容 410, 670‧‧‧ capacitor

420‧‧‧第二電源線 420‧‧‧second power cord

510‧‧‧第一電源過孔 510‧‧‧First power supply via

520‧‧‧第二電源過孔 520‧‧‧Second power supply via

530‧‧‧接地過孔 530‧‧‧ Grounding via

610‧‧‧積體電路單元 610‧‧‧Integrated circuit unit

620‧‧‧第一傳輸線 620‧‧‧First transmission line

630‧‧‧第一電感 630‧‧‧First inductance

640‧‧‧第二電感 640‧‧‧second inductance

650‧‧‧第二傳輸線 650‧‧‧second transmission line

660‧‧‧直流電源 660‧‧‧DC power supply

680‧‧‧第三電感 680‧‧‧ Third inductance

圖1係本發明印刷電路板的較佳實施方式的結構示意圖。 BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a schematic view showing the structure of a preferred embodiment of the printed circuit board of the present invention.

圖2係圖1的等效電路圖。 2 is an equivalent circuit diagram of FIG. 1.

請參閱圖1,本發明印刷電路板10的較佳實施方式包括一第一訊號層100、一第一參考層(如一電源層200)、一第二參考層(如一接地層300)、一第二訊號層400、一第一電源過孔510、一第二電源過孔520及一接地過孔530。該電源層200位於該第一訊號層100的下方,其是該印刷電路板10的電源系統,用於為該印刷電路板10上的元件供電。該接地層300位於電源層200的下方及該第二訊號層400的上方。該第一電源過孔510、第二電源過孔520及接地過孔530均為貫穿該第一訊號層100、電源層200、接地層300及第二訊號層400的通孔。在本實施方式中,該第一訊號層100與該電源層200之間,該電源層200與該接地層300之間及該接地層300與該第二訊號層400之間分別設有一絕緣層(圖未示),以對該第一訊號層100、電源層200、接地層300及第二訊號層400進行隔離,從而防止訊號和電流的相互干擾。 Referring to FIG. 1, a preferred embodiment of the printed circuit board 10 of the present invention includes a first signal layer 100, a first reference layer (such as a power layer 200), a second reference layer (such as a ground layer 300), and a first The second signal layer 400, a first power via 510, a second power via 520, and a ground via 530. The power plane 200 is located below the first signal layer 100, which is the power system of the printed circuit board 10 for powering components on the printed circuit board 10. The ground layer 300 is located below the power layer 200 and above the second signal layer 400. The first power via 510 , the second power via 520 , and the ground via 530 are through holes of the first signal layer 100 , the power layer 200 , the ground layer 300 , and the second signal layer 400 . In this embodiment, an insulating layer is disposed between the first signal layer 100 and the power layer 200, between the power layer 200 and the ground layer 300, and between the ground layer 300 and the second signal layer 400. (not shown), the first signal layer 100, the power layer 200, the ground layer 300, and the second signal layer 400 are isolated to prevent mutual interference of signals and currents.

該第一訊號層100上設有一積體電路120及一第一電源線130,該 積體電路120包括一電源端121,一接地端122及一輸入輸出端123。該電源端121為該積體電路120提供電源,該接地端122為該積體電路120提供參考電壓,該輸入輸出端123根據該積體電路120的預設功能來輸入和輸出訊號。該第二訊號層400上設有一電容410及一第二電源線420,該接地層300上位於該第二電源線420的正上方設有一挖空區域320。在本實施方式中,該挖空區域320是將該接地層300上的銅箔蝕刻掉而形成,其在該第二訊號層400上的投影與該第二電源線420重合。在其他實施方式中,該挖空區域320在該第二訊號層400上的投影至少部分與該第二電源線420重合。在本實施方式中,該電容410為濾波電容,其一端與該第一電源過孔510相連,另一端透過該接地過孔530接地,且該電容410實際設於該第二訊號層400的背面,但為了便於說明,故將該電容410示意在該第二訊號層400的正面。 An integrated circuit 120 and a first power line 130 are disposed on the first signal layer 100. The integrated circuit 120 includes a power terminal 121, a ground terminal 122, and an input and output terminal 123. The power supply terminal 121 supplies power to the integrated circuit 120. The ground terminal 122 provides a reference voltage for the integrated circuit 120. The input/output terminal 123 inputs and outputs signals according to a preset function of the integrated circuit 120. The second signal layer 400 is provided with a capacitor 410 and a second power line 420. The ground layer 300 is provided with a hollowed out area 320 directly above the second power line 420. In the present embodiment, the hollowed out area 320 is formed by etching away the copper foil on the ground layer 300, and the projection on the second signal layer 400 coincides with the second power line 420. In other embodiments, the projection of the hollowed out area 320 on the second signal layer 400 at least partially coincides with the second power line 420. In this embodiment, the capacitor 410 is a filter capacitor, one end of which is connected to the first power via 510, the other end is grounded through the ground via 530, and the capacitor 410 is actually disposed on the back of the second signal layer 400. However, for convenience of explanation, the capacitor 410 is illustrated on the front side of the second signal layer 400.

該第一電源過孔510透過該第一電源線130與該電源端121相連,並透過反焊盤與該電源層200及接地層300隔離。該第二電源過孔520與該電源層200相連,並透過該第二電源線420與該第一電源過孔510相連,還透過反焊盤與該接地層300隔離。該接地過孔530與該接地層300相連,並透過反焊盤與該電源層200隔離。 The first power via 510 is connected to the power terminal 121 through the first power line 130 and is isolated from the power layer 200 and the ground layer 300 through the anti-pad. The second power via 520 is connected to the power layer 200 and connected to the first power via 510 through the second power line 420, and is also isolated from the ground layer 300 through the anti-pad. The ground via 530 is connected to the ground layer 300 and is isolated from the power layer 200 through the anti-pad.

請繼續參閱圖2,本發明印刷電路板10的等效電路圖包括一積體電路單元610、一第一傳輸線620、一第一電感630、一第二電感640、一第二傳輸線650、一直流電源660、一電容670及一第三電感680。該積體電路單元610包括一電源端Vdd及一接地端GND。該積體電路單元610等效於該積體電路120,該電源端Vdd等效於該電源端121,該接地端GND等效於該接地端122。該第一傳輸線620 等效於該第一電源線130。該第一電感630等效於該第一電源過孔510的寄生電感。該第二電感640等效於該第二電源線420及該第二電源過孔520中從該第二訊號層400到該電源層200的部分產生的寄生電感。該第二傳輸線650等效於該電源層200。該直流電源660等效於該電源層200為該積體電路120提供的電源。該電容670等效於該電容410。該第三電感680等效於該電容410的寄生電感。 2, the equivalent circuit diagram of the printed circuit board 10 of the present invention includes an integrated circuit unit 610, a first transmission line 620, a first inductor 630, a second inductor 640, a second transmission line 650, and a continuous current. The power source 660, a capacitor 670 and a third inductor 680. The integrated circuit unit 610 includes a power terminal Vdd and a ground terminal GND. The integrated circuit unit 610 is equivalent to the integrated circuit 120. The power supply terminal Vdd is equivalent to the power supply terminal 121, and the ground terminal GND is equivalent to the ground terminal 122. The first transmission line 620 Equivalent to the first power line 130. The first inductor 630 is equivalent to the parasitic inductance of the first power via 510. The second inductor 640 is equivalent to the parasitic inductance generated by the second power supply line 420 and the second power supply via 520 from the second signal layer 400 to the power supply layer 200. The second transmission line 650 is equivalent to the power layer 200. The DC power source 660 is equivalent to the power source 200 provides power to the integrated circuit 120. This capacitor 670 is equivalent to the capacitor 410. The third inductor 680 is equivalent to the parasitic inductance of the capacitor 410.

當該積體電路120工作時,該電源端121產生高頻噪音,該高頻噪音透過該第一電源線130及該第一電源過孔510到達該第二訊號層400後被分成兩路,一路經由該第二電源線420及該第二電源過孔520到達該電源層200,另一路流入該電容410,並被該電容410濾除掉。該電源層200透過該第二電源線420、第二電源過孔520、第一電源過孔510及第一電源線130向該積體電路120提供直流電源。 When the integrated circuit 120 is in operation, the power terminal 121 generates high frequency noise, and the high frequency noise is divided into two paths after reaching the second signal layer 400 through the first power line 130 and the first power source via 510. The power supply layer 200 is reached through the second power line 420 and the second power via 520, and the other path flows into the capacitor 410 and is filtered by the capacitor 410. The power supply layer 200 supplies DC power to the integrated circuit 120 through the second power line 420, the second power via 520, the first power via 510, and the first power line 130.

噪音電流的大小與其流入路徑的阻抗值成反比,路徑的阻抗值越大,流入的噪音電流就越小。在本實施方式中,由於該接地層300上設有該挖空區域320,該挖空區域320使得該第二電源線420的參考層由該接地層300變為該電源層200,從而增加了該第二電源線420到參考面的間距,進而增加該第二電源線420的阻抗值,即增加了圖2中該第二電感640的電感值。由於該第二電感640的電感值大於該第一電感630的電感值,故大部分噪音電流將流入該電容410,並被該電容410濾除掉,從而減少了流入該電源層200的高頻噪音。 The magnitude of the noise current is inversely proportional to the impedance value of the inflow path. The larger the impedance value of the path, the smaller the noise current flowing in. In the embodiment, the hollowed out area 320 is disposed on the ground layer 300, and the hollowed out area 320 changes the reference layer of the second power line 420 from the ground layer 300 to the power layer 200, thereby increasing The spacing of the second power line 420 to the reference surface, thereby increasing the impedance of the second power line 420, increases the inductance of the second inductor 640 of FIG. Since the inductance value of the second inductor 640 is greater than the inductance value of the first inductor 630, most of the noise current will flow into the capacitor 410 and be filtered out by the capacitor 410, thereby reducing the high frequency flowing into the power layer 200. noise.

綜上所述,本發明符合發明專利要件,爰依法提出專利申請。惟 ,以上所述者僅為本發明之較佳實施例,舉凡熟悉本案技藝之人士,在爰依本發明精神所作之等效修飾或變化,皆應涵蓋於以下之申請專利範圍內。 In summary, the present invention complies with the requirements of the invention patent and submits a patent application according to law. but The above description is only the preferred embodiment of the present invention, and equivalent modifications or variations made by those skilled in the art will be included in the following claims.

10‧‧‧印刷電路板 10‧‧‧Printed circuit board

100‧‧‧第一訊號層 100‧‧‧first signal layer

120‧‧‧積體電路 120‧‧‧ integrated circuit

121‧‧‧電源端 121‧‧‧Power terminal

122‧‧‧接地端 122‧‧‧ Grounding terminal

123‧‧‧輸入輸出端 123‧‧‧Input and output

130‧‧‧第一電源線 130‧‧‧First power cord

200‧‧‧電源層 200‧‧‧Power layer

300‧‧‧接地層 300‧‧‧ Grounding layer

320‧‧‧挖空區域 320‧‧‧Knockout area

400‧‧‧第二訊號層 400‧‧‧second signal layer

410‧‧‧電容 410‧‧‧ Capacitance

420‧‧‧第二電源線 420‧‧‧second power cord

510‧‧‧第一電源過孔 510‧‧‧First power supply via

520‧‧‧第二電源過孔 520‧‧‧Second power supply via

530‧‧‧接地過孔 530‧‧‧ Grounding via

Claims (7)

一種印刷電路板,包括層迭設置的一第一訊號層、一第一參考層、一第二參考層、一第二訊號層及貫穿該第一訊號層、第一參考層、第二參考層、第二訊號層的一第一電源過孔、一第二電源過孔,該第一電源過孔與該第一及第二參考層隔離,該第二電源過孔與該第一參考層相連,並與第二參考層隔離,該第一訊號層上設有一積體電路及一第一電源線,該第二訊號層上設有一電容及一第二電源線,該第二參考層上設有一挖空區域,該挖空區域在該第二訊號層上的投影至少部分與該第二電源線重疊,以使該第二電源線的參考層由該第二參考層變為該第一參考層,從而增加該第二電源線到參考層的間距,進而增加該第二電源線的阻抗值,該第一電源線連接該積體電路的電源端與該第一電源過孔,該第二電源線連接該第一電源過孔與該第二電源過孔,該電容的一端連接該第一電源過孔,另一端接地。 A printed circuit board includes a first signal layer, a first reference layer, a second reference layer, a second signal layer, and a first signal layer, a first reference layer, and a second reference layer a first power supply via of the second signal layer, a second power via, the first power via being isolated from the first and second reference layers, the second power via being connected to the first reference layer And being separated from the second reference layer, the first signal layer is provided with an integrated circuit and a first power line, the second signal layer is provided with a capacitor and a second power line, and the second reference layer is provided a hollowed out area, the projection of the hollowed out area on the second signal layer at least partially overlapping the second power line, such that the reference layer of the second power line changes from the second reference layer to the first reference a layer, thereby increasing a pitch of the second power line to the reference layer, thereby increasing an impedance value of the second power line, the first power line connecting the power end of the integrated circuit and the first power via, the second a power line connecting the first power via and the second power via, the power The first end connected to the power source through hole and ground. 如專利申請範圍第1項所述之印刷電路板,其中該第一電源過孔透過反焊盤與該第一及第二參考層隔離。 The printed circuit board of claim 1, wherein the first power via is isolated from the first and second reference layers by an anti-pad. 如專利申請範圍第1項所述之印刷電路板,其中該第二電源過孔透過反焊盤與第二參考層隔離。 The printed circuit board of claim 1, wherein the second power via is isolated from the second reference layer by the anti-pad. 如專利申請範圍第1項所述之印刷電路板,其中該第一參考層為一電源層。 The printed circuit board of claim 1, wherein the first reference layer is a power layer. 如專利申請範圍第1項所述之印刷電路板,其中該第二參考層為一接地層。 The printed circuit board of claim 1, wherein the second reference layer is a ground layer. 如專利申請範圍第1項所述之印刷電路板,其中該電容的另一端是透過一接地過孔接地的。 The printed circuit board of claim 1, wherein the other end of the capacitor is grounded through a ground via. 如專利申請範圍第1項所述之印刷電路板,其中該挖空區域是將該第二參考層上的銅箔蝕刻掉而形成。 The printed circuit board of claim 1, wherein the hollowed out area is formed by etching away the copper foil on the second reference layer.
TW98120912A 2009-06-23 2009-06-23 Printed circuit board TWI429340B (en)

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TWI429340B true TWI429340B (en) 2014-03-01

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Family Applications (1)

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TW98120912A TWI429340B (en) 2009-06-23 2009-06-23 Printed circuit board

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TW201101942A (en) 2011-01-01

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